EMR3Nem.cpp@ 107466

Last change on this file since 107466 was 107227, checked in by vboxsync, 2 months ago
VMM: Cleaning up ARMv8 / x86 split. jiraref:VBP-1470
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1	/* $Id: EMR3Nem.cpp 107227 2024-12-04 15:20:14Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - NEM interface.
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_EM
33	#define VMCPU_INCL_CPUM_GST_CTX
34	#include <VBox/vmm/em.h>
35	#include <VBox/vmm/vmm.h>
36	#include <VBox/vmm/selm.h>
37	#include <VBox/vmm/trpm.h>
38	#include <VBox/vmm/iem.h>
39	#include <VBox/vmm/iom.h>
40	#include <VBox/vmm/nem.h>
41	#include <VBox/vmm/dbgf.h>
42	#include <VBox/vmm/pgm.h>
43	#include <VBox/vmm/tm.h>
44	#include <VBox/vmm/mm.h>
45	#include <VBox/vmm/ssm.h>
46	#include <VBox/vmm/pdmapi.h>
47	#include <VBox/vmm/pdmcritsect.h>
48	#include <VBox/vmm/pdmqueue.h>
49	#include "EMInternal.h"
50	#include <VBox/vmm/vm.h>
51	#include <VBox/vmm/gim.h>
52	#include <VBox/vmm/cpumdis.h>
53	#include <VBox/dis.h>
54	#include <VBox/err.h>
55	#include <VBox/vmm/dbgf.h>
56	#include "VMMTracing.h"
57
58	#include <iprt/asm.h>
59
60	#include "EMInline.h"
61
62
63	/*********************************************************************************************************************************
64	* Internal Functions *
65	*********************************************************************************************************************************/
66	static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
67	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
68	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
69	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
70
71	#define EMHANDLERC_WITH_NEM
72	#define emR3ExecuteInstruction emR3NemExecuteInstruction
73	#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
74	#include "EMHandleRCTmpl.h"
75
76
77	/**
78	* Executes instruction in NEM mode if we can.
79	*
80	* This is somewhat comparable to REMR3EmulateInstruction.
81	*
82	* @returns VBox strict status code.
83	* @retval VINF_EM_DBG_STEPPED on success.
84	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
85	* HM right now.
86	*
87	* @param pVM The cross context VM structure.
88	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
89	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
90	* @thread EMT.
91	*/
92	VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
93	{
94	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
95
96	if (!NEMR3CanExecuteGuest(pVM, pVCpu))
97	return VINF_EM_RESCHEDULE;
98
99	#ifdef VBOX_VMM_TARGET_ARMV8
100	uint64_t const uOldPc = pVCpu->cpum.GstCtx.Pc.u64;
101	#elif defined(VBOX_VMM_TARGET_X86)
102	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
103	#else
104	# error "port me"
105	#endif
106	for (;;)
107	{
108	/*
109	* Service necessary FFs before going into HM.
110	*/
111	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
112	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
113	{
114	VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
115	if (rcStrict != VINF_SUCCESS)
116	{
117	Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
118	return rcStrict;
119	}
120	}
121
122	/*
123	* Go execute it.
124	*/
125	bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
126	VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
127	NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
128	LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
129
130	/*
131	* Handle high priority FFs and informational status codes. We don't do
132	* normal FF processing the caller or the next call can deal with them.
133	*/
134	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
135	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
136	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
137	{
138	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
139	LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
140	}
141
142	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
143	{
144	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
145	Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
146	}
147
148	/*
149	* Done?
150	*/
151	#ifdef VBOX_VMM_TARGET_ARMV8
152	CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_PC);
153	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
154	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
155	\|\| pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
156	{
157	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
158	rcStrict = VINF_EM_DBG_STEPPED;
159	Log(("emR3NemSingleInstruction: returns %Rrc (pc %llx -> %llx)\n",
160	VBOXSTRICTRC_VAL(rcStrict), uOldPc, pVCpu->cpum.GstCtx.Pc.u64));
161	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
162	return rcStrict;
163	}
164
165	#elif defined(VBOX_VMM_TARGET_X86)
166	CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
167	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
168	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
169	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
170	{
171	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
172	rcStrict = VINF_EM_DBG_STEPPED;
173	Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
174	VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
175	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
176	return rcStrict;
177	}
178
179	#else
180	# error "port me"
181	#endif
182	}
183	}
184
185
186	/**
187	* Executes one (or perhaps a few more) instruction(s).
188	*
189	* @returns VBox status code suitable for EM.
190	*
191	* @param pVM The cross context VM structure.
192	* @param pVCpu The cross context virtual CPU structure.
193	* @param rcRC Return code from RC.
194	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
195	* instruction and prefix the log output with this text.
196	*/
197	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
198	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
199	#else
200	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
201	#endif
202	{
203	NOREF(rcRC);
204
205	#ifdef LOG_ENABLED
206	/*
207	* Log it.
208	*/
209	# ifdef VBOX_VMM_TARGET_ARMV8
210	Log(("EMINS: %RGv SP_EL0=%RGv SP_EL1=%RGv\n", (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64,
211	(RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[0].u64, (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[1].u64));
212	if (pszPrefix)
213	{
214	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
215	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
216	}
217	# elif defined(VBOX_VMM_TARGET_X86)
218	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
219	if (pszPrefix)
220	{
221	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
222	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
223	}
224	# else
225	# error "port me"
226	# endif
227	#endif
228
229	/*
230	* Use IEM and fallback on REM if the functionality is missing.
231	* Once IEM gets mature enough, nothing should ever fall back.
232	*/
233	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
234
235	VBOXSTRICTRC rcStrict;
236	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
237	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
238	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
239	{
240	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
241	rcStrict = IEMExecOne(pVCpu);
242	}
243	else
244	{
245	RT_UNTRUSTED_VALIDATED_FENCE();
246	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
247	LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
248	}
249
250	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
251
252	NOREF(pVM);
253	return VBOXSTRICTRC_TODO(rcStrict);
254	}
255
256
257	/**
258	* Executes one (or perhaps a few more) instruction(s).
259	* This is just a wrapper for discarding pszPrefix in non-logging builds.
260	*
261	* @returns VBox status code suitable for EM.
262	* @param pVM The cross context VM structure.
263	* @param pVCpu The cross context virtual CPU structure.
264	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
265	* instruction and prefix the log output with this text.
266	* @param rcGC GC return code
267	*/
268	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
269	{
270	#ifdef LOG_ENABLED
271	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
272	#else
273	RT_NOREF_PV(pszPrefix);
274	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
275	#endif
276	}
277
278	/**
279	* Executes one (or perhaps a few more) IO instruction(s).
280	*
281	* @returns VBox status code suitable for EM.
282	* @param pVM The cross context VM structure.
283	* @param pVCpu The cross context virtual CPU structure.
284	*/
285	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
286	{
287	RT_NOREF_PV(pVM);
288	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
289
290	/*
291	* Hand it over to the interpreter.
292	*/
293	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
294	VBOXSTRICTRC rcStrict;
295	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
296	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
297	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
298	{
299	rcStrict = IEMExecOne(pVCpu);
300	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
301	STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
302	}
303	else
304	{
305	RT_UNTRUSTED_VALIDATED_FENCE();
306	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
307	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
308	STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
309	}
310
311	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
312	return VBOXSTRICTRC_TODO(rcStrict);
313	}
314
315
316	/**
317	* Process NEM specific forced actions.
318	*
319	* This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
320	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
321	*
322	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
323	* EM statuses.
324	* @param pVM The cross context VM structure.
325	* @param pVCpu The cross context virtual CPU structure.
326	*/
327	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
328	{
329	/*
330	* Sync page directory should not happen in NEM mode.
331	*/
332	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
333	{
334	Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
335	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
336	}
337
338	#ifndef VBOX_WITH_ONLY_PGM_NEM_MODE
339	/*
340	* Allocate handy pages (just in case the above actions have consumed some pages).
341	*/
342	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
343	{
344	int rc = PGMR3PhysAllocateHandyPages(pVM);
345	if (RT_FAILURE(rc))
346	return rc;
347	}
348	#endif
349
350	/*
351	* Check whether we're out of memory now.
352	*
353	* This may stem from some of the above actions or operations that has been executed
354	* since we ran FFs. The allocate handy pages must for instance always be followed by
355	* this check.
356	*/
357	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
358	return VINF_EM_NO_MEMORY;
359
360	return VINF_SUCCESS;
361	}
362
363
364	/**
365	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
366	*
367	* This function contains the inner EM execution loop for NEM (the outer loop
368	* being in EMR3ExecuteVM()).
369	*
370	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE,
371	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
372	*
373	* @param pVM The cross context VM structure.
374	* @param pVCpu The cross context virtual CPU structure.
375	* @param pfFFDone Where to store an indicator telling whether or not
376	* FFs were done before returning.
377	*/
378	VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
379	{
380	VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
381
382	#ifdef VBOX_VMM_TARGET_ARMV8
383	LogFlow(("emR3NemExecute%d: (pc=%RGv)\n", pVCpu->idCpu, (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64));
384	#elif defined(VBOX_VMM_TARGET_X86)
385	LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
386	#else
387	# error "port me"
388	#endif
389	*pfFFDone = false;
390
391	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
392
393	/*
394	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
395	*/
396	for (;;)
397	{
398	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
399
400	/*
401	* Check that we can execute in NEM mode.
402	*/
403	if (NEMR3CanExecuteGuest(pVM, pVCpu))
404	{ /* likely */ }
405	else
406	{
407	rcStrict = VINF_EM_RESCHEDULE_REM;
408	break;
409	}
410
411	/*
412	* Process high priority pre-execution raw-mode FFs.
413	*/
414	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
415	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
416	{
417	rcStrict = emR3NemForcedActions(pVM, pVCpu);
418	if (rcStrict != VINF_SUCCESS)
419	break;
420	}
421
422	#ifdef LOG_ENABLED
423	/*
424	* Log important stuff before entering GC.
425	*/
426	# ifdef VBOX_VMM_TARGET_X86
427	if (TRPMHasTrap(pVCpu))
428	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
429
430	if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP \| CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_RFLAGS \| CPUMCTX_EXTRN_SS
431	\| CPUMCTX_EXTRN_RSP \| CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR4 \| CPUMCTX_EXTRN_EFER)))
432	{
433	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
434	if (pVM->cCpus == 1)
435	{
436	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
437	Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
438	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
439	Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
440	else
441	Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
442	}
443	else
444	{
445	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
446	Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
447	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
448	Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
449	else
450	Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
451	}
452	}
453	# elif defined(VBOX_VMM_TARGET_ARMV8)
454	if (!(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_PC))
455	{
456	/** @todo better logging */
457	if (pVM->cCpus == 1)
458	Log(("NEM: %RX64\n", pVCpu->cpum.GstCtx.Pc.u64));
459	else
460	Log(("NEM-CPU%d: %RX64\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.Pc.u64));
461	}
462	# else
463	# error "port me"
464	# endif
465	else if (pVM->cCpus == 1)
466	Log(("NEMRx: -> NEMR3RunGC\n"));
467	else
468	Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
469	#endif /* LOG_ENABLED */
470
471	/*
472	* Execute the code.
473	*/
474	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
475	{
476	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
477	STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
478	rcStrict = NEMR3RunGC(pVM, pVCpu);
479	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
480	}
481	else
482	{
483	/* Give up this time slice; virtual time continues */
484	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
485	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
486	RTThreadSleep(5);
487	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
488	rcStrict = VINF_SUCCESS;
489	}
490
491
492	/*
493	* Deal with high priority post execution FFs before doing anything else.
494	*/
495	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
496	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
497	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
498	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
499
500	/*
501	* Process the returned status code.
502	*/
503	if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
504	break;
505
506	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
507	if (rcStrict != VINF_SUCCESS)
508	break;
509
510	/*
511	* Check and execute forced actions.
512	*/
513	#ifdef VBOX_HIGH_RES_TIMERS_HACK
514	TMTimerPollVoid(pVM, pVCpu);
515	#endif
516	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
517	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
518	{
519	rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
520	VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
521	if ( rcStrict != VINF_SUCCESS
522	&& rcStrict != VINF_EM_RESCHEDULE_EXEC_ENGINE)
523	{
524	*pfFFDone = true;
525	break;
526	}
527	}
528	}
529
530	/*
531	* Return to outer loop, making sure the fetch all state as we leave.
532	*
533	* Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
534	* status over import errors.
535	*/
536	if (pVCpu->cpum.GstCtx.fExtrn)
537	{
538	int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
539	AssertReturn(RT_SUCCESS(rcImport) \|\| RT_FAILURE_NP(rcStrict), rcImport);
540	}
541	#if defined(LOG_ENABLED) && defined(DEBUG)
542	RTLogFlush(NULL);
543	#endif
544	return rcStrict;
545	}
546

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 107466

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