EMR3Nem.cpp@ 80333

Last change on this file since 80333 was 80333, checked in by vboxsync, 5 years ago
VMM: Eliminating the VBOX_BUGREF_9217_PART_I preprocessor macro. bugref:9217
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 19.1 KB

Line
1	/* $Id: EMR3Nem.cpp 80333 2019-08-16 20:28:38Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - NEM interface.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_EM
23	#define VMCPU_INCL_CPUM_GST_CTX
24	#include <VBox/vmm/em.h>
25	#include <VBox/vmm/vmm.h>
26	#include <VBox/vmm/selm.h>
27	#include <VBox/vmm/trpm.h>
28	#include <VBox/vmm/iem.h>
29	#include <VBox/vmm/iom.h>
30	#include <VBox/vmm/nem.h>
31	#include <VBox/vmm/dbgf.h>
32	#include <VBox/vmm/pgm.h>
33	#ifdef VBOX_WITH_REM
34	# include <VBox/vmm/rem.h>
35	#endif
36	#include <VBox/vmm/tm.h>
37	#include <VBox/vmm/mm.h>
38	#include <VBox/vmm/ssm.h>
39	#include <VBox/vmm/pdmapi.h>
40	#include <VBox/vmm/pdmcritsect.h>
41	#include <VBox/vmm/pdmqueue.h>
42	#include "EMInternal.h"
43	#include <VBox/vmm/vm.h>
44	#include <VBox/vmm/gim.h>
45	#include <VBox/vmm/cpumdis.h>
46	#include <VBox/dis.h>
47	#include <VBox/disopcode.h>
48	#include <VBox/err.h>
49	#include <VBox/vmm/dbgf.h>
50	#include "VMMTracing.h"
51
52	#include <iprt/asm.h>
53
54
55	/*********************************************************************************************************************************
56	* Internal Functions *
57	*********************************************************************************************************************************/
58	static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
59	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
60	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
61	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
62
63	#define EMHANDLERC_WITH_NEM
64	#define emR3ExecuteInstruction emR3NemExecuteInstruction
65	#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
66	#include "EMHandleRCTmpl.h"
67
68
69	/**
70	* Executes instruction in NEM mode if we can.
71	*
72	* This is somewhat comparable to REMR3EmulateInstruction.
73	*
74	* @returns VBox strict status code.
75	* @retval VINF_EM_DBG_STEPPED on success.
76	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
77	* HM right now.
78	*
79	* @param pVM The cross context VM structure.
80	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
81	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
82	* @thread EMT.
83	*/
84	VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
85	{
86	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
87
88	if (!NEMR3CanExecuteGuest(pVM, pVCpu))
89	return VINF_EM_RESCHEDULE;
90
91	uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
92	for (;;)
93	{
94	/*
95	* Service necessary FFs before going into HM.
96	*/
97	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
98	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
99	{
100	VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
101	if (rcStrict != VINF_SUCCESS)
102	{
103	Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
104	return rcStrict;
105	}
106	}
107
108	/*
109	* Go execute it.
110	*/
111	bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
112	VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
113	NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
114	LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
115
116	/*
117	* Handle high priority FFs and informational status codes. We don't do
118	* normal FF processing the caller or the next call can deal with them.
119	*/
120	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
121	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
122	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
123	{
124	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
125	LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
126	}
127
128	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
129	{
130	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
131	Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
132	}
133
134	/*
135	* Done?
136	*/
137	CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
138	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
139	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
140	\|\| pVCpu->cpum.GstCtx.rip != uOldRip)
141	{
142	if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
143	rcStrict = VINF_EM_DBG_STEPPED;
144	Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
145	VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
146	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
147	return rcStrict;
148	}
149	}
150	}
151
152
153	/**
154	* Executes one (or perhaps a few more) instruction(s).
155	*
156	* @returns VBox status code suitable for EM.
157	*
158	* @param pVM The cross context VM structure.
159	* @param pVCpu The cross context virtual CPU structure.
160	* @param rcRC Return code from RC.
161	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
162	* instruction and prefix the log output with this text.
163	*/
164	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
165	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
166	#else
167	static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
168	#endif
169	{
170	NOREF(rcRC);
171
172	#ifdef LOG_ENABLED
173	/*
174	* Log it.
175	*/
176	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
177	if (pszPrefix)
178	{
179	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
180	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
181	}
182	#endif
183
184	/*
185	* Use IEM and fallback on REM if the functionality is missing.
186	* Once IEM gets mature enough, nothing should ever fall back.
187	*/
188	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
189
190	VBOXSTRICTRC rcStrict;
191	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
192	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
193	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
194	{
195	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
196	rcStrict = IEMExecOne(pVCpu);
197	}
198	else
199	{
200	RT_UNTRUSTED_VALIDATED_FENCE();
201	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
202	LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
203	}
204
205	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
206
207	if ( rcStrict == VERR_IEM_ASPECT_NOT_IMPLEMENTED
208	\|\| rcStrict == VERR_IEM_INSTR_NOT_IMPLEMENTED)
209	{
210	#ifdef VBOX_WITH_REM
211	STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
212	CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
213	EMRemLock(pVM);
214	/* Flush the recompiler TLB if the VCPU has changed. */
215	if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
216	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
217	pVM->em.s.idLastRemCpu = pVCpu->idCpu;
218
219	rcStrict = REMR3EmulateInstruction(pVM, pVCpu);
220	EMRemUnlock(pVM);
221	STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
222	#else /* !VBOX_WITH_REM */
223	NOREF(pVM);
224	#endif /* !VBOX_WITH_REM */
225	}
226	return VBOXSTRICTRC_TODO(rcStrict);
227	}
228
229
230	/**
231	* Executes one (or perhaps a few more) instruction(s).
232	* This is just a wrapper for discarding pszPrefix in non-logging builds.
233	*
234	* @returns VBox status code suitable for EM.
235	* @param pVM The cross context VM structure.
236	* @param pVCpu The cross context virtual CPU structure.
237	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
238	* instruction and prefix the log output with this text.
239	* @param rcGC GC return code
240	*/
241	DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
242	{
243	#ifdef LOG_ENABLED
244	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
245	#else
246	RT_NOREF_PV(pszPrefix);
247	return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
248	#endif
249	}
250
251	/**
252	* Executes one (or perhaps a few more) IO instruction(s).
253	*
254	* @returns VBox status code suitable for EM.
255	* @param pVM The cross context VM structure.
256	* @param pVCpu The cross context virtual CPU structure.
257	*/
258	static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
259	{
260	RT_NOREF_PV(pVM);
261	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
262
263	/*
264	* Hand it over to the interpreter.
265	*/
266	CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
267	VBOXSTRICTRC rcStrict;
268	uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
269	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
270	if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
271	{
272	rcStrict = IEMExecOne(pVCpu);
273	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
274	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
275	}
276	else
277	{
278	RT_UNTRUSTED_VALIDATED_FENCE();
279	rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
280	LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
281	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
282	}
283
284	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
285	return VBOXSTRICTRC_TODO(rcStrict);
286	}
287
288
289	/**
290	* Process NEM specific forced actions.
291	*
292	* This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
293	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
294	*
295	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
296	* EM statuses.
297	* @param pVM The cross context VM structure.
298	* @param pVCpu The cross context virtual CPU structure.
299	*/
300	static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
301	{
302	/*
303	* Sync page directory should not happen in NEM mode.
304	*/
305	if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
306	{
307	Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
308	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
309	}
310
311	/*
312	* Allocate handy pages (just in case the above actions have consumed some pages).
313	*/
314	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
315	{
316	int rc = PGMR3PhysAllocateHandyPages(pVM);
317	if (RT_FAILURE(rc))
318	return rc;
319	}
320
321	/*
322	* Check whether we're out of memory now.
323	*
324	* This may stem from some of the above actions or operations that has been executed
325	* since we ran FFs. The allocate handy pages must for instance always be followed by
326	* this check.
327	*/
328	if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
329	return VINF_EM_NO_MEMORY;
330
331	return VINF_SUCCESS;
332	}
333
334
335	/**
336	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
337	*
338	* This function contains the raw-mode version of the inner
339	* execution loop (the outer loop being in EMR3ExecuteVM()).
340	*
341	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
342	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
343	*
344	* @param pVM The cross context VM structure.
345	* @param pVCpu The cross context virtual CPU structure.
346	* @param pfFFDone Where to store an indicator telling whether or not
347	* FFs were done before returning.
348	*/
349	VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
350	{
351	VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
352
353	LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
354	*pfFFDone = false;
355
356	STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
357
358	/*
359	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
360	*/
361	for (;;)
362	{
363	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
364
365	#if 0
366	/* Check if a forced reschedule is pending. */
367	if (NEMR3IsRescheduleRequired(pVCpu))
368	{
369	rcStrict = VINF_EM_RESCHEDULE;
370	break;
371	}
372	#endif
373
374	/*
375	* Process high priority pre-execution raw-mode FFs.
376	*/
377	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
378	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
379	{
380	rcStrict = emR3NemForcedActions(pVM, pVCpu);
381	if (rcStrict != VINF_SUCCESS)
382	break;
383	}
384
385	#ifdef LOG_ENABLED
386	/*
387	* Log important stuff before entering GC.
388	*/
389	if (TRPMHasTrap(pVCpu))
390	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
391
392	if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP \| CPUMCTX_EXTRN_CS \| CPUMCTX_EXTRN_RFLAGS \| CPUMCTX_EXTRN_SS
393	\| CPUMCTX_EXTRN_RSP \| CPUMCTX_EXTRN_CR0 \| CPUMCTX_EXTRN_CR4 \| CPUMCTX_EXTRN_EFER)))
394	{
395	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
396	if (pVM->cCpus == 1)
397	{
398	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
399	Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
400	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
401	Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
402	else
403	Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
404	}
405	else
406	{
407	if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
408	Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
409	else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
410	Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
411	else
412	Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
413	}
414	}
415	else if (pVM->cCpus == 1)
416	Log(("NEMRx: -> NEMR3RunGC\n"));
417	else
418	Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
419	#endif /* LOG_ENABLED */
420
421	/*
422	* Execute the code.
423	*/
424	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
425	{
426	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
427	STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
428	rcStrict = NEMR3RunGC(pVM, pVCpu);
429	STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
430	}
431	else
432	{
433	/* Give up this time slice; virtual time continues */
434	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
435	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
436	RTThreadSleep(5);
437	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
438	rcStrict = VINF_SUCCESS;
439	}
440
441
442	/*
443	* Deal with high priority post execution FFs before doing anything else.
444	*/
445	VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
446	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
447	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
448	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
449
450	/*
451	* Process the returned status code.
452	*/
453	if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
454	break;
455
456	rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
457	if (rcStrict != VINF_SUCCESS)
458	break;
459
460	/*
461	* Check and execute forced actions.
462	*/
463	#ifdef VBOX_HIGH_RES_TIMERS_HACK
464	TMTimerPollVoid(pVM, pVCpu);
465	#endif
466	if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
467	\|\| VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
468	{
469	rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
470	VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
471	if ( rcStrict != VINF_SUCCESS
472	&& rcStrict != VINF_EM_RESCHEDULE_HM)
473	{
474	*pfFFDone = true;
475	break;
476	}
477	}
478	}
479
480	/*
481	* Return to outer loop, making sure the fetch all state as we leave.
482	*
483	* Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
484	* status over import errors.
485	*/
486	if (pVCpu->cpum.GstCtx.fExtrn)
487	{
488	int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
489	AssertReturn(RT_SUCCESS(rcImport) \|\| RT_FAILURE_NP(rcStrict), rcImport);
490	}
491	#if defined(LOG_ENABLED) && defined(DEBUG)
492	RTLogFlush(NULL);
493	#endif
494	return rcStrict;
495	}
496

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 80333

Download in other formats: