GIMHv.cpp@ 51644

Last change on this file since 51644 was 51644, checked in by vboxsync, 10 years ago
VMM/GIM: Fix wrongly committed testing bits.
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1	/* $Id: GIMHv.cpp 51644 2014-06-18 11:08:40Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, Hyper-V implementation.
4	*/
5
6	/*
7	* Copyright (C) 2014 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_GIM
22	#include "GIMInternal.h"
23
24	#include <iprt/assert.h>
25	#include <iprt/err.h>
26	#include <iprt/string.h>
27	#include <iprt/mem.h>
28	#include <iprt/spinlock.h>
29
30	#include <VBox/vmm/cpum.h>
31	#include <VBox/vmm/ssm.h>
32	#include <VBox/vmm/vm.h>
33	#include <VBox/vmm/hm.h>
34	#include <VBox/vmm/pdmapi.h>
35	#include <VBox/version.h>
36
37	/*******************************************************************************
38	* Defined Constants And Macros *
39	*******************************************************************************/
40	//#define GIMHV_HYPERCALL "GIMHvHypercall"
41	#ifdef VBOX_WITH_STATISTICS
42	# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
43	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
44	#else
45	# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
46	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
47	#endif
48
49	/**
50	* Array of MSR ranges supported by Hyper-V.
51	*/
52	static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
53	{
54	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
55	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
56	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
57	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
58	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
59	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
60	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
61	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
62	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
63	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
64	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
65	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
66	};
67	#undef GIMHV_MSR
68
69
70	/**
71	* Initializes the Hyper-V GIM provider.
72	*
73	* @returns VBox status code.
74	* @param pVM Pointer to the VM.
75	* @param uVersion The interface version this VM should use.
76	*/
77	VMMR3_INT_DECL(int) GIMR3HvInit(PVM pVM)
78	{
79	AssertReturn(pVM, VERR_INVALID_PARAMETER);
80	AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
81
82	int rc;
83	PGIMHV pHv = &pVM->gim.s.u.Hv;
84
85	/*
86	* Determine interface capabilities based on the version.
87	*/
88	if (!pVM->gim.s.u32Version)
89	{
90	pHv->uBaseFeat = 0
91	//\| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
92	\| GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
93	//\| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
94	//\| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
95	//\| GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
96	\| GIM_HV_BASE_FEAT_HYPERCALL_MSRS
97	\| GIM_HV_BASE_FEAT_VP_ID_MSR
98	//\| GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
99	//\| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
100	\| GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
101	//\| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
102	\| GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
103	//\| GIM_HV_BASE_FEAT_DEBUG_MSRS
104	;
105
106	pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ;
107	}
108
109	/*
110	* Populate the required fields in MMIO2 region records for registering.
111	*/
112	AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
113	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
114	pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
115	pRegion->fRCMapping = false;
116	pRegion->cbRegion = PAGE_SIZE;
117	pRegion->GCPhysPage = NIL_RTGCPHYS;
118	RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
119
120	pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
121	pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
122	pRegion->fRCMapping = false;
123	pRegion->cbRegion = PAGE_SIZE;
124	pRegion->GCPhysPage = NIL_RTGCPHYS;
125	RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
126
127	/*
128	* Make sure the CPU ID bit are in accordance to the Hyper-V
129	* requirement and other paranoia checks.
130	* See "Requirements for implementing the Microsoft hypervisor interface" spec.
131	*/
132	Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
133	\| GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
134	\| GIM_HV_PART_FLAGS_ACCESS_PART_ID
135	\| GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
136	\| GIM_HV_PART_FLAGS_CREATE_PORT
137	\| GIM_HV_PART_FLAGS_ACCESS_STATS
138	\| GIM_HV_PART_FLAGS_CPU_MGMT
139	\| GIM_HV_PART_FLAGS_CPU_PROFILER)));
140	Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS \| GIM_HV_BASE_FEAT_VP_ID_MSR))
141	== (GIM_HV_BASE_FEAT_HYPERCALL_MSRS \| GIM_HV_BASE_FEAT_VP_ID_MSR));
142	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
143	{
144	PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
145	Assert(!pcCur->fRCMapping);
146	Assert(!pcCur->fMapped);
147	Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
148	}
149
150	/*
151	* Expose HVP (Hypervisor Present) bit to the guest.
152	*/
153	CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
154
155	/*
156	* Modify the standard hypervisor leaves for Hyper-V.
157	*/
158	CPUMCPUIDLEAF HyperLeaf;
159	RT_ZERO(HyperLeaf);
160	HyperLeaf.uLeaf = UINT32_C(0x40000000);
161	HyperLeaf.uEax = UINT32_C(0x40000005); /* Minimum value for Hyper-V */
162	HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
163	HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
164	HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
165	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
166	AssertLogRelRCReturn(rc, rc);
167
168	HyperLeaf.uLeaf = UINT32_C(0x40000001);
169	HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
170	HyperLeaf.uEbx = 0; /* Reserved */
171	HyperLeaf.uEcx = 0; /* Reserved */
172	HyperLeaf.uEdx = 0; /* Reserved */
173	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
174	AssertLogRelRCReturn(rc, rc);
175
176	/*
177	* Add Hyper-V specific leaves.
178	*/
179	HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
180	HyperLeaf.uEax = 0;
181	HyperLeaf.uEbx = 0;
182	HyperLeaf.uEcx = 0;
183	HyperLeaf.uEdx = 0;
184	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
185	AssertLogRelRCReturn(rc, rc);
186
187	HyperLeaf.uLeaf = UINT32_C(0x40000003);
188	HyperLeaf.uEax = pHv->uBaseFeat;
189	HyperLeaf.uEbx = pHv->uPartFlags;
190	HyperLeaf.uEcx = pHv->uPowMgmtFeat;
191	HyperLeaf.uEdx = pHv->uMiscFeat;
192	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
193	AssertLogRelRCReturn(rc, rc);
194
195	/*
196	* Insert all MSR ranges of Hyper-V.
197	*/
198	for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
199	{
200	rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
201	AssertLogRelRCReturn(rc, rc);
202	}
203
204	return VINF_SUCCESS;
205	}
206
207
208	#if 0
209	VMMR3_INT_DECL(int) GIMR3HvInitFinalize(PVM pVM)
210	{
211	pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
212	if (!HMIsEnabled(pVM))
213	{
214	rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
215	AssertRCReturn(rc, rc);
216	}
217	rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
218	AssertRCReturn(rc, rc);
219	}
220	#endif
221
222
223	VMMR3_INT_DECL(int) GIMR3HvTerm(PVM pVM)
224	{
225	GIMR3HvReset(pVM);
226	return VINF_SUCCESS;
227	}
228
229
230	VMMR3_INT_DECL(void) GIMR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
231	{
232	#if 0
233	int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
234	AssertFatalRC(rc);
235	#endif
236	}
237
238
239	/**
240	* The VM is being reset. This resets Hyper-V provider MSRs and unmaps whatever
241	* Hyper-V regions that the guest may have mapped.
242	*
243	* @param pVM Pointer to the VM.
244	*/
245	VMMR3_INT_DECL(void) GIMR3HvReset(PVM pVM)
246	{
247	/*
248	* Unmap MMIO2 pages that the guest may have setup.
249	*/
250	LogRelFunc(("Resetting Hyper-V MMIO2 regions and MSRs...\n"));
251	PGIMHV pHv = &pVM->gim.s.u.Hv;
252	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
253	{
254	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
255	GIMR3Mmio2Unmap(pVM, pRegion);
256	}
257
258	/*
259	* Reset MSRs.
260	*/
261	pHv->u64GuestOsIdMsr = 0;
262	pHv->u64HypercallMsr = 0;
263	pHv->u64TscPageMsr = 0;
264	}
265
266
267	/**
268	* Returns a pointer to the MMIO2 regions supported by Hyper-V.
269	*
270	* @returns Pointer to an array of MMIO2 regions.
271	* @param pVM Pointer to the VM.
272	* @param pcRegions Where to store the number of regions in the array.
273	*/
274	VMMR3_INT_DECL(PGIMMMIO2REGION) GIMR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
275	{
276	Assert(GIMIsEnabled(pVM));
277	PGIMHV pHv = &pVM->gim.s.u.Hv;
278
279	*pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
280	Assert(pcRegions <= UINT8_MAX); / See PGMR3PhysMMIO2Register(). */
281	return pHv->aMmio2Regions;
282	}
283
284
285	/**
286	* Hyper-V state-save operation.
287	*
288	* @returns VBox status code.
289	* @param pVM Pointer to the VM.
290	* @param pSSM Pointer to the SSM handle.
291	*/
292	VMMR3_INT_DECL(int) GIMR3HvSave(PVM pVM, PSSMHANDLE pSSM)
293	{
294	PCGIMHV pcHv = &pVM->gim.s.u.Hv;
295
296	/** @todo Save per-VCPU data. */
297
298	/*
299	* Save per-VM MSRs.
300	*/
301	int rc = SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr); AssertRCReturn(rc, rc);
302	rc = SSMR3PutU64(pSSM, pcHv->u64HypercallMsr); AssertRCReturn(rc, rc);
303	rc = SSMR3PutU64(pSSM, pcHv->u64TscPageMsr); AssertRCReturn(rc, rc);
304
305	/*
306	* Save Hyper-V features / capabilities.
307	*/
308	rc = SSMR3PutU32(pSSM, pcHv->uBaseFeat); AssertRCReturn(rc, rc);
309	rc = SSMR3PutU32(pSSM, pcHv->uPartFlags); AssertRCReturn(rc, rc);
310	rc = SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat); AssertRCReturn(rc, rc);
311	rc = SSMR3PutU32(pSSM, pcHv->uMiscFeat); AssertRCReturn(rc, rc);
312	rc = SSMR3PutU32(pSSM, pcHv->uHyperHints); AssertRCReturn(rc, rc);
313
314	/*
315	* Save per-VM MMIO2 regions.
316	*/
317	rc = SSMR3PutU32(pSSM, RT_ELEMENTS(pcHv->aMmio2Regions));
318	for (unsigned i = 0; i < RT_ELEMENTS(pcHv->aMmio2Regions); i++)
319	{
320	/* Save the fields necessary to remap the regions upon load.*/
321	PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[i];
322	rc = SSMR3PutU8(pSSM, pcRegion->iRegion); AssertRCReturn(rc, rc);
323	rc = SSMR3PutBool(pSSM, pcRegion->fRCMapping); AssertRCReturn(rc, rc);
324	rc = SSMR3PutU32(pSSM, pcRegion->cbRegion); AssertRCReturn(rc, rc);
325	rc = SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage); AssertRCReturn(rc, rc);
326	rc = SSMR3PutStrZ(pSSM, pcRegion->szDescription); AssertRCReturn(rc, rc);
327	}
328
329	return VINF_SUCCESS;
330	}
331
332
333	/**
334	* Hyper-V state-load operation, final pass.
335	*
336	* @returns VBox status code.
337	* @param pVM Pointer to the VM.
338	* @param pSSM Pointer to the SSM handle.
339	* @param uSSMVersion The saved-state version.
340	*/
341	VMMR3_INT_DECL(int) GIMR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
342	{
343	PGIMHV pHv = &pVM->gim.s.u.Hv;
344
345	/** @todo Load per-VCPU data. */
346
347	/*
348	* Load per-VM MSRs.
349	*/
350	int rc = SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr); AssertRCReturn(rc, rc);
351	rc = SSMR3GetU64(pSSM, &pHv->u64HypercallMsr); AssertRCReturn(rc, rc);
352	rc = SSMR3GetU64(pSSM, &pHv->u64TscPageMsr); AssertRCReturn(rc, rc);
353
354	/*
355	* Save Hyper-V features / capabilities.
356	*/
357	rc = SSMR3GetU32(pSSM, &pHv->uBaseFeat); AssertRCReturn(rc, rc);
358	rc = SSMR3GetU32(pSSM, &pHv->uPartFlags); AssertRCReturn(rc, rc);
359	rc = SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat); AssertRCReturn(rc, rc);
360	rc = SSMR3GetU32(pSSM, &pHv->uMiscFeat); AssertRCReturn(rc, rc);
361	rc = SSMR3GetU32(pSSM, &pHv->uHyperHints); AssertRCReturn(rc, rc);
362
363	/*
364	* Load per-VM MMIO2 regions.
365	*/
366	uint32_t cRegions;
367	rc = SSMR3GetU32(pSSM, &cRegions);
368	if (cRegions != RT_ELEMENTS(pHv->aMmio2Regions))
369	{
370	LogRelFunc(("MMIO2 region array size mismatch. size=%u expected=%u\n", cRegions, RT_ELEMENTS(pHv->aMmio2Regions)));
371	return VERR_SSM_FIELD_INVALID_VALUE;
372	}
373
374	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
375	{
376	/* The regions would have been registered while constructing the GIM device. */
377	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
378	rc = SSMR3GetU8(pSSM, &pRegion->iRegion); AssertRCReturn(rc, rc);
379	rc = SSMR3GetBool(pSSM, &pRegion->fRCMapping); AssertRCReturn(rc, rc);
380	rc = SSMR3GetU32(pSSM, &pRegion->cbRegion); AssertRCReturn(rc, rc);
381	rc = SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage); AssertRCReturn(rc, rc);
382	rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
383	AssertRCReturn(rc, rc);
384	}
385
386	/*
387	* Enable the Hypercall-page.
388	*/
389	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
390	if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
391	{
392	Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
393	if (pRegion->fRegistered)
394	{
395	rc = GIMR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
396	if (RT_FAILURE(rc))
397	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
398	pRegion->GCPhysPage, rc);
399	}
400	else
401	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
402	}
403
404	/*
405	* Enable the TSC-page.
406	*/
407	pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
408	if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
409	{
410	Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
411	if (pRegion->fRegistered)
412	{
413	rc = GIMR3HvEnableTscPage(pVM, pRegion->GCPhysPage);
414	if (RT_FAILURE(rc))
415	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
416	pRegion->GCPhysPage, rc);
417	}
418	else
419	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
420	}
421
422	return rc;
423	}
424
425
426	/**
427	* Enables the Hyper-V TSC page.
428	*
429	* @returns VBox status code.
430	* @param pVM Pointer to the VM.
431	* @param GCPhysTscPage Where to map the TSC page.
432	*/
433	VMMR3_INT_DECL(int) GIMR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage)
434	{
435	PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
436	PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
437	AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
438
439	int rc;
440	if (pRegion->fMapped)
441	{
442	/*
443	* Is it already enabled at the given guest-address?
444	*/
445	if (pRegion->GCPhysPage == GCPhysTscPage)
446	return VINF_SUCCESS;
447
448	/*
449	* If it's mapped at a different address, unmap the previous address.
450	*/
451	rc = GIMR3HvDisableTscPage(pVM);
452	AssertRC(rc);
453	}
454
455	/*
456	* Map the TSC-page at the specified address.
457	*/
458	Assert(!pRegion->fMapped);
459	rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
460	if (RT_SUCCESS(rc))
461	{
462	Assert(pRegion->GCPhysPage == GCPhysTscPage);
463
464	/*
465	* Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
466	* they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
467	*
468	* Also, Hyper-V normalizes the time in 10 MHz, see:
469	* http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
470	*/
471	PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
472	Assert(pRefTsc);
473
474	uint64_t const u64TscKHz = TMCpuTicksPerSecond(pVM) / UINT64_C(1000);
475	pRefTsc->u32TscSequence = 1;
476	pRefTsc->u64TscScale = ((UINT64_C(10000) << 32) / u64TscKHz) << 32;
477
478	LogRel(("GIM: HyperV: Enabled TSC page at %#RGp (u64TscScale=%#RX64 u64TscKHz=%#RX64)\n", GCPhysTscPage,
479	pRefTsc->u64TscScale, u64TscKHz));
480	return VINF_SUCCESS;
481	}
482	else
483	LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
484
485	return VERR_GIM_OPERATION_FAILED;
486	}
487
488
489	/**
490	* Disables the Hyper-V TSC page.
491	*
492	* @returns VBox status code.
493	* @param pVM Pointer to the VM.
494	*/
495	VMMR3_INT_DECL(int) GIMR3HvDisableTscPage(PVM pVM)
496	{
497	PGIMHV pHv = &pVM->gim.s.u.Hv;
498	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
499	if (pRegion->fMapped)
500	{
501	GIMR3Mmio2Unmap(pVM, pRegion);
502	Assert(!pRegion->fMapped);
503	LogRel(("GIM: HyperV: Disabled TSC-page\n"));
504	return VINF_SUCCESS;
505	}
506	return VERR_GIM_PVTSC_NOT_ENABLED;
507	}
508
509
510	/**
511	* Disables the Hyper-V Hypercall page.
512	*
513	* @returns VBox status code.
514	*/
515	VMMR3_INT_DECL(int) GIMR3HvDisableHypercallPage(PVM pVM)
516	{
517	PGIMHV pHv = &pVM->gim.s.u.Hv;
518	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
519	if (pRegion->fMapped)
520	{
521	GIMR3Mmio2Unmap(pVM, pRegion);
522	Assert(!pRegion->fMapped);
523	LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
524	return VINF_SUCCESS;
525	}
526	return VERR_GIM_HYPERCALLS_NOT_ENABLED;
527	}
528
529
530	/**
531	* Enables the Hyper-V Hypercall page.
532	*
533	* @returns VBox status code.
534	* @param pVM Pointer to the VM.
535	* @param GCPhysHypercallPage Where to map the hypercall page.
536	*/
537	VMMR3_INT_DECL(int) GIMR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
538	{
539	PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
540	PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
541	AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
542
543	if (pRegion->fMapped)
544	{
545	/*
546	* Is it already enabled at the given guest-address?
547	*/
548	if (pRegion->GCPhysPage == GCPhysHypercallPage)
549	return VINF_SUCCESS;
550
551	/*
552	* If it's mapped at a different address, unmap the previous address.
553	*/
554	int rc2 = GIMR3HvDisableHypercallPage(pVM);
555	AssertRC(rc2);
556	}
557
558	/*
559	* Map the hypercall-page at the specified address.
560	*/
561	Assert(!pRegion->fMapped);
562	int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
563	if (RT_SUCCESS(rc))
564	{
565	Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
566
567	/*
568	* Patch the hypercall-page.
569	*/
570	if (HMIsEnabled(pVM))
571	{
572	size_t cbWritten = 0;
573	rc = HMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
574	if ( RT_SUCCESS(rc)
575	&& cbWritten < PAGE_SIZE - 1)
576	{
577	uint8_t pbLast = (uint8_t )pRegion->pvPageR3 + cbWritten;
578	pbLast = 0xc3; / RET */
579
580	LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
581	return VINF_SUCCESS;
582	}
583	else
584	LogRelFunc(("HMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
585	}
586	else
587	{
588	/** @todo Handle raw-mode hypercall page patching. */
589	LogRelFunc(("Raw-mode not yet implemented!\n"));
590	}
591	GIMR3Mmio2Unmap(pVM, pRegion);
592	}
593	else
594	LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
595
596	return rc;
597	}
598

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source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 51644

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