VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 52379

Last change on this file since 52379 was 52110, checked in by vboxsync, 11 years ago

VMM/GIM: Make guest-OS Id as part of the saved states as it could be useful in the future to have it in there.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 24.3 KB
Line 
1/* $Id: GIMHv.cpp 52110 2014-07-21 12:53:59Z vboxsync $ */
2/** @file
3 * GIM - Guest Interface Manager, Hyper-V implementation.
4 */
5
6/*
7 * Copyright (C) 2014 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_GIM
22#include "GIMInternal.h"
23
24#include <iprt/assert.h>
25#include <iprt/err.h>
26#include <iprt/string.h>
27#include <iprt/mem.h>
28#include <iprt/spinlock.h>
29
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/ssm.h>
32#include <VBox/vmm/vm.h>
33#include <VBox/vmm/hm.h>
34#include <VBox/vmm/pdmapi.h>
35#include <VBox/version.h>
36
37/*******************************************************************************
38* Defined Constants And Macros *
39*******************************************************************************/
40//#define GIMHV_HYPERCALL "GIMHvHypercall"
41#ifdef VBOX_WITH_STATISTICS
42# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
43 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
44#else
45# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
46 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
47#endif
48
49/**
50 * Array of MSR ranges supported by Hyper-V.
51 */
52static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
53{
54 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
55 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
56 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
57 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
58 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
59 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
60 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
61 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
62 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
63 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
64 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
65 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
66};
67#undef GIMHV_MSR
68
69
70/**
71 * Initializes the Hyper-V GIM provider.
72 *
73 * @returns VBox status code.
74 * @param pVM Pointer to the VM.
75 * @param uVersion The interface version this VM should use.
76 */
77VMMR3_INT_DECL(int) GIMR3HvInit(PVM pVM)
78{
79 AssertReturn(pVM, VERR_INVALID_PARAMETER);
80 AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
81
82 int rc;
83 PGIMHV pHv = &pVM->gim.s.u.Hv;
84
85 /*
86 * Determine interface capabilities based on the version.
87 */
88 if (!pVM->gim.s.u32Version)
89 {
90 /* Basic features. */
91 pHv->uBaseFeat = 0
92 //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
93 | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
94 //| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
95 //| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
96 | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
97 | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
98 | GIM_HV_BASE_FEAT_VP_ID_MSR
99 | GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
100 //| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
101 | GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
102 //| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
103 | GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
104 //| GIM_HV_BASE_FEAT_DEBUG_MSRS
105 ;
106
107 /* Miscellaneous features. */
108 pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ;
109
110 /* Hypervisor recommendations to the guest. */
111 pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
112 | GIM_HV_HINT_RELAX_TIME_CHECKS;
113
114 /* Hypervisor capabilities; features used by the hypervisor. */
115 pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
116 pHv->uHyperCaps |= HMAreMsrBitmapsAvailable(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
117 }
118
119 /*
120 * Populate the required fields in MMIO2 region records for registering.
121 */
122 AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
123 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
124 pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
125 pRegion->fRCMapping = false;
126 pRegion->cbRegion = PAGE_SIZE;
127 pRegion->GCPhysPage = NIL_RTGCPHYS;
128 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
129
130 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
131 pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
132 pRegion->fRCMapping = false;
133 pRegion->cbRegion = PAGE_SIZE;
134 pRegion->GCPhysPage = NIL_RTGCPHYS;
135 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
136
137 /*
138 * Make sure the CPU ID bit are in accordance to the Hyper-V
139 * requirement and other paranoia checks.
140 * See "Requirements for implementing the Microsoft hypervisor interface" spec.
141 */
142 Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
143 | GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
144 | GIM_HV_PART_FLAGS_ACCESS_PART_ID
145 | GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
146 | GIM_HV_PART_FLAGS_CREATE_PORT
147 | GIM_HV_PART_FLAGS_ACCESS_STATS
148 | GIM_HV_PART_FLAGS_CPU_MGMT
149 | GIM_HV_PART_FLAGS_CPU_PROFILER)));
150 Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR))
151 == (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR));
152 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
153 {
154 PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
155 Assert(!pcCur->fRCMapping);
156 Assert(!pcCur->fMapped);
157 Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
158 }
159
160 /*
161 * Expose HVP (Hypervisor Present) bit to the guest.
162 */
163 CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
164
165 /*
166 * Modify the standard hypervisor leaves for Hyper-V.
167 */
168 CPUMCPUIDLEAF HyperLeaf;
169 RT_ZERO(HyperLeaf);
170 HyperLeaf.uLeaf = UINT32_C(0x40000000);
171 HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
172 HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
173 HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
174 HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
175 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
176 AssertLogRelRCReturn(rc, rc);
177
178 HyperLeaf.uLeaf = UINT32_C(0x40000001);
179 HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
180 HyperLeaf.uEbx = 0; /* Reserved */
181 HyperLeaf.uEcx = 0; /* Reserved */
182 HyperLeaf.uEdx = 0; /* Reserved */
183 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
184 AssertLogRelRCReturn(rc, rc);
185
186 /*
187 * Add Hyper-V specific leaves.
188 */
189 HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
190 HyperLeaf.uEax = 0;
191 HyperLeaf.uEbx = 0;
192 HyperLeaf.uEcx = 0;
193 HyperLeaf.uEdx = 0;
194 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
195 AssertLogRelRCReturn(rc, rc);
196
197 HyperLeaf.uLeaf = UINT32_C(0x40000003);
198 HyperLeaf.uEax = pHv->uBaseFeat;
199 HyperLeaf.uEbx = pHv->uPartFlags;
200 HyperLeaf.uEcx = pHv->uPowMgmtFeat;
201 HyperLeaf.uEdx = pHv->uMiscFeat;
202 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
203 AssertLogRelRCReturn(rc, rc);
204
205 HyperLeaf.uLeaf = UINT32_C(0x40000004);
206 HyperLeaf.uEax = pHv->uHyperHints;
207 HyperLeaf.uEbx = 0xffffffff;
208 HyperLeaf.uEcx = 0;
209 HyperLeaf.uEdx = 0;
210 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
211 AssertLogRelRCReturn(rc, rc);
212
213 HyperLeaf.uLeaf = UINT32_C(0x40000006);
214 HyperLeaf.uEax = pHv->uHyperCaps;
215 HyperLeaf.uEbx = 0;
216 HyperLeaf.uEcx = 0;
217 HyperLeaf.uEdx = 0;
218 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
219 AssertLogRelRCReturn(rc, rc);
220
221 /*
222 * Insert all MSR ranges of Hyper-V.
223 */
224 for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
225 {
226 rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
227 AssertLogRelRCReturn(rc, rc);
228 }
229
230 return VINF_SUCCESS;
231}
232
233
234#if 0
235VMMR3_INT_DECL(int) GIMR3HvInitFinalize(PVM pVM)
236{
237 pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
238 if (!HMIsEnabled(pVM))
239 {
240 rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
241 AssertRCReturn(rc, rc);
242 }
243 rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
244 AssertRCReturn(rc, rc);
245}
246#endif
247
248
249/**
250 * Terminates the Hyper-V GIM provider.
251 *
252 * @returns VBox status code.
253 * @param pVM Pointer to the VM.
254 */
255VMMR3_INT_DECL(int) GIMR3HvTerm(PVM pVM)
256{
257 GIMR3HvReset(pVM);
258 return VINF_SUCCESS;
259}
260
261
262/**
263 * Applies relocations to data and code managed by this component. This function
264 * will be called at init and whenever the VMM need to relocate itself inside
265 * the GC.
266 *
267 * @param pVM Pointer to the VM.
268 * @param offDelta Relocation delta relative to old location.
269 */
270VMMR3_INT_DECL(void) GIMR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
271{
272#if 0
273 int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
274 AssertFatalRC(rc);
275#endif
276}
277
278
279/**
280 * The VM is being reset. This resets Hyper-V provider MSRs and unmaps whatever
281 * Hyper-V regions that the guest may have mapped.
282 *
283 * @param pVM Pointer to the VM.
284 */
285VMMR3_INT_DECL(void) GIMR3HvReset(PVM pVM)
286{
287 /*
288 * Unmap MMIO2 pages that the guest may have setup.
289 */
290 LogRel(("GIM: HyperV: Resetting Hyper-V MMIO2 regions and MSRs\n"));
291 PGIMHV pHv = &pVM->gim.s.u.Hv;
292 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
293 {
294 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
295 GIMR3Mmio2Unmap(pVM, pRegion);
296 }
297
298 /*
299 * Reset MSRs.
300 */
301 pHv->u64GuestOsIdMsr = 0;
302 pHv->u64HypercallMsr = 0;
303 pHv->u64TscPageMsr = 0;
304}
305
306
307/**
308 * Returns a pointer to the MMIO2 regions supported by Hyper-V.
309 *
310 * @returns Pointer to an array of MMIO2 regions.
311 * @param pVM Pointer to the VM.
312 * @param pcRegions Where to store the number of regions in the array.
313 */
314VMMR3_INT_DECL(PGIMMMIO2REGION) GIMR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
315{
316 Assert(GIMIsEnabled(pVM));
317 PGIMHV pHv = &pVM->gim.s.u.Hv;
318
319 *pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
320 Assert(*pcRegions <= UINT8_MAX); /* See PGMR3PhysMMIO2Register(). */
321 return pHv->aMmio2Regions;
322}
323
324
325/**
326 * Hyper-V state-save operation.
327 *
328 * @returns VBox status code.
329 * @param pVM Pointer to the VM.
330 * @param pSSM Pointer to the SSM handle.
331 */
332VMMR3_INT_DECL(int) GIMR3HvSave(PVM pVM, PSSMHANDLE pSSM)
333{
334 PCGIMHV pcHv = &pVM->gim.s.u.Hv;
335
336 /*
337 * Save the Hyper-V SSM version.
338 */
339 int rc = SSMR3PutU32(pSSM, GIM_HV_SSM_VERSION); AssertRCReturn(rc, rc);
340
341 /** @todo Save per-VCPU data. */
342
343 /*
344 * Save per-VM MSRs.
345 */
346 rc = SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr); AssertRCReturn(rc, rc);
347 rc = SSMR3PutU64(pSSM, pcHv->u64HypercallMsr); AssertRCReturn(rc, rc);
348 rc = SSMR3PutU64(pSSM, pcHv->u64TscPageMsr); AssertRCReturn(rc, rc);
349
350 /*
351 * Save Hyper-V features / capabilities.
352 */
353 rc = SSMR3PutU32(pSSM, pcHv->uBaseFeat); AssertRCReturn(rc, rc);
354 rc = SSMR3PutU32(pSSM, pcHv->uPartFlags); AssertRCReturn(rc, rc);
355 rc = SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat); AssertRCReturn(rc, rc);
356 rc = SSMR3PutU32(pSSM, pcHv->uMiscFeat); AssertRCReturn(rc, rc);
357 rc = SSMR3PutU32(pSSM, pcHv->uHyperHints); AssertRCReturn(rc, rc);
358 rc = SSMR3PutU32(pSSM, pcHv->uHyperCaps); AssertRCReturn(rc, rc);
359
360 /*
361 * Save the Hypercall region.
362 */
363 PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
364 rc = SSMR3PutU8(pSSM, pcRegion->iRegion); AssertRCReturn(rc, rc);
365 rc = SSMR3PutBool(pSSM, pcRegion->fRCMapping); AssertRCReturn(rc, rc);
366 rc = SSMR3PutU32(pSSM, pcRegion->cbRegion); AssertRCReturn(rc, rc);
367 rc = SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage); AssertRCReturn(rc, rc);
368 rc = SSMR3PutStrZ(pSSM, pcRegion->szDescription); AssertRCReturn(rc, rc);
369
370 /*
371 * Save the reference TSC region.
372 */
373 pcRegion = &pcHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
374 rc = SSMR3PutU8(pSSM, pcRegion->iRegion); AssertRCReturn(rc, rc);
375 rc = SSMR3PutBool(pSSM, pcRegion->fRCMapping); AssertRCReturn(rc, rc);
376 rc = SSMR3PutU32(pSSM, pcRegion->cbRegion); AssertRCReturn(rc, rc);
377 rc = SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage); AssertRCReturn(rc, rc);
378 rc = SSMR3PutStrZ(pSSM, pcRegion->szDescription); AssertRCReturn(rc, rc);
379 /* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
380 uint32_t uTscSequence = 0;
381 if ( pcRegion->fMapped
382 && MSR_GIM_HV_REF_TSC_IS_ENABLED(pcHv->u64TscPageMsr))
383 {
384 PCGIMHVREFTSC pcRefTsc = (PCGIMHVREFTSC)pcRegion->pvPageR3;
385 uTscSequence = pcRefTsc->u32TscSequence;
386 }
387 rc = SSMR3PutU32(pSSM, uTscSequence); AssertRCReturn(rc, rc);
388
389 return VINF_SUCCESS;
390}
391
392
393/**
394 * Hyper-V state-load operation, final pass.
395 *
396 * @returns VBox status code.
397 * @param pVM Pointer to the VM.
398 * @param pSSM Pointer to the SSM handle.
399 * @param uSSMVersion The GIM saved-state version.
400 */
401VMMR3_INT_DECL(int) GIMR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
402{
403 PGIMHV pHv = &pVM->gim.s.u.Hv;
404
405 /*
406 * Load the Hyper-V SSM version first.
407 */
408 uint32_t uHvSSMVersion;
409 int rc = SSMR3GetU32(pSSM, &uHvSSMVersion); AssertRCReturn(rc, rc);
410
411 /** @todo Load per-VCPU data. */
412
413 /*
414 * Load per-VM MSRs.
415 */
416 rc = SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr); AssertRCReturn(rc, rc);
417 rc = SSMR3GetU64(pSSM, &pHv->u64HypercallMsr); AssertRCReturn(rc, rc);
418 rc = SSMR3GetU64(pSSM, &pHv->u64TscPageMsr); AssertRCReturn(rc, rc);
419
420 /*
421 * Load Hyper-V features / capabilities.
422 */
423 rc = SSMR3GetU32(pSSM, &pHv->uBaseFeat); AssertRCReturn(rc, rc);
424 rc = SSMR3GetU32(pSSM, &pHv->uPartFlags); AssertRCReturn(rc, rc);
425 rc = SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat); AssertRCReturn(rc, rc);
426 rc = SSMR3GetU32(pSSM, &pHv->uMiscFeat); AssertRCReturn(rc, rc);
427 rc = SSMR3GetU32(pSSM, &pHv->uHyperHints); AssertRCReturn(rc, rc);
428 rc = SSMR3GetU32(pSSM, &pHv->uHyperCaps); AssertRCReturn(rc, rc);
429
430 /*
431 * Load and enable the Hypercall region.
432 */
433 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
434 rc = SSMR3GetU8(pSSM, &pRegion->iRegion); AssertRCReturn(rc, rc);
435 rc = SSMR3GetBool(pSSM, &pRegion->fRCMapping); AssertRCReturn(rc, rc);
436 rc = SSMR3GetU32(pSSM, &pRegion->cbRegion); AssertRCReturn(rc, rc);
437 rc = SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage); AssertRCReturn(rc, rc);
438 rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
439 AssertRCReturn(rc, rc);
440 if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
441 {
442 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
443 if (RT_LIKELY(pRegion->fRegistered))
444 {
445 rc = GIMR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
446 if (RT_FAILURE(rc))
447 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
448 pRegion->GCPhysPage, rc);
449 }
450 else
451 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
452 }
453
454 /*
455 * Load and enable the reference TSC region.
456 */
457 uint32_t uTscSequence;
458 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
459 rc = SSMR3GetU8(pSSM, &pRegion->iRegion); AssertRCReturn(rc, rc);
460 rc = SSMR3GetBool(pSSM, &pRegion->fRCMapping); AssertRCReturn(rc, rc);
461 rc = SSMR3GetU32(pSSM, &pRegion->cbRegion); AssertRCReturn(rc, rc);
462 rc = SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage); AssertRCReturn(rc, rc);
463 rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
464 rc = SSMR3GetU32(pSSM, &uTscSequence); AssertRCReturn(rc, rc);
465 AssertRCReturn(rc, rc);
466 if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
467 {
468 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
469 if (pRegion->fRegistered)
470 {
471 rc = GIMR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
472 if (RT_FAILURE(rc))
473 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
474 pRegion->GCPhysPage, rc);
475 }
476 else
477 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
478 }
479
480 return rc;
481}
482
483
484/**
485 * Enables the Hyper-V TSC page.
486 *
487 * @returns VBox status code.
488 * @param pVM Pointer to the VM.
489 * @param GCPhysTscPage Where to map the TSC page.
490 * @param fUseThisTscSequence Whether to set the TSC sequence number to
491 * the one specified in @a uTscSequence.
492 * @param uTscSequence The TSC sequence value to use. Ignored if @a
493 * fUseThisTscSequence is false.
494 */
495VMMR3_INT_DECL(int) GIMR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSequence, uint32_t uTscSequence)
496{
497 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
498 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
499 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
500
501 int rc;
502 if (pRegion->fMapped)
503 {
504 /*
505 * Is it already enabled at the given guest-address?
506 */
507 if (pRegion->GCPhysPage == GCPhysTscPage)
508 return VINF_SUCCESS;
509
510 /*
511 * If it's mapped at a different address, unmap the previous address.
512 */
513 rc = GIMR3HvDisableTscPage(pVM);
514 AssertRC(rc);
515 }
516
517 /*
518 * Map the TSC-page at the specified address.
519 */
520 Assert(!pRegion->fMapped);
521 rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
522 if (RT_SUCCESS(rc))
523 {
524 Assert(pRegion->GCPhysPage == GCPhysTscPage);
525
526 /*
527 * Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
528 * they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
529 *
530 * Also, Hyper-V normalizes the time in 10 MHz, see:
531 * http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
532 */
533 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
534 Assert(pRefTsc);
535
536 uint64_t const u64TscKHz = TMCpuTicksPerSecond(pVM) / UINT64_C(1000);
537 uint32_t u32TscSeq = 1;
538 if ( fUseThisTscSequence
539 && uTscSequence < UINT32_C(0xfffffffe))
540 {
541 u32TscSeq = uTscSequence + 1;
542 }
543 pRefTsc->u32TscSequence = u32TscSeq;
544 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
545
546 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64)\n", GCPhysTscPage,
547 pRefTsc->u64TscScale, u64TscKHz, u64TscKHz));
548 return VINF_SUCCESS;
549 }
550 else
551 LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
552
553 return VERR_GIM_OPERATION_FAILED;
554}
555
556
557/**
558 * Disables the Hyper-V TSC page.
559 *
560 * @returns VBox status code.
561 * @param pVM Pointer to the VM.
562 */
563VMMR3_INT_DECL(int) GIMR3HvDisableTscPage(PVM pVM)
564{
565 PGIMHV pHv = &pVM->gim.s.u.Hv;
566 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
567 if (pRegion->fMapped)
568 {
569 GIMR3Mmio2Unmap(pVM, pRegion);
570 Assert(!pRegion->fMapped);
571 LogRel(("GIM: HyperV: Disabled TSC-page\n"));
572 return VINF_SUCCESS;
573 }
574 return VERR_GIM_PVTSC_NOT_ENABLED;
575}
576
577
578/**
579 * Disables the Hyper-V Hypercall page.
580 *
581 * @returns VBox status code.
582 */
583VMMR3_INT_DECL(int) GIMR3HvDisableHypercallPage(PVM pVM)
584{
585 PGIMHV pHv = &pVM->gim.s.u.Hv;
586 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
587 if (pRegion->fMapped)
588 {
589 GIMR3Mmio2Unmap(pVM, pRegion);
590 Assert(!pRegion->fMapped);
591 LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
592 return VINF_SUCCESS;
593 }
594 return VERR_GIM_HYPERCALLS_NOT_ENABLED;
595}
596
597
598/**
599 * Enables the Hyper-V Hypercall page.
600 *
601 * @returns VBox status code.
602 * @param pVM Pointer to the VM.
603 * @param GCPhysHypercallPage Where to map the hypercall page.
604 */
605VMMR3_INT_DECL(int) GIMR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
606{
607 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
608 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
609 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
610
611 if (pRegion->fMapped)
612 {
613 /*
614 * Is it already enabled at the given guest-address?
615 */
616 if (pRegion->GCPhysPage == GCPhysHypercallPage)
617 return VINF_SUCCESS;
618
619 /*
620 * If it's mapped at a different address, unmap the previous address.
621 */
622 int rc2 = GIMR3HvDisableHypercallPage(pVM);
623 AssertRC(rc2);
624 }
625
626 /*
627 * Map the hypercall-page at the specified address.
628 */
629 Assert(!pRegion->fMapped);
630 int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
631 if (RT_SUCCESS(rc))
632 {
633 Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
634
635 /*
636 * Patch the hypercall-page.
637 */
638 if (HMIsEnabled(pVM))
639 {
640 size_t cbWritten = 0;
641 rc = HMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
642 if ( RT_SUCCESS(rc)
643 && cbWritten < PAGE_SIZE)
644 {
645 uint8_t *pbLast = (uint8_t *)pRegion->pvPageR3 + cbWritten;
646 *pbLast = 0xc3; /* RET */
647
648 LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
649 return VINF_SUCCESS;
650 }
651 else
652 {
653 if (rc == VINF_SUCCESS)
654 rc = VERR_GIM_OPERATION_FAILED;
655 LogRelFunc(("HMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
656 }
657 }
658 else
659 {
660 /** @todo Handle raw-mode hypercall page patching. */
661 LogRel(("GIM: HyperV: Raw-mode hypercalls not yet implemented!\n"));
662 }
663 GIMR3Mmio2Unmap(pVM, pRegion);
664 }
665 else
666 LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
667
668 return rc;
669}
670
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette