VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 55129

Last change on this file since 55129 was 55129, checked in by vboxsync, 10 years ago

VMM/GIM: Allow dynamic enabling of #UD traps and per-VCPU hypercalls.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 23.9 KB
Line 
1/* $Id: GIMHv.cpp 55129 2015-04-08 11:31:47Z vboxsync $ */
2/** @file
3 * GIM - Guest Interface Manager, Hyper-V implementation.
4 */
5
6/*
7 * Copyright (C) 2014-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_GIM
22#include "GIMInternal.h"
23
24#include <iprt/assert.h>
25#include <iprt/err.h>
26#include <iprt/string.h>
27#include <iprt/mem.h>
28#include <iprt/spinlock.h>
29
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/ssm.h>
32#include <VBox/vmm/vm.h>
33#include <VBox/vmm/hm.h>
34#include <VBox/vmm/pdmapi.h>
35#include <VBox/version.h>
36
37
38/*******************************************************************************
39* Defined Constants And Macros *
40*******************************************************************************/
41//#define GIMHV_HYPERCALL "GIMHvHypercall"
42
43/**
44 * GIM Hyper-V saved-state version.
45 */
46#define GIM_HV_SAVED_STATE_VERSION UINT32_C(1)
47
48
49/*******************************************************************************
50* Global Variables *
51*******************************************************************************/
52#ifdef VBOX_WITH_STATISTICS
53# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
54 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
55#else
56# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
57 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
58#endif
59
60/**
61 * Array of MSR ranges supported by Hyper-V.
62 */
63static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
64{
65 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
66 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
67 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
68 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
69 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
70 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
71 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
72 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
73 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
74 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
75 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
76 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
77};
78#undef GIMHV_MSRRANGE
79
80
81/**
82 * Initializes the Hyper-V GIM provider.
83 *
84 * @returns VBox status code.
85 * @param pVM Pointer to the VM.
86 * @param uVersion The interface version this VM should use.
87 */
88VMMR3_INT_DECL(int) gimR3HvInit(PVM pVM)
89{
90 AssertReturn(pVM, VERR_INVALID_PARAMETER);
91 AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
92
93 int rc;
94 PGIMHV pHv = &pVM->gim.s.u.Hv;
95
96 /*
97 * Determine interface capabilities based on the version.
98 */
99 if (!pVM->gim.s.u32Version)
100 {
101 /* Basic features. */
102 pHv->uBaseFeat = 0
103 //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
104 | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
105 //| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
106 //| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
107 | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
108 | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
109 | GIM_HV_BASE_FEAT_VP_ID_MSR
110 | GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
111 //| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
112 | GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
113 //| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
114 | GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
115 //| GIM_HV_BASE_FEAT_DEBUG_MSRS
116 ;
117
118 /* Miscellaneous features. */
119 pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ;
120
121 /* Hypervisor recommendations to the guest. */
122 pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
123 | GIM_HV_HINT_RELAX_TIME_CHECKS;
124 }
125
126 /*
127 * Populate the required fields in MMIO2 region records for registering.
128 */
129 AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
130 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
131 pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
132 pRegion->fRCMapping = false;
133 pRegion->cbRegion = PAGE_SIZE;
134 pRegion->GCPhysPage = NIL_RTGCPHYS;
135 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
136
137 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
138 pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
139 pRegion->fRCMapping = false;
140 pRegion->cbRegion = PAGE_SIZE;
141 pRegion->GCPhysPage = NIL_RTGCPHYS;
142 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
143
144 /*
145 * Make sure the CPU ID bit are in accordance to the Hyper-V
146 * requirement and other paranoia checks.
147 * See "Requirements for implementing the Microsoft hypervisor interface" spec.
148 */
149 Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
150 | GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
151 | GIM_HV_PART_FLAGS_ACCESS_PART_ID
152 | GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
153 | GIM_HV_PART_FLAGS_CREATE_PORT
154 | GIM_HV_PART_FLAGS_ACCESS_STATS
155 | GIM_HV_PART_FLAGS_CPU_MGMT
156 | GIM_HV_PART_FLAGS_CPU_PROFILER)));
157 Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR))
158 == (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR));
159 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
160 {
161 PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
162 Assert(!pcCur->fRCMapping);
163 Assert(!pcCur->fMapped);
164 Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
165 }
166
167 /*
168 * Expose HVP (Hypervisor Present) bit to the guest.
169 */
170 CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
171
172 /*
173 * Modify the standard hypervisor leaves for Hyper-V.
174 */
175 CPUMCPUIDLEAF HyperLeaf;
176 RT_ZERO(HyperLeaf);
177 HyperLeaf.uLeaf = UINT32_C(0x40000000);
178 HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
179 HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
180 HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
181 HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
182 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
183 AssertLogRelRCReturn(rc, rc);
184
185 HyperLeaf.uLeaf = UINT32_C(0x40000001);
186 HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
187 HyperLeaf.uEbx = 0; /* Reserved */
188 HyperLeaf.uEcx = 0; /* Reserved */
189 HyperLeaf.uEdx = 0; /* Reserved */
190 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
191 AssertLogRelRCReturn(rc, rc);
192
193 /*
194 * Add Hyper-V specific leaves.
195 */
196 HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
197 HyperLeaf.uEax = 0;
198 HyperLeaf.uEbx = 0;
199 HyperLeaf.uEcx = 0;
200 HyperLeaf.uEdx = 0;
201 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
202 AssertLogRelRCReturn(rc, rc);
203
204 HyperLeaf.uLeaf = UINT32_C(0x40000003);
205 HyperLeaf.uEax = pHv->uBaseFeat;
206 HyperLeaf.uEbx = pHv->uPartFlags;
207 HyperLeaf.uEcx = pHv->uPowMgmtFeat;
208 HyperLeaf.uEdx = pHv->uMiscFeat;
209 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
210 AssertLogRelRCReturn(rc, rc);
211
212 HyperLeaf.uLeaf = UINT32_C(0x40000004);
213 HyperLeaf.uEax = pHv->uHyperHints;
214 HyperLeaf.uEbx = 0xffffffff;
215 HyperLeaf.uEcx = 0;
216 HyperLeaf.uEdx = 0;
217 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
218 AssertLogRelRCReturn(rc, rc);
219
220 /*
221 * Insert all MSR ranges of Hyper-V.
222 */
223 for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
224 {
225 rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
226 AssertLogRelRCReturn(rc, rc);
227 }
228
229 return VINF_SUCCESS;
230}
231
232
233/**
234 * Initializes remaining bits of the Hyper-V provider.
235 *
236 * This is called after initializing HM and almost all other VMM components.
237 *
238 * @returns VBox status code.
239 * @param pVM Pointer to the VM.
240 */
241VMMR3_INT_DECL(int) gimR3HvInitCompleted(PVM pVM)
242{
243 PGIMHV pHv = &pVM->gim.s.u.Hv;
244
245 /*
246 * Determine interface capabilities based on the version.
247 */
248 if (!pVM->gim.s.u32Version)
249 {
250 /* Hypervisor capabilities; features used by the hypervisor. */
251 pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
252 pHv->uHyperCaps |= HMAreMsrBitmapsAvailable(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
253 }
254
255 CPUMCPUIDLEAF HyperLeaf;
256 RT_ZERO(HyperLeaf);
257 HyperLeaf.uLeaf = UINT32_C(0x40000006);
258 HyperLeaf.uEax = pHv->uHyperCaps;
259 HyperLeaf.uEbx = 0;
260 HyperLeaf.uEcx = 0;
261 HyperLeaf.uEdx = 0;
262 int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
263 AssertLogRelRCReturn(rc, rc);
264
265 return rc;
266}
267
268
269#if 0
270VMMR3_INT_DECL(int) gimR3HvInitFinalize(PVM pVM)
271{
272 pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
273 if (!HMIsEnabled(pVM))
274 {
275 rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
276 AssertRCReturn(rc, rc);
277 }
278 rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
279 AssertRCReturn(rc, rc);
280}
281#endif
282
283
284/**
285 * Terminates the Hyper-V GIM provider.
286 *
287 * @returns VBox status code.
288 * @param pVM Pointer to the VM.
289 */
290VMMR3_INT_DECL(int) gimR3HvTerm(PVM pVM)
291{
292 gimR3HvReset(pVM);
293 return VINF_SUCCESS;
294}
295
296
297/**
298 * Applies relocations to data and code managed by this component.
299 *
300 * This function will be called at init and whenever the VMM need to relocate
301 * itself inside the GC.
302 *
303 * @param pVM Pointer to the VM.
304 * @param offDelta Relocation delta relative to old location.
305 */
306VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
307{
308#if 0
309 int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
310 AssertFatalRC(rc);
311#endif
312}
313
314
315/**
316 * This resets Hyper-V provider MSRs and unmaps whatever Hyper-V regions that
317 * the guest may have mapped.
318 *
319 * This is called when the VM is being reset.
320 *
321 * @param pVM Pointer to the VM.
322 * @thread EMT(0).
323 */
324VMMR3_INT_DECL(void) gimR3HvReset(PVM pVM)
325{
326 VM_ASSERT_EMT0(pVM);
327
328 /*
329 * Unmap MMIO2 pages that the guest may have setup.
330 */
331 LogRel(("GIM: HyperV: Resetting Hyper-V MMIO2 regions and MSRs\n"));
332 PGIMHV pHv = &pVM->gim.s.u.Hv;
333 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
334 {
335 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
336 GIMR3Mmio2Unmap(pVM, pRegion);
337 }
338
339 /*
340 * Reset MSRs.
341 */
342 pHv->u64GuestOsIdMsr = 0;
343 pHv->u64HypercallMsr = 0;
344 pHv->u64TscPageMsr = 0;
345}
346
347
348/**
349 * Returns a pointer to the MMIO2 regions supported by Hyper-V.
350 *
351 * @returns Pointer to an array of MMIO2 regions.
352 * @param pVM Pointer to the VM.
353 * @param pcRegions Where to store the number of regions in the array.
354 */
355VMMR3_INT_DECL(PGIMMMIO2REGION) gimR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
356{
357 Assert(GIMIsEnabled(pVM));
358 PGIMHV pHv = &pVM->gim.s.u.Hv;
359
360 *pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
361 Assert(*pcRegions <= UINT8_MAX); /* See PGMR3PhysMMIO2Register(). */
362 return pHv->aMmio2Regions;
363}
364
365
366/**
367 * Hyper-V state-save operation.
368 *
369 * @returns VBox status code.
370 * @param pVM Pointer to the VM.
371 * @param pSSM Pointer to the SSM handle.
372 */
373VMMR3_INT_DECL(int) gimR3HvSave(PVM pVM, PSSMHANDLE pSSM)
374{
375 PCGIMHV pcHv = &pVM->gim.s.u.Hv;
376
377 /*
378 * Save the Hyper-V SSM version.
379 */
380 SSMR3PutU32(pSSM, GIM_HV_SAVED_STATE_VERSION);
381
382 /*
383 * Save per-VM MSRs.
384 */
385 SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr);
386 SSMR3PutU64(pSSM, pcHv->u64HypercallMsr);
387 SSMR3PutU64(pSSM, pcHv->u64TscPageMsr);
388
389 /*
390 * Save Hyper-V features / capabilities.
391 */
392 SSMR3PutU32(pSSM, pcHv->uBaseFeat);
393 SSMR3PutU32(pSSM, pcHv->uPartFlags);
394 SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat);
395 SSMR3PutU32(pSSM, pcHv->uMiscFeat);
396 SSMR3PutU32(pSSM, pcHv->uHyperHints);
397 SSMR3PutU32(pSSM, pcHv->uHyperCaps);
398
399 /*
400 * Save the Hypercall region.
401 */
402 PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
403 SSMR3PutU8(pSSM, pcRegion->iRegion);
404 SSMR3PutBool(pSSM, pcRegion->fRCMapping);
405 SSMR3PutU32(pSSM, pcRegion->cbRegion);
406 SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
407 SSMR3PutStrZ(pSSM, pcRegion->szDescription);
408
409 /*
410 * Save the reference TSC region.
411 */
412 pcRegion = &pcHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
413 SSMR3PutU8(pSSM, pcRegion->iRegion);
414 SSMR3PutBool(pSSM, pcRegion->fRCMapping);
415 SSMR3PutU32(pSSM, pcRegion->cbRegion);
416 SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
417 SSMR3PutStrZ(pSSM, pcRegion->szDescription);
418 /* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
419 uint32_t uTscSequence = 0;
420 if ( pcRegion->fMapped
421 && MSR_GIM_HV_REF_TSC_IS_ENABLED(pcHv->u64TscPageMsr))
422 {
423 PCGIMHVREFTSC pcRefTsc = (PCGIMHVREFTSC)pcRegion->pvPageR3;
424 uTscSequence = pcRefTsc->u32TscSequence;
425 }
426
427 return SSMR3PutU32(pSSM, uTscSequence);
428}
429
430
431/**
432 * Hyper-V state-load operation, final pass.
433 *
434 * @returns VBox status code.
435 * @param pVM Pointer to the VM.
436 * @param pSSM Pointer to the SSM handle.
437 * @param uSSMVersion The GIM saved-state version.
438 */
439VMMR3_INT_DECL(int) gimR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
440{
441 PGIMHV pHv = &pVM->gim.s.u.Hv;
442
443 /*
444 * Load the Hyper-V SSM version first.
445 */
446 uint32_t uHvSavedStatVersion;
447 int rc = SSMR3GetU32(pSSM, &uHvSavedStatVersion);
448 AssertRCReturn(rc, rc);
449 if (uHvSavedStatVersion != GIM_HV_SAVED_STATE_VERSION)
450 return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
451 N_("Unsupported Hyper-V saved-state version %u (expected %u)."), uHvSavedStatVersion,
452 GIM_HV_SAVED_STATE_VERSION);
453
454 /*
455 * Load per-VM MSRs.
456 */
457 SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr);
458 SSMR3GetU64(pSSM, &pHv->u64HypercallMsr);
459 SSMR3GetU64(pSSM, &pHv->u64TscPageMsr);
460
461 /*
462 * Load Hyper-V features / capabilities.
463 */
464 SSMR3GetU32(pSSM, &pHv->uBaseFeat);
465 SSMR3GetU32(pSSM, &pHv->uPartFlags);
466 SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat);
467 SSMR3GetU32(pSSM, &pHv->uMiscFeat);
468 SSMR3GetU32(pSSM, &pHv->uHyperHints);
469 SSMR3GetU32(pSSM, &pHv->uHyperCaps);
470
471 /*
472 * Load and enable the Hypercall region.
473 */
474 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
475 SSMR3GetU8(pSSM, &pRegion->iRegion);
476 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
477 SSMR3GetU32(pSSM, &pRegion->cbRegion);
478 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
479 rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
480 AssertRCReturn(rc, rc);
481 if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
482 {
483 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
484 if (RT_LIKELY(pRegion->fRegistered))
485 {
486 rc = gimR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
487 if (RT_FAILURE(rc))
488 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
489 pRegion->GCPhysPage, rc);
490 }
491 else
492 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
493 }
494
495 /*
496 * Load and enable the reference TSC region.
497 */
498 uint32_t uTscSequence;
499 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
500 SSMR3GetU8(pSSM, &pRegion->iRegion);
501 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
502 SSMR3GetU32(pSSM, &pRegion->cbRegion);
503 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
504 SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
505 rc = SSMR3GetU32(pSSM, &uTscSequence);
506 AssertRCReturn(rc, rc);
507 if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
508 {
509 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
510 if (pRegion->fRegistered)
511 {
512 rc = gimR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
513 if (RT_FAILURE(rc))
514 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
515 pRegion->GCPhysPage, rc);
516 }
517 else
518 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
519 }
520
521 return rc;
522}
523
524
525/**
526 * Enables the Hyper-V TSC page.
527 *
528 * @returns VBox status code.
529 * @param pVM Pointer to the VM.
530 * @param GCPhysTscPage Where to map the TSC page.
531 * @param fUseThisTscSeq Whether to set the TSC sequence number to the one
532 * specified in @a uTscSeq.
533 * @param uTscSeq The TSC sequence value to use. Ignored if
534 * @a fUseThisTscSeq is false.
535 */
536VMMR3_INT_DECL(int) gimR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSeq, uint32_t uTscSeq)
537{
538 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
539 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
540 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
541
542 int rc;
543 if (pRegion->fMapped)
544 {
545 /*
546 * Is it already enabled at the given guest-address?
547 */
548 if (pRegion->GCPhysPage == GCPhysTscPage)
549 return VINF_SUCCESS;
550
551 /*
552 * If it's mapped at a different address, unmap the previous address.
553 */
554 rc = gimR3HvDisableTscPage(pVM);
555 AssertRC(rc);
556 }
557
558 /*
559 * Map the TSC-page at the specified address.
560 */
561 Assert(!pRegion->fMapped);
562 rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
563 if (RT_SUCCESS(rc))
564 {
565 Assert(pRegion->GCPhysPage == GCPhysTscPage);
566
567 /*
568 * Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
569 * they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
570 *
571 * Also, Hyper-V normalizes the time in 10 MHz, see:
572 * http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
573 */
574 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
575 Assert(pRefTsc);
576
577 uint64_t const u64TscKHz = TMCpuTicksPerSecond(pVM) / UINT64_C(1000);
578 uint32_t u32TscSeq = 1;
579 if ( fUseThisTscSeq
580 && uTscSeq < UINT32_C(0xfffffffe))
581 u32TscSeq = uTscSeq + 1;
582 pRefTsc->u32TscSequence = u32TscSeq;
583 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
584 pRefTsc->i64TscOffset = 0;
585
586 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
587 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
588
589 TMR3CpuTickParavirtEnable(pVM);
590 return VINF_SUCCESS;
591 }
592 else
593 LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
594
595 return VERR_GIM_OPERATION_FAILED;
596}
597
598
599/**
600 * Disables the Hyper-V TSC page.
601 *
602 * @returns VBox status code.
603 * @param pVM Pointer to the VM.
604 */
605VMMR3_INT_DECL(int) gimR3HvDisableTscPage(PVM pVM)
606{
607 PGIMHV pHv = &pVM->gim.s.u.Hv;
608 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
609 if (pRegion->fMapped)
610 {
611 GIMR3Mmio2Unmap(pVM, pRegion);
612 Assert(!pRegion->fMapped);
613 LogRel(("GIM: HyperV: Disabled TSC-page\n"));
614
615 TMR3CpuTickParavirtDisable(pVM);
616 return VINF_SUCCESS;
617 }
618 return VERR_GIM_PVTSC_NOT_ENABLED;
619}
620
621
622/**
623 * Disables the Hyper-V Hypercall page.
624 *
625 * @returns VBox status code.
626 */
627VMMR3_INT_DECL(int) gimR3HvDisableHypercallPage(PVM pVM)
628{
629 PGIMHV pHv = &pVM->gim.s.u.Hv;
630 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
631 if (pRegion->fMapped)
632 {
633 GIMR3Mmio2Unmap(pVM, pRegion);
634 Assert(!pRegion->fMapped);
635 for (VMCPUID i = 0; i < pVM->cCpus; i++)
636 VMMHypercallsDisable(&pVM->aCpus[i]);
637 LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
638 return VINF_SUCCESS;
639 }
640 return VERR_GIM_HYPERCALLS_NOT_ENABLED;
641}
642
643
644/**
645 * Enables the Hyper-V Hypercall page.
646 *
647 * @returns VBox status code.
648 * @param pVM Pointer to the VM.
649 * @param GCPhysHypercallPage Where to map the hypercall page.
650 */
651VMMR3_INT_DECL(int) gimR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
652{
653 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
654 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
655 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
656
657 if (pRegion->fMapped)
658 {
659 /*
660 * Is it already enabled at the given guest-address?
661 */
662 if (pRegion->GCPhysPage == GCPhysHypercallPage)
663 return VINF_SUCCESS;
664
665 /*
666 * If it's mapped at a different address, unmap the previous address.
667 */
668 int rc2 = gimR3HvDisableHypercallPage(pVM);
669 AssertRC(rc2);
670 }
671
672 /*
673 * Map the hypercall-page at the specified address.
674 */
675 Assert(!pRegion->fMapped);
676 int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
677 if (RT_SUCCESS(rc))
678 {
679 Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
680
681 /*
682 * Patch the hypercall-page.
683 */
684 size_t cbWritten = 0;
685 rc = VMMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
686 if ( RT_SUCCESS(rc)
687 && cbWritten < PAGE_SIZE)
688 {
689 uint8_t *pbLast = (uint8_t *)pRegion->pvPageR3 + cbWritten;
690 *pbLast = 0xc3; /* RET */
691
692 /*
693 * Notify VMM that hypercalls are now enabled for all VCPUs.
694 */
695 for (VMCPUID i = 0; i < pVM->cCpus; i++)
696 VMMHypercallsEnable(&pVM->aCpus[i]);
697
698 LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
699 return VINF_SUCCESS;
700 }
701 else
702 {
703 if (rc == VINF_SUCCESS)
704 rc = VERR_GIM_OPERATION_FAILED;
705 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
706 }
707
708 GIMR3Mmio2Unmap(pVM, pRegion);
709 }
710
711 LogRel(("GIM: HyperV: GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
712 return rc;
713}
714
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette