1 | /* $Id: GIMHv.cpp 57159 2015-08-03 13:57:36Z vboxsync $ */
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2 | /** @file
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3 | * GIM - Guest Interface Manager, Hyper-V implementation.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2014-2015 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 | /*******************************************************************************
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19 | * Header Files *
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20 | *******************************************************************************/
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21 | #define LOG_GROUP LOG_GROUP_GIM
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22 | #include "GIMInternal.h"
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23 |
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24 | #include <iprt/assert.h>
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25 | #include <iprt/err.h>
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26 | #include <iprt/string.h>
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27 | #include <iprt/mem.h>
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28 | #include <iprt/spinlock.h>
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29 |
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30 | #include <VBox/vmm/cpum.h>
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31 | #include <VBox/vmm/ssm.h>
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32 | #include <VBox/vmm/vm.h>
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33 | #include <VBox/vmm/hm.h>
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34 | #include <VBox/vmm/pdmapi.h>
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35 | #include <VBox/version.h>
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36 |
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37 |
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38 | /*******************************************************************************
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39 | * Defined Constants And Macros *
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40 | *******************************************************************************/
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41 | //#define GIMHV_HYPERCALL "GIMHvHypercall"
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42 |
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43 | /**
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44 | * GIM Hyper-V saved-state version.
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45 | */
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46 | #define GIM_HV_SAVED_STATE_VERSION UINT32_C(1)
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47 |
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48 |
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49 | /*******************************************************************************
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50 | * Global Variables *
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51 | *******************************************************************************/
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52 | #ifdef VBOX_WITH_STATISTICS
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53 | # define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
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54 | { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
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55 | #else
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56 | # define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
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57 | { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
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58 | #endif
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59 |
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60 | /**
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61 | * Array of MSR ranges supported by Hyper-V.
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62 | */
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63 | static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
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64 | {
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65 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
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66 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
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67 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
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68 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
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69 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
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70 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
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71 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
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72 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
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73 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
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74 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
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75 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
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76 | GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
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77 | };
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78 | #undef GIMHV_MSRRANGE
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79 |
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80 |
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81 | /**
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82 | * Initializes the Hyper-V GIM provider.
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83 | *
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84 | * @returns VBox status code.
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85 | * @param pVM Pointer to the VM.
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86 | * @param uVersion The interface version this VM should use.
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87 | */
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88 | VMMR3_INT_DECL(int) gimR3HvInit(PVM pVM)
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89 | {
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90 | AssertReturn(pVM, VERR_INVALID_PARAMETER);
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91 | AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
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92 |
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93 | int rc;
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94 | PGIMHV pHv = &pVM->gim.s.u.Hv;
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95 |
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96 | /*
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97 | * Determine interface capabilities based on the version.
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98 | */
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99 | if (!pVM->gim.s.u32Version)
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100 | {
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101 | /* Basic features. */
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102 | pHv->uBaseFeat = 0
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103 | //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
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104 | | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
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105 | //| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
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106 | //| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
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107 | | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
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108 | | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
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109 | | GIM_HV_BASE_FEAT_VP_ID_MSR
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110 | | GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
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111 | //| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
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112 | | GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
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113 | //| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
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114 | | GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
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115 | //| GIM_HV_BASE_FEAT_DEBUG_MSRS
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116 | ;
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117 |
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118 | /* Miscellaneous features. */
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119 | pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ
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120 | | GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS;
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121 |
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122 | /* Hypervisor recommendations to the guest. */
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123 | pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
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124 | | GIM_HV_HINT_RELAX_TIME_CHECKS;
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125 | }
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126 |
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127 | /*
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128 | * Populate the required fields in MMIO2 region records for registering.
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129 | */
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130 | AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
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131 | PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
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132 | pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
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133 | pRegion->fRCMapping = false;
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134 | pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
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135 | pRegion->GCPhysPage = NIL_RTGCPHYS;
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136 | RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
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137 |
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138 | pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
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139 | pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
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140 | pRegion->fRCMapping = false;
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141 | pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
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142 | pRegion->GCPhysPage = NIL_RTGCPHYS;
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143 | RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
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144 |
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145 | /*
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146 | * Make sure the CPU ID bit are in accordance to the Hyper-V
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147 | * requirement and other paranoia checks.
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148 | * See "Requirements for implementing the Microsoft hypervisor interface" spec.
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149 | */
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150 | Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
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151 | | GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
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152 | | GIM_HV_PART_FLAGS_ACCESS_PART_ID
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153 | | GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
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154 | | GIM_HV_PART_FLAGS_CREATE_PORT
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155 | | GIM_HV_PART_FLAGS_ACCESS_STATS
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156 | | GIM_HV_PART_FLAGS_CPU_MGMT
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157 | | GIM_HV_PART_FLAGS_CPU_PROFILER)));
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158 | Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR))
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159 | == (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR));
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160 | for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
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161 | {
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162 | PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
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163 | Assert(!pcCur->fRCMapping);
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164 | Assert(!pcCur->fMapped);
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165 | Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
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166 | }
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167 |
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168 | /*
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169 | * Expose HVP (Hypervisor Present) bit to the guest.
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170 | */
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171 | CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
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172 |
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173 | /*
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174 | * Modify the standard hypervisor leaves for Hyper-V.
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175 | */
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176 | CPUMCPUIDLEAF HyperLeaf;
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177 | RT_ZERO(HyperLeaf);
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178 | HyperLeaf.uLeaf = UINT32_C(0x40000000);
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179 | HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
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180 | HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
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181 | HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
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182 | HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
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183 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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184 | AssertLogRelRCReturn(rc, rc);
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185 |
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186 | HyperLeaf.uLeaf = UINT32_C(0x40000001);
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187 | HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
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188 | HyperLeaf.uEbx = 0; /* Reserved */
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189 | HyperLeaf.uEcx = 0; /* Reserved */
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190 | HyperLeaf.uEdx = 0; /* Reserved */
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191 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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192 | AssertLogRelRCReturn(rc, rc);
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193 |
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194 | /*
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195 | * Add Hyper-V specific leaves.
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196 | */
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197 | HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
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198 | HyperLeaf.uEax = 0;
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199 | HyperLeaf.uEbx = 0;
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200 | HyperLeaf.uEcx = 0;
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201 | HyperLeaf.uEdx = 0;
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202 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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203 | AssertLogRelRCReturn(rc, rc);
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204 |
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205 | HyperLeaf.uLeaf = UINT32_C(0x40000003);
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206 | HyperLeaf.uEax = pHv->uBaseFeat;
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207 | HyperLeaf.uEbx = pHv->uPartFlags;
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208 | HyperLeaf.uEcx = pHv->uPowMgmtFeat;
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209 | HyperLeaf.uEdx = pHv->uMiscFeat;
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210 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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211 | AssertLogRelRCReturn(rc, rc);
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212 |
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213 | HyperLeaf.uLeaf = UINT32_C(0x40000004);
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214 | HyperLeaf.uEax = pHv->uHyperHints;
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215 | HyperLeaf.uEbx = 0xffffffff;
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216 | HyperLeaf.uEcx = 0;
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217 | HyperLeaf.uEdx = 0;
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218 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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219 | AssertLogRelRCReturn(rc, rc);
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220 |
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221 | /*
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222 | * Insert all MSR ranges of Hyper-V.
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223 | */
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224 | for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
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225 | {
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226 | rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
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227 | AssertLogRelRCReturn(rc, rc);
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228 | }
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229 |
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230 | /*
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231 | * Setup non-zero MSRs.
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232 | */
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233 | if (pHv->uMiscFeat & GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS)
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234 | pHv->uCrashCtl = MSR_GIM_HV_CRASH_CTL_NOTIFY_BIT;
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235 |
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236 | return VINF_SUCCESS;
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237 | }
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238 |
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239 |
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240 | /**
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241 | * Initializes remaining bits of the Hyper-V provider.
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242 | *
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243 | * This is called after initializing HM and almost all other VMM components.
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244 | *
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245 | * @returns VBox status code.
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246 | * @param pVM Pointer to the VM.
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247 | */
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248 | VMMR3_INT_DECL(int) gimR3HvInitCompleted(PVM pVM)
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249 | {
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250 | PGIMHV pHv = &pVM->gim.s.u.Hv;
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251 | pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
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252 |
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253 | /*
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254 | * Determine interface capabilities based on the version.
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255 | */
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256 | if (!pVM->gim.s.u32Version)
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257 | {
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258 | /* Hypervisor capabilities; features used by the hypervisor. */
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259 | pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
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260 | pHv->uHyperCaps |= HMAreMsrBitmapsAvailable(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
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261 | }
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262 |
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263 | CPUMCPUIDLEAF HyperLeaf;
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264 | RT_ZERO(HyperLeaf);
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265 | HyperLeaf.uLeaf = UINT32_C(0x40000006);
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266 | HyperLeaf.uEax = pHv->uHyperCaps;
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267 | HyperLeaf.uEbx = 0;
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268 | HyperLeaf.uEcx = 0;
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269 | HyperLeaf.uEdx = 0;
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270 | int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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271 | AssertLogRelRCReturn(rc, rc);
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272 |
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273 | return rc;
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274 | }
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275 |
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276 |
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277 | #if 0
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278 | VMMR3_INT_DECL(int) gimR3HvInitFinalize(PVM pVM)
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279 | {
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280 | pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
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281 | if (!HMIsEnabled(pVM))
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282 | {
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283 | rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
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284 | AssertRCReturn(rc, rc);
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285 | }
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286 | rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
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287 | AssertRCReturn(rc, rc);
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288 | }
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289 | #endif
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290 |
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291 |
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292 | /**
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293 | * Terminates the Hyper-V GIM provider.
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294 | *
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295 | * @returns VBox status code.
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296 | * @param pVM Pointer to the VM.
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297 | */
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298 | VMMR3_INT_DECL(int) gimR3HvTerm(PVM pVM)
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299 | {
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300 | gimR3HvReset(pVM);
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301 | return VINF_SUCCESS;
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302 | }
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303 |
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304 |
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305 | /**
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306 | * Applies relocations to data and code managed by this component.
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307 | *
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308 | * This function will be called at init and whenever the VMM need to relocate
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309 | * itself inside the GC.
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310 | *
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311 | * @param pVM Pointer to the VM.
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312 | * @param offDelta Relocation delta relative to old location.
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313 | */
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314 | VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
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315 | {
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316 | #if 0
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317 | int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
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318 | AssertFatalRC(rc);
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319 | #endif
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320 | }
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321 |
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322 |
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323 | /**
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324 | * This resets Hyper-V provider MSRs and unmaps whatever Hyper-V regions that
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325 | * the guest may have mapped.
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326 | *
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327 | * This is called when the VM is being reset.
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328 | *
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329 | * @param pVM Pointer to the VM.
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330 | * @thread EMT(0).
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331 | */
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332 | VMMR3_INT_DECL(void) gimR3HvReset(PVM pVM)
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333 | {
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334 | VM_ASSERT_EMT0(pVM);
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335 |
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336 | /*
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337 | * Unmap MMIO2 pages that the guest may have setup.
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338 | */
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339 | LogRel(("GIM: HyperV: Resetting MMIO2 regions and MSRs\n"));
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340 | PGIMHV pHv = &pVM->gim.s.u.Hv;
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341 | for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
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342 | {
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343 | PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
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344 | #if 0
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345 | GIMR3Mmio2Unmap(pVM, pRegion);
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346 | #else
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347 | pRegion->fMapped = false;
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348 | pRegion->GCPhysPage = NIL_RTGCPHYS;
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349 | #endif
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350 | }
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351 |
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352 | /*
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353 | * Reset MSRs.
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354 | */
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355 | pHv->u64GuestOsIdMsr = 0;
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356 | pHv->u64HypercallMsr = 0;
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357 | pHv->u64TscPageMsr = 0;
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358 | pHv->uCrashP0 = 0;
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359 | pHv->uCrashP1 = 0;
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360 | pHv->uCrashP2 = 0;
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361 | pHv->uCrashP3 = 0;
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362 | pHv->uCrashP4 = 0;
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363 | }
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364 |
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365 |
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366 | /**
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367 | * Returns a pointer to the MMIO2 regions supported by Hyper-V.
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368 | *
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369 | * @returns Pointer to an array of MMIO2 regions.
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370 | * @param pVM Pointer to the VM.
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371 | * @param pcRegions Where to store the number of regions in the array.
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372 | */
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373 | VMMR3_INT_DECL(PGIMMMIO2REGION) gimR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
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374 | {
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375 | Assert(GIMIsEnabled(pVM));
|
---|
376 | PGIMHV pHv = &pVM->gim.s.u.Hv;
|
---|
377 |
|
---|
378 | *pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
|
---|
379 | Assert(*pcRegions <= UINT8_MAX); /* See PGMR3PhysMMIO2Register(). */
|
---|
380 | return pHv->aMmio2Regions;
|
---|
381 | }
|
---|
382 |
|
---|
383 |
|
---|
384 | /**
|
---|
385 | * Hyper-V state-save operation.
|
---|
386 | *
|
---|
387 | * @returns VBox status code.
|
---|
388 | * @param pVM Pointer to the VM.
|
---|
389 | * @param pSSM Pointer to the SSM handle.
|
---|
390 | */
|
---|
391 | VMMR3_INT_DECL(int) gimR3HvSave(PVM pVM, PSSMHANDLE pSSM)
|
---|
392 | {
|
---|
393 | PCGIMHV pcHv = &pVM->gim.s.u.Hv;
|
---|
394 |
|
---|
395 | /*
|
---|
396 | * Save the Hyper-V SSM version.
|
---|
397 | */
|
---|
398 | SSMR3PutU32(pSSM, GIM_HV_SAVED_STATE_VERSION);
|
---|
399 |
|
---|
400 | /*
|
---|
401 | * Save per-VM MSRs.
|
---|
402 | */
|
---|
403 | SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr);
|
---|
404 | SSMR3PutU64(pSSM, pcHv->u64HypercallMsr);
|
---|
405 | SSMR3PutU64(pSSM, pcHv->u64TscPageMsr);
|
---|
406 |
|
---|
407 | /*
|
---|
408 | * Save Hyper-V features / capabilities.
|
---|
409 | */
|
---|
410 | SSMR3PutU32(pSSM, pcHv->uBaseFeat);
|
---|
411 | SSMR3PutU32(pSSM, pcHv->uPartFlags);
|
---|
412 | SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat);
|
---|
413 | SSMR3PutU32(pSSM, pcHv->uMiscFeat);
|
---|
414 | SSMR3PutU32(pSSM, pcHv->uHyperHints);
|
---|
415 | SSMR3PutU32(pSSM, pcHv->uHyperCaps);
|
---|
416 |
|
---|
417 | /*
|
---|
418 | * Save the Hypercall region.
|
---|
419 | */
|
---|
420 | PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
|
---|
421 | SSMR3PutU8(pSSM, pcRegion->iRegion);
|
---|
422 | SSMR3PutBool(pSSM, pcRegion->fRCMapping);
|
---|
423 | SSMR3PutU32(pSSM, pcRegion->cbRegion);
|
---|
424 | SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
|
---|
425 | SSMR3PutStrZ(pSSM, pcRegion->szDescription);
|
---|
426 |
|
---|
427 | /*
|
---|
428 | * Save the reference TSC region.
|
---|
429 | */
|
---|
430 | pcRegion = &pcHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
|
---|
431 | SSMR3PutU8(pSSM, pcRegion->iRegion);
|
---|
432 | SSMR3PutBool(pSSM, pcRegion->fRCMapping);
|
---|
433 | SSMR3PutU32(pSSM, pcRegion->cbRegion);
|
---|
434 | SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
|
---|
435 | SSMR3PutStrZ(pSSM, pcRegion->szDescription);
|
---|
436 | /* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
|
---|
437 | uint32_t uTscSequence = 0;
|
---|
438 | if ( pcRegion->fMapped
|
---|
439 | && MSR_GIM_HV_REF_TSC_IS_ENABLED(pcHv->u64TscPageMsr))
|
---|
440 | {
|
---|
441 | PCGIMHVREFTSC pcRefTsc = (PCGIMHVREFTSC)pcRegion->pvPageR3;
|
---|
442 | uTscSequence = pcRefTsc->u32TscSequence;
|
---|
443 | }
|
---|
444 |
|
---|
445 | return SSMR3PutU32(pSSM, uTscSequence);
|
---|
446 | }
|
---|
447 |
|
---|
448 |
|
---|
449 | /**
|
---|
450 | * Hyper-V state-load operation, final pass.
|
---|
451 | *
|
---|
452 | * @returns VBox status code.
|
---|
453 | * @param pVM Pointer to the VM.
|
---|
454 | * @param pSSM Pointer to the SSM handle.
|
---|
455 | * @param uSSMVersion The GIM saved-state version.
|
---|
456 | */
|
---|
457 | VMMR3_INT_DECL(int) gimR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
|
---|
458 | {
|
---|
459 | /*
|
---|
460 | * Load the Hyper-V SSM version first.
|
---|
461 | */
|
---|
462 | uint32_t uHvSavedStatVersion;
|
---|
463 | int rc = SSMR3GetU32(pSSM, &uHvSavedStatVersion);
|
---|
464 | AssertRCReturn(rc, rc);
|
---|
465 | if (uHvSavedStatVersion != GIM_HV_SAVED_STATE_VERSION)
|
---|
466 | return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
|
---|
467 | N_("Unsupported Hyper-V saved-state version %u (expected %u)."), uHvSavedStatVersion,
|
---|
468 | GIM_HV_SAVED_STATE_VERSION);
|
---|
469 |
|
---|
470 | /*
|
---|
471 | * Update the TSC frequency from TM.
|
---|
472 | */
|
---|
473 | PGIMHV pHv = &pVM->gim.s.u.Hv;
|
---|
474 | pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
|
---|
475 |
|
---|
476 | /*
|
---|
477 | * Load per-VM MSRs.
|
---|
478 | */
|
---|
479 | SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr);
|
---|
480 | SSMR3GetU64(pSSM, &pHv->u64HypercallMsr);
|
---|
481 | SSMR3GetU64(pSSM, &pHv->u64TscPageMsr);
|
---|
482 |
|
---|
483 | /*
|
---|
484 | * Load Hyper-V features / capabilities.
|
---|
485 | */
|
---|
486 | SSMR3GetU32(pSSM, &pHv->uBaseFeat);
|
---|
487 | SSMR3GetU32(pSSM, &pHv->uPartFlags);
|
---|
488 | SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat);
|
---|
489 | SSMR3GetU32(pSSM, &pHv->uMiscFeat);
|
---|
490 | SSMR3GetU32(pSSM, &pHv->uHyperHints);
|
---|
491 | SSMR3GetU32(pSSM, &pHv->uHyperCaps);
|
---|
492 |
|
---|
493 | /*
|
---|
494 | * Load and enable the Hypercall region.
|
---|
495 | */
|
---|
496 | PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
|
---|
497 | SSMR3GetU8(pSSM, &pRegion->iRegion);
|
---|
498 | SSMR3GetBool(pSSM, &pRegion->fRCMapping);
|
---|
499 | SSMR3GetU32(pSSM, &pRegion->cbRegion);
|
---|
500 | SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
|
---|
501 | rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
|
---|
502 | AssertRCReturn(rc, rc);
|
---|
503 |
|
---|
504 | if (pRegion->cbRegion != PAGE_SIZE)
|
---|
505 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall page region size %u invalid, expected %u"),
|
---|
506 | pRegion->cbRegion, PAGE_SIZE);
|
---|
507 |
|
---|
508 | if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
|
---|
509 | {
|
---|
510 | Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
|
---|
511 | if (RT_LIKELY(pRegion->fRegistered))
|
---|
512 | {
|
---|
513 | rc = gimR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
|
---|
514 | if (RT_FAILURE(rc))
|
---|
515 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
|
---|
516 | pRegion->GCPhysPage, rc);
|
---|
517 | }
|
---|
518 | else
|
---|
519 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
|
---|
520 | }
|
---|
521 |
|
---|
522 | /*
|
---|
523 | * Load and enable the reference TSC region.
|
---|
524 | */
|
---|
525 | uint32_t uTscSequence;
|
---|
526 | pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
|
---|
527 | SSMR3GetU8(pSSM, &pRegion->iRegion);
|
---|
528 | SSMR3GetBool(pSSM, &pRegion->fRCMapping);
|
---|
529 | SSMR3GetU32(pSSM, &pRegion->cbRegion);
|
---|
530 | SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
|
---|
531 | SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
|
---|
532 | rc = SSMR3GetU32(pSSM, &uTscSequence);
|
---|
533 | AssertRCReturn(rc, rc);
|
---|
534 |
|
---|
535 | if (pRegion->cbRegion != PAGE_SIZE)
|
---|
536 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC page region size %u invalid, expected %u"),
|
---|
537 | pRegion->cbRegion, PAGE_SIZE);
|
---|
538 |
|
---|
539 | if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
|
---|
540 | {
|
---|
541 | Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
|
---|
542 | if (pRegion->fRegistered)
|
---|
543 | {
|
---|
544 | rc = gimR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
|
---|
545 | if (RT_FAILURE(rc))
|
---|
546 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
|
---|
547 | pRegion->GCPhysPage, rc);
|
---|
548 | }
|
---|
549 | else
|
---|
550 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
|
---|
551 | }
|
---|
552 |
|
---|
553 | return rc;
|
---|
554 | }
|
---|
555 |
|
---|
556 |
|
---|
557 | /**
|
---|
558 | * Enables the Hyper-V TSC page.
|
---|
559 | *
|
---|
560 | * @returns VBox status code.
|
---|
561 | * @param pVM Pointer to the VM.
|
---|
562 | * @param GCPhysTscPage Where to map the TSC page.
|
---|
563 | * @param fUseThisTscSeq Whether to set the TSC sequence number to the one
|
---|
564 | * specified in @a uTscSeq.
|
---|
565 | * @param uTscSeq The TSC sequence value to use. Ignored if
|
---|
566 | * @a fUseThisTscSeq is false.
|
---|
567 | */
|
---|
568 | VMMR3_INT_DECL(int) gimR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSeq, uint32_t uTscSeq)
|
---|
569 | {
|
---|
570 | PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
|
---|
571 | PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
|
---|
572 | AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
|
---|
573 |
|
---|
574 | int rc;
|
---|
575 | if (pRegion->fMapped)
|
---|
576 | {
|
---|
577 | /*
|
---|
578 | * Is it already enabled at the given guest-address?
|
---|
579 | */
|
---|
580 | if (pRegion->GCPhysPage == GCPhysTscPage)
|
---|
581 | return VINF_SUCCESS;
|
---|
582 |
|
---|
583 | /*
|
---|
584 | * If it's mapped at a different address, unmap the previous address.
|
---|
585 | */
|
---|
586 | rc = gimR3HvDisableTscPage(pVM);
|
---|
587 | AssertRC(rc);
|
---|
588 | }
|
---|
589 |
|
---|
590 | /*
|
---|
591 | * Map the TSC-page at the specified address.
|
---|
592 | */
|
---|
593 | Assert(!pRegion->fMapped);
|
---|
594 |
|
---|
595 | /** @todo this is buggy when large pages are used due to a PGM limitation, see
|
---|
596 | * @bugref{7532}. Instead of the overlay style mapping, we just
|
---|
597 | * rewrite guest memory directly. */
|
---|
598 | #if 0
|
---|
599 | rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
|
---|
600 | if (RT_SUCCESS(rc))
|
---|
601 | {
|
---|
602 | Assert(pRegion->GCPhysPage == GCPhysTscPage);
|
---|
603 |
|
---|
604 | /*
|
---|
605 | * Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
|
---|
606 | * they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
|
---|
607 | *
|
---|
608 | * Also, Hyper-V normalizes the time in 10 MHz, see:
|
---|
609 | * http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
|
---|
610 | */
|
---|
611 | PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
|
---|
612 | Assert(pRefTsc);
|
---|
613 |
|
---|
614 | PGIMHV pHv = &pVM->gim.s.u.Hv;
|
---|
615 | uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
|
---|
616 | uint32_t u32TscSeq = 1;
|
---|
617 | if ( fUseThisTscSeq
|
---|
618 | && uTscSeq < UINT32_C(0xfffffffe))
|
---|
619 | u32TscSeq = uTscSeq + 1;
|
---|
620 | pRefTsc->u32TscSequence = u32TscSeq;
|
---|
621 | pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
|
---|
622 | pRefTsc->i64TscOffset = 0;
|
---|
623 |
|
---|
624 | LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
|
---|
625 | GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
|
---|
626 |
|
---|
627 | TMR3CpuTickParavirtEnable(pVM);
|
---|
628 | return VINF_SUCCESS;
|
---|
629 | }
|
---|
630 | else
|
---|
631 | LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
|
---|
632 | return VERR_GIM_OPERATION_FAILED;
|
---|
633 | #else
|
---|
634 | AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_2);
|
---|
635 | PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)RTMemAllocZ(PAGE_SIZE);
|
---|
636 | if (RT_UNLIKELY(!pRefTsc))
|
---|
637 | {
|
---|
638 | LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
|
---|
639 | return VERR_NO_MEMORY;
|
---|
640 | }
|
---|
641 |
|
---|
642 | PGIMHV pHv = &pVM->gim.s.u.Hv;
|
---|
643 | uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
|
---|
644 | uint32_t u32TscSeq = 1;
|
---|
645 | if ( fUseThisTscSeq
|
---|
646 | && uTscSeq < UINT32_C(0xfffffffe))
|
---|
647 | u32TscSeq = uTscSeq + 1;
|
---|
648 | pRefTsc->u32TscSequence = u32TscSeq;
|
---|
649 | pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
|
---|
650 | pRefTsc->i64TscOffset = 0;
|
---|
651 |
|
---|
652 | rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysTscPage, pRefTsc, sizeof(*pRefTsc));
|
---|
653 | if (RT_SUCCESS(rc))
|
---|
654 | {
|
---|
655 | LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
|
---|
656 | GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
|
---|
657 |
|
---|
658 | pRegion->GCPhysPage = GCPhysTscPage;
|
---|
659 | pRegion->fMapped = true;
|
---|
660 | TMR3CpuTickParavirtEnable(pVM);
|
---|
661 | }
|
---|
662 | else
|
---|
663 | {
|
---|
664 | LogRelFunc(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", rc));
|
---|
665 | rc = VERR_GIM_OPERATION_FAILED;
|
---|
666 | }
|
---|
667 | RTMemFree(pRefTsc);
|
---|
668 | return rc;
|
---|
669 | #endif
|
---|
670 | }
|
---|
671 |
|
---|
672 |
|
---|
673 | /**
|
---|
674 | * Disables the Hyper-V TSC page.
|
---|
675 | *
|
---|
676 | * @returns VBox status code.
|
---|
677 | * @param pVM Pointer to the VM.
|
---|
678 | */
|
---|
679 | VMMR3_INT_DECL(int) gimR3HvDisableTscPage(PVM pVM)
|
---|
680 | {
|
---|
681 | PGIMHV pHv = &pVM->gim.s.u.Hv;
|
---|
682 | PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
|
---|
683 | if (pRegion->fMapped)
|
---|
684 | {
|
---|
685 | #if 0
|
---|
686 | GIMR3Mmio2Unmap(pVM, pRegion);
|
---|
687 | Assert(!pRegion->fMapped);
|
---|
688 | #else
|
---|
689 | pRegion->fMapped = false;
|
---|
690 | #endif
|
---|
691 | LogRel(("GIM: HyperV: Disabled TSC-page\n"));
|
---|
692 |
|
---|
693 | TMR3CpuTickParavirtDisable(pVM);
|
---|
694 | return VINF_SUCCESS;
|
---|
695 | }
|
---|
696 | return VERR_GIM_PVTSC_NOT_ENABLED;
|
---|
697 | }
|
---|
698 |
|
---|
699 |
|
---|
700 | /**
|
---|
701 | * Disables the Hyper-V Hypercall page.
|
---|
702 | *
|
---|
703 | * @returns VBox status code.
|
---|
704 | */
|
---|
705 | VMMR3_INT_DECL(int) gimR3HvDisableHypercallPage(PVM pVM)
|
---|
706 | {
|
---|
707 | PGIMHV pHv = &pVM->gim.s.u.Hv;
|
---|
708 | PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
|
---|
709 | if (pRegion->fMapped)
|
---|
710 | {
|
---|
711 | #if 0
|
---|
712 | GIMR3Mmio2Unmap(pVM, pRegion);
|
---|
713 | Assert(!pRegion->fMapped);
|
---|
714 | #else
|
---|
715 | pRegion->fMapped = false;
|
---|
716 | #endif
|
---|
717 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
|
---|
718 | VMMHypercallsDisable(&pVM->aCpus[i]);
|
---|
719 | LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
|
---|
720 | return VINF_SUCCESS;
|
---|
721 | }
|
---|
722 | return VERR_GIM_HYPERCALLS_NOT_ENABLED;
|
---|
723 | }
|
---|
724 |
|
---|
725 |
|
---|
726 | /**
|
---|
727 | * Enables the Hyper-V Hypercall page.
|
---|
728 | *
|
---|
729 | * @returns VBox status code.
|
---|
730 | * @param pVM Pointer to the VM.
|
---|
731 | * @param GCPhysHypercallPage Where to map the hypercall page.
|
---|
732 | */
|
---|
733 | VMMR3_INT_DECL(int) gimR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
|
---|
734 | {
|
---|
735 | PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
|
---|
736 | PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
|
---|
737 | AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
|
---|
738 |
|
---|
739 | if (pRegion->fMapped)
|
---|
740 | {
|
---|
741 | /*
|
---|
742 | * Is it already enabled at the given guest-address?
|
---|
743 | */
|
---|
744 | if (pRegion->GCPhysPage == GCPhysHypercallPage)
|
---|
745 | return VINF_SUCCESS;
|
---|
746 |
|
---|
747 | /*
|
---|
748 | * If it's mapped at a different address, unmap the previous address.
|
---|
749 | */
|
---|
750 | int rc2 = gimR3HvDisableHypercallPage(pVM);
|
---|
751 | AssertRC(rc2);
|
---|
752 | }
|
---|
753 |
|
---|
754 | /*
|
---|
755 | * Map the hypercall-page at the specified address.
|
---|
756 | */
|
---|
757 | Assert(!pRegion->fMapped);
|
---|
758 |
|
---|
759 | /** @todo this is buggy when large pages are used due to a PGM limitation, see
|
---|
760 | * @bugref{7532}. Instead of the overlay style mapping, we just
|
---|
761 | * rewrite guest memory directly. */
|
---|
762 | #if 0
|
---|
763 | int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
|
---|
764 | if (RT_SUCCESS(rc))
|
---|
765 | {
|
---|
766 | Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
|
---|
767 |
|
---|
768 | /*
|
---|
769 | * Patch the hypercall-page.
|
---|
770 | */
|
---|
771 | size_t cbWritten = 0;
|
---|
772 | rc = VMMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
|
---|
773 | if ( RT_SUCCESS(rc)
|
---|
774 | && cbWritten < PAGE_SIZE)
|
---|
775 | {
|
---|
776 | uint8_t *pbLast = (uint8_t *)pRegion->pvPageR3 + cbWritten;
|
---|
777 | *pbLast = 0xc3; /* RET */
|
---|
778 |
|
---|
779 | /*
|
---|
780 | * Notify VMM that hypercalls are now enabled for all VCPUs.
|
---|
781 | */
|
---|
782 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
|
---|
783 | VMMHypercallsEnable(&pVM->aCpus[i]);
|
---|
784 |
|
---|
785 | LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
|
---|
786 | return VINF_SUCCESS;
|
---|
787 | }
|
---|
788 | else
|
---|
789 | {
|
---|
790 | if (rc == VINF_SUCCESS)
|
---|
791 | rc = VERR_GIM_OPERATION_FAILED;
|
---|
792 | LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
|
---|
793 | }
|
---|
794 |
|
---|
795 | GIMR3Mmio2Unmap(pVM, pRegion);
|
---|
796 | }
|
---|
797 |
|
---|
798 | LogRel(("GIM: HyperV: GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
|
---|
799 | return rc;
|
---|
800 | #else
|
---|
801 | AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_3);
|
---|
802 | void *pvHypercallPage = RTMemAllocZ(PAGE_SIZE);
|
---|
803 | if (RT_UNLIKELY(!pvHypercallPage))
|
---|
804 | {
|
---|
805 | LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
|
---|
806 | return VERR_NO_MEMORY;
|
---|
807 | }
|
---|
808 |
|
---|
809 | /*
|
---|
810 | * Patch the hypercall-page.
|
---|
811 | */
|
---|
812 | size_t cbWritten = 0;
|
---|
813 | int rc = VMMPatchHypercall(pVM, pvHypercallPage, PAGE_SIZE, &cbWritten);
|
---|
814 | if ( RT_SUCCESS(rc)
|
---|
815 | && cbWritten < PAGE_SIZE)
|
---|
816 | {
|
---|
817 | uint8_t *pbLast = (uint8_t *)pvHypercallPage + cbWritten;
|
---|
818 | *pbLast = 0xc3; /* RET */
|
---|
819 |
|
---|
820 | rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysHypercallPage, pvHypercallPage, PAGE_SIZE);
|
---|
821 | if (RT_SUCCESS(rc))
|
---|
822 | {
|
---|
823 | /*
|
---|
824 | * Notify VMM that hypercalls are now enabled for all VCPUs.
|
---|
825 | */
|
---|
826 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
|
---|
827 | VMMHypercallsEnable(&pVM->aCpus[i]);
|
---|
828 |
|
---|
829 | pRegion->GCPhysPage = GCPhysHypercallPage;
|
---|
830 | pRegion->fMapped = true;
|
---|
831 | LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
|
---|
832 | }
|
---|
833 | else
|
---|
834 | LogRel(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed during hypercall page setup. rc=%Rrc\n", rc));
|
---|
835 | }
|
---|
836 | else
|
---|
837 | {
|
---|
838 | if (rc == VINF_SUCCESS)
|
---|
839 | rc = VERR_GIM_OPERATION_FAILED;
|
---|
840 | LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
|
---|
841 | }
|
---|
842 |
|
---|
843 | RTMemFree(pvHypercallPage);
|
---|
844 | return rc;
|
---|
845 | #endif
|
---|
846 | }
|
---|
847 |
|
---|