VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 57334

Last change on this file since 57334 was 57159, checked in by vboxsync, 9 years ago

VMM/GIM: Hyper-V reset the crash MSRs on VM reset.

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1/* $Id: GIMHv.cpp 57159 2015-08-03 13:57:36Z vboxsync $ */
2/** @file
3 * GIM - Guest Interface Manager, Hyper-V implementation.
4 */
5
6/*
7 * Copyright (C) 2014-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_GIM
22#include "GIMInternal.h"
23
24#include <iprt/assert.h>
25#include <iprt/err.h>
26#include <iprt/string.h>
27#include <iprt/mem.h>
28#include <iprt/spinlock.h>
29
30#include <VBox/vmm/cpum.h>
31#include <VBox/vmm/ssm.h>
32#include <VBox/vmm/vm.h>
33#include <VBox/vmm/hm.h>
34#include <VBox/vmm/pdmapi.h>
35#include <VBox/version.h>
36
37
38/*******************************************************************************
39* Defined Constants And Macros *
40*******************************************************************************/
41//#define GIMHV_HYPERCALL "GIMHvHypercall"
42
43/**
44 * GIM Hyper-V saved-state version.
45 */
46#define GIM_HV_SAVED_STATE_VERSION UINT32_C(1)
47
48
49/*******************************************************************************
50* Global Variables *
51*******************************************************************************/
52#ifdef VBOX_WITH_STATISTICS
53# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
54 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
55#else
56# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
57 { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
58#endif
59
60/**
61 * Array of MSR ranges supported by Hyper-V.
62 */
63static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
64{
65 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
66 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
67 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
68 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
69 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
70 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
71 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
72 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
73 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
74 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
75 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
76 GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
77};
78#undef GIMHV_MSRRANGE
79
80
81/**
82 * Initializes the Hyper-V GIM provider.
83 *
84 * @returns VBox status code.
85 * @param pVM Pointer to the VM.
86 * @param uVersion The interface version this VM should use.
87 */
88VMMR3_INT_DECL(int) gimR3HvInit(PVM pVM)
89{
90 AssertReturn(pVM, VERR_INVALID_PARAMETER);
91 AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
92
93 int rc;
94 PGIMHV pHv = &pVM->gim.s.u.Hv;
95
96 /*
97 * Determine interface capabilities based on the version.
98 */
99 if (!pVM->gim.s.u32Version)
100 {
101 /* Basic features. */
102 pHv->uBaseFeat = 0
103 //| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
104 | GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
105 //| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
106 //| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
107 | GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
108 | GIM_HV_BASE_FEAT_HYPERCALL_MSRS
109 | GIM_HV_BASE_FEAT_VP_ID_MSR
110 | GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
111 //| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
112 | GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
113 //| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
114 | GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
115 //| GIM_HV_BASE_FEAT_DEBUG_MSRS
116 ;
117
118 /* Miscellaneous features. */
119 pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ
120 | GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS;
121
122 /* Hypervisor recommendations to the guest. */
123 pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
124 | GIM_HV_HINT_RELAX_TIME_CHECKS;
125 }
126
127 /*
128 * Populate the required fields in MMIO2 region records for registering.
129 */
130 AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
131 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
132 pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
133 pRegion->fRCMapping = false;
134 pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
135 pRegion->GCPhysPage = NIL_RTGCPHYS;
136 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
137
138 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
139 pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
140 pRegion->fRCMapping = false;
141 pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
142 pRegion->GCPhysPage = NIL_RTGCPHYS;
143 RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
144
145 /*
146 * Make sure the CPU ID bit are in accordance to the Hyper-V
147 * requirement and other paranoia checks.
148 * See "Requirements for implementing the Microsoft hypervisor interface" spec.
149 */
150 Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
151 | GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
152 | GIM_HV_PART_FLAGS_ACCESS_PART_ID
153 | GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
154 | GIM_HV_PART_FLAGS_CREATE_PORT
155 | GIM_HV_PART_FLAGS_ACCESS_STATS
156 | GIM_HV_PART_FLAGS_CPU_MGMT
157 | GIM_HV_PART_FLAGS_CPU_PROFILER)));
158 Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR))
159 == (GIM_HV_BASE_FEAT_HYPERCALL_MSRS | GIM_HV_BASE_FEAT_VP_ID_MSR));
160 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
161 {
162 PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
163 Assert(!pcCur->fRCMapping);
164 Assert(!pcCur->fMapped);
165 Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
166 }
167
168 /*
169 * Expose HVP (Hypervisor Present) bit to the guest.
170 */
171 CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
172
173 /*
174 * Modify the standard hypervisor leaves for Hyper-V.
175 */
176 CPUMCPUIDLEAF HyperLeaf;
177 RT_ZERO(HyperLeaf);
178 HyperLeaf.uLeaf = UINT32_C(0x40000000);
179 HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
180 HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
181 HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
182 HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
183 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
184 AssertLogRelRCReturn(rc, rc);
185
186 HyperLeaf.uLeaf = UINT32_C(0x40000001);
187 HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
188 HyperLeaf.uEbx = 0; /* Reserved */
189 HyperLeaf.uEcx = 0; /* Reserved */
190 HyperLeaf.uEdx = 0; /* Reserved */
191 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
192 AssertLogRelRCReturn(rc, rc);
193
194 /*
195 * Add Hyper-V specific leaves.
196 */
197 HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
198 HyperLeaf.uEax = 0;
199 HyperLeaf.uEbx = 0;
200 HyperLeaf.uEcx = 0;
201 HyperLeaf.uEdx = 0;
202 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
203 AssertLogRelRCReturn(rc, rc);
204
205 HyperLeaf.uLeaf = UINT32_C(0x40000003);
206 HyperLeaf.uEax = pHv->uBaseFeat;
207 HyperLeaf.uEbx = pHv->uPartFlags;
208 HyperLeaf.uEcx = pHv->uPowMgmtFeat;
209 HyperLeaf.uEdx = pHv->uMiscFeat;
210 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
211 AssertLogRelRCReturn(rc, rc);
212
213 HyperLeaf.uLeaf = UINT32_C(0x40000004);
214 HyperLeaf.uEax = pHv->uHyperHints;
215 HyperLeaf.uEbx = 0xffffffff;
216 HyperLeaf.uEcx = 0;
217 HyperLeaf.uEdx = 0;
218 rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
219 AssertLogRelRCReturn(rc, rc);
220
221 /*
222 * Insert all MSR ranges of Hyper-V.
223 */
224 for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
225 {
226 rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
227 AssertLogRelRCReturn(rc, rc);
228 }
229
230 /*
231 * Setup non-zero MSRs.
232 */
233 if (pHv->uMiscFeat & GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS)
234 pHv->uCrashCtl = MSR_GIM_HV_CRASH_CTL_NOTIFY_BIT;
235
236 return VINF_SUCCESS;
237}
238
239
240/**
241 * Initializes remaining bits of the Hyper-V provider.
242 *
243 * This is called after initializing HM and almost all other VMM components.
244 *
245 * @returns VBox status code.
246 * @param pVM Pointer to the VM.
247 */
248VMMR3_INT_DECL(int) gimR3HvInitCompleted(PVM pVM)
249{
250 PGIMHV pHv = &pVM->gim.s.u.Hv;
251 pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
252
253 /*
254 * Determine interface capabilities based on the version.
255 */
256 if (!pVM->gim.s.u32Version)
257 {
258 /* Hypervisor capabilities; features used by the hypervisor. */
259 pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
260 pHv->uHyperCaps |= HMAreMsrBitmapsAvailable(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
261 }
262
263 CPUMCPUIDLEAF HyperLeaf;
264 RT_ZERO(HyperLeaf);
265 HyperLeaf.uLeaf = UINT32_C(0x40000006);
266 HyperLeaf.uEax = pHv->uHyperCaps;
267 HyperLeaf.uEbx = 0;
268 HyperLeaf.uEcx = 0;
269 HyperLeaf.uEdx = 0;
270 int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
271 AssertLogRelRCReturn(rc, rc);
272
273 return rc;
274}
275
276
277#if 0
278VMMR3_INT_DECL(int) gimR3HvInitFinalize(PVM pVM)
279{
280 pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
281 if (!HMIsEnabled(pVM))
282 {
283 rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
284 AssertRCReturn(rc, rc);
285 }
286 rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
287 AssertRCReturn(rc, rc);
288}
289#endif
290
291
292/**
293 * Terminates the Hyper-V GIM provider.
294 *
295 * @returns VBox status code.
296 * @param pVM Pointer to the VM.
297 */
298VMMR3_INT_DECL(int) gimR3HvTerm(PVM pVM)
299{
300 gimR3HvReset(pVM);
301 return VINF_SUCCESS;
302}
303
304
305/**
306 * Applies relocations to data and code managed by this component.
307 *
308 * This function will be called at init and whenever the VMM need to relocate
309 * itself inside the GC.
310 *
311 * @param pVM Pointer to the VM.
312 * @param offDelta Relocation delta relative to old location.
313 */
314VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
315{
316#if 0
317 int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
318 AssertFatalRC(rc);
319#endif
320}
321
322
323/**
324 * This resets Hyper-V provider MSRs and unmaps whatever Hyper-V regions that
325 * the guest may have mapped.
326 *
327 * This is called when the VM is being reset.
328 *
329 * @param pVM Pointer to the VM.
330 * @thread EMT(0).
331 */
332VMMR3_INT_DECL(void) gimR3HvReset(PVM pVM)
333{
334 VM_ASSERT_EMT0(pVM);
335
336 /*
337 * Unmap MMIO2 pages that the guest may have setup.
338 */
339 LogRel(("GIM: HyperV: Resetting MMIO2 regions and MSRs\n"));
340 PGIMHV pHv = &pVM->gim.s.u.Hv;
341 for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
342 {
343 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
344#if 0
345 GIMR3Mmio2Unmap(pVM, pRegion);
346#else
347 pRegion->fMapped = false;
348 pRegion->GCPhysPage = NIL_RTGCPHYS;
349#endif
350 }
351
352 /*
353 * Reset MSRs.
354 */
355 pHv->u64GuestOsIdMsr = 0;
356 pHv->u64HypercallMsr = 0;
357 pHv->u64TscPageMsr = 0;
358 pHv->uCrashP0 = 0;
359 pHv->uCrashP1 = 0;
360 pHv->uCrashP2 = 0;
361 pHv->uCrashP3 = 0;
362 pHv->uCrashP4 = 0;
363}
364
365
366/**
367 * Returns a pointer to the MMIO2 regions supported by Hyper-V.
368 *
369 * @returns Pointer to an array of MMIO2 regions.
370 * @param pVM Pointer to the VM.
371 * @param pcRegions Where to store the number of regions in the array.
372 */
373VMMR3_INT_DECL(PGIMMMIO2REGION) gimR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
374{
375 Assert(GIMIsEnabled(pVM));
376 PGIMHV pHv = &pVM->gim.s.u.Hv;
377
378 *pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
379 Assert(*pcRegions <= UINT8_MAX); /* See PGMR3PhysMMIO2Register(). */
380 return pHv->aMmio2Regions;
381}
382
383
384/**
385 * Hyper-V state-save operation.
386 *
387 * @returns VBox status code.
388 * @param pVM Pointer to the VM.
389 * @param pSSM Pointer to the SSM handle.
390 */
391VMMR3_INT_DECL(int) gimR3HvSave(PVM pVM, PSSMHANDLE pSSM)
392{
393 PCGIMHV pcHv = &pVM->gim.s.u.Hv;
394
395 /*
396 * Save the Hyper-V SSM version.
397 */
398 SSMR3PutU32(pSSM, GIM_HV_SAVED_STATE_VERSION);
399
400 /*
401 * Save per-VM MSRs.
402 */
403 SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr);
404 SSMR3PutU64(pSSM, pcHv->u64HypercallMsr);
405 SSMR3PutU64(pSSM, pcHv->u64TscPageMsr);
406
407 /*
408 * Save Hyper-V features / capabilities.
409 */
410 SSMR3PutU32(pSSM, pcHv->uBaseFeat);
411 SSMR3PutU32(pSSM, pcHv->uPartFlags);
412 SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat);
413 SSMR3PutU32(pSSM, pcHv->uMiscFeat);
414 SSMR3PutU32(pSSM, pcHv->uHyperHints);
415 SSMR3PutU32(pSSM, pcHv->uHyperCaps);
416
417 /*
418 * Save the Hypercall region.
419 */
420 PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
421 SSMR3PutU8(pSSM, pcRegion->iRegion);
422 SSMR3PutBool(pSSM, pcRegion->fRCMapping);
423 SSMR3PutU32(pSSM, pcRegion->cbRegion);
424 SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
425 SSMR3PutStrZ(pSSM, pcRegion->szDescription);
426
427 /*
428 * Save the reference TSC region.
429 */
430 pcRegion = &pcHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
431 SSMR3PutU8(pSSM, pcRegion->iRegion);
432 SSMR3PutBool(pSSM, pcRegion->fRCMapping);
433 SSMR3PutU32(pSSM, pcRegion->cbRegion);
434 SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
435 SSMR3PutStrZ(pSSM, pcRegion->szDescription);
436 /* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
437 uint32_t uTscSequence = 0;
438 if ( pcRegion->fMapped
439 && MSR_GIM_HV_REF_TSC_IS_ENABLED(pcHv->u64TscPageMsr))
440 {
441 PCGIMHVREFTSC pcRefTsc = (PCGIMHVREFTSC)pcRegion->pvPageR3;
442 uTscSequence = pcRefTsc->u32TscSequence;
443 }
444
445 return SSMR3PutU32(pSSM, uTscSequence);
446}
447
448
449/**
450 * Hyper-V state-load operation, final pass.
451 *
452 * @returns VBox status code.
453 * @param pVM Pointer to the VM.
454 * @param pSSM Pointer to the SSM handle.
455 * @param uSSMVersion The GIM saved-state version.
456 */
457VMMR3_INT_DECL(int) gimR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
458{
459 /*
460 * Load the Hyper-V SSM version first.
461 */
462 uint32_t uHvSavedStatVersion;
463 int rc = SSMR3GetU32(pSSM, &uHvSavedStatVersion);
464 AssertRCReturn(rc, rc);
465 if (uHvSavedStatVersion != GIM_HV_SAVED_STATE_VERSION)
466 return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
467 N_("Unsupported Hyper-V saved-state version %u (expected %u)."), uHvSavedStatVersion,
468 GIM_HV_SAVED_STATE_VERSION);
469
470 /*
471 * Update the TSC frequency from TM.
472 */
473 PGIMHV pHv = &pVM->gim.s.u.Hv;
474 pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
475
476 /*
477 * Load per-VM MSRs.
478 */
479 SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr);
480 SSMR3GetU64(pSSM, &pHv->u64HypercallMsr);
481 SSMR3GetU64(pSSM, &pHv->u64TscPageMsr);
482
483 /*
484 * Load Hyper-V features / capabilities.
485 */
486 SSMR3GetU32(pSSM, &pHv->uBaseFeat);
487 SSMR3GetU32(pSSM, &pHv->uPartFlags);
488 SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat);
489 SSMR3GetU32(pSSM, &pHv->uMiscFeat);
490 SSMR3GetU32(pSSM, &pHv->uHyperHints);
491 SSMR3GetU32(pSSM, &pHv->uHyperCaps);
492
493 /*
494 * Load and enable the Hypercall region.
495 */
496 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
497 SSMR3GetU8(pSSM, &pRegion->iRegion);
498 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
499 SSMR3GetU32(pSSM, &pRegion->cbRegion);
500 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
501 rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
502 AssertRCReturn(rc, rc);
503
504 if (pRegion->cbRegion != PAGE_SIZE)
505 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall page region size %u invalid, expected %u"),
506 pRegion->cbRegion, PAGE_SIZE);
507
508 if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
509 {
510 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
511 if (RT_LIKELY(pRegion->fRegistered))
512 {
513 rc = gimR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
514 if (RT_FAILURE(rc))
515 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
516 pRegion->GCPhysPage, rc);
517 }
518 else
519 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
520 }
521
522 /*
523 * Load and enable the reference TSC region.
524 */
525 uint32_t uTscSequence;
526 pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
527 SSMR3GetU8(pSSM, &pRegion->iRegion);
528 SSMR3GetBool(pSSM, &pRegion->fRCMapping);
529 SSMR3GetU32(pSSM, &pRegion->cbRegion);
530 SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
531 SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
532 rc = SSMR3GetU32(pSSM, &uTscSequence);
533 AssertRCReturn(rc, rc);
534
535 if (pRegion->cbRegion != PAGE_SIZE)
536 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC page region size %u invalid, expected %u"),
537 pRegion->cbRegion, PAGE_SIZE);
538
539 if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
540 {
541 Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
542 if (pRegion->fRegistered)
543 {
544 rc = gimR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
545 if (RT_FAILURE(rc))
546 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
547 pRegion->GCPhysPage, rc);
548 }
549 else
550 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
551 }
552
553 return rc;
554}
555
556
557/**
558 * Enables the Hyper-V TSC page.
559 *
560 * @returns VBox status code.
561 * @param pVM Pointer to the VM.
562 * @param GCPhysTscPage Where to map the TSC page.
563 * @param fUseThisTscSeq Whether to set the TSC sequence number to the one
564 * specified in @a uTscSeq.
565 * @param uTscSeq The TSC sequence value to use. Ignored if
566 * @a fUseThisTscSeq is false.
567 */
568VMMR3_INT_DECL(int) gimR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSeq, uint32_t uTscSeq)
569{
570 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
571 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
572 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
573
574 int rc;
575 if (pRegion->fMapped)
576 {
577 /*
578 * Is it already enabled at the given guest-address?
579 */
580 if (pRegion->GCPhysPage == GCPhysTscPage)
581 return VINF_SUCCESS;
582
583 /*
584 * If it's mapped at a different address, unmap the previous address.
585 */
586 rc = gimR3HvDisableTscPage(pVM);
587 AssertRC(rc);
588 }
589
590 /*
591 * Map the TSC-page at the specified address.
592 */
593 Assert(!pRegion->fMapped);
594
595 /** @todo this is buggy when large pages are used due to a PGM limitation, see
596 * @bugref{7532}. Instead of the overlay style mapping, we just
597 * rewrite guest memory directly. */
598#if 0
599 rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
600 if (RT_SUCCESS(rc))
601 {
602 Assert(pRegion->GCPhysPage == GCPhysTscPage);
603
604 /*
605 * Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
606 * they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
607 *
608 * Also, Hyper-V normalizes the time in 10 MHz, see:
609 * http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
610 */
611 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
612 Assert(pRefTsc);
613
614 PGIMHV pHv = &pVM->gim.s.u.Hv;
615 uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
616 uint32_t u32TscSeq = 1;
617 if ( fUseThisTscSeq
618 && uTscSeq < UINT32_C(0xfffffffe))
619 u32TscSeq = uTscSeq + 1;
620 pRefTsc->u32TscSequence = u32TscSeq;
621 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
622 pRefTsc->i64TscOffset = 0;
623
624 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
625 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
626
627 TMR3CpuTickParavirtEnable(pVM);
628 return VINF_SUCCESS;
629 }
630 else
631 LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
632 return VERR_GIM_OPERATION_FAILED;
633#else
634 AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_2);
635 PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)RTMemAllocZ(PAGE_SIZE);
636 if (RT_UNLIKELY(!pRefTsc))
637 {
638 LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
639 return VERR_NO_MEMORY;
640 }
641
642 PGIMHV pHv = &pVM->gim.s.u.Hv;
643 uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
644 uint32_t u32TscSeq = 1;
645 if ( fUseThisTscSeq
646 && uTscSeq < UINT32_C(0xfffffffe))
647 u32TscSeq = uTscSeq + 1;
648 pRefTsc->u32TscSequence = u32TscSeq;
649 pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
650 pRefTsc->i64TscOffset = 0;
651
652 rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysTscPage, pRefTsc, sizeof(*pRefTsc));
653 if (RT_SUCCESS(rc))
654 {
655 LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
656 GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
657
658 pRegion->GCPhysPage = GCPhysTscPage;
659 pRegion->fMapped = true;
660 TMR3CpuTickParavirtEnable(pVM);
661 }
662 else
663 {
664 LogRelFunc(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", rc));
665 rc = VERR_GIM_OPERATION_FAILED;
666 }
667 RTMemFree(pRefTsc);
668 return rc;
669#endif
670}
671
672
673/**
674 * Disables the Hyper-V TSC page.
675 *
676 * @returns VBox status code.
677 * @param pVM Pointer to the VM.
678 */
679VMMR3_INT_DECL(int) gimR3HvDisableTscPage(PVM pVM)
680{
681 PGIMHV pHv = &pVM->gim.s.u.Hv;
682 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
683 if (pRegion->fMapped)
684 {
685#if 0
686 GIMR3Mmio2Unmap(pVM, pRegion);
687 Assert(!pRegion->fMapped);
688#else
689 pRegion->fMapped = false;
690#endif
691 LogRel(("GIM: HyperV: Disabled TSC-page\n"));
692
693 TMR3CpuTickParavirtDisable(pVM);
694 return VINF_SUCCESS;
695 }
696 return VERR_GIM_PVTSC_NOT_ENABLED;
697}
698
699
700/**
701 * Disables the Hyper-V Hypercall page.
702 *
703 * @returns VBox status code.
704 */
705VMMR3_INT_DECL(int) gimR3HvDisableHypercallPage(PVM pVM)
706{
707 PGIMHV pHv = &pVM->gim.s.u.Hv;
708 PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
709 if (pRegion->fMapped)
710 {
711#if 0
712 GIMR3Mmio2Unmap(pVM, pRegion);
713 Assert(!pRegion->fMapped);
714#else
715 pRegion->fMapped = false;
716#endif
717 for (VMCPUID i = 0; i < pVM->cCpus; i++)
718 VMMHypercallsDisable(&pVM->aCpus[i]);
719 LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
720 return VINF_SUCCESS;
721 }
722 return VERR_GIM_HYPERCALLS_NOT_ENABLED;
723}
724
725
726/**
727 * Enables the Hyper-V Hypercall page.
728 *
729 * @returns VBox status code.
730 * @param pVM Pointer to the VM.
731 * @param GCPhysHypercallPage Where to map the hypercall page.
732 */
733VMMR3_INT_DECL(int) gimR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
734{
735 PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
736 PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
737 AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
738
739 if (pRegion->fMapped)
740 {
741 /*
742 * Is it already enabled at the given guest-address?
743 */
744 if (pRegion->GCPhysPage == GCPhysHypercallPage)
745 return VINF_SUCCESS;
746
747 /*
748 * If it's mapped at a different address, unmap the previous address.
749 */
750 int rc2 = gimR3HvDisableHypercallPage(pVM);
751 AssertRC(rc2);
752 }
753
754 /*
755 * Map the hypercall-page at the specified address.
756 */
757 Assert(!pRegion->fMapped);
758
759 /** @todo this is buggy when large pages are used due to a PGM limitation, see
760 * @bugref{7532}. Instead of the overlay style mapping, we just
761 * rewrite guest memory directly. */
762#if 0
763 int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
764 if (RT_SUCCESS(rc))
765 {
766 Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
767
768 /*
769 * Patch the hypercall-page.
770 */
771 size_t cbWritten = 0;
772 rc = VMMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
773 if ( RT_SUCCESS(rc)
774 && cbWritten < PAGE_SIZE)
775 {
776 uint8_t *pbLast = (uint8_t *)pRegion->pvPageR3 + cbWritten;
777 *pbLast = 0xc3; /* RET */
778
779 /*
780 * Notify VMM that hypercalls are now enabled for all VCPUs.
781 */
782 for (VMCPUID i = 0; i < pVM->cCpus; i++)
783 VMMHypercallsEnable(&pVM->aCpus[i]);
784
785 LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
786 return VINF_SUCCESS;
787 }
788 else
789 {
790 if (rc == VINF_SUCCESS)
791 rc = VERR_GIM_OPERATION_FAILED;
792 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
793 }
794
795 GIMR3Mmio2Unmap(pVM, pRegion);
796 }
797
798 LogRel(("GIM: HyperV: GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
799 return rc;
800#else
801 AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_3);
802 void *pvHypercallPage = RTMemAllocZ(PAGE_SIZE);
803 if (RT_UNLIKELY(!pvHypercallPage))
804 {
805 LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
806 return VERR_NO_MEMORY;
807 }
808
809 /*
810 * Patch the hypercall-page.
811 */
812 size_t cbWritten = 0;
813 int rc = VMMPatchHypercall(pVM, pvHypercallPage, PAGE_SIZE, &cbWritten);
814 if ( RT_SUCCESS(rc)
815 && cbWritten < PAGE_SIZE)
816 {
817 uint8_t *pbLast = (uint8_t *)pvHypercallPage + cbWritten;
818 *pbLast = 0xc3; /* RET */
819
820 rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysHypercallPage, pvHypercallPage, PAGE_SIZE);
821 if (RT_SUCCESS(rc))
822 {
823 /*
824 * Notify VMM that hypercalls are now enabled for all VCPUs.
825 */
826 for (VMCPUID i = 0; i < pVM->cCpus; i++)
827 VMMHypercallsEnable(&pVM->aCpus[i]);
828
829 pRegion->GCPhysPage = GCPhysHypercallPage;
830 pRegion->fMapped = true;
831 LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
832 }
833 else
834 LogRel(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed during hypercall page setup. rc=%Rrc\n", rc));
835 }
836 else
837 {
838 if (rc == VINF_SUCCESS)
839 rc = VERR_GIM_OPERATION_FAILED;
840 LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
841 }
842
843 RTMemFree(pvHypercallPage);
844 return rc;
845#endif
846}
847
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