GIMHv.cpp@ 57377

Last change on this file since 57377 was 57358, checked in by vboxsync, 10 years ago
*: scm cleanup run.
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1	/* $Id: GIMHv.cpp 57358 2015-08-14 15:16:38Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, Hyper-V implementation.
4	*/
5
6	/*
7	* Copyright (C) 2014-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_GIM
23	#include "GIMInternal.h"
24
25	#include <iprt/assert.h>
26	#include <iprt/err.h>
27	#include <iprt/string.h>
28	#include <iprt/mem.h>
29	#include <iprt/spinlock.h>
30
31	#include <VBox/vmm/cpum.h>
32	#include <VBox/vmm/ssm.h>
33	#include <VBox/vmm/vm.h>
34	#include <VBox/vmm/hm.h>
35	#include <VBox/vmm/pdmapi.h>
36	#include <VBox/version.h>
37
38
39	/*********************************************************************************************************************************
40	* Defined Constants And Macros *
41	*********************************************************************************************************************************/
42	//#define GIMHV_HYPERCALL "GIMHvHypercall"
43
44	/**
45	* GIM Hyper-V saved-state version.
46	*/
47	#define GIM_HV_SAVED_STATE_VERSION UINT32_C(1)
48
49
50	/*********************************************************************************************************************************
51	* Global Variables *
52	*********************************************************************************************************************************/
53	#ifdef VBOX_WITH_STATISTICS
54	# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
55	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
56	#else
57	# define GIMHV_MSRRANGE(a_uFirst, a_uLast, a_szName) \
58	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
59	#endif
60
61	/**
62	* Array of MSR ranges supported by Hyper-V.
63	*/
64	static CPUMMSRRANGE const g_aMsrRanges_HyperV[] =
65	{
66	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE0_START, MSR_GIM_HV_RANGE0_END, "Hyper-V range 0"),
67	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE1_START, MSR_GIM_HV_RANGE1_END, "Hyper-V range 1"),
68	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE2_START, MSR_GIM_HV_RANGE2_END, "Hyper-V range 2"),
69	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE3_START, MSR_GIM_HV_RANGE3_END, "Hyper-V range 3"),
70	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE4_START, MSR_GIM_HV_RANGE4_END, "Hyper-V range 4"),
71	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE5_START, MSR_GIM_HV_RANGE5_END, "Hyper-V range 5"),
72	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE6_START, MSR_GIM_HV_RANGE6_END, "Hyper-V range 6"),
73	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE7_START, MSR_GIM_HV_RANGE7_END, "Hyper-V range 7"),
74	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE8_START, MSR_GIM_HV_RANGE8_END, "Hyper-V range 8"),
75	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE9_START, MSR_GIM_HV_RANGE9_END, "Hyper-V range 9"),
76	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE10_START, MSR_GIM_HV_RANGE10_END, "Hyper-V range 10"),
77	GIMHV_MSRRANGE(MSR_GIM_HV_RANGE11_START, MSR_GIM_HV_RANGE11_END, "Hyper-V range 11")
78	};
79	#undef GIMHV_MSRRANGE
80
81
82	/**
83	* Initializes the Hyper-V GIM provider.
84	*
85	* @returns VBox status code.
86	* @param pVM Pointer to the VM.
87	* @param uVersion The interface version this VM should use.
88	*/
89	VMMR3_INT_DECL(int) gimR3HvInit(PVM pVM)
90	{
91	AssertReturn(pVM, VERR_INVALID_PARAMETER);
92	AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_HYPERV, VERR_INTERNAL_ERROR_5);
93
94	int rc;
95	PGIMHV pHv = &pVM->gim.s.u.Hv;
96
97	/*
98	* Determine interface capabilities based on the version.
99	*/
100	if (!pVM->gim.s.u32Version)
101	{
102	/* Basic features. */
103	pHv->uBaseFeat = 0
104	//\| GIM_HV_BASE_FEAT_VP_RUNTIME_MSR
105	\| GIM_HV_BASE_FEAT_PART_TIME_REF_COUNT_MSR
106	//\| GIM_HV_BASE_FEAT_BASIC_SYNTH_IC
107	//\| GIM_HV_BASE_FEAT_SYNTH_TIMER_MSRS
108	\| GIM_HV_BASE_FEAT_APIC_ACCESS_MSRS
109	\| GIM_HV_BASE_FEAT_HYPERCALL_MSRS
110	\| GIM_HV_BASE_FEAT_VP_ID_MSR
111	\| GIM_HV_BASE_FEAT_VIRT_SYS_RESET_MSR
112	//\| GIM_HV_BASE_FEAT_STAT_PAGES_MSR
113	\| GIM_HV_BASE_FEAT_PART_REF_TSC_MSR
114	//\| GIM_HV_BASE_FEAT_GUEST_IDLE_STATE_MSR
115	\| GIM_HV_BASE_FEAT_TIMER_FREQ_MSRS
116	//\| GIM_HV_BASE_FEAT_DEBUG_MSRS
117	;
118
119	/* Miscellaneous features. */
120	pHv->uMiscFeat = GIM_HV_MISC_FEAT_TIMER_FREQ
121	\| GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS;
122
123	/* Hypervisor recommendations to the guest. */
124	pHv->uHyperHints = GIM_HV_HINT_MSR_FOR_SYS_RESET
125	\| GIM_HV_HINT_RELAX_TIME_CHECKS;
126	}
127
128	/*
129	* Populate the required fields in MMIO2 region records for registering.
130	*/
131	AssertCompile(GIM_HV_PAGE_SIZE == PAGE_SIZE);
132	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
133	pRegion->iRegion = GIM_HV_HYPERCALL_PAGE_REGION_IDX;
134	pRegion->fRCMapping = false;
135	pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
136	pRegion->GCPhysPage = NIL_RTGCPHYS;
137	RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V hypercall page");
138
139	pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
140	pRegion->iRegion = GIM_HV_REF_TSC_PAGE_REGION_IDX;
141	pRegion->fRCMapping = false;
142	pRegion->cbRegion = PAGE_SIZE; /* Sanity checked in gimR3HvLoad(), gimR3HvEnableTscPage() & gimR3HvEnableHypercallPage() */
143	pRegion->GCPhysPage = NIL_RTGCPHYS;
144	RTStrCopy(pRegion->szDescription, sizeof(pRegion->szDescription), "Hyper-V TSC page");
145
146	/*
147	* Make sure the CPU ID bit are in accordance to the Hyper-V
148	* requirement and other paranoia checks.
149	* See "Requirements for implementing the Microsoft hypervisor interface" spec.
150	*/
151	Assert(!(pHv->uPartFlags & ( GIM_HV_PART_FLAGS_CREATE_PART
152	\| GIM_HV_PART_FLAGS_ACCESS_MEMORY_POOL
153	\| GIM_HV_PART_FLAGS_ACCESS_PART_ID
154	\| GIM_HV_PART_FLAGS_ADJUST_MSG_BUFFERS
155	\| GIM_HV_PART_FLAGS_CREATE_PORT
156	\| GIM_HV_PART_FLAGS_ACCESS_STATS
157	\| GIM_HV_PART_FLAGS_CPU_MGMT
158	\| GIM_HV_PART_FLAGS_CPU_PROFILER)));
159	Assert((pHv->uBaseFeat & (GIM_HV_BASE_FEAT_HYPERCALL_MSRS \| GIM_HV_BASE_FEAT_VP_ID_MSR))
160	== (GIM_HV_BASE_FEAT_HYPERCALL_MSRS \| GIM_HV_BASE_FEAT_VP_ID_MSR));
161	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
162	{
163	PCGIMMMIO2REGION pcCur = &pHv->aMmio2Regions[i];
164	Assert(!pcCur->fRCMapping);
165	Assert(!pcCur->fMapped);
166	Assert(pcCur->GCPhysPage == NIL_RTGCPHYS);
167	}
168
169	/*
170	* Expose HVP (Hypervisor Present) bit to the guest.
171	*/
172	CPUMSetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
173
174	/*
175	* Modify the standard hypervisor leaves for Hyper-V.
176	*/
177	CPUMCPUIDLEAF HyperLeaf;
178	RT_ZERO(HyperLeaf);
179	HyperLeaf.uLeaf = UINT32_C(0x40000000);
180	HyperLeaf.uEax = UINT32_C(0x40000006); /* Minimum value for Hyper-V is 0x40000005. */
181	HyperLeaf.uEbx = 0x7263694D; /* 'Micr' */
182	HyperLeaf.uEcx = 0x666F736F; /* 'osof' */
183	HyperLeaf.uEdx = 0x76482074; /* 't Hv' */
184	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
185	AssertLogRelRCReturn(rc, rc);
186
187	HyperLeaf.uLeaf = UINT32_C(0x40000001);
188	HyperLeaf.uEax = 0x31237648; /* 'Hv#1' */
189	HyperLeaf.uEbx = 0; /* Reserved */
190	HyperLeaf.uEcx = 0; /* Reserved */
191	HyperLeaf.uEdx = 0; /* Reserved */
192	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
193	AssertLogRelRCReturn(rc, rc);
194
195	/*
196	* Add Hyper-V specific leaves.
197	*/
198	HyperLeaf.uLeaf = UINT32_C(0x40000002); /* MBZ until MSR_GIM_HV_GUEST_OS_ID is set by the guest. */
199	HyperLeaf.uEax = 0;
200	HyperLeaf.uEbx = 0;
201	HyperLeaf.uEcx = 0;
202	HyperLeaf.uEdx = 0;
203	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
204	AssertLogRelRCReturn(rc, rc);
205
206	HyperLeaf.uLeaf = UINT32_C(0x40000003);
207	HyperLeaf.uEax = pHv->uBaseFeat;
208	HyperLeaf.uEbx = pHv->uPartFlags;
209	HyperLeaf.uEcx = pHv->uPowMgmtFeat;
210	HyperLeaf.uEdx = pHv->uMiscFeat;
211	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
212	AssertLogRelRCReturn(rc, rc);
213
214	HyperLeaf.uLeaf = UINT32_C(0x40000004);
215	HyperLeaf.uEax = pHv->uHyperHints;
216	HyperLeaf.uEbx = 0xffffffff;
217	HyperLeaf.uEcx = 0;
218	HyperLeaf.uEdx = 0;
219	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
220	AssertLogRelRCReturn(rc, rc);
221
222	/*
223	* Insert all MSR ranges of Hyper-V.
224	*/
225	for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_HyperV); i++)
226	{
227	rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_HyperV[i]);
228	AssertLogRelRCReturn(rc, rc);
229	}
230
231	/*
232	* Setup non-zero MSRs.
233	*/
234	if (pHv->uMiscFeat & GIM_HV_MISC_FEAT_GUEST_CRASH_MSRS)
235	pHv->uCrashCtl = MSR_GIM_HV_CRASH_CTL_NOTIFY_BIT;
236
237	return VINF_SUCCESS;
238	}
239
240
241	/**
242	* Initializes remaining bits of the Hyper-V provider.
243	*
244	* This is called after initializing HM and almost all other VMM components.
245	*
246	* @returns VBox status code.
247	* @param pVM Pointer to the VM.
248	*/
249	VMMR3_INT_DECL(int) gimR3HvInitCompleted(PVM pVM)
250	{
251	PGIMHV pHv = &pVM->gim.s.u.Hv;
252	pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
253
254	/*
255	* Determine interface capabilities based on the version.
256	*/
257	if (!pVM->gim.s.u32Version)
258	{
259	/* Hypervisor capabilities; features used by the hypervisor. */
260	pHv->uHyperCaps = HMIsNestedPagingActive(pVM) ? GIM_HV_HOST_FEAT_NESTED_PAGING : 0;
261	pHv->uHyperCaps \|= HMAreMsrBitmapsAvailable(pVM) ? GIM_HV_HOST_FEAT_MSR_BITMAP : 0;
262	}
263
264	CPUMCPUIDLEAF HyperLeaf;
265	RT_ZERO(HyperLeaf);
266	HyperLeaf.uLeaf = UINT32_C(0x40000006);
267	HyperLeaf.uEax = pHv->uHyperCaps;
268	HyperLeaf.uEbx = 0;
269	HyperLeaf.uEcx = 0;
270	HyperLeaf.uEdx = 0;
271	int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
272	AssertLogRelRCReturn(rc, rc);
273
274	return rc;
275	}
276
277
278	#if 0
279	VMMR3_INT_DECL(int) gimR3HvInitFinalize(PVM pVM)
280	{
281	pVM->gim.s.pfnHypercallR3 = &GIMHvHypercall;
282	if (!HMIsEnabled(pVM))
283	{
284	rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
285	AssertRCReturn(rc, rc);
286	}
287	rc = PDMR3LdrGetSymbolR0(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallR0);
288	AssertRCReturn(rc, rc);
289	}
290	#endif
291
292
293	/**
294	* Terminates the Hyper-V GIM provider.
295	*
296	* @returns VBox status code.
297	* @param pVM Pointer to the VM.
298	*/
299	VMMR3_INT_DECL(int) gimR3HvTerm(PVM pVM)
300	{
301	gimR3HvReset(pVM);
302	return VINF_SUCCESS;
303	}
304
305
306	/**
307	* Applies relocations to data and code managed by this component.
308	*
309	* This function will be called at init and whenever the VMM need to relocate
310	* itself inside the GC.
311	*
312	* @param pVM Pointer to the VM.
313	* @param offDelta Relocation delta relative to old location.
314	*/
315	VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta)
316	{
317	#if 0
318	int rc = PDMR3LdrGetSymbolRC(pVM, NULL /* pszModule */, GIMHV_HYPERCALL, &pVM->gim.s.pfnHypercallRC);
319	AssertFatalRC(rc);
320	#endif
321	}
322
323
324	/**
325	* This resets Hyper-V provider MSRs and unmaps whatever Hyper-V regions that
326	* the guest may have mapped.
327	*
328	* This is called when the VM is being reset.
329	*
330	* @param pVM Pointer to the VM.
331	* @thread EMT(0).
332	*/
333	VMMR3_INT_DECL(void) gimR3HvReset(PVM pVM)
334	{
335	VM_ASSERT_EMT0(pVM);
336
337	/*
338	* Unmap MMIO2 pages that the guest may have setup.
339	*/
340	LogRel(("GIM: HyperV: Resetting MMIO2 regions and MSRs\n"));
341	PGIMHV pHv = &pVM->gim.s.u.Hv;
342	for (unsigned i = 0; i < RT_ELEMENTS(pHv->aMmio2Regions); i++)
343	{
344	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[i];
345	#if 0
346	GIMR3Mmio2Unmap(pVM, pRegion);
347	#else
348	pRegion->fMapped = false;
349	pRegion->GCPhysPage = NIL_RTGCPHYS;
350	#endif
351	}
352
353	/*
354	* Reset MSRs.
355	*/
356	pHv->u64GuestOsIdMsr = 0;
357	pHv->u64HypercallMsr = 0;
358	pHv->u64TscPageMsr = 0;
359	pHv->uCrashP0 = 0;
360	pHv->uCrashP1 = 0;
361	pHv->uCrashP2 = 0;
362	pHv->uCrashP3 = 0;
363	pHv->uCrashP4 = 0;
364	}
365
366
367	/**
368	* Returns a pointer to the MMIO2 regions supported by Hyper-V.
369	*
370	* @returns Pointer to an array of MMIO2 regions.
371	* @param pVM Pointer to the VM.
372	* @param pcRegions Where to store the number of regions in the array.
373	*/
374	VMMR3_INT_DECL(PGIMMMIO2REGION) gimR3HvGetMmio2Regions(PVM pVM, uint32_t *pcRegions)
375	{
376	Assert(GIMIsEnabled(pVM));
377	PGIMHV pHv = &pVM->gim.s.u.Hv;
378
379	*pcRegions = RT_ELEMENTS(pHv->aMmio2Regions);
380	Assert(pcRegions <= UINT8_MAX); / See PGMR3PhysMMIO2Register(). */
381	return pHv->aMmio2Regions;
382	}
383
384
385	/**
386	* Hyper-V state-save operation.
387	*
388	* @returns VBox status code.
389	* @param pVM Pointer to the VM.
390	* @param pSSM Pointer to the SSM handle.
391	*/
392	VMMR3_INT_DECL(int) gimR3HvSave(PVM pVM, PSSMHANDLE pSSM)
393	{
394	PCGIMHV pcHv = &pVM->gim.s.u.Hv;
395
396	/*
397	* Save the Hyper-V SSM version.
398	*/
399	SSMR3PutU32(pSSM, GIM_HV_SAVED_STATE_VERSION);
400
401	/*
402	* Save per-VM MSRs.
403	*/
404	SSMR3PutU64(pSSM, pcHv->u64GuestOsIdMsr);
405	SSMR3PutU64(pSSM, pcHv->u64HypercallMsr);
406	SSMR3PutU64(pSSM, pcHv->u64TscPageMsr);
407
408	/*
409	* Save Hyper-V features / capabilities.
410	*/
411	SSMR3PutU32(pSSM, pcHv->uBaseFeat);
412	SSMR3PutU32(pSSM, pcHv->uPartFlags);
413	SSMR3PutU32(pSSM, pcHv->uPowMgmtFeat);
414	SSMR3PutU32(pSSM, pcHv->uMiscFeat);
415	SSMR3PutU32(pSSM, pcHv->uHyperHints);
416	SSMR3PutU32(pSSM, pcHv->uHyperCaps);
417
418	/*
419	* Save the Hypercall region.
420	*/
421	PCGIMMMIO2REGION pcRegion = &pcHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
422	SSMR3PutU8(pSSM, pcRegion->iRegion);
423	SSMR3PutBool(pSSM, pcRegion->fRCMapping);
424	SSMR3PutU32(pSSM, pcRegion->cbRegion);
425	SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
426	SSMR3PutStrZ(pSSM, pcRegion->szDescription);
427
428	/*
429	* Save the reference TSC region.
430	*/
431	pcRegion = &pcHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
432	SSMR3PutU8(pSSM, pcRegion->iRegion);
433	SSMR3PutBool(pSSM, pcRegion->fRCMapping);
434	SSMR3PutU32(pSSM, pcRegion->cbRegion);
435	SSMR3PutGCPhys(pSSM, pcRegion->GCPhysPage);
436	SSMR3PutStrZ(pSSM, pcRegion->szDescription);
437	/* Save the TSC sequence so we can bump it on restore (as the CPU frequency/offset may change). */
438	uint32_t uTscSequence = 0;
439	if ( pcRegion->fMapped
440	&& MSR_GIM_HV_REF_TSC_IS_ENABLED(pcHv->u64TscPageMsr))
441	{
442	PCGIMHVREFTSC pcRefTsc = (PCGIMHVREFTSC)pcRegion->pvPageR3;
443	uTscSequence = pcRefTsc->u32TscSequence;
444	}
445
446	return SSMR3PutU32(pSSM, uTscSequence);
447	}
448
449
450	/**
451	* Hyper-V state-load operation, final pass.
452	*
453	* @returns VBox status code.
454	* @param pVM Pointer to the VM.
455	* @param pSSM Pointer to the SSM handle.
456	* @param uSSMVersion The GIM saved-state version.
457	*/
458	VMMR3_INT_DECL(int) gimR3HvLoad(PVM pVM, PSSMHANDLE pSSM, uint32_t uSSMVersion)
459	{
460	/*
461	* Load the Hyper-V SSM version first.
462	*/
463	uint32_t uHvSavedStatVersion;
464	int rc = SSMR3GetU32(pSSM, &uHvSavedStatVersion);
465	AssertRCReturn(rc, rc);
466	if (uHvSavedStatVersion != GIM_HV_SAVED_STATE_VERSION)
467	return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
468	N_("Unsupported Hyper-V saved-state version %u (expected %u)."), uHvSavedStatVersion,
469	GIM_HV_SAVED_STATE_VERSION);
470
471	/*
472	* Update the TSC frequency from TM.
473	*/
474	PGIMHV pHv = &pVM->gim.s.u.Hv;
475	pHv->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
476
477	/*
478	* Load per-VM MSRs.
479	*/
480	SSMR3GetU64(pSSM, &pHv->u64GuestOsIdMsr);
481	SSMR3GetU64(pSSM, &pHv->u64HypercallMsr);
482	SSMR3GetU64(pSSM, &pHv->u64TscPageMsr);
483
484	/*
485	* Load Hyper-V features / capabilities.
486	*/
487	SSMR3GetU32(pSSM, &pHv->uBaseFeat);
488	SSMR3GetU32(pSSM, &pHv->uPartFlags);
489	SSMR3GetU32(pSSM, &pHv->uPowMgmtFeat);
490	SSMR3GetU32(pSSM, &pHv->uMiscFeat);
491	SSMR3GetU32(pSSM, &pHv->uHyperHints);
492	SSMR3GetU32(pSSM, &pHv->uHyperCaps);
493
494	/*
495	* Load and enable the Hypercall region.
496	*/
497	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
498	SSMR3GetU8(pSSM, &pRegion->iRegion);
499	SSMR3GetBool(pSSM, &pRegion->fRCMapping);
500	SSMR3GetU32(pSSM, &pRegion->cbRegion);
501	SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
502	rc = SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
503	AssertRCReturn(rc, rc);
504
505	if (pRegion->cbRegion != PAGE_SIZE)
506	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall page region size %u invalid, expected %u"),
507	pRegion->cbRegion, PAGE_SIZE);
508
509	if (MSR_GIM_HV_HYPERCALL_IS_ENABLED(pHv->u64HypercallMsr))
510	{
511	Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
512	if (RT_LIKELY(pRegion->fRegistered))
513	{
514	rc = gimR3HvEnableHypercallPage(pVM, pRegion->GCPhysPage);
515	if (RT_FAILURE(rc))
516	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the hypercall page. GCPhys=%#RGp rc=%Rrc"),
517	pRegion->GCPhysPage, rc);
518	}
519	else
520	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Hypercall MMIO2 region not registered. Missing GIM device?!"));
521	}
522
523	/*
524	* Load and enable the reference TSC region.
525	*/
526	uint32_t uTscSequence;
527	pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
528	SSMR3GetU8(pSSM, &pRegion->iRegion);
529	SSMR3GetBool(pSSM, &pRegion->fRCMapping);
530	SSMR3GetU32(pSSM, &pRegion->cbRegion);
531	SSMR3GetGCPhys(pSSM, &pRegion->GCPhysPage);
532	SSMR3GetStrZ(pSSM, pRegion->szDescription, sizeof(pRegion->szDescription));
533	rc = SSMR3GetU32(pSSM, &uTscSequence);
534	AssertRCReturn(rc, rc);
535
536	if (pRegion->cbRegion != PAGE_SIZE)
537	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC page region size %u invalid, expected %u"),
538	pRegion->cbRegion, PAGE_SIZE);
539
540	if (MSR_GIM_HV_REF_TSC_IS_ENABLED(pHv->u64TscPageMsr))
541	{
542	Assert(pRegion->GCPhysPage != NIL_RTGCPHYS);
543	if (pRegion->fRegistered)
544	{
545	rc = gimR3HvEnableTscPage(pVM, pRegion->GCPhysPage, true /* fUseThisTscSeq */, uTscSequence);
546	if (RT_FAILURE(rc))
547	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Failed to enable the TSC page. GCPhys=%#RGp rc=%Rrc"),
548	pRegion->GCPhysPage, rc);
549	}
550	else
551	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("TSC-page MMIO2 region not registered. Missing GIM device?!"));
552	}
553
554	return rc;
555	}
556
557
558	/**
559	* Enables the Hyper-V TSC page.
560	*
561	* @returns VBox status code.
562	* @param pVM Pointer to the VM.
563	* @param GCPhysTscPage Where to map the TSC page.
564	* @param fUseThisTscSeq Whether to set the TSC sequence number to the one
565	* specified in @a uTscSeq.
566	* @param uTscSeq The TSC sequence value to use. Ignored if
567	* @a fUseThisTscSeq is false.
568	*/
569	VMMR3_INT_DECL(int) gimR3HvEnableTscPage(PVM pVM, RTGCPHYS GCPhysTscPage, bool fUseThisTscSeq, uint32_t uTscSeq)
570	{
571	PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
572	PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
573	AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
574
575	int rc;
576	if (pRegion->fMapped)
577	{
578	/*
579	* Is it already enabled at the given guest-address?
580	*/
581	if (pRegion->GCPhysPage == GCPhysTscPage)
582	return VINF_SUCCESS;
583
584	/*
585	* If it's mapped at a different address, unmap the previous address.
586	*/
587	rc = gimR3HvDisableTscPage(pVM);
588	AssertRC(rc);
589	}
590
591	/*
592	* Map the TSC-page at the specified address.
593	*/
594	Assert(!pRegion->fMapped);
595
596	/** @todo this is buggy when large pages are used due to a PGM limitation, see
597	* @bugref{7532}. Instead of the overlay style mapping, we just
598	* rewrite guest memory directly. */
599	#if 0
600	rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysTscPage);
601	if (RT_SUCCESS(rc))
602	{
603	Assert(pRegion->GCPhysPage == GCPhysTscPage);
604
605	/*
606	* Update the TSC scale. Windows guests expect a non-zero TSC sequence, otherwise
607	* they fallback to using the reference count MSR which is not ideal in terms of VM-exits.
608	*
609	* Also, Hyper-V normalizes the time in 10 MHz, see:
610	* http://technet.microsoft.com/it-it/sysinternals/dn553408%28v=vs.110%29
611	*/
612	PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)pRegion->pvPageR3;
613	Assert(pRefTsc);
614
615	PGIMHV pHv = &pVM->gim.s.u.Hv;
616	uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
617	uint32_t u32TscSeq = 1;
618	if ( fUseThisTscSeq
619	&& uTscSeq < UINT32_C(0xfffffffe))
620	u32TscSeq = uTscSeq + 1;
621	pRefTsc->u32TscSequence = u32TscSeq;
622	pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
623	pRefTsc->i64TscOffset = 0;
624
625	LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
626	GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
627
628	TMR3CpuTickParavirtEnable(pVM);
629	return VINF_SUCCESS;
630	}
631	else
632	LogRelFunc(("GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
633	return VERR_GIM_OPERATION_FAILED;
634	#else
635	AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_2);
636	PGIMHVREFTSC pRefTsc = (PGIMHVREFTSC)RTMemAllocZ(PAGE_SIZE);
637	if (RT_UNLIKELY(!pRefTsc))
638	{
639	LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
640	return VERR_NO_MEMORY;
641	}
642
643	PGIMHV pHv = &pVM->gim.s.u.Hv;
644	uint64_t const u64TscKHz = pHv->cTscTicksPerSecond / UINT64_C(1000);
645	uint32_t u32TscSeq = 1;
646	if ( fUseThisTscSeq
647	&& uTscSeq < UINT32_C(0xfffffffe))
648	u32TscSeq = uTscSeq + 1;
649	pRefTsc->u32TscSequence = u32TscSeq;
650	pRefTsc->u64TscScale = ((INT64_C(10000) << 32) / u64TscKHz) << 32;
651	pRefTsc->i64TscOffset = 0;
652
653	rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysTscPage, pRefTsc, sizeof(*pRefTsc));
654	if (RT_SUCCESS(rc))
655	{
656	LogRel(("GIM: HyperV: Enabled TSC page at %#RGp - u64TscScale=%#RX64 u64TscKHz=%#RX64 (%'RU64) Seq=%#RU32\n",
657	GCPhysTscPage, pRefTsc->u64TscScale, u64TscKHz, u64TscKHz, pRefTsc->u32TscSequence));
658
659	pRegion->GCPhysPage = GCPhysTscPage;
660	pRegion->fMapped = true;
661	TMR3CpuTickParavirtEnable(pVM);
662	}
663	else
664	{
665	LogRelFunc(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed. rc=%Rrc\n", rc));
666	rc = VERR_GIM_OPERATION_FAILED;
667	}
668	RTMemFree(pRefTsc);
669	return rc;
670	#endif
671	}
672
673
674	/**
675	* Disables the Hyper-V TSC page.
676	*
677	* @returns VBox status code.
678	* @param pVM Pointer to the VM.
679	*/
680	VMMR3_INT_DECL(int) gimR3HvDisableTscPage(PVM pVM)
681	{
682	PGIMHV pHv = &pVM->gim.s.u.Hv;
683	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_REF_TSC_PAGE_REGION_IDX];
684	if (pRegion->fMapped)
685	{
686	#if 0
687	GIMR3Mmio2Unmap(pVM, pRegion);
688	Assert(!pRegion->fMapped);
689	#else
690	pRegion->fMapped = false;
691	#endif
692	LogRel(("GIM: HyperV: Disabled TSC-page\n"));
693
694	TMR3CpuTickParavirtDisable(pVM);
695	return VINF_SUCCESS;
696	}
697	return VERR_GIM_PVTSC_NOT_ENABLED;
698	}
699
700
701	/**
702	* Disables the Hyper-V Hypercall page.
703	*
704	* @returns VBox status code.
705	*/
706	VMMR3_INT_DECL(int) gimR3HvDisableHypercallPage(PVM pVM)
707	{
708	PGIMHV pHv = &pVM->gim.s.u.Hv;
709	PGIMMMIO2REGION pRegion = &pHv->aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
710	if (pRegion->fMapped)
711	{
712	#if 0
713	GIMR3Mmio2Unmap(pVM, pRegion);
714	Assert(!pRegion->fMapped);
715	#else
716	pRegion->fMapped = false;
717	#endif
718	for (VMCPUID i = 0; i < pVM->cCpus; i++)
719	VMMHypercallsDisable(&pVM->aCpus[i]);
720	LogRel(("GIM: HyperV: Disabled Hypercall-page\n"));
721	return VINF_SUCCESS;
722	}
723	return VERR_GIM_HYPERCALLS_NOT_ENABLED;
724	}
725
726
727	/**
728	* Enables the Hyper-V Hypercall page.
729	*
730	* @returns VBox status code.
731	* @param pVM Pointer to the VM.
732	* @param GCPhysHypercallPage Where to map the hypercall page.
733	*/
734	VMMR3_INT_DECL(int) gimR3HvEnableHypercallPage(PVM pVM, RTGCPHYS GCPhysHypercallPage)
735	{
736	PPDMDEVINSR3 pDevIns = pVM->gim.s.pDevInsR3;
737	PGIMMMIO2REGION pRegion = &pVM->gim.s.u.Hv.aMmio2Regions[GIM_HV_HYPERCALL_PAGE_REGION_IDX];
738	AssertPtrReturn(pDevIns, VERR_GIM_DEVICE_NOT_REGISTERED);
739
740	if (pRegion->fMapped)
741	{
742	/*
743	* Is it already enabled at the given guest-address?
744	*/
745	if (pRegion->GCPhysPage == GCPhysHypercallPage)
746	return VINF_SUCCESS;
747
748	/*
749	* If it's mapped at a different address, unmap the previous address.
750	*/
751	int rc2 = gimR3HvDisableHypercallPage(pVM);
752	AssertRC(rc2);
753	}
754
755	/*
756	* Map the hypercall-page at the specified address.
757	*/
758	Assert(!pRegion->fMapped);
759
760	/** @todo this is buggy when large pages are used due to a PGM limitation, see
761	* @bugref{7532}. Instead of the overlay style mapping, we just
762	* rewrite guest memory directly. */
763	#if 0
764	int rc = GIMR3Mmio2Map(pVM, pRegion, GCPhysHypercallPage);
765	if (RT_SUCCESS(rc))
766	{
767	Assert(pRegion->GCPhysPage == GCPhysHypercallPage);
768
769	/*
770	* Patch the hypercall-page.
771	*/
772	size_t cbWritten = 0;
773	rc = VMMPatchHypercall(pVM, pRegion->pvPageR3, PAGE_SIZE, &cbWritten);
774	if ( RT_SUCCESS(rc)
775	&& cbWritten < PAGE_SIZE)
776	{
777	uint8_t pbLast = (uint8_t )pRegion->pvPageR3 + cbWritten;
778	pbLast = 0xc3; / RET */
779
780	/*
781	* Notify VMM that hypercalls are now enabled for all VCPUs.
782	*/
783	for (VMCPUID i = 0; i < pVM->cCpus; i++)
784	VMMHypercallsEnable(&pVM->aCpus[i]);
785
786	LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
787	return VINF_SUCCESS;
788	}
789	else
790	{
791	if (rc == VINF_SUCCESS)
792	rc = VERR_GIM_OPERATION_FAILED;
793	LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
794	}
795
796	GIMR3Mmio2Unmap(pVM, pRegion);
797	}
798
799	LogRel(("GIM: HyperV: GIMR3Mmio2Map failed. rc=%Rrc\n", rc));
800	return rc;
801	#else
802	AssertReturn(pRegion->cbRegion == PAGE_SIZE, VERR_GIM_IPE_3);
803	void *pvHypercallPage = RTMemAllocZ(PAGE_SIZE);
804	if (RT_UNLIKELY(!pvHypercallPage))
805	{
806	LogRelFunc(("Failed to alloc %u bytes\n", PAGE_SIZE));
807	return VERR_NO_MEMORY;
808	}
809
810	/*
811	* Patch the hypercall-page.
812	*/
813	size_t cbWritten = 0;
814	int rc = VMMPatchHypercall(pVM, pvHypercallPage, PAGE_SIZE, &cbWritten);
815	if ( RT_SUCCESS(rc)
816	&& cbWritten < PAGE_SIZE)
817	{
818	uint8_t pbLast = (uint8_t )pvHypercallPage + cbWritten;
819	pbLast = 0xc3; / RET */
820
821	rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysHypercallPage, pvHypercallPage, PAGE_SIZE);
822	if (RT_SUCCESS(rc))
823	{
824	/*
825	* Notify VMM that hypercalls are now enabled for all VCPUs.
826	*/
827	for (VMCPUID i = 0; i < pVM->cCpus; i++)
828	VMMHypercallsEnable(&pVM->aCpus[i]);
829
830	pRegion->GCPhysPage = GCPhysHypercallPage;
831	pRegion->fMapped = true;
832	LogRel(("GIM: HyperV: Enabled hypercalls at %#RGp\n", GCPhysHypercallPage));
833	}
834	else
835	LogRel(("GIM: HyperV: PGMPhysSimpleWriteGCPhys failed during hypercall page setup. rc=%Rrc\n", rc));
836	}
837	else
838	{
839	if (rc == VINF_SUCCESS)
840	rc = VERR_GIM_OPERATION_FAILED;
841	LogRel(("GIM: HyperV: VMMPatchHypercall failed. rc=%Rrc cbWritten=%u\n", rc, cbWritten));
842	}
843
844	RTMemFree(pvHypercallPage);
845	return rc;
846	#endif
847	}
848

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source: vbox/trunk/src/VBox/VMM/VMMR3/GIMHv.cpp@ 57377

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