GIMKvm.cpp@ 80239

Last change on this file since 80239 was 80191, checked in by vboxsync, 5 years ago
VMM/r3: Refactored VMCPU enumeration in preparation that aCpus will be replaced with a pointer array. Removed two raw-mode offset members from the CPUM and CPUMCPU sub-structures. bugref:9217 bugref:9517
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1	/* $Id: GIMKvm.cpp 80191 2019-08-08 00:36:57Z vboxsync $ */
2	/** @file
3	* GIM - Guest Interface Manager, KVM implementation.
4	*/
5
6	/*
7	* Copyright (C) 2015-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define VBOX_BUGREF_9217_PART_I
23	#define LOG_GROUP LOG_GROUP_GIM
24	#include <VBox/vmm/gim.h>
25	#include <VBox/vmm/cpum.h>
26	#include <VBox/vmm/hm.h>
27	#include <VBox/vmm/pdmapi.h>
28	#include <VBox/vmm/ssm.h>
29	#include <VBox/vmm/em.h>
30	#include "GIMInternal.h"
31	#include <VBox/vmm/vm.h>
32
33	#include <VBox/disopcode.h>
34	#include <VBox/err.h>
35	#include <VBox/version.h>
36
37	#include <iprt/asm-math.h>
38	#include <iprt/assert.h>
39	#include <iprt/string.h>
40	#include <iprt/mem.h>
41
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47
48	/**
49	* GIM KVM saved-state version.
50	*/
51	#define GIM_KVM_SAVED_STATE_VERSION UINT32_C(1)
52
53	/**
54	* VBox internal struct. to passback to EMT rendezvous callback while enabling
55	* the KVM wall-clock.
56	*/
57	typedef struct KVMWALLCLOCKINFO
58	{
59	/** Guest physical address of the wall-clock struct. */
60	RTGCPHYS GCPhysWallClock;
61	} KVMWALLCLOCKINFO;
62	/** Pointer to the wall-clock info. struct. */
63	typedef KVMWALLCLOCKINFO *PKVMWALLCLOCKINFO;
64
65
66	/*********************************************************************************************************************************
67	* Global Variables *
68	*********************************************************************************************************************************/
69	#ifdef VBOX_WITH_STATISTICS
70	# define GIMKVM_MSRRANGE(a_uFirst, a_uLast, a_szName) \
71	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
72	#else
73	# define GIMKVM_MSRRANGE(a_uFirst, a_uLast, a_szName) \
74	{ (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
75	#endif
76
77	/**
78	* Array of MSR ranges supported by KVM.
79	*/
80	static CPUMMSRRANGE const g_aMsrRanges_Kvm[] =
81	{
82	GIMKVM_MSRRANGE(MSR_GIM_KVM_RANGE0_FIRST, MSR_GIM_KVM_RANGE0_LAST, "KVM range 0"),
83	GIMKVM_MSRRANGE(MSR_GIM_KVM_RANGE1_FIRST, MSR_GIM_KVM_RANGE1_LAST, "KVM range 1")
84	};
85	#undef GIMKVM_MSRRANGE
86
87
88	/**
89	* Initializes the KVM GIM provider.
90	*
91	* @returns VBox status code.
92	* @param pVM The cross context VM structure.
93	*/
94	VMMR3_INT_DECL(int) gimR3KvmInit(PVM pVM)
95	{
96	AssertReturn(pVM, VERR_INVALID_PARAMETER);
97	AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_KVM, VERR_INTERNAL_ERROR_5);
98
99	int rc;
100	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
101
102	/*
103	* Determine interface capabilities based on the version.
104	*/
105	if (!pVM->gim.s.u32Version)
106	{
107	/* Basic features. */
108	pKvm->uBaseFeat = 0
109	\| GIM_KVM_BASE_FEAT_CLOCK_OLD
110	//\| GIM_KVM_BASE_FEAT_NOP_IO_DELAY
111	//\| GIM_KVM_BASE_FEAT_MMU_OP
112	\| GIM_KVM_BASE_FEAT_CLOCK
113	//\| GIM_KVM_BASE_FEAT_ASYNC_PF
114	//\| GIM_KVM_BASE_FEAT_STEAL_TIME
115	//\| GIM_KVM_BASE_FEAT_PV_EOI
116	\| GIM_KVM_BASE_FEAT_PV_UNHALT
117	;
118	/* Rest of the features are determined in gimR3KvmInitCompleted(). */
119	}
120
121	/*
122	* Expose HVP (Hypervisor Present) bit to the guest.
123	*/
124	CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
125
126	/*
127	* Modify the standard hypervisor leaves for KVM.
128	*/
129	CPUMCPUIDLEAF HyperLeaf;
130	RT_ZERO(HyperLeaf);
131	HyperLeaf.uLeaf = UINT32_C(0x40000000);
132	HyperLeaf.uEax = UINT32_C(0x40000001); /* Minimum value for KVM is 0x40000001. */
133	HyperLeaf.uEbx = 0x4B4D564B; /* 'KVMK' */
134	HyperLeaf.uEcx = 0x564B4D56; /* 'VMKV' */
135	HyperLeaf.uEdx = 0x0000004D; /* 'M000' */
136	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
137	AssertLogRelRCReturn(rc, rc);
138
139	/*
140	* Add KVM specific leaves.
141	*/
142	HyperLeaf.uLeaf = UINT32_C(0x40000001);
143	HyperLeaf.uEax = pKvm->uBaseFeat;
144	HyperLeaf.uEbx = 0; /* Reserved */
145	HyperLeaf.uEcx = 0; /* Reserved */
146	HyperLeaf.uEdx = 0; /* Reserved */
147	rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
148	AssertLogRelRCReturn(rc, rc);
149
150	/*
151	* Insert all MSR ranges of KVM.
152	*/
153	for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_Kvm); i++)
154	{
155	rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_Kvm[i]);
156	AssertLogRelRCReturn(rc, rc);
157	}
158
159	/*
160	* Setup hypercall and #UD handling.
161	* Note! We always need to trap VMCALL/VMMCALL hypercall using #UDs for raw-mode VMs.
162	*/
163	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
164	EMSetHypercallInstructionsEnabled(pVM->apCpusR3[idCpu], true);
165
166	size_t cbHypercall = 0;
167	rc = GIMQueryHypercallOpcodeBytes(pVM, pKvm->abOpcodeNative, sizeof(pKvm->abOpcodeNative), &cbHypercall, &pKvm->uOpcodeNative);
168	AssertLogRelRCReturn(rc, rc);
169	AssertLogRelReturn(cbHypercall == sizeof(pKvm->abOpcodeNative), VERR_GIM_IPE_1);
170	pKvm->fTrapXcptUD = pKvm->uOpcodeNative != OP_VMCALL;
171
172	return VINF_SUCCESS;
173	}
174
175
176	/**
177	* Initializes remaining bits of the KVM provider.
178	*
179	* This is called after initializing HM and almost all other VMM components.
180	*
181	* @returns VBox status code.
182	* @param pVM The cross context VM structure.
183	*/
184	VMMR3_INT_DECL(int) gimR3KvmInitCompleted(PVM pVM)
185	{
186	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
187	pKvm->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
188
189	if (TMR3CpuTickIsFixedRateMonotonic(pVM, true /* fWithParavirtEnabled */))
190	{
191	/** @todo We might want to consider just enabling this bit always. As far
192	* as I can see in the Linux guest, the "TSC_STABLE" bit is only
193	* translated as a "monotonic" bit which even in Async systems we
194	* -should- be reporting a strictly monotonic TSC to the guest. */
195	pKvm->uBaseFeat \|= GIM_KVM_BASE_FEAT_TSC_STABLE;
196
197	CPUMCPUIDLEAF HyperLeaf;
198	RT_ZERO(HyperLeaf);
199	HyperLeaf.uLeaf = UINT32_C(0x40000001);
200	HyperLeaf.uEax = pKvm->uBaseFeat;
201	HyperLeaf.uEbx = 0;
202	HyperLeaf.uEcx = 0;
203	HyperLeaf.uEdx = 0;
204	int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
205	AssertLogRelRCReturn(rc, rc);
206	}
207	return VINF_SUCCESS;
208	}
209
210
211	/**
212	* Terminates the KVM GIM provider.
213	*
214	* @returns VBox status code.
215	* @param pVM The cross context VM structure.
216	*/
217	VMMR3_INT_DECL(int) gimR3KvmTerm(PVM pVM)
218	{
219	gimR3KvmReset(pVM);
220	return VINF_SUCCESS;
221	}
222
223
224	/**
225	* This resets KVM provider MSRs and unmaps whatever KVM regions that
226	* the guest may have mapped.
227	*
228	* This is called when the VM is being reset.
229	*
230	* @param pVM The cross context VM structure.
231	* @thread EMT(0)
232	*/
233	VMMR3_INT_DECL(void) gimR3KvmReset(PVM pVM)
234	{
235	VM_ASSERT_EMT0(pVM);
236	LogRel(("GIM: KVM: Resetting MSRs\n"));
237
238	/*
239	* Reset MSRs.
240	*/
241	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
242	pKvm->u64WallClockMsr = 0;
243	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
244	{
245	PGIMKVMCPU pKvmCpu = &pVM->apCpusR3[idCpu]->gim.s.u.KvmCpu;
246	pKvmCpu->u64SystemTimeMsr = 0;
247	pKvmCpu->u32SystemTimeVersion = 0;
248	pKvmCpu->fSystemTimeFlags = 0;
249	pKvmCpu->GCPhysSystemTime = 0;
250	pKvmCpu->uTsc = 0;
251	pKvmCpu->uVirtNanoTS = 0;
252	}
253	}
254
255
256	/**
257	* KVM state-save operation.
258	*
259	* @returns VBox status code.
260	* @param pVM The cross context VM structure.
261	* @param pSSM The saved state handle.
262	*/
263	VMMR3_INT_DECL(int) gimR3KvmSave(PVM pVM, PSSMHANDLE pSSM)
264	{
265	PCGIMKVM pKvm = &pVM->gim.s.u.Kvm;
266
267	/*
268	* Save the KVM SSM version.
269	*/
270	SSMR3PutU32(pSSM, GIM_KVM_SAVED_STATE_VERSION);
271
272	/*
273	* Save per-VCPU data.
274	*/
275	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
276	{
277	PCGIMKVMCPU pKvmCpu = &pVM->apCpusR3[idCpu]->gim.s.u.KvmCpu;
278	SSMR3PutU64(pSSM, pKvmCpu->u64SystemTimeMsr);
279	SSMR3PutU64(pSSM, pKvmCpu->uTsc);
280	SSMR3PutU64(pSSM, pKvmCpu->uVirtNanoTS);
281	SSMR3PutGCPhys(pSSM, pKvmCpu->GCPhysSystemTime);
282	SSMR3PutU32(pSSM, pKvmCpu->u32SystemTimeVersion);
283	SSMR3PutU8(pSSM, pKvmCpu->fSystemTimeFlags);
284	}
285
286	/*
287	* Save per-VM data.
288	*/
289	SSMR3PutU64(pSSM, pKvm->u64WallClockMsr);
290	return SSMR3PutU32(pSSM, pKvm->uBaseFeat);
291	}
292
293
294	/**
295	* KVM state-load operation, final pass.
296	*
297	* @returns VBox status code.
298	* @param pVM The cross context VM structure.
299	* @param pSSM The saved state handle.
300	*/
301	VMMR3_INT_DECL(int) gimR3KvmLoad(PVM pVM, PSSMHANDLE pSSM)
302	{
303	/*
304	* Load the KVM SSM version first.
305	*/
306	uint32_t uKvmSavedStatVersion;
307	int rc = SSMR3GetU32(pSSM, &uKvmSavedStatVersion);
308	AssertRCReturn(rc, rc);
309	if (uKvmSavedStatVersion != GIM_KVM_SAVED_STATE_VERSION)
310	return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
311	N_("Unsupported KVM saved-state version %u (expected %u)."),
312	uKvmSavedStatVersion, GIM_KVM_SAVED_STATE_VERSION);
313
314	/*
315	* Update the TSC frequency from TM.
316	*/
317	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
318	pKvm->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
319
320	/*
321	* Load per-VCPU data.
322	*/
323	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
324	{
325	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
326	PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
327
328	SSMR3GetU64(pSSM, &pKvmCpu->u64SystemTimeMsr);
329	SSMR3GetU64(pSSM, &pKvmCpu->uTsc);
330	SSMR3GetU64(pSSM, &pKvmCpu->uVirtNanoTS);
331	SSMR3GetGCPhys(pSSM, &pKvmCpu->GCPhysSystemTime);
332	SSMR3GetU32(pSSM, &pKvmCpu->u32SystemTimeVersion);
333	rc = SSMR3GetU8(pSSM, &pKvmCpu->fSystemTimeFlags);
334	AssertRCReturn(rc, rc);
335
336	/* Enable the system-time struct. if necessary. */
337	/** @todo update guest struct only if cTscTicksPerSecond doesn't match host
338	* anymore. */
339	if (MSR_GIM_KVM_SYSTEM_TIME_IS_ENABLED(pKvmCpu->u64SystemTimeMsr))
340	{
341	Assert(!TMVirtualIsTicking(pVM)); /* paranoia. */
342	Assert(!TMCpuTickIsTicking(pVCpu));
343	gimR3KvmEnableSystemTime(pVM, pVCpu);
344	}
345	}
346
347	/*
348	* Load per-VM data.
349	*/
350	SSMR3GetU64(pSSM, &pKvm->u64WallClockMsr);
351	rc = SSMR3GetU32(pSSM, &pKvm->uBaseFeat);
352	AssertRCReturn(rc, rc);
353
354	return VINF_SUCCESS;
355	}
356
357
358	/**
359	* Enables the KVM VCPU system-time structure.
360	*
361	* @returns VBox status code.
362	* @param pVM The cross context VM structure.
363	* @param pVCpu The cross context virtual CPU structure.
364	*
365	* @remarks Don't do any release assertions here, these can be triggered by
366	* guest R0 code.
367	*/
368	VMMR3_INT_DECL(int) gimR3KvmEnableSystemTime(PVM pVM, PVMCPU pVCpu)
369	{
370	PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
371	PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
372
373	/*
374	* Validate the mapping address first.
375	*/
376	if (!PGMPhysIsGCPhysNormal(pVM, pKvmCpu->GCPhysSystemTime))
377	{
378	LogRel(("GIM: KVM: VCPU%3d: Invalid physical addr requested for mapping system-time struct. GCPhysSystemTime=%#RGp\n",
379	pVCpu->idCpu, pKvmCpu->GCPhysSystemTime));
380	return VERR_GIM_OPERATION_FAILED;
381	}
382
383	/*
384	* Construct the system-time struct.
385	*/
386	GIMKVMSYSTEMTIME SystemTime;
387	RT_ZERO(SystemTime);
388	SystemTime.u32Version = pKvmCpu->u32SystemTimeVersion;
389	SystemTime.u64NanoTS = pKvmCpu->uVirtNanoTS;
390	SystemTime.u64Tsc = pKvmCpu->uTsc;
391	SystemTime.fFlags = pKvmCpu->fSystemTimeFlags \| GIM_KVM_SYSTEM_TIME_FLAGS_TSC_STABLE;
392
393	/*
394	* How the guest calculates the system time (nanoseconds):
395	*
396	* tsc = rdtsc - SysTime.u64Tsc
397	* if (SysTime.i8TscShift >= 0)
398	* tsc <<= i8TscShift;
399	* else
400	* tsc >>= -i8TscShift;
401	* time = ((tsc * SysTime.u32TscScale) >> 32) + SysTime.u64NanoTS
402	*/
403	uint64_t u64TscFreq = pKvm->cTscTicksPerSecond;
404	SystemTime.i8TscShift = 0;
405	while (u64TscFreq > 2 * RT_NS_1SEC_64)
406	{
407	u64TscFreq >>= 1;
408	SystemTime.i8TscShift--;
409	}
410	uint32_t uTscFreqLo = (uint32_t)u64TscFreq;
411	while (uTscFreqLo <= RT_NS_1SEC)
412	{
413	uTscFreqLo <<= 1;
414	SystemTime.i8TscShift++;
415	}
416	SystemTime.u32TscScale = ASMDivU64ByU32RetU32(RT_NS_1SEC_64 << 32, uTscFreqLo);
417
418	/*
419	* Update guest memory with the system-time struct.
420	*/
421	Assert(!(SystemTime.u32Version & UINT32_C(1)));
422	int rc = PGMPhysSimpleWriteGCPhys(pVM, pKvmCpu->GCPhysSystemTime, &SystemTime, sizeof(GIMKVMSYSTEMTIME));
423	if (RT_SUCCESS(rc))
424	{
425	LogRel(("GIM: KVM: VCPU%3d: Enabled system-time struct. at %#RGp - u32TscScale=%#RX32 i8TscShift=%d uVersion=%#RU32 "
426	"fFlags=%#x uTsc=%#RX64 uVirtNanoTS=%#RX64\n", pVCpu->idCpu, pKvmCpu->GCPhysSystemTime, SystemTime.u32TscScale,
427	SystemTime.i8TscShift, SystemTime.u32Version, SystemTime.fFlags, pKvmCpu->uTsc, pKvmCpu->uVirtNanoTS));
428	TMR3CpuTickParavirtEnable(pVM);
429	}
430	else
431	LogRel(("GIM: KVM: VCPU%3d: Failed to write system-time struct. at %#RGp. rc=%Rrc\n",
432	pVCpu->idCpu, pKvmCpu->GCPhysSystemTime, rc));
433
434	return rc;
435	}
436
437
438	/**
439	* Disables the KVM system-time struct.
440	*
441	* @returns VBox status code.
442	* @param pVM The cross context VM structure.
443	*/
444	VMMR3_INT_DECL(int) gimR3KvmDisableSystemTime(PVM pVM)
445	{
446	TMR3CpuTickParavirtDisable(pVM);
447	return VINF_SUCCESS;
448	}
449
450
451	/**
452	* @callback_method_impl{PFNVMMEMTRENDEZVOUS,
453	* Worker for gimR3KvmEnableWallClock}
454	*/
455	static DECLCALLBACK(VBOXSTRICTRC) gimR3KvmEnableWallClockCallback(PVM pVM, PVMCPU pVCpu, void *pvUser)
456	{
457	PKVMWALLCLOCKINFO pWallClockInfo = (PKVMWALLCLOCKINFO)pvUser; AssertPtr(pWallClockInfo);
458	RTGCPHYS GCPhysWallClock = pWallClockInfo->GCPhysWallClock;
459	RT_NOREF1(pVCpu);
460
461	/*
462	* Read the wall-clock version (sequence) from the guest.
463	*/
464	uint32_t uVersion;
465	Assert(PGMPhysIsGCPhysNormal(pVM, GCPhysWallClock));
466	int rc = PGMPhysSimpleReadGCPhys(pVM, &uVersion, GCPhysWallClock, sizeof(uVersion));
467	if (RT_FAILURE(rc))
468	{
469	LogRel(("GIM: KVM: Failed to read wall-clock struct. version at %#RGp. rc=%Rrc\n", GCPhysWallClock, rc));
470	return rc;
471	}
472
473	/*
474	* Ensure the version is incrementally even.
475	*/
476	/* faster: uVersion = (uVersion \| 1) + 1; */
477	if (!(uVersion & 1))
478	++uVersion;
479	++uVersion;
480
481	/*
482	* Update wall-clock guest struct. with UTC information.
483	*/
484	RTTIMESPEC TimeSpec;
485	int32_t iSec;
486	int32_t iNano;
487	TMR3UtcNow(pVM, &TimeSpec);
488	RTTimeSpecGetSecondsAndNano(&TimeSpec, &iSec, &iNano);
489
490	GIMKVMWALLCLOCK WallClock;
491	RT_ZERO(WallClock);
492	AssertCompile(sizeof(uVersion) == sizeof(WallClock.u32Version));
493	WallClock.u32Version = uVersion;
494	WallClock.u32Sec = iSec;
495	WallClock.u32Nano = iNano;
496
497	/*
498	* Write out the wall-clock struct. to guest memory.
499	*/
500	Assert(!(WallClock.u32Version & 1));
501	rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysWallClock, &WallClock, sizeof(GIMKVMWALLCLOCK));
502	if (RT_SUCCESS(rc))
503	LogRel(("GIM: KVM: Enabled wall-clock struct. at %#RGp - u32Sec=%u u32Nano=%u uVersion=%#RU32\n", GCPhysWallClock,
504	WallClock.u32Sec, WallClock.u32Nano, WallClock.u32Version));
505	else
506	LogRel(("GIM: KVM: Failed to write wall-clock struct. at %#RGp. rc=%Rrc\n", GCPhysWallClock, rc));
507	return rc;
508	}
509
510
511	/**
512	* Enables the KVM wall-clock structure.
513	*
514	* Since the wall-clock can be read by any VCPU but it is a global struct. in
515	* guest-memory, we do an EMT rendezvous here to be on the safe side. The
516	* alternative is to use an MMIO2 region and use the WallClock.u32Version field
517	* for transactional update. However, this MSR is rarely written to (typically
518	* once during bootup) it's currently not a performance issue especially since
519	* we're already in ring-3. If we really wanted better performance in this code
520	* path, we should be doing it in ring-0 with transactional update while make
521	* sure there is only 1 writer as well.
522	*
523	* @returns VBox status code.
524	* @param pVM The cross context VM structure.
525	* @param GCPhysWallClock Where the guest wall-clock structure is located.
526	*
527	* @remarks Don't do any release assertions here, these can be triggered by
528	* guest R0 code.
529	*/
530	VMMR3_INT_DECL(int) gimR3KvmEnableWallClock(PVM pVM, RTGCPHYS GCPhysWallClock)
531	{
532	KVMWALLCLOCKINFO WallClockInfo;
533	WallClockInfo.GCPhysWallClock = GCPhysWallClock;
534	return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, gimR3KvmEnableWallClockCallback, &WallClockInfo);
535	}
536

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source: vbox/trunk/src/VBox/VMM/VMMR3/GIMKvm.cpp@ 80239

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