1 | /* $Id: GIMKvm.cpp 84139 2020-05-04 18:36:08Z vboxsync $ */
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2 | /** @file
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3 | * GIM - Guest Interface Manager, KVM implementation.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2015-2020 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 |
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19 | /*********************************************************************************************************************************
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20 | * Header Files *
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21 | *********************************************************************************************************************************/
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22 | #define LOG_GROUP LOG_GROUP_GIM
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23 | #include <VBox/vmm/gim.h>
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24 | #include <VBox/vmm/cpum.h>
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25 | #include <VBox/vmm/hm.h>
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26 | #include <VBox/vmm/pdmapi.h>
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27 | #include <VBox/vmm/ssm.h>
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28 | #include <VBox/vmm/em.h>
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29 | #include "GIMInternal.h"
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30 | #include <VBox/vmm/vm.h>
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31 |
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32 | #include <VBox/disopcode.h>
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33 | #include <VBox/err.h>
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34 | #include <VBox/version.h>
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35 |
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36 | #include <iprt/asm-math.h>
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37 | #include <iprt/assert.h>
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38 | #include <iprt/string.h>
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39 | #include <iprt/mem.h>
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40 |
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41 |
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42 |
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43 | /*********************************************************************************************************************************
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44 | * Defined Constants And Macros *
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45 | *********************************************************************************************************************************/
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46 |
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47 | /**
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48 | * GIM KVM saved-state version.
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49 | */
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50 | #define GIM_KVM_SAVED_STATE_VERSION UINT32_C(1)
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51 |
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52 | /**
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53 | * VBox internal struct. to passback to EMT rendezvous callback while enabling
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54 | * the KVM wall-clock.
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55 | */
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56 | typedef struct KVMWALLCLOCKINFO
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57 | {
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58 | /** Guest physical address of the wall-clock struct. */
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59 | RTGCPHYS GCPhysWallClock;
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60 | } KVMWALLCLOCKINFO;
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61 | /** Pointer to the wall-clock info. struct. */
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62 | typedef KVMWALLCLOCKINFO *PKVMWALLCLOCKINFO;
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63 |
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64 |
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65 | /*********************************************************************************************************************************
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66 | * Global Variables *
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67 | *********************************************************************************************************************************/
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68 | #ifdef VBOX_WITH_STATISTICS
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69 | # define GIMKVM_MSRRANGE(a_uFirst, a_uLast, a_szName) \
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70 | { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName, { 0 }, { 0 }, { 0 }, { 0 } }
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71 | #else
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72 | # define GIMKVM_MSRRANGE(a_uFirst, a_uLast, a_szName) \
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73 | { (a_uFirst), (a_uLast), kCpumMsrRdFn_Gim, kCpumMsrWrFn_Gim, 0, 0, 0, 0, 0, a_szName }
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74 | #endif
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75 |
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76 | /**
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77 | * Array of MSR ranges supported by KVM.
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78 | */
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79 | static CPUMMSRRANGE const g_aMsrRanges_Kvm[] =
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80 | {
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81 | GIMKVM_MSRRANGE(MSR_GIM_KVM_RANGE0_FIRST, MSR_GIM_KVM_RANGE0_LAST, "KVM range 0"),
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82 | GIMKVM_MSRRANGE(MSR_GIM_KVM_RANGE1_FIRST, MSR_GIM_KVM_RANGE1_LAST, "KVM range 1")
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83 | };
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84 | #undef GIMKVM_MSRRANGE
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85 |
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86 |
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87 | /**
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88 | * Initializes the KVM GIM provider.
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89 | *
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90 | * @returns VBox status code.
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91 | * @param pVM The cross context VM structure.
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92 | */
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93 | VMMR3_INT_DECL(int) gimR3KvmInit(PVM pVM)
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94 | {
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95 | AssertReturn(pVM, VERR_INVALID_PARAMETER);
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96 | AssertReturn(pVM->gim.s.enmProviderId == GIMPROVIDERID_KVM, VERR_INTERNAL_ERROR_5);
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97 |
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98 | int rc;
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99 | PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
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100 |
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101 | /*
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102 | * Determine interface capabilities based on the version.
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103 | */
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104 | if (!pVM->gim.s.u32Version)
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105 | {
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106 | /* Basic features. */
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107 | pKvm->uBaseFeat = 0
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108 | | GIM_KVM_BASE_FEAT_CLOCK_OLD
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109 | //| GIM_KVM_BASE_FEAT_NOP_IO_DELAY
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110 | //| GIM_KVM_BASE_FEAT_MMU_OP
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111 | | GIM_KVM_BASE_FEAT_CLOCK
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112 | //| GIM_KVM_BASE_FEAT_ASYNC_PF
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113 | //| GIM_KVM_BASE_FEAT_STEAL_TIME
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114 | //| GIM_KVM_BASE_FEAT_PV_EOI
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115 | | GIM_KVM_BASE_FEAT_PV_UNHALT
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116 | ;
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117 | /* Rest of the features are determined in gimR3KvmInitCompleted(). */
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118 | }
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119 |
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120 | /*
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121 | * Expose HVP (Hypervisor Present) bit to the guest.
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122 | */
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123 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_HVP);
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124 |
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125 | /*
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126 | * Modify the standard hypervisor leaves for KVM.
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127 | */
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128 | CPUMCPUIDLEAF HyperLeaf;
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129 | RT_ZERO(HyperLeaf);
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130 | HyperLeaf.uLeaf = UINT32_C(0x40000000);
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131 | HyperLeaf.uEax = UINT32_C(0x40000001); /* Minimum value for KVM is 0x40000001. */
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132 | HyperLeaf.uEbx = 0x4B4D564B; /* 'KVMK' */
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133 | HyperLeaf.uEcx = 0x564B4D56; /* 'VMKV' */
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134 | HyperLeaf.uEdx = 0x0000004D; /* 'M000' */
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135 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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136 | AssertLogRelRCReturn(rc, rc);
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137 |
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138 | /*
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139 | * Add KVM specific leaves.
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140 | */
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141 | HyperLeaf.uLeaf = UINT32_C(0x40000001);
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142 | HyperLeaf.uEax = pKvm->uBaseFeat;
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143 | HyperLeaf.uEbx = 0; /* Reserved */
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144 | HyperLeaf.uEcx = 0; /* Reserved */
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145 | HyperLeaf.uEdx = 0; /* Reserved */
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146 | rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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147 | AssertLogRelRCReturn(rc, rc);
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148 |
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149 | /*
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150 | * Insert all MSR ranges of KVM.
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151 | */
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152 | for (unsigned i = 0; i < RT_ELEMENTS(g_aMsrRanges_Kvm); i++)
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153 | {
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154 | rc = CPUMR3MsrRangesInsert(pVM, &g_aMsrRanges_Kvm[i]);
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155 | AssertLogRelRCReturn(rc, rc);
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156 | }
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157 |
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158 | /*
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159 | * Setup hypercall and #UD handling.
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160 | * Note! We always need to trap VMCALL/VMMCALL hypercall using #UDs for raw-mode VMs.
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161 | */
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162 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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163 | EMSetHypercallInstructionsEnabled(pVM->apCpusR3[idCpu], true);
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164 |
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165 | size_t cbHypercall = 0;
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166 | rc = GIMQueryHypercallOpcodeBytes(pVM, pKvm->abOpcodeNative, sizeof(pKvm->abOpcodeNative), &cbHypercall, &pKvm->uOpcodeNative);
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167 | AssertLogRelRCReturn(rc, rc);
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168 | AssertLogRelReturn(cbHypercall == sizeof(pKvm->abOpcodeNative), VERR_GIM_IPE_1);
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169 | pKvm->fTrapXcptUD = pKvm->uOpcodeNative != OP_VMCALL;
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170 |
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171 | return VINF_SUCCESS;
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172 | }
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173 |
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174 |
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175 | /**
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176 | * Initializes remaining bits of the KVM provider.
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177 | *
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178 | * This is called after initializing HM and almost all other VMM components.
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179 | *
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180 | * @returns VBox status code.
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181 | * @param pVM The cross context VM structure.
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182 | */
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183 | VMMR3_INT_DECL(int) gimR3KvmInitCompleted(PVM pVM)
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184 | {
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185 | PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
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186 | pKvm->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
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187 |
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188 | if (TMR3CpuTickIsFixedRateMonotonic(pVM, true /* fWithParavirtEnabled */))
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189 | {
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190 | /** @todo We might want to consider just enabling this bit *always*. As far
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191 | * as I can see in the Linux guest, the "TSC_STABLE" bit is only
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192 | * translated as a "monotonic" bit which even in Async systems we
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193 | * -should- be reporting a strictly monotonic TSC to the guest. */
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194 | pKvm->uBaseFeat |= GIM_KVM_BASE_FEAT_TSC_STABLE;
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195 |
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196 | CPUMCPUIDLEAF HyperLeaf;
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197 | RT_ZERO(HyperLeaf);
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198 | HyperLeaf.uLeaf = UINT32_C(0x40000001);
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199 | HyperLeaf.uEax = pKvm->uBaseFeat;
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200 | HyperLeaf.uEbx = 0;
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201 | HyperLeaf.uEcx = 0;
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202 | HyperLeaf.uEdx = 0;
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203 | int rc = CPUMR3CpuIdInsert(pVM, &HyperLeaf);
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204 | AssertLogRelRCReturn(rc, rc);
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205 | }
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206 | return VINF_SUCCESS;
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207 | }
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208 |
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209 |
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210 | /**
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211 | * Terminates the KVM GIM provider.
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212 | *
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213 | * @returns VBox status code.
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214 | * @param pVM The cross context VM structure.
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215 | */
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216 | VMMR3_INT_DECL(int) gimR3KvmTerm(PVM pVM)
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217 | {
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218 | gimR3KvmReset(pVM);
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219 | return VINF_SUCCESS;
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220 | }
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221 |
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222 |
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223 | /**
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224 | * This resets KVM provider MSRs and unmaps whatever KVM regions that
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225 | * the guest may have mapped.
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226 | *
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227 | * This is called when the VM is being reset.
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228 | *
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229 | * @param pVM The cross context VM structure.
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230 | * @thread EMT(0)
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231 | */
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232 | VMMR3_INT_DECL(void) gimR3KvmReset(PVM pVM)
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233 | {
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234 | VM_ASSERT_EMT0(pVM);
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235 | LogRel(("GIM: KVM: Resetting MSRs\n"));
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236 |
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237 | /*
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238 | * Reset MSRs.
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239 | */
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240 | PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
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241 | pKvm->u64WallClockMsr = 0;
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242 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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243 | {
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244 | PGIMKVMCPU pKvmCpu = &pVM->apCpusR3[idCpu]->gim.s.u.KvmCpu;
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245 | pKvmCpu->u64SystemTimeMsr = 0;
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246 | pKvmCpu->u32SystemTimeVersion = 0;
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247 | pKvmCpu->fSystemTimeFlags = 0;
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248 | pKvmCpu->GCPhysSystemTime = 0;
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249 | pKvmCpu->uTsc = 0;
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250 | pKvmCpu->uVirtNanoTS = 0;
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251 | }
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252 | }
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253 |
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254 |
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255 | /**
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256 | * KVM state-save operation.
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257 | *
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258 | * @returns VBox status code.
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259 | * @param pVM The cross context VM structure.
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260 | * @param pSSM The saved state handle.
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261 | */
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262 | VMMR3_INT_DECL(int) gimR3KvmSave(PVM pVM, PSSMHANDLE pSSM)
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263 | {
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264 | PCGIMKVM pKvm = &pVM->gim.s.u.Kvm;
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265 |
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266 | /*
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267 | * Save the KVM SSM version.
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268 | */
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269 | SSMR3PutU32(pSSM, GIM_KVM_SAVED_STATE_VERSION);
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270 |
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271 | /*
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272 | * Save per-VCPU data.
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273 | */
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274 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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275 | {
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276 | PCGIMKVMCPU pKvmCpu = &pVM->apCpusR3[idCpu]->gim.s.u.KvmCpu;
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277 | SSMR3PutU64(pSSM, pKvmCpu->u64SystemTimeMsr);
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278 | SSMR3PutU64(pSSM, pKvmCpu->uTsc);
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279 | SSMR3PutU64(pSSM, pKvmCpu->uVirtNanoTS);
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280 | SSMR3PutGCPhys(pSSM, pKvmCpu->GCPhysSystemTime);
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281 | SSMR3PutU32(pSSM, pKvmCpu->u32SystemTimeVersion);
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282 | SSMR3PutU8(pSSM, pKvmCpu->fSystemTimeFlags);
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283 | }
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284 |
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285 | /*
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286 | * Save per-VM data.
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287 | */
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288 | SSMR3PutU64(pSSM, pKvm->u64WallClockMsr);
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289 | return SSMR3PutU32(pSSM, pKvm->uBaseFeat);
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290 | }
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291 |
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292 |
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293 | /**
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294 | * KVM state-load operation, final pass.
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295 | *
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296 | * @returns VBox status code.
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297 | * @param pVM The cross context VM structure.
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298 | * @param pSSM The saved state handle.
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299 | */
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300 | VMMR3_INT_DECL(int) gimR3KvmLoad(PVM pVM, PSSMHANDLE pSSM)
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301 | {
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302 | /*
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303 | * Load the KVM SSM version first.
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304 | */
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305 | uint32_t uKvmSavedStatVersion;
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306 | int rc = SSMR3GetU32(pSSM, &uKvmSavedStatVersion);
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307 | AssertRCReturn(rc, rc);
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308 | if (uKvmSavedStatVersion != GIM_KVM_SAVED_STATE_VERSION)
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309 | return SSMR3SetLoadError(pSSM, VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION, RT_SRC_POS,
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310 | N_("Unsupported KVM saved-state version %u (expected %u)."),
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311 | uKvmSavedStatVersion, GIM_KVM_SAVED_STATE_VERSION);
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312 |
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313 | /*
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314 | * Update the TSC frequency from TM.
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315 | */
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316 | PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
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317 | pKvm->cTscTicksPerSecond = TMCpuTicksPerSecond(pVM);
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318 |
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319 | /*
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320 | * Load per-VCPU data.
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321 | */
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322 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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323 | {
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324 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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325 | PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
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326 |
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327 | SSMR3GetU64(pSSM, &pKvmCpu->u64SystemTimeMsr);
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328 | SSMR3GetU64(pSSM, &pKvmCpu->uTsc);
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329 | SSMR3GetU64(pSSM, &pKvmCpu->uVirtNanoTS);
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330 | SSMR3GetGCPhys(pSSM, &pKvmCpu->GCPhysSystemTime);
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331 | SSMR3GetU32(pSSM, &pKvmCpu->u32SystemTimeVersion);
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332 | rc = SSMR3GetU8(pSSM, &pKvmCpu->fSystemTimeFlags);
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333 | AssertRCReturn(rc, rc);
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334 |
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335 | /* Enable the system-time struct. if necessary. */
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336 | /** @todo update guest struct only if cTscTicksPerSecond doesn't match host
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337 | * anymore. */
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338 | if (MSR_GIM_KVM_SYSTEM_TIME_IS_ENABLED(pKvmCpu->u64SystemTimeMsr))
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339 | {
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340 | Assert(!TMVirtualIsTicking(pVM)); /* paranoia. */
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341 | Assert(!TMCpuTickIsTicking(pVCpu));
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342 | gimR3KvmEnableSystemTime(pVM, pVCpu);
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343 | }
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344 | }
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345 |
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346 | /*
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347 | * Load per-VM data.
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348 | */
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349 | SSMR3GetU64(pSSM, &pKvm->u64WallClockMsr);
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350 | rc = SSMR3GetU32(pSSM, &pKvm->uBaseFeat);
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351 | AssertRCReturn(rc, rc);
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352 |
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353 | return VINF_SUCCESS;
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354 | }
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355 |
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356 |
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357 | /**
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358 | * Enables the KVM VCPU system-time structure.
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359 | *
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360 | * @returns VBox status code.
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361 | * @param pVM The cross context VM structure.
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362 | * @param pVCpu The cross context virtual CPU structure.
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363 | *
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364 | * @remarks Don't do any release assertions here, these can be triggered by
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365 | * guest R0 code.
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366 | */
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367 | VMMR3_INT_DECL(int) gimR3KvmEnableSystemTime(PVM pVM, PVMCPU pVCpu)
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368 | {
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369 | PGIMKVM pKvm = &pVM->gim.s.u.Kvm;
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370 | PGIMKVMCPU pKvmCpu = &pVCpu->gim.s.u.KvmCpu;
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371 |
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372 | /*
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373 | * Validate the mapping address first.
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374 | */
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375 | if (!PGMPhysIsGCPhysNormal(pVM, pKvmCpu->GCPhysSystemTime))
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376 | {
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377 | LogRel(("GIM: KVM: VCPU%3d: Invalid physical addr requested for mapping system-time struct. GCPhysSystemTime=%#RGp\n",
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378 | pVCpu->idCpu, pKvmCpu->GCPhysSystemTime));
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379 | return VERR_GIM_OPERATION_FAILED;
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380 | }
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381 |
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382 | /*
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383 | * Construct the system-time struct.
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384 | */
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385 | GIMKVMSYSTEMTIME SystemTime;
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386 | RT_ZERO(SystemTime);
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387 | SystemTime.u32Version = pKvmCpu->u32SystemTimeVersion;
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388 | SystemTime.u64NanoTS = pKvmCpu->uVirtNanoTS;
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389 | SystemTime.u64Tsc = pKvmCpu->uTsc;
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390 | SystemTime.fFlags = pKvmCpu->fSystemTimeFlags | GIM_KVM_SYSTEM_TIME_FLAGS_TSC_STABLE;
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391 |
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392 | /*
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393 | * How the guest calculates the system time (nanoseconds):
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394 | *
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395 | * tsc = rdtsc - SysTime.u64Tsc
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396 | * if (SysTime.i8TscShift >= 0)
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397 | * tsc <<= i8TscShift;
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398 | * else
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399 | * tsc >>= -i8TscShift;
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400 | * time = ((tsc * SysTime.u32TscScale) >> 32) + SysTime.u64NanoTS
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401 | */
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402 | uint64_t u64TscFreq = pKvm->cTscTicksPerSecond;
|
---|
403 | SystemTime.i8TscShift = 0;
|
---|
404 | while (u64TscFreq > 2 * RT_NS_1SEC_64)
|
---|
405 | {
|
---|
406 | u64TscFreq >>= 1;
|
---|
407 | SystemTime.i8TscShift--;
|
---|
408 | }
|
---|
409 | uint32_t uTscFreqLo = (uint32_t)u64TscFreq;
|
---|
410 | while (uTscFreqLo <= RT_NS_1SEC)
|
---|
411 | {
|
---|
412 | uTscFreqLo <<= 1;
|
---|
413 | SystemTime.i8TscShift++;
|
---|
414 | }
|
---|
415 | SystemTime.u32TscScale = ASMDivU64ByU32RetU32(RT_NS_1SEC_64 << 32, uTscFreqLo);
|
---|
416 |
|
---|
417 | /* For informational purposes, back-calculate the exact TSC frequency the guest will see.
|
---|
418 | * Note that the frequency is in kHz, not Hz, since that's what Linux uses.
|
---|
419 | */
|
---|
420 | uint64_t uTscKHz = (RT_NS_1MS_64 << 32) / SystemTime.u32TscScale;
|
---|
421 | if (SystemTime.i8TscShift < 0)
|
---|
422 | uTscKHz <<= -SystemTime.i8TscShift;
|
---|
423 | else
|
---|
424 | uTscKHz >>= SystemTime.i8TscShift;
|
---|
425 |
|
---|
426 | /*
|
---|
427 | * Update guest memory with the system-time struct. Technically we are cheating
|
---|
428 | * by only writing the struct once with the version incremented by two; in reality,
|
---|
429 | * the system-time struct is enabled once for each CPU at boot and not concurrently
|
---|
430 | * read by other VCPUs at the same time.
|
---|
431 | */
|
---|
432 | Assert(!(SystemTime.u32Version & UINT32_C(1)));
|
---|
433 | int rc = PGMPhysSimpleWriteGCPhys(pVM, pKvmCpu->GCPhysSystemTime, &SystemTime, sizeof(GIMKVMSYSTEMTIME));
|
---|
434 | if (RT_SUCCESS(rc))
|
---|
435 | {
|
---|
436 | LogRel(("GIM: KVM: VCPU%3d: Enabled system-time struct. at %#RGp - u32TscScale=%#RX32 i8TscShift=%d uVersion=%#RU32 "
|
---|
437 | "fFlags=%#x uTsc=%#RX64 uVirtNanoTS=%#RX64 TscKHz=%RU64\n", pVCpu->idCpu, pKvmCpu->GCPhysSystemTime, SystemTime.u32TscScale,
|
---|
438 | SystemTime.i8TscShift, SystemTime.u32Version, SystemTime.fFlags, pKvmCpu->uTsc, pKvmCpu->uVirtNanoTS, uTscKHz));
|
---|
439 | TMR3CpuTickParavirtEnable(pVM);
|
---|
440 | }
|
---|
441 | else
|
---|
442 | LogRel(("GIM: KVM: VCPU%3d: Failed to write system-time struct. at %#RGp. rc=%Rrc\n",
|
---|
443 | pVCpu->idCpu, pKvmCpu->GCPhysSystemTime, rc));
|
---|
444 |
|
---|
445 | return rc;
|
---|
446 | }
|
---|
447 |
|
---|
448 |
|
---|
449 | /**
|
---|
450 | * Disables the KVM system-time struct.
|
---|
451 | *
|
---|
452 | * @returns VBox status code.
|
---|
453 | * @param pVM The cross context VM structure.
|
---|
454 | */
|
---|
455 | VMMR3_INT_DECL(int) gimR3KvmDisableSystemTime(PVM pVM)
|
---|
456 | {
|
---|
457 | TMR3CpuTickParavirtDisable(pVM);
|
---|
458 | return VINF_SUCCESS;
|
---|
459 | }
|
---|
460 |
|
---|
461 |
|
---|
462 | /**
|
---|
463 | * @callback_method_impl{PFNVMMEMTRENDEZVOUS,
|
---|
464 | * Worker for gimR3KvmEnableWallClock}
|
---|
465 | */
|
---|
466 | static DECLCALLBACK(VBOXSTRICTRC) gimR3KvmEnableWallClockCallback(PVM pVM, PVMCPU pVCpu, void *pvUser)
|
---|
467 | {
|
---|
468 | PKVMWALLCLOCKINFO pWallClockInfo = (PKVMWALLCLOCKINFO)pvUser; AssertPtr(pWallClockInfo);
|
---|
469 | RTGCPHYS GCPhysWallClock = pWallClockInfo->GCPhysWallClock;
|
---|
470 | RT_NOREF1(pVCpu);
|
---|
471 |
|
---|
472 | /*
|
---|
473 | * Read the wall-clock version (sequence) from the guest.
|
---|
474 | */
|
---|
475 | uint32_t uVersion;
|
---|
476 | Assert(PGMPhysIsGCPhysNormal(pVM, GCPhysWallClock));
|
---|
477 | int rc = PGMPhysSimpleReadGCPhys(pVM, &uVersion, GCPhysWallClock, sizeof(uVersion));
|
---|
478 | if (RT_FAILURE(rc))
|
---|
479 | {
|
---|
480 | LogRel(("GIM: KVM: Failed to read wall-clock struct. version at %#RGp. rc=%Rrc\n", GCPhysWallClock, rc));
|
---|
481 | return rc;
|
---|
482 | }
|
---|
483 |
|
---|
484 | /*
|
---|
485 | * Ensure the version is incrementally even.
|
---|
486 | */
|
---|
487 | /* faster: uVersion = (uVersion | 1) + 1; */
|
---|
488 | if (!(uVersion & 1))
|
---|
489 | ++uVersion;
|
---|
490 | ++uVersion;
|
---|
491 |
|
---|
492 | /*
|
---|
493 | * Update wall-clock guest struct. with UTC information.
|
---|
494 | */
|
---|
495 | RTTIMESPEC TimeSpec;
|
---|
496 | int32_t iSec;
|
---|
497 | int32_t iNano;
|
---|
498 | TMR3UtcNow(pVM, &TimeSpec);
|
---|
499 | RTTimeSpecGetSecondsAndNano(&TimeSpec, &iSec, &iNano);
|
---|
500 |
|
---|
501 | GIMKVMWALLCLOCK WallClock;
|
---|
502 | RT_ZERO(WallClock);
|
---|
503 | AssertCompile(sizeof(uVersion) == sizeof(WallClock.u32Version));
|
---|
504 | WallClock.u32Version = uVersion;
|
---|
505 | WallClock.u32Sec = iSec;
|
---|
506 | WallClock.u32Nano = iNano;
|
---|
507 |
|
---|
508 | /*
|
---|
509 | * Write out the wall-clock struct. to guest memory.
|
---|
510 | */
|
---|
511 | Assert(!(WallClock.u32Version & 1));
|
---|
512 | rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysWallClock, &WallClock, sizeof(GIMKVMWALLCLOCK));
|
---|
513 | if (RT_SUCCESS(rc))
|
---|
514 | LogRel(("GIM: KVM: Enabled wall-clock struct. at %#RGp - u32Sec=%u u32Nano=%u uVersion=%#RU32\n", GCPhysWallClock,
|
---|
515 | WallClock.u32Sec, WallClock.u32Nano, WallClock.u32Version));
|
---|
516 | else
|
---|
517 | LogRel(("GIM: KVM: Failed to write wall-clock struct. at %#RGp. rc=%Rrc\n", GCPhysWallClock, rc));
|
---|
518 | return rc;
|
---|
519 | }
|
---|
520 |
|
---|
521 |
|
---|
522 | /**
|
---|
523 | * Enables the KVM wall-clock structure.
|
---|
524 | *
|
---|
525 | * Since the wall-clock can be read by any VCPU but it is a global struct. in
|
---|
526 | * guest-memory, we do an EMT rendezvous here to be on the safe side. The
|
---|
527 | * alternative is to use an MMIO2 region and use the WallClock.u32Version field
|
---|
528 | * for transactional update. However, this MSR is rarely written to (typically
|
---|
529 | * once during bootup) it's currently not a performance issue especially since
|
---|
530 | * we're already in ring-3. If we really wanted better performance in this code
|
---|
531 | * path, we should be doing it in ring-0 with transactional update while make
|
---|
532 | * sure there is only 1 writer as well.
|
---|
533 | *
|
---|
534 | * @returns VBox status code.
|
---|
535 | * @param pVM The cross context VM structure.
|
---|
536 | * @param GCPhysWallClock Where the guest wall-clock structure is located.
|
---|
537 | *
|
---|
538 | * @remarks Don't do any release assertions here, these can be triggered by
|
---|
539 | * guest R0 code.
|
---|
540 | */
|
---|
541 | VMMR3_INT_DECL(int) gimR3KvmEnableWallClock(PVM pVM, RTGCPHYS GCPhysWallClock)
|
---|
542 | {
|
---|
543 | KVMWALLCLOCKINFO WallClockInfo;
|
---|
544 | WallClockInfo.GCPhysWallClock = GCPhysWallClock;
|
---|
545 | return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, gimR3KvmEnableWallClockCallback, &WallClockInfo);
|
---|
546 | }
|
---|
547 |
|
---|