VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IEMR3.cpp@ 49748

Last change on this file since 49748 was 48266, checked in by vboxsync, 11 years ago

VMMR3/IEM: STAM description typo.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 5.0 KB
Line 
1/* $Id: IEMR3.cpp 48266 2013-09-04 13:49:52Z vboxsync $ */
2/** @file
3 * IEM - Interpreted Execution Manager.
4 */
5
6/*
7 * Copyright (C) 2011-2012 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_EM
22#include <VBox/vmm/iem.h>
23#include <VBox/vmm/cpum.h>
24#include "IEMInternal.h"
25#include <VBox/vmm/vm.h>
26#include <VBox/err.h>
27
28#include <iprt/asm-amd64-x86.h>
29#include <iprt/assert.h>
30
31
32
33/**
34 * Initializes the interpreted execution manager.
35 *
36 * This must be called after CPUM as we're quering information from CPUM about
37 * the guest and host CPUs.
38 *
39 * @returns VBox status code.
40 * @param pVM The cross context VM structure.
41 */
42VMMR3DECL(int) IEMR3Init(PVM pVM)
43{
44 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
45 {
46 PVMCPU pVCpu = &pVM->aCpus[idCpu];
47 pVCpu->iem.s.offVM = -RT_OFFSETOF(VM, aCpus[idCpu].iem.s);
48 pVCpu->iem.s.offVMCpu = -RT_OFFSETOF(VMCPU, iem.s);
49 pVCpu->iem.s.pCtxR3 = CPUMQueryGuestCtxPtr(pVCpu);
50 pVCpu->iem.s.pCtxR0 = VM_R0_ADDR(pVM, pVCpu->iem.s.pCtxR3);
51 pVCpu->iem.s.pCtxRC = VM_RC_ADDR(pVM, pVCpu->iem.s.pCtxR3);
52
53 STAMR3RegisterF(pVM, &pVCpu->iem.s.cInstructions, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT,
54 "Instructions interpreted", "/IEM/CPU%u/cInstructions", idCpu);
55 STAMR3RegisterF(pVM, &pVCpu->iem.s.cPotentialExits, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT,
56 "Potential exits", "/IEM/CPU%u/cPotentialExits", idCpu);
57 STAMR3RegisterF(pVM, &pVCpu->iem.s.cRetAspectNotImplemented, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT,
58 "VERR_IEM_ASPECT_NOT_IMPLEMENTED", "/IEM/CPU%u/cRetAspectNotImplemented", idCpu);
59 STAMR3RegisterF(pVM, &pVCpu->iem.s.cRetInstrNotImplemented, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT,
60 "VERR_IEM_INSTR_NOT_IMPLEMENTED", "/IEM/CPU%u/cRetInstrNotImplemented", idCpu);
61 STAMR3RegisterF(pVM, &pVCpu->iem.s.cRetInfStatuses, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT,
62 "Informational statuses returned", "/IEM/CPU%u/cRetInfStatuses", idCpu);
63 STAMR3RegisterF(pVM, &pVCpu->iem.s.cRetErrStatuses, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_COUNT,
64 "Error statuses returned", "/IEM/CPU%u/cRetErrStatuses", idCpu);
65 STAMR3RegisterF(pVM, &pVCpu->iem.s.cbWritten, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES,
66 "Approx bytes written", "/IEM/CPU%u/cbWritten", idCpu);
67
68 /*
69 * Host and guest CPU information.
70 */
71 if (idCpu == 0)
72 {
73 uint32_t uIgnored;
74 CPUMGetGuestCpuId(pVCpu, 1, &uIgnored, &uIgnored,
75 &pVCpu->iem.s.fCpuIdStdFeaturesEcx, &pVCpu->iem.s.fCpuIdStdFeaturesEdx);
76 pVCpu->iem.s.enmCpuVendor = CPUMGetGuestCpuVendor(pVM);
77
78 ASMCpuId_ECX_EDX(1, &pVCpu->iem.s.fHostCpuIdStdFeaturesEcx, &pVCpu->iem.s.fHostCpuIdStdFeaturesEdx);
79 pVCpu->iem.s.enmHostCpuVendor = CPUMGetHostCpuVendor(pVM);
80 }
81 else
82 {
83 pVCpu->iem.s.fCpuIdStdFeaturesEcx = pVM->aCpus[0].iem.s.fCpuIdStdFeaturesEcx;
84 pVCpu->iem.s.fCpuIdStdFeaturesEdx = pVM->aCpus[0].iem.s.fCpuIdStdFeaturesEdx;
85 pVCpu->iem.s.enmCpuVendor = pVM->aCpus[0].iem.s.enmCpuVendor;
86 pVCpu->iem.s.fHostCpuIdStdFeaturesEcx = pVM->aCpus[0].iem.s.fHostCpuIdStdFeaturesEcx;
87 pVCpu->iem.s.fHostCpuIdStdFeaturesEdx = pVM->aCpus[0].iem.s.fHostCpuIdStdFeaturesEdx;
88 pVCpu->iem.s.enmHostCpuVendor = pVM->aCpus[0].iem.s.enmHostCpuVendor;
89 }
90
91 /*
92 * Mark all buffers free.
93 */
94 uint32_t iMemMap = RT_ELEMENTS(pVCpu->iem.s.aMemMappings);
95 while (iMemMap-- > 0)
96 pVCpu->iem.s.aMemMappings[iMemMap].fAccess = IEM_ACCESS_INVALID;
97 }
98 return VINF_SUCCESS;
99}
100
101
102VMMR3DECL(int) IEMR3Term(PVM pVM)
103{
104 NOREF(pVM);
105 return VINF_SUCCESS;
106}
107
108
109VMMR3DECL(void) IEMR3Relocate(PVM pVM)
110{
111 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
112 pVM->aCpus[idCpu].iem.s.pCtxRC = VM_RC_ADDR(pVM, pVM->aCpus[idCpu].iem.s.pCtxR3);
113}
114
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette