VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 37452

Last change on this file since 37452 was 37452, checked in by vboxsync, 14 years ago

IOM,PDMCritSect: Extended PDMCritSectEnter to handle rcBusy=VINF_SUCCESS as a request to call ring-3 to acquire a busy lock. Implemented device level locking in the MMIO code.
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File size: 81.2 KB
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1/* $Id: IOM.cpp 37452 2011-06-14 18:13:48Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMGCIOPortHandler (via EMInterpretPortIO).
36 * IOMGCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hwaccm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91
92/*******************************************************************************
93* Header Files *
94*******************************************************************************/
95#define LOG_GROUP LOG_GROUP_IOM
96#include <VBox/vmm/iom.h>
97#include <VBox/vmm/cpum.h>
98#include <VBox/vmm/pgm.h>
99#include <VBox/sup.h>
100#include <VBox/vmm/mm.h>
101#include <VBox/vmm/stam.h>
102#include <VBox/vmm/dbgf.h>
103#include <VBox/vmm/pdmapi.h>
104#include <VBox/vmm/pdmdev.h>
105#include "IOMInternal.h"
106#include <VBox/vmm/vm.h>
107
108#include <VBox/param.h>
109#include <iprt/assert.h>
110#include <iprt/alloc.h>
111#include <iprt/string.h>
112#include <VBox/log.h>
113#include <VBox/err.h>
114
115#include "IOMInline.h"
116
117
118/*******************************************************************************
119* Internal Functions *
120*******************************************************************************/
121static void iomR3FlushCache(PVM pVM);
122static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
123static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
124static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
125static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
126static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
127static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
128static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
129static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
130
131#ifdef VBOX_WITH_STATISTICS
132static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
133#endif
134
135
136/**
137 * Initializes the IOM.
138 *
139 * @returns VBox status code.
140 * @param pVM The VM to operate on.
141 */
142VMMR3DECL(int) IOMR3Init(PVM pVM)
143{
144 LogFlow(("IOMR3Init:\n"));
145
146 /*
147 * Assert alignment and sizes.
148 */
149 AssertCompileMemberAlignment(VM, iom.s, 32);
150 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
151 AssertCompileMemberAlignment(IOM, EmtLock, sizeof(uintptr_t));
152
153 /*
154 * Setup any fixed pointers and offsets.
155 */
156 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
157
158 /*
159 * Initialize the REM critical section.
160 */
161 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.EmtLock, RT_SRC_POS, "IOM EMT Lock");
162 AssertRCReturn(rc, rc);
163
164 /*
165 * Allocate the trees structure.
166 */
167 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
168 if (RT_SUCCESS(rc))
169 {
170 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
171 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
172 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
173 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
174
175 /*
176 * Info.
177 */
178 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
179 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
180
181 /*
182 * Statistics.
183 */
184 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
185 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
186 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
187 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
188 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
189 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
190 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
191 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
192 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
193 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
194 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
195 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
200#ifdef IOM_WITH_MOVS_SUPPORT
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
205#endif
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
207 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
208 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
209 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
210 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
211 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
212 }
213
214 /* Redundant, but just in case we change something in the future */
215 iomR3FlushCache(pVM);
216
217 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
218 return rc;
219}
220
221
222/**
223 * Flushes the IOM port & statistics lookup cache
224 *
225 * @param pVM The VM.
226 */
227static void iomR3FlushCache(PVM pVM)
228{
229 iomLock(pVM);
230 /*
231 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
232 */
233 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
234 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
235 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
236 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
237 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
238 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
239
240 pVM->iom.s.pRangeLastReadR3 = NULL;
241 pVM->iom.s.pRangeLastWriteR3 = NULL;
242 pVM->iom.s.pStatsLastReadR3 = NULL;
243 pVM->iom.s.pStatsLastWriteR3 = NULL;
244 pVM->iom.s.pMMIORangeLastR3 = NULL;
245 pVM->iom.s.pMMIOStatsLastR3 = NULL;
246
247 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
248 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
249 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
250 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
251 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
252 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
253
254 iomUnlock(pVM);
255}
256
257
258/**
259 * The VM is being reset.
260 *
261 * @param pVM VM handle.
262 */
263VMMR3DECL(void) IOMR3Reset(PVM pVM)
264{
265 iomR3FlushCache(pVM);
266}
267
268
269/**
270 * Applies relocations to data and code managed by this
271 * component. This function will be called at init and
272 * whenever the VMM need to relocate it self inside the GC.
273 *
274 * The IOM will update the addresses used by the switcher.
275 *
276 * @param pVM The VM.
277 * @param offDelta Relocation delta relative to old location.
278 */
279VMMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
280{
281 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
282
283 /*
284 * Apply relocations to the GC callbacks.
285 */
286 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
287 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
288 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
289
290 if (pVM->iom.s.pfnMMIOHandlerRC)
291 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
292
293 /*
294 * Apply relocations to the cached GC handlers
295 */
296 if (pVM->iom.s.pRangeLastReadRC)
297 pVM->iom.s.pRangeLastReadRC += offDelta;
298 if (pVM->iom.s.pRangeLastWriteRC)
299 pVM->iom.s.pRangeLastWriteRC += offDelta;
300 if (pVM->iom.s.pStatsLastReadRC)
301 pVM->iom.s.pStatsLastReadRC += offDelta;
302 if (pVM->iom.s.pStatsLastWriteRC)
303 pVM->iom.s.pStatsLastWriteRC += offDelta;
304 if (pVM->iom.s.pMMIORangeLastRC)
305 pVM->iom.s.pMMIORangeLastRC += offDelta;
306 if (pVM->iom.s.pMMIOStatsLastRC)
307 pVM->iom.s.pMMIOStatsLastRC += offDelta;
308}
309
310
311/**
312 * Callback function for relocating a I/O port range.
313 *
314 * @returns 0 (continue enum)
315 * @param pNode Pointer to a IOMIOPORTRANGERC node.
316 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
317 * not certain the delta will fit in a void pointer for all possible configs.
318 */
319static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
320{
321 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
322 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
323
324 Assert(pRange->pDevIns);
325 pRange->pDevIns += offDelta;
326 if (pRange->pfnOutCallback)
327 pRange->pfnOutCallback += offDelta;
328 if (pRange->pfnInCallback)
329 pRange->pfnInCallback += offDelta;
330 if (pRange->pfnOutStrCallback)
331 pRange->pfnOutStrCallback += offDelta;
332 if (pRange->pfnInStrCallback)
333 pRange->pfnInStrCallback += offDelta;
334 if (pRange->pvUser > _64K)
335 pRange->pvUser += offDelta;
336 return 0;
337}
338
339
340/**
341 * Callback function for relocating a MMIO range.
342 *
343 * @returns 0 (continue enum)
344 * @param pNode Pointer to a IOMMMIORANGE node.
345 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
346 * not certain the delta will fit in a void pointer for all possible configs.
347 */
348static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
349{
350 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
351 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
352
353 if (pRange->pDevInsRC)
354 pRange->pDevInsRC += offDelta;
355 if (pRange->pfnWriteCallbackRC)
356 pRange->pfnWriteCallbackRC += offDelta;
357 if (pRange->pfnReadCallbackRC)
358 pRange->pfnReadCallbackRC += offDelta;
359 if (pRange->pfnFillCallbackRC)
360 pRange->pfnFillCallbackRC += offDelta;
361 if (pRange->pvUserRC > _64K)
362 pRange->pvUserRC += offDelta;
363
364 return 0;
365}
366
367
368/**
369 * Terminates the IOM.
370 *
371 * Termination means cleaning up and freeing all resources,
372 * the VM it self is at this point powered off or suspended.
373 *
374 * @returns VBox status code.
375 * @param pVM The VM to operate on.
376 */
377VMMR3DECL(int) IOMR3Term(PVM pVM)
378{
379 /*
380 * IOM is not owning anything but automatically freed resources,
381 * so there's nothing to do here.
382 */
383 return VINF_SUCCESS;
384}
385
386#ifdef VBOX_WITH_STATISTICS
387
388/**
389 * Create the statistics node for an I/O port.
390 *
391 * @returns Pointer to new stats node.
392 *
393 * @param pVM VM handle.
394 * @param Port Port.
395 * @param pszDesc Description.
396 */
397PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
398{
399 Assert(IOMIsLockOwner(pVM));
400 /* check if it already exists. */
401 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
402 if (pPort)
403 return pPort;
404
405 /* allocate stats node. */
406 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
407 AssertRC(rc);
408 if (RT_SUCCESS(rc))
409 {
410 /* insert into the tree. */
411 pPort->Core.Key = Port;
412 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
413 {
414 /* put a name on common ports. */
415 if (!pszDesc)
416 pszDesc = iomR3IOPortGetStandardName(Port);
417
418 /* register the statistics counters. */
419 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
420 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
421 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
422 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
423 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
424 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
425
426 /* Profiling */
427 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
428 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
429 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
430 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
431
432 return pPort;
433 }
434 AssertMsgFailed(("what! Port=%d\n", Port));
435 MMHyperFree(pVM, pPort);
436 }
437 return NULL;
438}
439
440
441/**
442 * Create the statistics node for an MMIO address.
443 *
444 * @returns Pointer to new stats node.
445 *
446 * @param pVM VM handle.
447 * @param GCPhys The address.
448 * @param pszDesc Description.
449 */
450PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
451{
452 Assert(IOMIsLockOwner(pVM));
453#ifdef DEBUG_sandervl
454 AssertGCPhys32(GCPhys);
455#endif
456 /* check if it already exists. */
457 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
458 if (pStats)
459 return pStats;
460
461 /* allocate stats node. */
462 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
463 AssertRC(rc);
464 if (RT_SUCCESS(rc))
465 {
466 /* insert into the tree. */
467 pStats->Core.Key = GCPhys;
468 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
469 {
470 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
471 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
472 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
473 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
474 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
475 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
476 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
477
478 return pStats;
479 }
480 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
481 MMHyperFree(pVM, pStats);
482 }
483 return NULL;
484}
485
486#endif /* VBOX_WITH_STATISTICS */
487
488/**
489 * Registers a I/O port ring-3 handler.
490 *
491 * This API is called by PDM on behalf of a device. Devices must first register
492 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
493 * and IOMR3IOPortRegisterR0().
494 *
495 *
496 * @returns VBox status code.
497 *
498 * @param pVM VM handle.
499 * @param pDevIns PDM device instance owning the port range.
500 * @param PortStart First port number in the range.
501 * @param cPorts Number of ports to register.
502 * @param pvUser User argument for the callbacks.
503 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
504 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
505 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
506 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
507 * @param pszDesc Pointer to description string. This must not be freed.
508 */
509VMMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
510 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
511 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
512{
513 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
514 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
515
516 /*
517 * Validate input.
518 */
519 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
520 || (RTUINT)PortStart + cPorts > 0x10000)
521 {
522 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
523 return VERR_IOM_INVALID_IOPORT_RANGE;
524 }
525 if (!pfnOutCallback && !pfnInCallback)
526 {
527 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
528 return VERR_INVALID_PARAMETER;
529 }
530 if (!pfnOutCallback)
531 pfnOutCallback = iomR3IOPortDummyOut;
532 if (!pfnInCallback)
533 pfnInCallback = iomR3IOPortDummyIn;
534 if (!pfnOutStrCallback)
535 pfnOutStrCallback = iomR3IOPortDummyOutStr;
536 if (!pfnInStrCallback)
537 pfnInStrCallback = iomR3IOPortDummyInStr;
538
539 /* Flush the IO port lookup cache */
540 iomR3FlushCache(pVM);
541
542 /*
543 * Allocate new range record and initialize it.
544 */
545 PIOMIOPORTRANGER3 pRange;
546 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
547 if (RT_SUCCESS(rc))
548 {
549 pRange->Core.Key = PortStart;
550 pRange->Core.KeyLast = PortStart + (cPorts - 1);
551 pRange->Port = PortStart;
552 pRange->cPorts = cPorts;
553 pRange->pvUser = pvUser;
554 pRange->pDevIns = pDevIns;
555 pRange->pfnOutCallback = pfnOutCallback;
556 pRange->pfnInCallback = pfnInCallback;
557 pRange->pfnOutStrCallback = pfnOutStrCallback;
558 pRange->pfnInStrCallback = pfnInStrCallback;
559 pRange->pszDesc = pszDesc;
560
561 /*
562 * Try Insert it.
563 */
564 iomLock(pVM);
565 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
566 {
567 #ifdef VBOX_WITH_STATISTICS
568 for (unsigned iPort = 0; iPort < cPorts; iPort++)
569 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
570 #endif
571 iomUnlock(pVM);
572 return VINF_SUCCESS;
573 }
574 iomUnlock(pVM);
575
576 /* conflict. */
577 DBGFR3Info(pVM, "ioport", NULL, NULL);
578 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
579 MMHyperFree(pVM, pRange);
580 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
581 }
582
583 return rc;
584}
585
586
587/**
588 * Registers a I/O port RC handler.
589 *
590 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
591 * using IOMIOPortRegisterR3() before calling this function.
592 *
593 *
594 * @returns VBox status code.
595 *
596 * @param pVM VM handle.
597 * @param pDevIns PDM device instance owning the port range.
598 * @param PortStart First port number in the range.
599 * @param cPorts Number of ports to register.
600 * @param pvUser User argument for the callbacks.
601 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
602 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
603 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
604 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
605 * @param pszDesc Pointer to description string. This must not be freed.
606 */
607VMMR3DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
608 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
609 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
610{
611 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
612 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
613
614 /*
615 * Validate input.
616 */
617 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
618 || (RTUINT)PortStart + cPorts > 0x10000)
619 {
620 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
621 return VERR_IOM_INVALID_IOPORT_RANGE;
622 }
623 RTIOPORT PortLast = PortStart + (cPorts - 1);
624 if (!pfnOutCallback && !pfnInCallback)
625 {
626 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
627 return VERR_INVALID_PARAMETER;
628 }
629
630 iomLock(pVM);
631
632 /*
633 * Validate that there are ring-3 ranges for the ports.
634 */
635 RTIOPORT Port = PortStart;
636 while (Port <= PortLast && Port >= PortStart)
637 {
638 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
639 if (!pRange)
640 {
641 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
642 iomUnlock(pVM);
643 return VERR_IOM_NO_HC_IOPORT_RANGE;
644 }
645#ifndef IOM_NO_PDMINS_CHECKS
646# ifndef IN_RC
647 if (pRange->pDevIns != pDevIns)
648# else
649 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
650# endif
651 {
652 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
653 iomUnlock(pVM);
654 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
655 }
656#endif
657 Port = pRange->Core.KeyLast + 1;
658 }
659
660 /* Flush the IO port lookup cache */
661 iomR3FlushCache(pVM);
662
663 /*
664 * Allocate new range record and initialize it.
665 */
666 PIOMIOPORTRANGERC pRange;
667 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
668 if (RT_SUCCESS(rc))
669 {
670 pRange->Core.Key = PortStart;
671 pRange->Core.KeyLast = PortLast;
672 pRange->Port = PortStart;
673 pRange->cPorts = cPorts;
674 pRange->pvUser = pvUser;
675 pRange->pfnOutCallback = pfnOutCallback;
676 pRange->pfnInCallback = pfnInCallback;
677 pRange->pfnOutStrCallback = pfnOutStrCallback;
678 pRange->pfnInStrCallback = pfnInStrCallback;
679 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
680 pRange->pszDesc = pszDesc;
681
682 /*
683 * Insert it.
684 */
685 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
686 {
687 iomUnlock(pVM);
688 return VINF_SUCCESS;
689 }
690
691 /* conflict. */
692 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
693 MMHyperFree(pVM, pRange);
694 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
695 }
696 iomUnlock(pVM);
697 return rc;
698}
699
700
701/**
702 * Registers a Port IO R0 handler.
703 *
704 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
705 * using IOMR3IOPortRegisterR3() before calling this function.
706 *
707 *
708 * @returns VBox status code.
709 *
710 * @param pVM VM handle.
711 * @param pDevIns PDM device instance owning the port range.
712 * @param PortStart First port number in the range.
713 * @param cPorts Number of ports to register.
714 * @param pvUser User argument for the callbacks.
715 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
716 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
717 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
718 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
719 * @param pszDesc Pointer to description string. This must not be freed.
720 */
721VMMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
722 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
723 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
724 const char *pszDesc)
725{
726 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
727 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
728
729 /*
730 * Validate input.
731 */
732 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
733 || (RTUINT)PortStart + cPorts > 0x10000)
734 {
735 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
736 return VERR_IOM_INVALID_IOPORT_RANGE;
737 }
738 RTIOPORT PortLast = PortStart + (cPorts - 1);
739 if (!pfnOutCallback && !pfnInCallback)
740 {
741 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
742 return VERR_INVALID_PARAMETER;
743 }
744
745 iomLock(pVM);
746 /*
747 * Validate that there are ring-3 ranges for the ports.
748 */
749 RTIOPORT Port = PortStart;
750 while (Port <= PortLast && Port >= PortStart)
751 {
752 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
753 if (!pRange)
754 {
755 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
756 iomUnlock(pVM);
757 return VERR_IOM_NO_HC_IOPORT_RANGE;
758 }
759#ifndef IOM_NO_PDMINS_CHECKS
760# ifndef IN_RC
761 if (pRange->pDevIns != pDevIns)
762# else
763 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
764# endif
765 {
766 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
767 iomUnlock(pVM);
768 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
769 }
770#endif
771 Port = pRange->Core.KeyLast + 1;
772 }
773
774 /* Flush the IO port lookup cache */
775 iomR3FlushCache(pVM);
776
777 /*
778 * Allocate new range record and initialize it.
779 */
780 PIOMIOPORTRANGER0 pRange;
781 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
782 if (RT_SUCCESS(rc))
783 {
784 pRange->Core.Key = PortStart;
785 pRange->Core.KeyLast = PortLast;
786 pRange->Port = PortStart;
787 pRange->cPorts = cPorts;
788 pRange->pvUser = pvUser;
789 pRange->pfnOutCallback = pfnOutCallback;
790 pRange->pfnInCallback = pfnInCallback;
791 pRange->pfnOutStrCallback = pfnOutStrCallback;
792 pRange->pfnInStrCallback = pfnInStrCallback;
793 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
794 pRange->pszDesc = pszDesc;
795
796 /*
797 * Insert it.
798 */
799 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
800 {
801 iomUnlock(pVM);
802 return VINF_SUCCESS;
803 }
804
805 /* conflict. */
806 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
807 MMHyperFree(pVM, pRange);
808 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
809 }
810 iomUnlock(pVM);
811 return rc;
812}
813
814
815/**
816 * Deregisters a I/O Port range.
817 *
818 * The specified range must be registered using IOMR3IOPortRegister previous to
819 * this call. The range does can be a smaller part of the range specified to
820 * IOMR3IOPortRegister, but it can never be larger.
821 *
822 * This function will remove GC, R0 and R3 context port handlers for this range.
823 *
824 * @returns VBox status code.
825 *
826 * @param pVM The virtual machine.
827 * @param pDevIns The device instance associated with the range.
828 * @param PortStart First port number in the range.
829 * @param cPorts Number of ports to remove starting at PortStart.
830 *
831 * @remark This function mainly for PCI PnP Config and will not do
832 * all the checks you might expect it to do.
833 */
834VMMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
835{
836 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
837
838 /*
839 * Validate input.
840 */
841 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
842 || (RTUINT)PortStart + cPorts > 0x10000)
843 {
844 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
845 return VERR_IOM_INVALID_IOPORT_RANGE;
846 }
847
848 iomLock(pVM);
849
850 /* Flush the IO port lookup cache */
851 iomR3FlushCache(pVM);
852
853 /*
854 * Check ownership.
855 */
856 RTIOPORT PortLast = PortStart + (cPorts - 1);
857 RTIOPORT Port = PortStart;
858 while (Port <= PortLast && Port >= PortStart)
859 {
860 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
861 if (pRange)
862 {
863 Assert(Port <= pRange->Core.KeyLast);
864#ifndef IOM_NO_PDMINS_CHECKS
865 if (pRange->pDevIns != pDevIns)
866 {
867 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
868 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
869 iomUnlock(pVM);
870 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
871 }
872#endif /* !IOM_NO_PDMINS_CHECKS */
873 Port = pRange->Core.KeyLast;
874 }
875 Port++;
876 }
877
878 /*
879 * Remove any RC ranges first.
880 */
881 int rc = VINF_SUCCESS;
882 Port = PortStart;
883 while (Port <= PortLast && Port >= PortStart)
884 {
885 /*
886 * Try find range.
887 */
888 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
889 if (pRange)
890 {
891 if ( pRange->Core.Key == Port
892 && pRange->Core.KeyLast <= PortLast)
893 {
894 /*
895 * Kick out the entire range.
896 */
897 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
898 Assert(pv == (void *)pRange); NOREF(pv);
899 Port += pRange->cPorts;
900 MMHyperFree(pVM, pRange);
901 }
902 else if (pRange->Core.Key == Port)
903 {
904 /*
905 * Cut of the head of the range, done.
906 */
907 pRange->cPorts -= Port - pRange->Port;
908 pRange->Core.Key = Port;
909 pRange->Port = Port;
910 break;
911 }
912 else if (pRange->Core.KeyLast <= PortLast)
913 {
914 /*
915 * Just cut of the tail.
916 */
917 unsigned c = pRange->Core.KeyLast - Port + 1;
918 pRange->Core.KeyLast -= c;
919 pRange->cPorts -= c;
920 Port += c;
921 }
922 else
923 {
924 /*
925 * Split the range, done.
926 */
927 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
928 /* create tail. */
929 PIOMIOPORTRANGERC pRangeNew;
930 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
931 if (RT_FAILURE(rc2))
932 {
933 iomUnlock(pVM);
934 return rc2;
935 }
936 *pRangeNew = *pRange;
937 pRangeNew->Core.Key = PortLast;
938 pRangeNew->Port = PortLast;
939 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
940
941 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
942
943 /* adjust head */
944 pRange->Core.KeyLast = Port - 1;
945 pRange->cPorts = Port - pRange->Port;
946
947 /* insert */
948 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
949 {
950 AssertMsgFailed(("This cannot happen!\n"));
951 MMHyperFree(pVM, pRangeNew);
952 rc = VERR_INTERNAL_ERROR;
953 }
954 break;
955 }
956 }
957 else /* next port */
958 Port++;
959 } /* for all ports - RC. */
960
961
962 /*
963 * Remove any R0 ranges.
964 */
965 Port = PortStart;
966 while (Port <= PortLast && Port >= PortStart)
967 {
968 /*
969 * Try find range.
970 */
971 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
972 if (pRange)
973 {
974 if ( pRange->Core.Key == Port
975 && pRange->Core.KeyLast <= PortLast)
976 {
977 /*
978 * Kick out the entire range.
979 */
980 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
981 Assert(pv == (void *)pRange); NOREF(pv);
982 Port += pRange->cPorts;
983 MMHyperFree(pVM, pRange);
984 }
985 else if (pRange->Core.Key == Port)
986 {
987 /*
988 * Cut of the head of the range, done.
989 */
990 pRange->cPorts -= Port - pRange->Port;
991 pRange->Core.Key = Port;
992 pRange->Port = Port;
993 break;
994 }
995 else if (pRange->Core.KeyLast <= PortLast)
996 {
997 /*
998 * Just cut of the tail.
999 */
1000 unsigned c = pRange->Core.KeyLast - Port + 1;
1001 pRange->Core.KeyLast -= c;
1002 pRange->cPorts -= c;
1003 Port += c;
1004 }
1005 else
1006 {
1007 /*
1008 * Split the range, done.
1009 */
1010 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1011 /* create tail. */
1012 PIOMIOPORTRANGER0 pRangeNew;
1013 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1014 if (RT_FAILURE(rc2))
1015 {
1016 iomUnlock(pVM);
1017 return rc2;
1018 }
1019 *pRangeNew = *pRange;
1020 pRangeNew->Core.Key = PortLast;
1021 pRangeNew->Port = PortLast;
1022 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1023
1024 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1025
1026 /* adjust head */
1027 pRange->Core.KeyLast = Port - 1;
1028 pRange->cPorts = Port - pRange->Port;
1029
1030 /* insert */
1031 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1032 {
1033 AssertMsgFailed(("This cannot happen!\n"));
1034 MMHyperFree(pVM, pRangeNew);
1035 rc = VERR_INTERNAL_ERROR;
1036 }
1037 break;
1038 }
1039 }
1040 else /* next port */
1041 Port++;
1042 } /* for all ports - R0. */
1043
1044 /*
1045 * And the same procedure for ring-3 ranges.
1046 */
1047 Port = PortStart;
1048 while (Port <= PortLast && Port >= PortStart)
1049 {
1050 /*
1051 * Try find range.
1052 */
1053 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1054 if (pRange)
1055 {
1056 if ( pRange->Core.Key == Port
1057 && pRange->Core.KeyLast <= PortLast)
1058 {
1059 /*
1060 * Kick out the entire range.
1061 */
1062 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1063 Assert(pv == (void *)pRange); NOREF(pv);
1064 Port += pRange->cPorts;
1065 MMHyperFree(pVM, pRange);
1066 }
1067 else if (pRange->Core.Key == Port)
1068 {
1069 /*
1070 * Cut of the head of the range, done.
1071 */
1072 pRange->cPorts -= Port - pRange->Port;
1073 pRange->Core.Key = Port;
1074 pRange->Port = Port;
1075 break;
1076 }
1077 else if (pRange->Core.KeyLast <= PortLast)
1078 {
1079 /*
1080 * Just cut of the tail.
1081 */
1082 unsigned c = pRange->Core.KeyLast - Port + 1;
1083 pRange->Core.KeyLast -= c;
1084 pRange->cPorts -= c;
1085 Port += c;
1086 }
1087 else
1088 {
1089 /*
1090 * Split the range, done.
1091 */
1092 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1093 /* create tail. */
1094 PIOMIOPORTRANGER3 pRangeNew;
1095 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1096 if (RT_FAILURE(rc2))
1097 {
1098 iomUnlock(pVM);
1099 return rc2;
1100 }
1101 *pRangeNew = *pRange;
1102 pRangeNew->Core.Key = PortLast;
1103 pRangeNew->Port = PortLast;
1104 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1105
1106 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1107
1108 /* adjust head */
1109 pRange->Core.KeyLast = Port - 1;
1110 pRange->cPorts = Port - pRange->Port;
1111
1112 /* insert */
1113 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1114 {
1115 AssertMsgFailed(("This cannot happen!\n"));
1116 MMHyperFree(pVM, pRangeNew);
1117 rc = VERR_INTERNAL_ERROR;
1118 }
1119 break;
1120 }
1121 }
1122 else /* next port */
1123 Port++;
1124 } /* for all ports - ring-3. */
1125
1126 /* done */
1127 iomUnlock(pVM);
1128 return rc;
1129}
1130
1131
1132/**
1133 * Dummy Port I/O Handler for IN operations.
1134 *
1135 * @returns VBox status code.
1136 *
1137 * @param pDevIns The device instance.
1138 * @param pvUser User argument.
1139 * @param Port Port number used for the IN operation.
1140 * @param pu32 Where to store the result.
1141 * @param cb Number of bytes read.
1142 */
1143static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1144{
1145 switch (cb)
1146 {
1147 case 1: *pu32 = 0xff; break;
1148 case 2: *pu32 = 0xffff; break;
1149 case 4: *pu32 = UINT32_C(0xffffffff); break;
1150 default:
1151 AssertReleaseMsgFailed(("cb=%d\n", cb));
1152 return VERR_INTERNAL_ERROR;
1153 }
1154 return VINF_SUCCESS;
1155}
1156
1157
1158/**
1159 * Dummy Port I/O Handler for string IN operations.
1160 *
1161 * @returns VBox status code.
1162 *
1163 * @param pDevIns The device instance.
1164 * @param pvUser User argument.
1165 * @param Port Port number used for the string IN operation.
1166 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1167 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1168 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1169 */
1170static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
1171{
1172 return VINF_SUCCESS;
1173}
1174
1175
1176/**
1177 * Dummy Port I/O Handler for OUT operations.
1178 *
1179 * @returns VBox status code.
1180 *
1181 * @param pDevIns The device instance.
1182 * @param pvUser User argument.
1183 * @param Port Port number used for the OUT operation.
1184 * @param u32 The value to output.
1185 * @param cb The value size in bytes.
1186 */
1187static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1188{
1189 return VINF_SUCCESS;
1190}
1191
1192
1193/**
1194 * Dummy Port I/O Handler for string OUT operations.
1195 *
1196 * @returns VBox status code.
1197 *
1198 * @param pDevIns The device instance.
1199 * @param pvUser User argument.
1200 * @param Port Port number used for the string OUT operation.
1201 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1202 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1203 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1204 */
1205static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
1206{
1207 return VINF_SUCCESS;
1208}
1209
1210
1211/**
1212 * Display a single I/O port ring-3 range.
1213 *
1214 * @returns 0
1215 * @param pNode Pointer to I/O port HC range.
1216 * @param pvUser Pointer to info output callback structure.
1217 */
1218static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1219{
1220 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1221 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1222 pHlp->pfnPrintf(pHlp,
1223 "%04x-%04x %p %p %p %p %s\n",
1224 pRange->Core.Key,
1225 pRange->Core.KeyLast,
1226 pRange->pDevIns,
1227 pRange->pfnInCallback,
1228 pRange->pfnOutCallback,
1229 pRange->pvUser,
1230 pRange->pszDesc);
1231 return 0;
1232}
1233
1234
1235/**
1236 * Display a single I/O port GC range.
1237 *
1238 * @returns 0
1239 * @param pNode Pointer to IOPORT GC range.
1240 * @param pvUser Pointer to info output callback structure.
1241 */
1242static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1243{
1244 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1245 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1246 pHlp->pfnPrintf(pHlp,
1247 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1248 pRange->Core.Key,
1249 pRange->Core.KeyLast,
1250 pRange->pDevIns,
1251 pRange->pfnInCallback,
1252 pRange->pfnOutCallback,
1253 pRange->pvUser,
1254 pRange->pszDesc);
1255 return 0;
1256}
1257
1258
1259/**
1260 * Display all registered I/O port ranges.
1261 *
1262 * @param pVM VM Handle.
1263 * @param pHlp The info helpers.
1264 * @param pszArgs Arguments, ignored.
1265 */
1266static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1267{
1268 NOREF(pszArgs);
1269 pHlp->pfnPrintf(pHlp,
1270 "I/O Port R3 ranges (pVM=%p)\n"
1271 "Range %.*s %.*s %.*s %.*s Description\n",
1272 pVM,
1273 sizeof(RTHCPTR) * 2, "pDevIns ",
1274 sizeof(RTHCPTR) * 2, "In ",
1275 sizeof(RTHCPTR) * 2, "Out ",
1276 sizeof(RTHCPTR) * 2, "pvUser ");
1277 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1278
1279 pHlp->pfnPrintf(pHlp,
1280 "I/O Port R0 ranges (pVM=%p)\n"
1281 "Range %.*s %.*s %.*s %.*s Description\n",
1282 pVM,
1283 sizeof(RTHCPTR) * 2, "pDevIns ",
1284 sizeof(RTHCPTR) * 2, "In ",
1285 sizeof(RTHCPTR) * 2, "Out ",
1286 sizeof(RTHCPTR) * 2, "pvUser ");
1287 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1288
1289 pHlp->pfnPrintf(pHlp,
1290 "I/O Port GC ranges (pVM=%p)\n"
1291 "Range %.*s %.*s %.*s %.*s Description\n",
1292 pVM,
1293 sizeof(RTRCPTR) * 2, "pDevIns ",
1294 sizeof(RTRCPTR) * 2, "In ",
1295 sizeof(RTRCPTR) * 2, "Out ",
1296 sizeof(RTRCPTR) * 2, "pvUser ");
1297 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1298
1299 if (pVM->iom.s.pRangeLastReadRC)
1300 {
1301 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1302 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n",
1303 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1304 }
1305 if (pVM->iom.s.pStatsLastReadRC)
1306 {
1307 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1308 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n",
1309 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1310 }
1311
1312 if (pVM->iom.s.pRangeLastWriteRC)
1313 {
1314 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1315 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n",
1316 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1317 }
1318 if (pVM->iom.s.pStatsLastWriteRC)
1319 {
1320 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1321 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n",
1322 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1323 }
1324
1325 if (pVM->iom.s.pRangeLastReadR3)
1326 {
1327 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1328 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %p %s\n",
1329 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1330 }
1331 if (pVM->iom.s.pStatsLastReadR3)
1332 {
1333 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1334 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %p\n",
1335 pRange->Core.Key, pRange);
1336 }
1337
1338 if (pVM->iom.s.pRangeLastWriteR3)
1339 {
1340 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1341 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %p %s\n",
1342 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1343 }
1344 if (pVM->iom.s.pStatsLastWriteR3)
1345 {
1346 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1347 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %p\n",
1348 pRange->Core.Key, pRange);
1349 }
1350
1351 if (pVM->iom.s.pRangeLastReadR0)
1352 {
1353 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1354 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %p %s\n",
1355 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1356 }
1357 if (pVM->iom.s.pStatsLastReadR0)
1358 {
1359 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1360 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %p\n",
1361 pRange->Core.Key, pRange);
1362 }
1363
1364 if (pVM->iom.s.pRangeLastWriteR0)
1365 {
1366 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1367 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
1368 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1369 }
1370 if (pVM->iom.s.pStatsLastWriteR0)
1371 {
1372 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1373 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %p\n",
1374 pRange->Core.Key, pRange);
1375 }
1376}
1377
1378
1379/**
1380 * Registers a Memory Mapped I/O R3 handler.
1381 *
1382 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1383 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1384 *
1385 * @returns VBox status code.
1386 *
1387 * @param pVM VM handle.
1388 * @param pDevIns PDM device instance owning the MMIO range.
1389 * @param GCPhysStart First physical address in the range.
1390 * @param cbRange The size of the range (in bytes).
1391 * @param pvUser User argument for the callbacks.
1392 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1393 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1394 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1395 * @param pszDesc Pointer to description string. This must not be freed.
1396 */
1397VMMR3_INT_DECL(int)
1398IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1399 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1400 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)
1401{
1402 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n",
1403 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, pszDesc));
1404 int rc;
1405
1406 /*
1407 * Validate input.
1408 */
1409 if (GCPhysStart + (cbRange - 1) < GCPhysStart)
1410 {
1411 AssertMsgFailed(("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange));
1412 return VERR_IOM_INVALID_MMIO_RANGE;
1413 }
1414
1415 /*
1416 * Resolve the GC/R0 handler addresses lazily because of init order.
1417 */
1418 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1419 {
1420 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1421 AssertLogRelRCReturn(rc, rc);
1422 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1423 AssertLogRelRCReturn(rc, rc);
1424 }
1425
1426 /*
1427 * For the 2nd+ instance, mangle the description string so it's unique.
1428 * (PGM requires this.)
1429 */
1430 if (pDevIns->iInstance > 0) /** @todo Move to PDMDevHlp.cpp and use a string cache. */
1431 {
1432 pszDesc = MMR3HeapAPrintf(pVM, MM_TAG_IOM, "%s [%u]", pszDesc, pDevIns->iInstance);
1433 if (!pszDesc)
1434 return VERR_NO_MEMORY;
1435 }
1436
1437
1438 /*
1439 * Allocate new range record and initialize it.
1440 */
1441 PIOMMMIORANGE pRange;
1442 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1443 if (RT_SUCCESS(rc))
1444 {
1445 pRange->Core.Key = GCPhysStart;
1446 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1447 pRange->GCPhys = GCPhysStart;
1448 pRange->cb = cbRange;
1449 pRange->cRefs = 1; /* The tree reference. */
1450 pRange->pszDesc = pszDesc;
1451
1452 pRange->pvUserR3 = pvUser;
1453 pRange->pDevInsR3 = pDevIns;
1454 pRange->pfnReadCallbackR3 = pfnReadCallback;
1455 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1456 pRange->pfnFillCallbackR3 = pfnFillCallback;
1457
1458 //pRange->pvUserR0 = NIL_RTR0PTR;
1459 //pRange->pDevInsR0 = NIL_RTR0PTR;
1460 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1461 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1462 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1463
1464 //pRange->pvUserRC = NIL_RTRCPTR;
1465 //pRange->pDevInsRC = NIL_RTRCPTR;
1466 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1467 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1468 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1469
1470 /*
1471 * Try register it with PGM and then insert it into the tree.
1472 */
1473 iomLock(pVM);
1474 iomR3FlushCache(pVM);
1475 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1476 IOMR3MMIOHandler, pRange,
1477 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1478 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1479 if (RT_SUCCESS(rc))
1480 {
1481 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1482 {
1483 iomUnlock(pVM);
1484 return VINF_SUCCESS;
1485 }
1486
1487 /* bail out */
1488 iomUnlock(pVM);
1489 DBGFR3Info(pVM, "mmio", NULL, NULL);
1490 AssertMsgFailed(("This cannot happen!\n"));
1491 rc = VERR_INTERNAL_ERROR;
1492 }
1493 else
1494 iomUnlock(pVM);
1495
1496 MMHyperFree(pVM, pRange);
1497 }
1498 if (pDevIns->iInstance > 0)
1499 MMR3HeapFree((void *)pszDesc);
1500 return rc;
1501}
1502
1503
1504/**
1505 * Registers a Memory Mapped I/O RC handler range.
1506 *
1507 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1508 * using IOMMMIORegisterR3() before calling this function.
1509 *
1510 *
1511 * @returns VBox status code.
1512 *
1513 * @param pVM VM handle.
1514 * @param pDevIns PDM device instance owning the MMIO range.
1515 * @param GCPhysStart First physical address in the range.
1516 * @param cbRange The size of the range (in bytes).
1517 * @param pvUser User argument for the callbacks.
1518 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1519 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1520 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1521 */
1522VMMR3_INT_DECL(int)
1523IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1524 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1525 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1526{
1527 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1528 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1529
1530 /*
1531 * Validate input.
1532 */
1533 if (!pfnWriteCallback && !pfnReadCallback)
1534 {
1535 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1536 return VERR_INVALID_PARAMETER;
1537 }
1538
1539 /*
1540 * Find the MMIO range and check that the input matches.
1541 */
1542 iomLock(pVM);
1543 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1544 AssertReturnStmt(pRange, iomUnlock(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1545 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, iomUnlock(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1546 AssertReturnStmt(pRange->GCPhys == GCPhysStart, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1547 AssertReturnStmt(pRange->cb == cbRange, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1548
1549 pRange->pvUserRC = pvUser;
1550 pRange->pfnReadCallbackRC = pfnReadCallback;
1551 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1552 pRange->pfnFillCallbackRC = pfnFillCallback;
1553 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1554 iomUnlock(pVM);
1555
1556 return VINF_SUCCESS;
1557}
1558
1559
1560/**
1561 * Registers a Memory Mapped I/O R0 handler range.
1562 *
1563 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1564 * using IOMMR3MIORegisterHC() before calling this function.
1565 *
1566 *
1567 * @returns VBox status code.
1568 *
1569 * @param pVM VM handle.
1570 * @param pDevIns PDM device instance owning the MMIO range.
1571 * @param GCPhysStart First physical address in the range.
1572 * @param cbRange The size of the range (in bytes).
1573 * @param pvUser User argument for the callbacks.
1574 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1575 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1576 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1577 */
1578VMMR3_INT_DECL(int)
1579IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1580 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1581 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1582 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1583{
1584 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1585 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1586
1587 /*
1588 * Validate input.
1589 */
1590 if (!pfnWriteCallback && !pfnReadCallback)
1591 {
1592 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1593 return VERR_INVALID_PARAMETER;
1594 }
1595
1596 /*
1597 * Find the MMIO range and check that the input matches.
1598 */
1599 iomLock(pVM);
1600 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1601 AssertReturnStmt(pRange, iomUnlock(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1602 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, iomUnlock(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1603 AssertReturnStmt(pRange->GCPhys == GCPhysStart, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1604 AssertReturnStmt(pRange->cb == cbRange, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1605
1606 pRange->pvUserR0 = pvUser;
1607 pRange->pfnReadCallbackR0 = pfnReadCallback;
1608 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1609 pRange->pfnFillCallbackR0 = pfnFillCallback;
1610 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1611 iomUnlock(pVM);
1612
1613 return VINF_SUCCESS;
1614}
1615
1616
1617/**
1618 * Deregisters a Memory Mapped I/O handler range.
1619 *
1620 * Registered GC, R0, and R3 ranges are affected.
1621 *
1622 * @returns VBox status code.
1623 *
1624 * @param pVM The virtual machine.
1625 * @param pDevIns Device instance which the MMIO region is registered.
1626 * @param GCPhysStart First physical address (GC) in the range.
1627 * @param cbRange Number of bytes to deregister.
1628 *
1629 * @remark This function mainly for PCI PnP Config and will not do
1630 * all the checks you might expect it to do.
1631 */
1632VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1633{
1634 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1635
1636 /*
1637 * Validate input.
1638 */
1639 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1640 if (GCPhysLast < GCPhysStart)
1641 {
1642 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1643 return VERR_IOM_INVALID_MMIO_RANGE;
1644 }
1645
1646 iomLock(pVM);
1647
1648 /*
1649 * Check ownership and such for the entire area.
1650 */
1651 RTGCPHYS GCPhys = GCPhysStart;
1652 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1653 {
1654 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
1655 if (!pRange)
1656 {
1657 iomUnlock(pVM);
1658 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1659 }
1660 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1661 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1662 iomUnlock(pVM),
1663 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1664 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1665 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1666 iomUnlock(pVM),
1667 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1668
1669 /* next */
1670 Assert(GCPhys <= pRange->Core.KeyLast);
1671 GCPhys = pRange->Core.KeyLast + 1;
1672 }
1673
1674 /*
1675 * Do the actual removing of the MMIO ranges.
1676 */
1677 GCPhys = GCPhysStart;
1678 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1679 {
1680 iomR3FlushCache(pVM);
1681
1682 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1683 Assert(pRange);
1684 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1685 iomUnlock(pVM); /** @todo r=bird: Why are we leving the lock here? We don't leave it when registering the range above... */
1686
1687 /* remove it from PGM */
1688 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1689 AssertRC(rc);
1690
1691 iomLock(pVM);
1692
1693 /* advance and free. */
1694 GCPhys = pRange->Core.KeyLast + 1;
1695 if (pDevIns->iInstance > 0)
1696 {
1697 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1698 MMR3HeapFree(pvDesc);
1699 }
1700 iomMmioReleaseRange(pVM, pRange);
1701 }
1702
1703 iomUnlock(pVM);
1704 return VINF_SUCCESS;
1705}
1706
1707
1708/**
1709 * For TM only!
1710 *
1711 * @returns Pointer to the critical section.
1712 * @param pVM The VM handle.
1713 */
1714VMMR3DECL(PPDMCRITSECT) IOMR3GetCritSect(PVM pVM)
1715{
1716 return &pVM->iom.s.EmtLock;
1717}
1718
1719
1720/**
1721 * Display a single MMIO range.
1722 *
1723 * @returns 0
1724 * @param pNode Pointer to MMIO R3 range.
1725 * @param pvUser Pointer to info output callback structure.
1726 */
1727static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1728{
1729 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1730 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1731 pHlp->pfnPrintf(pHlp,
1732 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1733 pRange->Core.Key,
1734 pRange->Core.KeyLast,
1735 pRange->pDevInsR3,
1736 pRange->pfnReadCallbackR3,
1737 pRange->pfnWriteCallbackR3,
1738 pRange->pfnFillCallbackR3,
1739 pRange->pvUserR3,
1740 pRange->pszDesc);
1741 pHlp->pfnPrintf(pHlp,
1742 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1743 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1744 pRange->pDevInsR0,
1745 pRange->pfnReadCallbackR0,
1746 pRange->pfnWriteCallbackR0,
1747 pRange->pfnFillCallbackR0,
1748 pRange->pvUserR0);
1749 pHlp->pfnPrintf(pHlp,
1750 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1751 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1752 pRange->pDevInsRC,
1753 pRange->pfnReadCallbackRC,
1754 pRange->pfnWriteCallbackRC,
1755 pRange->pfnFillCallbackRC,
1756 pRange->pvUserRC);
1757 return 0;
1758}
1759
1760
1761/**
1762 * Display registered MMIO ranges to the log.
1763 *
1764 * @param pVM VM Handle.
1765 * @param pHlp The info helpers.
1766 * @param pszArgs Arguments, ignored.
1767 */
1768static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1769{
1770 NOREF(pszArgs);
1771 pHlp->pfnPrintf(pHlp,
1772 "MMIO ranges (pVM=%p)\n"
1773 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1774 pVM,
1775 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1776 sizeof(RTHCPTR) * 2, "pDevIns ",
1777 sizeof(RTHCPTR) * 2, "Read ",
1778 sizeof(RTHCPTR) * 2, "Write ",
1779 sizeof(RTHCPTR) * 2, "Fill ",
1780 sizeof(RTHCPTR) * 2, "pvUser ",
1781 "Description");
1782 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1783}
1784
1785
1786#ifdef VBOX_WITH_STATISTICS
1787/**
1788 * Tries to come up with the standard name for a port.
1789 *
1790 * @returns Pointer to readonly string if known.
1791 * @returns NULL if unknown port number.
1792 *
1793 * @param Port The port to name.
1794 */
1795static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1796{
1797 switch (Port)
1798 {
1799 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1800 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1801 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1802 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1803 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1804 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1805 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1806 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1807 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1808 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1809 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1810 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1811 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1812 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1813 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1814 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1815
1816 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1817 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1818 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1819 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1820 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1821 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1822 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1823 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1824 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1825 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1826 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1827 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1828 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1829 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1830 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1831 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1832 return "System Reserved";
1833
1834 case 0x60:
1835 case 0x64:
1836 return "Keyboard & Mouse";
1837
1838 case 0x378:
1839 case 0x379:
1840 case 0x37a:
1841 case 0x37b:
1842 case 0x37c:
1843 case 0x37d:
1844 case 0x37e:
1845 case 0x37f:
1846 case 0x3bc:
1847 case 0x3bd:
1848 case 0x3be:
1849 case 0x3bf:
1850 case 0x278:
1851 case 0x279:
1852 case 0x27a:
1853 case 0x27b:
1854 case 0x27c:
1855 case 0x27d:
1856 case 0x27e:
1857 case 0x27f:
1858 return "LPT1/2/3";
1859
1860 case 0x3f8:
1861 case 0x3f9:
1862 case 0x3fa:
1863 case 0x3fb:
1864 case 0x3fc:
1865 case 0x3fd:
1866 case 0x3fe:
1867 case 0x3ff:
1868 return "COM1";
1869
1870 case 0x2f8:
1871 case 0x2f9:
1872 case 0x2fa:
1873 case 0x2fb:
1874 case 0x2fc:
1875 case 0x2fd:
1876 case 0x2fe:
1877 case 0x2ff:
1878 return "COM2";
1879
1880 case 0x3e8:
1881 case 0x3e9:
1882 case 0x3ea:
1883 case 0x3eb:
1884 case 0x3ec:
1885 case 0x3ed:
1886 case 0x3ee:
1887 case 0x3ef:
1888 return "COM3";
1889
1890 case 0x2e8:
1891 case 0x2e9:
1892 case 0x2ea:
1893 case 0x2eb:
1894 case 0x2ec:
1895 case 0x2ed:
1896 case 0x2ee:
1897 case 0x2ef:
1898 return "COM4";
1899
1900 case 0x200:
1901 case 0x201:
1902 case 0x202:
1903 case 0x203:
1904 case 0x204:
1905 case 0x205:
1906 case 0x206:
1907 case 0x207:
1908 return "Joystick";
1909
1910 case 0x3f0:
1911 case 0x3f1:
1912 case 0x3f2:
1913 case 0x3f3:
1914 case 0x3f4:
1915 case 0x3f5:
1916 case 0x3f6:
1917 case 0x3f7:
1918 return "Floppy";
1919
1920 case 0x1f0:
1921 case 0x1f1:
1922 case 0x1f2:
1923 case 0x1f3:
1924 case 0x1f4:
1925 case 0x1f5:
1926 case 0x1f6:
1927 case 0x1f7:
1928 //case 0x3f6:
1929 //case 0x3f7:
1930 return "IDE 1st";
1931
1932 case 0x170:
1933 case 0x171:
1934 case 0x172:
1935 case 0x173:
1936 case 0x174:
1937 case 0x175:
1938 case 0x176:
1939 case 0x177:
1940 case 0x376:
1941 case 0x377:
1942 return "IDE 2nd";
1943
1944 case 0x1e0:
1945 case 0x1e1:
1946 case 0x1e2:
1947 case 0x1e3:
1948 case 0x1e4:
1949 case 0x1e5:
1950 case 0x1e6:
1951 case 0x1e7:
1952 case 0x3e6:
1953 case 0x3e7:
1954 return "IDE 3rd";
1955
1956 case 0x160:
1957 case 0x161:
1958 case 0x162:
1959 case 0x163:
1960 case 0x164:
1961 case 0x165:
1962 case 0x166:
1963 case 0x167:
1964 case 0x366:
1965 case 0x367:
1966 return "IDE 4th";
1967
1968 case 0x130: case 0x140: case 0x150:
1969 case 0x131: case 0x141: case 0x151:
1970 case 0x132: case 0x142: case 0x152:
1971 case 0x133: case 0x143: case 0x153:
1972 case 0x134: case 0x144: case 0x154:
1973 case 0x135: case 0x145: case 0x155:
1974 case 0x136: case 0x146: case 0x156:
1975 case 0x137: case 0x147: case 0x157:
1976 case 0x138: case 0x148: case 0x158:
1977 case 0x139: case 0x149: case 0x159:
1978 case 0x13a: case 0x14a: case 0x15a:
1979 case 0x13b: case 0x14b: case 0x15b:
1980 case 0x13c: case 0x14c: case 0x15c:
1981 case 0x13d: case 0x14d: case 0x15d:
1982 case 0x13e: case 0x14e: case 0x15e:
1983 case 0x13f: case 0x14f: case 0x15f:
1984 case 0x220: case 0x230:
1985 case 0x221: case 0x231:
1986 case 0x222: case 0x232:
1987 case 0x223: case 0x233:
1988 case 0x224: case 0x234:
1989 case 0x225: case 0x235:
1990 case 0x226: case 0x236:
1991 case 0x227: case 0x237:
1992 case 0x228: case 0x238:
1993 case 0x229: case 0x239:
1994 case 0x22a: case 0x23a:
1995 case 0x22b: case 0x23b:
1996 case 0x22c: case 0x23c:
1997 case 0x22d: case 0x23d:
1998 case 0x22e: case 0x23e:
1999 case 0x22f: case 0x23f:
2000 case 0x330: case 0x340: case 0x350:
2001 case 0x331: case 0x341: case 0x351:
2002 case 0x332: case 0x342: case 0x352:
2003 case 0x333: case 0x343: case 0x353:
2004 case 0x334: case 0x344: case 0x354:
2005 case 0x335: case 0x345: case 0x355:
2006 case 0x336: case 0x346: case 0x356:
2007 case 0x337: case 0x347: case 0x357:
2008 case 0x338: case 0x348: case 0x358:
2009 case 0x339: case 0x349: case 0x359:
2010 case 0x33a: case 0x34a: case 0x35a:
2011 case 0x33b: case 0x34b: case 0x35b:
2012 case 0x33c: case 0x34c: case 0x35c:
2013 case 0x33d: case 0x34d: case 0x35d:
2014 case 0x33e: case 0x34e: case 0x35e:
2015 case 0x33f: case 0x34f: case 0x35f:
2016 return "SCSI (typically)";
2017
2018 case 0x320:
2019 case 0x321:
2020 case 0x322:
2021 case 0x323:
2022 case 0x324:
2023 case 0x325:
2024 case 0x326:
2025 case 0x327:
2026 return "XT HD";
2027
2028 case 0x3b0:
2029 case 0x3b1:
2030 case 0x3b2:
2031 case 0x3b3:
2032 case 0x3b4:
2033 case 0x3b5:
2034 case 0x3b6:
2035 case 0x3b7:
2036 case 0x3b8:
2037 case 0x3b9:
2038 case 0x3ba:
2039 case 0x3bb:
2040 return "VGA";
2041
2042 case 0x3c0: case 0x3d0:
2043 case 0x3c1: case 0x3d1:
2044 case 0x3c2: case 0x3d2:
2045 case 0x3c3: case 0x3d3:
2046 case 0x3c4: case 0x3d4:
2047 case 0x3c5: case 0x3d5:
2048 case 0x3c6: case 0x3d6:
2049 case 0x3c7: case 0x3d7:
2050 case 0x3c8: case 0x3d8:
2051 case 0x3c9: case 0x3d9:
2052 case 0x3ca: case 0x3da:
2053 case 0x3cb: case 0x3db:
2054 case 0x3cc: case 0x3dc:
2055 case 0x3cd: case 0x3dd:
2056 case 0x3ce: case 0x3de:
2057 case 0x3cf: case 0x3df:
2058 return "VGA/EGA";
2059
2060 case 0x240: case 0x260: case 0x280:
2061 case 0x241: case 0x261: case 0x281:
2062 case 0x242: case 0x262: case 0x282:
2063 case 0x243: case 0x263: case 0x283:
2064 case 0x244: case 0x264: case 0x284:
2065 case 0x245: case 0x265: case 0x285:
2066 case 0x246: case 0x266: case 0x286:
2067 case 0x247: case 0x267: case 0x287:
2068 case 0x248: case 0x268: case 0x288:
2069 case 0x249: case 0x269: case 0x289:
2070 case 0x24a: case 0x26a: case 0x28a:
2071 case 0x24b: case 0x26b: case 0x28b:
2072 case 0x24c: case 0x26c: case 0x28c:
2073 case 0x24d: case 0x26d: case 0x28d:
2074 case 0x24e: case 0x26e: case 0x28e:
2075 case 0x24f: case 0x26f: case 0x28f:
2076 case 0x300:
2077 case 0x301:
2078 case 0x388:
2079 case 0x389:
2080 case 0x38a:
2081 case 0x38b:
2082 return "Sound Card (typically)";
2083
2084 default:
2085 return NULL;
2086 }
2087}
2088#endif /* VBOX_WITH_STATISTICS */
2089
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