VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 44397

Last change on this file since 44397 was 43387, checked in by vboxsync, 12 years ago

VMM: HM cleanup.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 81.6 KB
Line 
1/* $Id: IOM.cpp 43387 2012-09-21 09:40:25Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91
92/*******************************************************************************
93* Header Files *
94*******************************************************************************/
95#define LOG_GROUP LOG_GROUP_IOM
96#include <VBox/vmm/iom.h>
97#include <VBox/vmm/cpum.h>
98#include <VBox/vmm/pgm.h>
99#include <VBox/sup.h>
100#include <VBox/vmm/mm.h>
101#include <VBox/vmm/stam.h>
102#include <VBox/vmm/dbgf.h>
103#include <VBox/vmm/pdmapi.h>
104#include <VBox/vmm/pdmdev.h>
105#include "IOMInternal.h"
106#include <VBox/vmm/vm.h>
107
108#include <VBox/param.h>
109#include <iprt/assert.h>
110#include <iprt/alloc.h>
111#include <iprt/string.h>
112#include <VBox/log.h>
113#include <VBox/err.h>
114
115#include "IOMInline.h"
116
117
118/*******************************************************************************
119* Internal Functions *
120*******************************************************************************/
121static void iomR3FlushCache(PVM pVM);
122static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
123static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
124static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
125static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
126static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
127static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
128static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
129static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
130
131#ifdef VBOX_WITH_STATISTICS
132static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
133#endif
134
135
136/**
137 * Initializes the IOM.
138 *
139 * @returns VBox status code.
140 * @param pVM Pointer to the VM.
141 */
142VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
143{
144 LogFlow(("IOMR3Init:\n"));
145
146 /*
147 * Assert alignment and sizes.
148 */
149 AssertCompileMemberAlignment(VM, iom.s, 32);
150 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
151 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
152
153 /*
154 * Setup any fixed pointers and offsets.
155 */
156 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
157
158 /*
159 * Initialize the REM critical section.
160 */
161 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
162 AssertRCReturn(rc, rc);
163
164 /*
165 * Allocate the trees structure.
166 */
167 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
168 if (RT_SUCCESS(rc))
169 {
170 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
171 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
172 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
173 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
174
175 /*
176 * Info.
177 */
178 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
179 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
180
181 /*
182 * Statistics.
183 */
184 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
185 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
186 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
187 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
188 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
189 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
190 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
191 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
192 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
193 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
194 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
195 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
200#ifdef IOM_WITH_MOVS_SUPPORT
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
205#endif
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
207 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
208 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
209 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
210 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
211 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
212 }
213
214 /* Redundant, but just in case we change something in the future */
215 iomR3FlushCache(pVM);
216
217 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
218 return rc;
219}
220
221
222/**
223 * Flushes the IOM port & statistics lookup cache
224 *
225 * @param pVM The VM.
226 */
227static void iomR3FlushCache(PVM pVM)
228{
229 IOM_LOCK(pVM);
230
231 /*
232 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
233 */
234 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
235 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
236 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
237 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
238 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
239 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
240
241 pVM->iom.s.pRangeLastReadR3 = NULL;
242 pVM->iom.s.pRangeLastWriteR3 = NULL;
243 pVM->iom.s.pStatsLastReadR3 = NULL;
244 pVM->iom.s.pStatsLastWriteR3 = NULL;
245 pVM->iom.s.pMMIORangeLastR3 = NULL;
246 pVM->iom.s.pMMIOStatsLastR3 = NULL;
247
248 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
249 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
250 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
251 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
252 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
253 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
254
255 IOM_UNLOCK(pVM);
256}
257
258
259/**
260 * The VM is being reset.
261 *
262 * @param pVM Pointer to the VM.
263 */
264VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
265{
266 iomR3FlushCache(pVM);
267}
268
269
270/**
271 * Applies relocations to data and code managed by this
272 * component. This function will be called at init and
273 * whenever the VMM need to relocate it self inside the GC.
274 *
275 * The IOM will update the addresses used by the switcher.
276 *
277 * @param pVM The VM.
278 * @param offDelta Relocation delta relative to old location.
279 */
280VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
281{
282 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
283
284 /*
285 * Apply relocations to the GC callbacks.
286 */
287 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
288 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
289 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
290
291 if (pVM->iom.s.pfnMMIOHandlerRC)
292 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
293
294 /*
295 * Apply relocations to the cached GC handlers
296 */
297 if (pVM->iom.s.pRangeLastReadRC)
298 pVM->iom.s.pRangeLastReadRC += offDelta;
299 if (pVM->iom.s.pRangeLastWriteRC)
300 pVM->iom.s.pRangeLastWriteRC += offDelta;
301 if (pVM->iom.s.pStatsLastReadRC)
302 pVM->iom.s.pStatsLastReadRC += offDelta;
303 if (pVM->iom.s.pStatsLastWriteRC)
304 pVM->iom.s.pStatsLastWriteRC += offDelta;
305 if (pVM->iom.s.pMMIORangeLastRC)
306 pVM->iom.s.pMMIORangeLastRC += offDelta;
307 if (pVM->iom.s.pMMIOStatsLastRC)
308 pVM->iom.s.pMMIOStatsLastRC += offDelta;
309}
310
311
312/**
313 * Callback function for relocating a I/O port range.
314 *
315 * @returns 0 (continue enum)
316 * @param pNode Pointer to a IOMIOPORTRANGERC node.
317 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
318 * not certain the delta will fit in a void pointer for all possible configs.
319 */
320static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
321{
322 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
323 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
324
325 Assert(pRange->pDevIns);
326 pRange->pDevIns += offDelta;
327 if (pRange->pfnOutCallback)
328 pRange->pfnOutCallback += offDelta;
329 if (pRange->pfnInCallback)
330 pRange->pfnInCallback += offDelta;
331 if (pRange->pfnOutStrCallback)
332 pRange->pfnOutStrCallback += offDelta;
333 if (pRange->pfnInStrCallback)
334 pRange->pfnInStrCallback += offDelta;
335 if (pRange->pvUser > _64K)
336 pRange->pvUser += offDelta;
337 return 0;
338}
339
340
341/**
342 * Callback function for relocating a MMIO range.
343 *
344 * @returns 0 (continue enum)
345 * @param pNode Pointer to a IOMMMIORANGE node.
346 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
347 * not certain the delta will fit in a void pointer for all possible configs.
348 */
349static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
350{
351 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
352 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
353
354 if (pRange->pDevInsRC)
355 pRange->pDevInsRC += offDelta;
356 if (pRange->pfnWriteCallbackRC)
357 pRange->pfnWriteCallbackRC += offDelta;
358 if (pRange->pfnReadCallbackRC)
359 pRange->pfnReadCallbackRC += offDelta;
360 if (pRange->pfnFillCallbackRC)
361 pRange->pfnFillCallbackRC += offDelta;
362 if (pRange->pvUserRC > _64K)
363 pRange->pvUserRC += offDelta;
364
365 return 0;
366}
367
368
369/**
370 * Terminates the IOM.
371 *
372 * Termination means cleaning up and freeing all resources,
373 * the VM it self is at this point powered off or suspended.
374 *
375 * @returns VBox status code.
376 * @param pVM Pointer to the VM.
377 */
378VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
379{
380 /*
381 * IOM is not owning anything but automatically freed resources,
382 * so there's nothing to do here.
383 */
384 NOREF(pVM);
385 return VINF_SUCCESS;
386}
387
388#ifdef VBOX_WITH_STATISTICS
389
390/**
391 * Create the statistics node for an I/O port.
392 *
393 * @returns Pointer to new stats node.
394 *
395 * @param pVM Pointer to the VM.
396 * @param Port Port.
397 * @param pszDesc Description.
398 */
399PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
400{
401 Assert(IOMIsLockOwner(pVM));
402 /* check if it already exists. */
403 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
404 if (pPort)
405 return pPort;
406
407 /* allocate stats node. */
408 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
409 AssertRC(rc);
410 if (RT_SUCCESS(rc))
411 {
412 /* insert into the tree. */
413 pPort->Core.Key = Port;
414 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
415 {
416 /* put a name on common ports. */
417 if (!pszDesc)
418 pszDesc = iomR3IOPortGetStandardName(Port);
419
420 /* register the statistics counters. */
421 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
422 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
423 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
424 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
425 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
426 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
427
428 /* Profiling */
429 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
430 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
431 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
432 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
433
434 return pPort;
435 }
436 AssertMsgFailed(("what! Port=%d\n", Port));
437 MMHyperFree(pVM, pPort);
438 }
439 return NULL;
440}
441
442
443/**
444 * Create the statistics node for an MMIO address.
445 *
446 * @returns Pointer to new stats node.
447 *
448 * @param pVM Pointer to the VM.
449 * @param GCPhys The address.
450 * @param pszDesc Description.
451 */
452PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
453{
454 Assert(IOMIsLockOwner(pVM));
455#ifdef DEBUG_sandervl
456 AssertGCPhys32(GCPhys);
457#endif
458 /* check if it already exists. */
459 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
460 if (pStats)
461 return pStats;
462
463 /* allocate stats node. */
464 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
465 AssertRC(rc);
466 if (RT_SUCCESS(rc))
467 {
468 /* insert into the tree. */
469 pStats->Core.Key = GCPhys;
470 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
471 {
472 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
473 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
474 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
475 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
476 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
477 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
478 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
479
480 return pStats;
481 }
482 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
483 MMHyperFree(pVM, pStats);
484 }
485 return NULL;
486}
487
488#endif /* VBOX_WITH_STATISTICS */
489
490/**
491 * Registers a I/O port ring-3 handler.
492 *
493 * This API is called by PDM on behalf of a device. Devices must first register
494 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
495 * and IOMR3IOPortRegisterR0().
496 *
497 *
498 * @returns VBox status code.
499 *
500 * @param pVM Pointer to the VM.
501 * @param pDevIns PDM device instance owning the port range.
502 * @param PortStart First port number in the range.
503 * @param cPorts Number of ports to register.
504 * @param pvUser User argument for the callbacks.
505 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
506 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
507 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
508 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
509 * @param pszDesc Pointer to description string. This must not be freed.
510 */
511VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
512 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
513 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
514{
515 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
516 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
517
518 /*
519 * Validate input.
520 */
521 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
522 || (RTUINT)PortStart + cPorts > 0x10000)
523 {
524 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
525 return VERR_IOM_INVALID_IOPORT_RANGE;
526 }
527 if (!pfnOutCallback && !pfnInCallback)
528 {
529 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
530 return VERR_INVALID_PARAMETER;
531 }
532 if (!pfnOutCallback)
533 pfnOutCallback = iomR3IOPortDummyOut;
534 if (!pfnInCallback)
535 pfnInCallback = iomR3IOPortDummyIn;
536 if (!pfnOutStrCallback)
537 pfnOutStrCallback = iomR3IOPortDummyOutStr;
538 if (!pfnInStrCallback)
539 pfnInStrCallback = iomR3IOPortDummyInStr;
540
541 /* Flush the IO port lookup cache */
542 iomR3FlushCache(pVM);
543
544 /*
545 * Allocate new range record and initialize it.
546 */
547 PIOMIOPORTRANGER3 pRange;
548 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
549 if (RT_SUCCESS(rc))
550 {
551 pRange->Core.Key = PortStart;
552 pRange->Core.KeyLast = PortStart + (cPorts - 1);
553 pRange->Port = PortStart;
554 pRange->cPorts = cPorts;
555 pRange->pvUser = pvUser;
556 pRange->pDevIns = pDevIns;
557 pRange->pfnOutCallback = pfnOutCallback;
558 pRange->pfnInCallback = pfnInCallback;
559 pRange->pfnOutStrCallback = pfnOutStrCallback;
560 pRange->pfnInStrCallback = pfnInStrCallback;
561 pRange->pszDesc = pszDesc;
562
563 /*
564 * Try Insert it.
565 */
566 IOM_LOCK(pVM);
567 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
568 {
569#ifdef VBOX_WITH_STATISTICS
570 for (unsigned iPort = 0; iPort < cPorts; iPort++)
571 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
572#endif
573 IOM_UNLOCK(pVM);
574 return VINF_SUCCESS;
575 }
576 IOM_UNLOCK(pVM);
577
578 /* conflict. */
579 DBGFR3Info(pVM, "ioport", NULL, NULL);
580 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
581 MMHyperFree(pVM, pRange);
582 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
583 }
584
585 return rc;
586}
587
588
589/**
590 * Registers a I/O port RC handler.
591 *
592 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
593 * using IOMIOPortRegisterR3() before calling this function.
594 *
595 *
596 * @returns VBox status code.
597 *
598 * @param pVM Pointer to the VM.
599 * @param pDevIns PDM device instance owning the port range.
600 * @param PortStart First port number in the range.
601 * @param cPorts Number of ports to register.
602 * @param pvUser User argument for the callbacks.
603 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
604 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
605 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
606 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
607 * @param pszDesc Pointer to description string. This must not be freed.
608 */
609VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
610 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
611 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
612{
613 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
614 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
615
616 /*
617 * Validate input.
618 */
619 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
620 || (RTUINT)PortStart + cPorts > 0x10000)
621 {
622 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
623 return VERR_IOM_INVALID_IOPORT_RANGE;
624 }
625 RTIOPORT PortLast = PortStart + (cPorts - 1);
626 if (!pfnOutCallback && !pfnInCallback)
627 {
628 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
629 return VERR_INVALID_PARAMETER;
630 }
631
632 IOM_LOCK(pVM);
633
634 /*
635 * Validate that there are ring-3 ranges for the ports.
636 */
637 RTIOPORT Port = PortStart;
638 while (Port <= PortLast && Port >= PortStart)
639 {
640 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
641 if (!pRange)
642 {
643 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
644 IOM_UNLOCK(pVM);
645 return VERR_IOM_NO_R3_IOPORT_RANGE;
646 }
647#ifndef IOM_NO_PDMINS_CHECKS
648# ifndef IN_RC
649 if (pRange->pDevIns != pDevIns)
650# else
651 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
652# endif
653 {
654 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
655 IOM_UNLOCK(pVM);
656 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
657 }
658#endif
659 Port = pRange->Core.KeyLast + 1;
660 }
661
662 /* Flush the IO port lookup cache */
663 iomR3FlushCache(pVM);
664
665 /*
666 * Allocate new range record and initialize it.
667 */
668 PIOMIOPORTRANGERC pRange;
669 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
670 if (RT_SUCCESS(rc))
671 {
672 pRange->Core.Key = PortStart;
673 pRange->Core.KeyLast = PortLast;
674 pRange->Port = PortStart;
675 pRange->cPorts = cPorts;
676 pRange->pvUser = pvUser;
677 pRange->pfnOutCallback = pfnOutCallback;
678 pRange->pfnInCallback = pfnInCallback;
679 pRange->pfnOutStrCallback = pfnOutStrCallback;
680 pRange->pfnInStrCallback = pfnInStrCallback;
681 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
682 pRange->pszDesc = pszDesc;
683
684 /*
685 * Insert it.
686 */
687 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
688 {
689 IOM_UNLOCK(pVM);
690 return VINF_SUCCESS;
691 }
692
693 /* conflict. */
694 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
695 MMHyperFree(pVM, pRange);
696 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
697 }
698 IOM_UNLOCK(pVM);
699 return rc;
700}
701
702
703/**
704 * Registers a Port IO R0 handler.
705 *
706 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
707 * using IOMR3IOPortRegisterR3() before calling this function.
708 *
709 *
710 * @returns VBox status code.
711 *
712 * @param pVM Pointer to the VM.
713 * @param pDevIns PDM device instance owning the port range.
714 * @param PortStart First port number in the range.
715 * @param cPorts Number of ports to register.
716 * @param pvUser User argument for the callbacks.
717 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
718 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
719 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
720 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
721 * @param pszDesc Pointer to description string. This must not be freed.
722 */
723VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
724 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
725 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
726 const char *pszDesc)
727{
728 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
729 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
730
731 /*
732 * Validate input.
733 */
734 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
735 || (RTUINT)PortStart + cPorts > 0x10000)
736 {
737 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
738 return VERR_IOM_INVALID_IOPORT_RANGE;
739 }
740 RTIOPORT PortLast = PortStart + (cPorts - 1);
741 if (!pfnOutCallback && !pfnInCallback)
742 {
743 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
744 return VERR_INVALID_PARAMETER;
745 }
746
747 IOM_LOCK(pVM);
748 /*
749 * Validate that there are ring-3 ranges for the ports.
750 */
751 RTIOPORT Port = PortStart;
752 while (Port <= PortLast && Port >= PortStart)
753 {
754 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
755 if (!pRange)
756 {
757 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
758 IOM_UNLOCK(pVM);
759 return VERR_IOM_NO_R3_IOPORT_RANGE;
760 }
761#ifndef IOM_NO_PDMINS_CHECKS
762# ifndef IN_RC
763 if (pRange->pDevIns != pDevIns)
764# else
765 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
766# endif
767 {
768 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
769 IOM_UNLOCK(pVM);
770 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
771 }
772#endif
773 Port = pRange->Core.KeyLast + 1;
774 }
775
776 /* Flush the IO port lookup cache */
777 iomR3FlushCache(pVM);
778
779 /*
780 * Allocate new range record and initialize it.
781 */
782 PIOMIOPORTRANGER0 pRange;
783 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
784 if (RT_SUCCESS(rc))
785 {
786 pRange->Core.Key = PortStart;
787 pRange->Core.KeyLast = PortLast;
788 pRange->Port = PortStart;
789 pRange->cPorts = cPorts;
790 pRange->pvUser = pvUser;
791 pRange->pfnOutCallback = pfnOutCallback;
792 pRange->pfnInCallback = pfnInCallback;
793 pRange->pfnOutStrCallback = pfnOutStrCallback;
794 pRange->pfnInStrCallback = pfnInStrCallback;
795 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
796 pRange->pszDesc = pszDesc;
797
798 /*
799 * Insert it.
800 */
801 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
802 {
803 IOM_UNLOCK(pVM);
804 return VINF_SUCCESS;
805 }
806
807 /* conflict. */
808 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
809 MMHyperFree(pVM, pRange);
810 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
811 }
812 IOM_UNLOCK(pVM);
813 return rc;
814}
815
816
817/**
818 * Deregisters a I/O Port range.
819 *
820 * The specified range must be registered using IOMR3IOPortRegister previous to
821 * this call. The range does can be a smaller part of the range specified to
822 * IOMR3IOPortRegister, but it can never be larger.
823 *
824 * This function will remove GC, R0 and R3 context port handlers for this range.
825 *
826 * @returns VBox status code.
827 *
828 * @param pVM The virtual machine.
829 * @param pDevIns The device instance associated with the range.
830 * @param PortStart First port number in the range.
831 * @param cPorts Number of ports to remove starting at PortStart.
832 *
833 * @remark This function mainly for PCI PnP Config and will not do
834 * all the checks you might expect it to do.
835 */
836VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
837{
838 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
839
840 /*
841 * Validate input.
842 */
843 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
844 || (RTUINT)PortStart + cPorts > 0x10000)
845 {
846 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
847 return VERR_IOM_INVALID_IOPORT_RANGE;
848 }
849
850 IOM_LOCK(pVM);
851
852 /* Flush the IO port lookup cache */
853 iomR3FlushCache(pVM);
854
855 /*
856 * Check ownership.
857 */
858 RTIOPORT PortLast = PortStart + (cPorts - 1);
859 RTIOPORT Port = PortStart;
860 while (Port <= PortLast && Port >= PortStart)
861 {
862 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
863 if (pRange)
864 {
865 Assert(Port <= pRange->Core.KeyLast);
866#ifndef IOM_NO_PDMINS_CHECKS
867 if (pRange->pDevIns != pDevIns)
868 {
869 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
870 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
871 IOM_UNLOCK(pVM);
872 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
873 }
874#endif /* !IOM_NO_PDMINS_CHECKS */
875 Port = pRange->Core.KeyLast;
876 }
877 Port++;
878 }
879
880 /*
881 * Remove any RC ranges first.
882 */
883 int rc = VINF_SUCCESS;
884 Port = PortStart;
885 while (Port <= PortLast && Port >= PortStart)
886 {
887 /*
888 * Try find range.
889 */
890 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
891 if (pRange)
892 {
893 if ( pRange->Core.Key == Port
894 && pRange->Core.KeyLast <= PortLast)
895 {
896 /*
897 * Kick out the entire range.
898 */
899 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
900 Assert(pv == (void *)pRange); NOREF(pv);
901 Port += pRange->cPorts;
902 MMHyperFree(pVM, pRange);
903 }
904 else if (pRange->Core.Key == Port)
905 {
906 /*
907 * Cut of the head of the range, done.
908 */
909 pRange->cPorts -= Port - pRange->Port;
910 pRange->Core.Key = Port;
911 pRange->Port = Port;
912 break;
913 }
914 else if (pRange->Core.KeyLast <= PortLast)
915 {
916 /*
917 * Just cut of the tail.
918 */
919 unsigned c = pRange->Core.KeyLast - Port + 1;
920 pRange->Core.KeyLast -= c;
921 pRange->cPorts -= c;
922 Port += c;
923 }
924 else
925 {
926 /*
927 * Split the range, done.
928 */
929 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
930 /* create tail. */
931 PIOMIOPORTRANGERC pRangeNew;
932 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
933 if (RT_FAILURE(rc2))
934 {
935 IOM_UNLOCK(pVM);
936 return rc2;
937 }
938 *pRangeNew = *pRange;
939 pRangeNew->Core.Key = PortLast;
940 pRangeNew->Port = PortLast;
941 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
942
943 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
944
945 /* adjust head */
946 pRange->Core.KeyLast = Port - 1;
947 pRange->cPorts = Port - pRange->Port;
948
949 /* insert */
950 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
951 {
952 AssertMsgFailed(("This cannot happen!\n"));
953 MMHyperFree(pVM, pRangeNew);
954 rc = VERR_IOM_IOPORT_IPE_1;
955 }
956 break;
957 }
958 }
959 else /* next port */
960 Port++;
961 } /* for all ports - RC. */
962
963
964 /*
965 * Remove any R0 ranges.
966 */
967 Port = PortStart;
968 while (Port <= PortLast && Port >= PortStart)
969 {
970 /*
971 * Try find range.
972 */
973 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
974 if (pRange)
975 {
976 if ( pRange->Core.Key == Port
977 && pRange->Core.KeyLast <= PortLast)
978 {
979 /*
980 * Kick out the entire range.
981 */
982 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
983 Assert(pv == (void *)pRange); NOREF(pv);
984 Port += pRange->cPorts;
985 MMHyperFree(pVM, pRange);
986 }
987 else if (pRange->Core.Key == Port)
988 {
989 /*
990 * Cut of the head of the range, done.
991 */
992 pRange->cPorts -= Port - pRange->Port;
993 pRange->Core.Key = Port;
994 pRange->Port = Port;
995 break;
996 }
997 else if (pRange->Core.KeyLast <= PortLast)
998 {
999 /*
1000 * Just cut of the tail.
1001 */
1002 unsigned c = pRange->Core.KeyLast - Port + 1;
1003 pRange->Core.KeyLast -= c;
1004 pRange->cPorts -= c;
1005 Port += c;
1006 }
1007 else
1008 {
1009 /*
1010 * Split the range, done.
1011 */
1012 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1013 /* create tail. */
1014 PIOMIOPORTRANGER0 pRangeNew;
1015 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1016 if (RT_FAILURE(rc2))
1017 {
1018 IOM_UNLOCK(pVM);
1019 return rc2;
1020 }
1021 *pRangeNew = *pRange;
1022 pRangeNew->Core.Key = PortLast;
1023 pRangeNew->Port = PortLast;
1024 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1025
1026 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1027
1028 /* adjust head */
1029 pRange->Core.KeyLast = Port - 1;
1030 pRange->cPorts = Port - pRange->Port;
1031
1032 /* insert */
1033 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1034 {
1035 AssertMsgFailed(("This cannot happen!\n"));
1036 MMHyperFree(pVM, pRangeNew);
1037 rc = VERR_IOM_IOPORT_IPE_1;
1038 }
1039 break;
1040 }
1041 }
1042 else /* next port */
1043 Port++;
1044 } /* for all ports - R0. */
1045
1046 /*
1047 * And the same procedure for ring-3 ranges.
1048 */
1049 Port = PortStart;
1050 while (Port <= PortLast && Port >= PortStart)
1051 {
1052 /*
1053 * Try find range.
1054 */
1055 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1056 if (pRange)
1057 {
1058 if ( pRange->Core.Key == Port
1059 && pRange->Core.KeyLast <= PortLast)
1060 {
1061 /*
1062 * Kick out the entire range.
1063 */
1064 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1065 Assert(pv == (void *)pRange); NOREF(pv);
1066 Port += pRange->cPorts;
1067 MMHyperFree(pVM, pRange);
1068 }
1069 else if (pRange->Core.Key == Port)
1070 {
1071 /*
1072 * Cut of the head of the range, done.
1073 */
1074 pRange->cPorts -= Port - pRange->Port;
1075 pRange->Core.Key = Port;
1076 pRange->Port = Port;
1077 break;
1078 }
1079 else if (pRange->Core.KeyLast <= PortLast)
1080 {
1081 /*
1082 * Just cut of the tail.
1083 */
1084 unsigned c = pRange->Core.KeyLast - Port + 1;
1085 pRange->Core.KeyLast -= c;
1086 pRange->cPorts -= c;
1087 Port += c;
1088 }
1089 else
1090 {
1091 /*
1092 * Split the range, done.
1093 */
1094 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1095 /* create tail. */
1096 PIOMIOPORTRANGER3 pRangeNew;
1097 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1098 if (RT_FAILURE(rc2))
1099 {
1100 IOM_UNLOCK(pVM);
1101 return rc2;
1102 }
1103 *pRangeNew = *pRange;
1104 pRangeNew->Core.Key = PortLast;
1105 pRangeNew->Port = PortLast;
1106 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1107
1108 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1109
1110 /* adjust head */
1111 pRange->Core.KeyLast = Port - 1;
1112 pRange->cPorts = Port - pRange->Port;
1113
1114 /* insert */
1115 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1116 {
1117 AssertMsgFailed(("This cannot happen!\n"));
1118 MMHyperFree(pVM, pRangeNew);
1119 rc = VERR_IOM_IOPORT_IPE_1;
1120 }
1121 break;
1122 }
1123 }
1124 else /* next port */
1125 Port++;
1126 } /* for all ports - ring-3. */
1127
1128 /* done */
1129 IOM_UNLOCK(pVM);
1130 return rc;
1131}
1132
1133
1134/**
1135 * Dummy Port I/O Handler for IN operations.
1136 *
1137 * @returns VBox status code.
1138 *
1139 * @param pDevIns The device instance.
1140 * @param pvUser User argument.
1141 * @param Port Port number used for the IN operation.
1142 * @param pu32 Where to store the result.
1143 * @param cb Number of bytes read.
1144 */
1145static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1146{
1147 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1148 switch (cb)
1149 {
1150 case 1: *pu32 = 0xff; break;
1151 case 2: *pu32 = 0xffff; break;
1152 case 4: *pu32 = UINT32_C(0xffffffff); break;
1153 default:
1154 AssertReleaseMsgFailed(("cb=%d\n", cb));
1155 return VERR_IOM_IOPORT_IPE_2;
1156 }
1157 return VINF_SUCCESS;
1158}
1159
1160
1161/**
1162 * Dummy Port I/O Handler for string IN operations.
1163 *
1164 * @returns VBox status code.
1165 *
1166 * @param pDevIns The device instance.
1167 * @param pvUser User argument.
1168 * @param Port Port number used for the string IN operation.
1169 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1170 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1171 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1172 */
1173static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1174 PRTGCUINTREG pcTransfer, unsigned cb)
1175{
1176 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1177 return VINF_SUCCESS;
1178}
1179
1180
1181/**
1182 * Dummy Port I/O Handler for OUT operations.
1183 *
1184 * @returns VBox status code.
1185 *
1186 * @param pDevIns The device instance.
1187 * @param pvUser User argument.
1188 * @param Port Port number used for the OUT operation.
1189 * @param u32 The value to output.
1190 * @param cb The value size in bytes.
1191 */
1192static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1193{
1194 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1195 return VINF_SUCCESS;
1196}
1197
1198
1199/**
1200 * Dummy Port I/O Handler for string OUT operations.
1201 *
1202 * @returns VBox status code.
1203 *
1204 * @param pDevIns The device instance.
1205 * @param pvUser User argument.
1206 * @param Port Port number used for the string OUT operation.
1207 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1208 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1209 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1210 */
1211static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1212 PRTGCUINTREG pcTransfer, unsigned cb)
1213{
1214 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1215 return VINF_SUCCESS;
1216}
1217
1218
1219/**
1220 * Display a single I/O port ring-3 range.
1221 *
1222 * @returns 0
1223 * @param pNode Pointer to I/O port HC range.
1224 * @param pvUser Pointer to info output callback structure.
1225 */
1226static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1227{
1228 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1229 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1230 pHlp->pfnPrintf(pHlp,
1231 "%04x-%04x %p %p %p %p %s\n",
1232 pRange->Core.Key,
1233 pRange->Core.KeyLast,
1234 pRange->pDevIns,
1235 pRange->pfnInCallback,
1236 pRange->pfnOutCallback,
1237 pRange->pvUser,
1238 pRange->pszDesc);
1239 return 0;
1240}
1241
1242
1243/**
1244 * Display a single I/O port GC range.
1245 *
1246 * @returns 0
1247 * @param pNode Pointer to IOPORT GC range.
1248 * @param pvUser Pointer to info output callback structure.
1249 */
1250static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1251{
1252 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1253 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1254 pHlp->pfnPrintf(pHlp,
1255 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1256 pRange->Core.Key,
1257 pRange->Core.KeyLast,
1258 pRange->pDevIns,
1259 pRange->pfnInCallback,
1260 pRange->pfnOutCallback,
1261 pRange->pvUser,
1262 pRange->pszDesc);
1263 return 0;
1264}
1265
1266
1267/**
1268 * Display all registered I/O port ranges.
1269 *
1270 * @param pVM Pointer to the VM.
1271 * @param pHlp The info helpers.
1272 * @param pszArgs Arguments, ignored.
1273 */
1274static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1275{
1276 NOREF(pszArgs);
1277 pHlp->pfnPrintf(pHlp,
1278 "I/O Port R3 ranges (pVM=%p)\n"
1279 "Range %.*s %.*s %.*s %.*s Description\n",
1280 pVM,
1281 sizeof(RTHCPTR) * 2, "pDevIns ",
1282 sizeof(RTHCPTR) * 2, "In ",
1283 sizeof(RTHCPTR) * 2, "Out ",
1284 sizeof(RTHCPTR) * 2, "pvUser ");
1285 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1286
1287 pHlp->pfnPrintf(pHlp,
1288 "I/O Port R0 ranges (pVM=%p)\n"
1289 "Range %.*s %.*s %.*s %.*s Description\n",
1290 pVM,
1291 sizeof(RTHCPTR) * 2, "pDevIns ",
1292 sizeof(RTHCPTR) * 2, "In ",
1293 sizeof(RTHCPTR) * 2, "Out ",
1294 sizeof(RTHCPTR) * 2, "pvUser ");
1295 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1296
1297 pHlp->pfnPrintf(pHlp,
1298 "I/O Port GC ranges (pVM=%p)\n"
1299 "Range %.*s %.*s %.*s %.*s Description\n",
1300 pVM,
1301 sizeof(RTRCPTR) * 2, "pDevIns ",
1302 sizeof(RTRCPTR) * 2, "In ",
1303 sizeof(RTRCPTR) * 2, "Out ",
1304 sizeof(RTRCPTR) * 2, "pvUser ");
1305 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1306
1307 if (pVM->iom.s.pRangeLastReadRC)
1308 {
1309 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1310 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n",
1311 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1312 }
1313 if (pVM->iom.s.pStatsLastReadRC)
1314 {
1315 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1316 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n",
1317 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1318 }
1319
1320 if (pVM->iom.s.pRangeLastWriteRC)
1321 {
1322 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1323 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n",
1324 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1325 }
1326 if (pVM->iom.s.pStatsLastWriteRC)
1327 {
1328 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1329 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n",
1330 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1331 }
1332
1333 if (pVM->iom.s.pRangeLastReadR3)
1334 {
1335 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1336 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %p %s\n",
1337 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1338 }
1339 if (pVM->iom.s.pStatsLastReadR3)
1340 {
1341 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1342 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %p\n",
1343 pRange->Core.Key, pRange);
1344 }
1345
1346 if (pVM->iom.s.pRangeLastWriteR3)
1347 {
1348 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1349 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %p %s\n",
1350 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1351 }
1352 if (pVM->iom.s.pStatsLastWriteR3)
1353 {
1354 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1355 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %p\n",
1356 pRange->Core.Key, pRange);
1357 }
1358
1359 if (pVM->iom.s.pRangeLastReadR0)
1360 {
1361 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1362 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %p %s\n",
1363 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1364 }
1365 if (pVM->iom.s.pStatsLastReadR0)
1366 {
1367 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1368 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %p\n",
1369 pRange->Core.Key, pRange);
1370 }
1371
1372 if (pVM->iom.s.pRangeLastWriteR0)
1373 {
1374 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1375 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
1376 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1377 }
1378 if (pVM->iom.s.pStatsLastWriteR0)
1379 {
1380 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1381 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %p\n",
1382 pRange->Core.Key, pRange);
1383 }
1384}
1385
1386
1387/**
1388 * Registers a Memory Mapped I/O R3 handler.
1389 *
1390 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1391 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1392 *
1393 * @returns VBox status code.
1394 *
1395 * @param pVM Pointer to the VM.
1396 * @param pDevIns PDM device instance owning the MMIO range.
1397 * @param GCPhysStart First physical address in the range.
1398 * @param cbRange The size of the range (in bytes).
1399 * @param pvUser User argument for the callbacks.
1400 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1401 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1402 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1403 * @param pszDesc Pointer to description string. This must not be freed.
1404 */
1405VMMR3_INT_DECL(int)
1406IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1407 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1408 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1409{
1410 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1411 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1412 int rc;
1413
1414 /*
1415 * Validate input.
1416 */
1417 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1418 VERR_IOM_INVALID_MMIO_RANGE);
1419 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1420 || (fFlags & IOMMMIO_FLAGS_READ_MODE) == IOMMMIO_FLAGS_READ_MODE
1421 || (fFlags & IOMMMIO_FLAGS_WRITE_MODE) > IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING,
1422 ("%#x\n", fFlags),
1423 VERR_INVALID_PARAMETER);
1424
1425 /*
1426 * Resolve the GC/R0 handler addresses lazily because of init order.
1427 */
1428 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1429 {
1430 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1431 AssertLogRelRCReturn(rc, rc);
1432 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1433 AssertLogRelRCReturn(rc, rc);
1434 }
1435
1436 /*
1437 * Allocate new range record and initialize it.
1438 */
1439 PIOMMMIORANGE pRange;
1440 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1441 if (RT_SUCCESS(rc))
1442 {
1443 pRange->Core.Key = GCPhysStart;
1444 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1445 pRange->GCPhys = GCPhysStart;
1446 pRange->cb = cbRange;
1447 pRange->cRefs = 1; /* The tree reference. */
1448 pRange->pszDesc = pszDesc;
1449
1450 //pRange->pvUserR0 = NIL_RTR0PTR;
1451 //pRange->pDevInsR0 = NIL_RTR0PTR;
1452 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1453 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1454 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1455
1456 //pRange->pvUserRC = NIL_RTRCPTR;
1457 //pRange->pDevInsRC = NIL_RTRCPTR;
1458 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1459 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1460 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1461
1462 pRange->fFlags = fFlags;
1463
1464 pRange->pvUserR3 = pvUser;
1465 pRange->pDevInsR3 = pDevIns;
1466 pRange->pfnReadCallbackR3 = pfnReadCallback;
1467 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1468 pRange->pfnFillCallbackR3 = pfnFillCallback;
1469
1470 /*
1471 * Try register it with PGM and then insert it into the tree.
1472 */
1473 IOM_LOCK(pVM);
1474 iomR3FlushCache(pVM);
1475 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1476 IOMR3MMIOHandler, pRange,
1477 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1478 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1479 if (RT_SUCCESS(rc))
1480 {
1481 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1482 {
1483 IOM_UNLOCK(pVM);
1484 return VINF_SUCCESS;
1485 }
1486
1487 /* bail out */
1488 IOM_UNLOCK(pVM);
1489 DBGFR3Info(pVM, "mmio", NULL, NULL);
1490 AssertMsgFailed(("This cannot happen!\n"));
1491 rc = VERR_IOM_IOPORT_IPE_3;
1492 }
1493 else
1494 IOM_UNLOCK(pVM);
1495
1496 MMHyperFree(pVM, pRange);
1497 }
1498 if (pDevIns->iInstance > 0)
1499 MMR3HeapFree((void *)pszDesc);
1500 return rc;
1501}
1502
1503
1504/**
1505 * Registers a Memory Mapped I/O RC handler range.
1506 *
1507 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1508 * using IOMMMIORegisterR3() before calling this function.
1509 *
1510 *
1511 * @returns VBox status code.
1512 *
1513 * @param pVM Pointer to the VM.
1514 * @param pDevIns PDM device instance owning the MMIO range.
1515 * @param GCPhysStart First physical address in the range.
1516 * @param cbRange The size of the range (in bytes).
1517 * @param pvUser User argument for the callbacks.
1518 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1519 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1520 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1521 */
1522VMMR3_INT_DECL(int)
1523IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1524 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1525 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1526{
1527 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1528 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1529
1530 /*
1531 * Validate input.
1532 */
1533 if (!pfnWriteCallback && !pfnReadCallback)
1534 {
1535 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1536 return VERR_INVALID_PARAMETER;
1537 }
1538
1539 /*
1540 * Find the MMIO range and check that the input matches.
1541 */
1542 IOM_LOCK(pVM);
1543 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1544 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1545 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1546 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1547 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1548
1549 pRange->pvUserRC = pvUser;
1550 pRange->pfnReadCallbackRC = pfnReadCallback;
1551 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1552 pRange->pfnFillCallbackRC = pfnFillCallback;
1553 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1554 IOM_UNLOCK(pVM);
1555
1556 return VINF_SUCCESS;
1557}
1558
1559
1560/**
1561 * Registers a Memory Mapped I/O R0 handler range.
1562 *
1563 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1564 * using IOMMR3MIORegisterHC() before calling this function.
1565 *
1566 *
1567 * @returns VBox status code.
1568 *
1569 * @param pVM Pointer to the VM.
1570 * @param pDevIns PDM device instance owning the MMIO range.
1571 * @param GCPhysStart First physical address in the range.
1572 * @param cbRange The size of the range (in bytes).
1573 * @param pvUser User argument for the callbacks.
1574 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1575 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1576 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1577 */
1578VMMR3_INT_DECL(int)
1579IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1580 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1581 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1582 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1583{
1584 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1585 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1586
1587 /*
1588 * Validate input.
1589 */
1590 if (!pfnWriteCallback && !pfnReadCallback)
1591 {
1592 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1593 return VERR_INVALID_PARAMETER;
1594 }
1595
1596 /*
1597 * Find the MMIO range and check that the input matches.
1598 */
1599 IOM_LOCK(pVM);
1600 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1601 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1602 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1603 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1604 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1605
1606 pRange->pvUserR0 = pvUser;
1607 pRange->pfnReadCallbackR0 = pfnReadCallback;
1608 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1609 pRange->pfnFillCallbackR0 = pfnFillCallback;
1610 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1611 IOM_UNLOCK(pVM);
1612
1613 return VINF_SUCCESS;
1614}
1615
1616
1617/**
1618 * Deregisters a Memory Mapped I/O handler range.
1619 *
1620 * Registered GC, R0, and R3 ranges are affected.
1621 *
1622 * @returns VBox status code.
1623 *
1624 * @param pVM The virtual machine.
1625 * @param pDevIns Device instance which the MMIO region is registered.
1626 * @param GCPhysStart First physical address (GC) in the range.
1627 * @param cbRange Number of bytes to deregister.
1628 *
1629 * @remark This function mainly for PCI PnP Config and will not do
1630 * all the checks you might expect it to do.
1631 */
1632VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1633{
1634 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1635
1636 /*
1637 * Validate input.
1638 */
1639 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1640 if (GCPhysLast < GCPhysStart)
1641 {
1642 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1643 return VERR_IOM_INVALID_MMIO_RANGE;
1644 }
1645
1646 IOM_LOCK(pVM);
1647
1648 /*
1649 * Check ownership and such for the entire area.
1650 */
1651 RTGCPHYS GCPhys = GCPhysStart;
1652 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1653 {
1654 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
1655 if (!pRange)
1656 {
1657 IOM_UNLOCK(pVM);
1658 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1659 }
1660 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1661 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1662 IOM_UNLOCK(pVM),
1663 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1664 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1665 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1666 IOM_UNLOCK(pVM),
1667 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1668
1669 /* next */
1670 Assert(GCPhys <= pRange->Core.KeyLast);
1671 GCPhys = pRange->Core.KeyLast + 1;
1672 }
1673
1674 /*
1675 * Do the actual removing of the MMIO ranges.
1676 */
1677 GCPhys = GCPhysStart;
1678 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1679 {
1680 iomR3FlushCache(pVM);
1681
1682 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1683 Assert(pRange);
1684 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1685 IOM_UNLOCK(pVM); /** @todo r=bird: Why are we leaving the lock here? We don't leave it when registering the range above... */
1686
1687 /* remove it from PGM */
1688 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1689 AssertRC(rc);
1690
1691 IOM_LOCK(pVM);
1692
1693 /* advance and free. */
1694 GCPhys = pRange->Core.KeyLast + 1;
1695 if (pDevIns->iInstance > 0)
1696 {
1697 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1698 MMR3HeapFree(pvDesc);
1699 }
1700 iomMmioReleaseRange(pVM, pRange);
1701 }
1702
1703 IOM_UNLOCK(pVM);
1704 return VINF_SUCCESS;
1705}
1706
1707
1708/**
1709 * Display a single MMIO range.
1710 *
1711 * @returns 0
1712 * @param pNode Pointer to MMIO R3 range.
1713 * @param pvUser Pointer to info output callback structure.
1714 */
1715static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1716{
1717 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1718 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1719 pHlp->pfnPrintf(pHlp,
1720 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1721 pRange->Core.Key,
1722 pRange->Core.KeyLast,
1723 pRange->pDevInsR3,
1724 pRange->pfnReadCallbackR3,
1725 pRange->pfnWriteCallbackR3,
1726 pRange->pfnFillCallbackR3,
1727 pRange->pvUserR3,
1728 pRange->pszDesc);
1729 pHlp->pfnPrintf(pHlp,
1730 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1731 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1732 pRange->pDevInsR0,
1733 pRange->pfnReadCallbackR0,
1734 pRange->pfnWriteCallbackR0,
1735 pRange->pfnFillCallbackR0,
1736 pRange->pvUserR0);
1737 pHlp->pfnPrintf(pHlp,
1738 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1739 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1740 pRange->pDevInsRC,
1741 pRange->pfnReadCallbackRC,
1742 pRange->pfnWriteCallbackRC,
1743 pRange->pfnFillCallbackRC,
1744 pRange->pvUserRC);
1745 return 0;
1746}
1747
1748
1749/**
1750 * Display registered MMIO ranges to the log.
1751 *
1752 * @param pVM Pointer to the VM.
1753 * @param pHlp The info helpers.
1754 * @param pszArgs Arguments, ignored.
1755 */
1756static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1757{
1758 NOREF(pszArgs);
1759 pHlp->pfnPrintf(pHlp,
1760 "MMIO ranges (pVM=%p)\n"
1761 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1762 pVM,
1763 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1764 sizeof(RTHCPTR) * 2, "pDevIns ",
1765 sizeof(RTHCPTR) * 2, "Read ",
1766 sizeof(RTHCPTR) * 2, "Write ",
1767 sizeof(RTHCPTR) * 2, "Fill ",
1768 sizeof(RTHCPTR) * 2, "pvUser ",
1769 "Description");
1770 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1771}
1772
1773
1774#ifdef VBOX_WITH_STATISTICS
1775/**
1776 * Tries to come up with the standard name for a port.
1777 *
1778 * @returns Pointer to readonly string if known.
1779 * @returns NULL if unknown port number.
1780 *
1781 * @param Port The port to name.
1782 */
1783static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1784{
1785 switch (Port)
1786 {
1787 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1788 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1789 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1790 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1791 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1792 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1793 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1794 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1795 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1796 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1797 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1798 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1799 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1800 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1801 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1802 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1803
1804 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1805 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1806 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1807 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1808 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1809 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1810 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1811 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1812 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1813 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1814 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1815 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1816 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1817 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1818 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1819 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1820 return "System Reserved";
1821
1822 case 0x60:
1823 case 0x64:
1824 return "Keyboard & Mouse";
1825
1826 case 0x378:
1827 case 0x379:
1828 case 0x37a:
1829 case 0x37b:
1830 case 0x37c:
1831 case 0x37d:
1832 case 0x37e:
1833 case 0x37f:
1834 case 0x3bc:
1835 case 0x3bd:
1836 case 0x3be:
1837 case 0x3bf:
1838 case 0x278:
1839 case 0x279:
1840 case 0x27a:
1841 case 0x27b:
1842 case 0x27c:
1843 case 0x27d:
1844 case 0x27e:
1845 case 0x27f:
1846 return "LPT1/2/3";
1847
1848 case 0x3f8:
1849 case 0x3f9:
1850 case 0x3fa:
1851 case 0x3fb:
1852 case 0x3fc:
1853 case 0x3fd:
1854 case 0x3fe:
1855 case 0x3ff:
1856 return "COM1";
1857
1858 case 0x2f8:
1859 case 0x2f9:
1860 case 0x2fa:
1861 case 0x2fb:
1862 case 0x2fc:
1863 case 0x2fd:
1864 case 0x2fe:
1865 case 0x2ff:
1866 return "COM2";
1867
1868 case 0x3e8:
1869 case 0x3e9:
1870 case 0x3ea:
1871 case 0x3eb:
1872 case 0x3ec:
1873 case 0x3ed:
1874 case 0x3ee:
1875 case 0x3ef:
1876 return "COM3";
1877
1878 case 0x2e8:
1879 case 0x2e9:
1880 case 0x2ea:
1881 case 0x2eb:
1882 case 0x2ec:
1883 case 0x2ed:
1884 case 0x2ee:
1885 case 0x2ef:
1886 return "COM4";
1887
1888 case 0x200:
1889 case 0x201:
1890 case 0x202:
1891 case 0x203:
1892 case 0x204:
1893 case 0x205:
1894 case 0x206:
1895 case 0x207:
1896 return "Joystick";
1897
1898 case 0x3f0:
1899 case 0x3f1:
1900 case 0x3f2:
1901 case 0x3f3:
1902 case 0x3f4:
1903 case 0x3f5:
1904 case 0x3f6:
1905 case 0x3f7:
1906 return "Floppy";
1907
1908 case 0x1f0:
1909 case 0x1f1:
1910 case 0x1f2:
1911 case 0x1f3:
1912 case 0x1f4:
1913 case 0x1f5:
1914 case 0x1f6:
1915 case 0x1f7:
1916 //case 0x3f6:
1917 //case 0x3f7:
1918 return "IDE 1st";
1919
1920 case 0x170:
1921 case 0x171:
1922 case 0x172:
1923 case 0x173:
1924 case 0x174:
1925 case 0x175:
1926 case 0x176:
1927 case 0x177:
1928 case 0x376:
1929 case 0x377:
1930 return "IDE 2nd";
1931
1932 case 0x1e0:
1933 case 0x1e1:
1934 case 0x1e2:
1935 case 0x1e3:
1936 case 0x1e4:
1937 case 0x1e5:
1938 case 0x1e6:
1939 case 0x1e7:
1940 case 0x3e6:
1941 case 0x3e7:
1942 return "IDE 3rd";
1943
1944 case 0x160:
1945 case 0x161:
1946 case 0x162:
1947 case 0x163:
1948 case 0x164:
1949 case 0x165:
1950 case 0x166:
1951 case 0x167:
1952 case 0x366:
1953 case 0x367:
1954 return "IDE 4th";
1955
1956 case 0x130: case 0x140: case 0x150:
1957 case 0x131: case 0x141: case 0x151:
1958 case 0x132: case 0x142: case 0x152:
1959 case 0x133: case 0x143: case 0x153:
1960 case 0x134: case 0x144: case 0x154:
1961 case 0x135: case 0x145: case 0x155:
1962 case 0x136: case 0x146: case 0x156:
1963 case 0x137: case 0x147: case 0x157:
1964 case 0x138: case 0x148: case 0x158:
1965 case 0x139: case 0x149: case 0x159:
1966 case 0x13a: case 0x14a: case 0x15a:
1967 case 0x13b: case 0x14b: case 0x15b:
1968 case 0x13c: case 0x14c: case 0x15c:
1969 case 0x13d: case 0x14d: case 0x15d:
1970 case 0x13e: case 0x14e: case 0x15e:
1971 case 0x13f: case 0x14f: case 0x15f:
1972 case 0x220: case 0x230:
1973 case 0x221: case 0x231:
1974 case 0x222: case 0x232:
1975 case 0x223: case 0x233:
1976 case 0x224: case 0x234:
1977 case 0x225: case 0x235:
1978 case 0x226: case 0x236:
1979 case 0x227: case 0x237:
1980 case 0x228: case 0x238:
1981 case 0x229: case 0x239:
1982 case 0x22a: case 0x23a:
1983 case 0x22b: case 0x23b:
1984 case 0x22c: case 0x23c:
1985 case 0x22d: case 0x23d:
1986 case 0x22e: case 0x23e:
1987 case 0x22f: case 0x23f:
1988 case 0x330: case 0x340: case 0x350:
1989 case 0x331: case 0x341: case 0x351:
1990 case 0x332: case 0x342: case 0x352:
1991 case 0x333: case 0x343: case 0x353:
1992 case 0x334: case 0x344: case 0x354:
1993 case 0x335: case 0x345: case 0x355:
1994 case 0x336: case 0x346: case 0x356:
1995 case 0x337: case 0x347: case 0x357:
1996 case 0x338: case 0x348: case 0x358:
1997 case 0x339: case 0x349: case 0x359:
1998 case 0x33a: case 0x34a: case 0x35a:
1999 case 0x33b: case 0x34b: case 0x35b:
2000 case 0x33c: case 0x34c: case 0x35c:
2001 case 0x33d: case 0x34d: case 0x35d:
2002 case 0x33e: case 0x34e: case 0x35e:
2003 case 0x33f: case 0x34f: case 0x35f:
2004 return "SCSI (typically)";
2005
2006 case 0x320:
2007 case 0x321:
2008 case 0x322:
2009 case 0x323:
2010 case 0x324:
2011 case 0x325:
2012 case 0x326:
2013 case 0x327:
2014 return "XT HD";
2015
2016 case 0x3b0:
2017 case 0x3b1:
2018 case 0x3b2:
2019 case 0x3b3:
2020 case 0x3b4:
2021 case 0x3b5:
2022 case 0x3b6:
2023 case 0x3b7:
2024 case 0x3b8:
2025 case 0x3b9:
2026 case 0x3ba:
2027 case 0x3bb:
2028 return "VGA";
2029
2030 case 0x3c0: case 0x3d0:
2031 case 0x3c1: case 0x3d1:
2032 case 0x3c2: case 0x3d2:
2033 case 0x3c3: case 0x3d3:
2034 case 0x3c4: case 0x3d4:
2035 case 0x3c5: case 0x3d5:
2036 case 0x3c6: case 0x3d6:
2037 case 0x3c7: case 0x3d7:
2038 case 0x3c8: case 0x3d8:
2039 case 0x3c9: case 0x3d9:
2040 case 0x3ca: case 0x3da:
2041 case 0x3cb: case 0x3db:
2042 case 0x3cc: case 0x3dc:
2043 case 0x3cd: case 0x3dd:
2044 case 0x3ce: case 0x3de:
2045 case 0x3cf: case 0x3df:
2046 return "VGA/EGA";
2047
2048 case 0x240: case 0x260: case 0x280:
2049 case 0x241: case 0x261: case 0x281:
2050 case 0x242: case 0x262: case 0x282:
2051 case 0x243: case 0x263: case 0x283:
2052 case 0x244: case 0x264: case 0x284:
2053 case 0x245: case 0x265: case 0x285:
2054 case 0x246: case 0x266: case 0x286:
2055 case 0x247: case 0x267: case 0x287:
2056 case 0x248: case 0x268: case 0x288:
2057 case 0x249: case 0x269: case 0x289:
2058 case 0x24a: case 0x26a: case 0x28a:
2059 case 0x24b: case 0x26b: case 0x28b:
2060 case 0x24c: case 0x26c: case 0x28c:
2061 case 0x24d: case 0x26d: case 0x28d:
2062 case 0x24e: case 0x26e: case 0x28e:
2063 case 0x24f: case 0x26f: case 0x28f:
2064 case 0x300:
2065 case 0x301:
2066 case 0x388:
2067 case 0x389:
2068 case 0x38a:
2069 case 0x38b:
2070 return "Sound Card (typically)";
2071
2072 default:
2073 return NULL;
2074 }
2075}
2076#endif /* VBOX_WITH_STATISTICS */
2077
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette