VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 44850

Last change on this file since 44850 was 44850, checked in by vboxsync, 12 years ago

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1/* $Id: IOM.cpp 44850 2013-02-27 20:22:20Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91/** @todo MMIO - simplifying the device end.
92 * - Add a return status for doing DBGFSTOP on access where there are no known
93 * registers.
94 * -
95 *
96 * */
97
98
99/*******************************************************************************
100* Header Files *
101*******************************************************************************/
102#define LOG_GROUP LOG_GROUP_IOM
103#include <VBox/vmm/iom.h>
104#include <VBox/vmm/cpum.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/sup.h>
107#include <VBox/vmm/mm.h>
108#include <VBox/vmm/stam.h>
109#include <VBox/vmm/dbgf.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/pdmdev.h>
112#include "IOMInternal.h"
113#include <VBox/vmm/vm.h>
114
115#include <VBox/param.h>
116#include <iprt/assert.h>
117#include <iprt/alloc.h>
118#include <iprt/string.h>
119#include <VBox/log.h>
120#include <VBox/err.h>
121
122#include "IOMInline.h"
123
124
125/*******************************************************************************
126* Internal Functions *
127*******************************************************************************/
128static void iomR3FlushCache(PVM pVM);
129static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
130static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
131static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
132static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
133static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
134static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
135static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
136static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
137
138#ifdef VBOX_WITH_STATISTICS
139static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
140#endif
141
142
143/**
144 * Initializes the IOM.
145 *
146 * @returns VBox status code.
147 * @param pVM Pointer to the VM.
148 */
149VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
150{
151 LogFlow(("IOMR3Init:\n"));
152
153 /*
154 * Assert alignment and sizes.
155 */
156 AssertCompileMemberAlignment(VM, iom.s, 32);
157 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
158 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
159
160 /*
161 * Setup any fixed pointers and offsets.
162 */
163 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
164
165 /*
166 * Initialize the REM critical section.
167 */
168 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
169 AssertRCReturn(rc, rc);
170
171 /*
172 * Allocate the trees structure.
173 */
174 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
175 if (RT_SUCCESS(rc))
176 {
177 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
178 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
179 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
180 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
181
182 /*
183 * Info.
184 */
185 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
186 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
187
188 /*
189 * Statistics.
190 */
191 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
192 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
193 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
194 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
195 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
205 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
207#ifdef IOM_WITH_MOVS_SUPPORT
208 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
209 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
210 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
211 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
212#endif
213 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
214 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
215 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
216 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
217 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
218 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
219 }
220
221 /* Redundant, but just in case we change something in the future */
222 iomR3FlushCache(pVM);
223
224 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
225 return rc;
226}
227
228
229/**
230 * Flushes the IOM port & statistics lookup cache
231 *
232 * @param pVM The VM.
233 */
234static void iomR3FlushCache(PVM pVM)
235{
236 IOM_LOCK(pVM);
237
238 /*
239 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
240 */
241 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
242 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
243 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
244 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
245 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
246 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
247
248 pVM->iom.s.pRangeLastReadR3 = NULL;
249 pVM->iom.s.pRangeLastWriteR3 = NULL;
250 pVM->iom.s.pStatsLastReadR3 = NULL;
251 pVM->iom.s.pStatsLastWriteR3 = NULL;
252 pVM->iom.s.pMMIORangeLastR3 = NULL;
253 pVM->iom.s.pMMIOStatsLastR3 = NULL;
254
255 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
256 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
257 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
258 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
259 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
260 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
261
262 IOM_UNLOCK(pVM);
263}
264
265
266/**
267 * The VM is being reset.
268 *
269 * @param pVM Pointer to the VM.
270 */
271VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
272{
273 iomR3FlushCache(pVM);
274}
275
276
277/**
278 * Applies relocations to data and code managed by this
279 * component. This function will be called at init and
280 * whenever the VMM need to relocate it self inside the GC.
281 *
282 * The IOM will update the addresses used by the switcher.
283 *
284 * @param pVM The VM.
285 * @param offDelta Relocation delta relative to old location.
286 */
287VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
288{
289 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
290
291 /*
292 * Apply relocations to the GC callbacks.
293 */
294 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
295 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
296 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
297
298 if (pVM->iom.s.pfnMMIOHandlerRC)
299 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
300
301 /*
302 * Apply relocations to the cached GC handlers
303 */
304 if (pVM->iom.s.pRangeLastReadRC)
305 pVM->iom.s.pRangeLastReadRC += offDelta;
306 if (pVM->iom.s.pRangeLastWriteRC)
307 pVM->iom.s.pRangeLastWriteRC += offDelta;
308 if (pVM->iom.s.pStatsLastReadRC)
309 pVM->iom.s.pStatsLastReadRC += offDelta;
310 if (pVM->iom.s.pStatsLastWriteRC)
311 pVM->iom.s.pStatsLastWriteRC += offDelta;
312 if (pVM->iom.s.pMMIORangeLastRC)
313 pVM->iom.s.pMMIORangeLastRC += offDelta;
314 if (pVM->iom.s.pMMIOStatsLastRC)
315 pVM->iom.s.pMMIOStatsLastRC += offDelta;
316}
317
318
319/**
320 * Callback function for relocating a I/O port range.
321 *
322 * @returns 0 (continue enum)
323 * @param pNode Pointer to a IOMIOPORTRANGERC node.
324 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
325 * not certain the delta will fit in a void pointer for all possible configs.
326 */
327static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
328{
329 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
330 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
331
332 Assert(pRange->pDevIns);
333 pRange->pDevIns += offDelta;
334 if (pRange->pfnOutCallback)
335 pRange->pfnOutCallback += offDelta;
336 if (pRange->pfnInCallback)
337 pRange->pfnInCallback += offDelta;
338 if (pRange->pfnOutStrCallback)
339 pRange->pfnOutStrCallback += offDelta;
340 if (pRange->pfnInStrCallback)
341 pRange->pfnInStrCallback += offDelta;
342 if (pRange->pvUser > _64K)
343 pRange->pvUser += offDelta;
344 return 0;
345}
346
347
348/**
349 * Callback function for relocating a MMIO range.
350 *
351 * @returns 0 (continue enum)
352 * @param pNode Pointer to a IOMMMIORANGE node.
353 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
354 * not certain the delta will fit in a void pointer for all possible configs.
355 */
356static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
357{
358 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
359 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
360
361 if (pRange->pDevInsRC)
362 pRange->pDevInsRC += offDelta;
363 if (pRange->pfnWriteCallbackRC)
364 pRange->pfnWriteCallbackRC += offDelta;
365 if (pRange->pfnReadCallbackRC)
366 pRange->pfnReadCallbackRC += offDelta;
367 if (pRange->pfnFillCallbackRC)
368 pRange->pfnFillCallbackRC += offDelta;
369 if (pRange->pvUserRC > _64K)
370 pRange->pvUserRC += offDelta;
371
372 return 0;
373}
374
375
376/**
377 * Terminates the IOM.
378 *
379 * Termination means cleaning up and freeing all resources,
380 * the VM it self is at this point powered off or suspended.
381 *
382 * @returns VBox status code.
383 * @param pVM Pointer to the VM.
384 */
385VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
386{
387 /*
388 * IOM is not owning anything but automatically freed resources,
389 * so there's nothing to do here.
390 */
391 NOREF(pVM);
392 return VINF_SUCCESS;
393}
394
395#ifdef VBOX_WITH_STATISTICS
396
397/**
398 * Create the statistics node for an I/O port.
399 *
400 * @returns Pointer to new stats node.
401 *
402 * @param pVM Pointer to the VM.
403 * @param Port Port.
404 * @param pszDesc Description.
405 */
406PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
407{
408 Assert(IOMIsLockOwner(pVM));
409 /* check if it already exists. */
410 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
411 if (pPort)
412 return pPort;
413
414 /* allocate stats node. */
415 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
416 AssertRC(rc);
417 if (RT_SUCCESS(rc))
418 {
419 /* insert into the tree. */
420 pPort->Core.Key = Port;
421 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
422 {
423 /* put a name on common ports. */
424 if (!pszDesc)
425 pszDesc = iomR3IOPortGetStandardName(Port);
426
427 /* register the statistics counters. */
428 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
429 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
430 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
431 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
432 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
433 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
434
435 /* Profiling */
436 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
437 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
438 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
439 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
440
441 return pPort;
442 }
443 AssertMsgFailed(("what! Port=%d\n", Port));
444 MMHyperFree(pVM, pPort);
445 }
446 return NULL;
447}
448
449
450/**
451 * Create the statistics node for an MMIO address.
452 *
453 * @returns Pointer to new stats node.
454 *
455 * @param pVM Pointer to the VM.
456 * @param GCPhys The address.
457 * @param pszDesc Description.
458 */
459PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
460{
461 Assert(IOMIsLockOwner(pVM));
462#ifdef DEBUG_sandervl
463 AssertGCPhys32(GCPhys);
464#endif
465 /* check if it already exists. */
466 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
467 if (pStats)
468 return pStats;
469
470 /* allocate stats node. */
471 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
472 AssertRC(rc);
473 if (RT_SUCCESS(rc))
474 {
475 /* insert into the tree. */
476 pStats->Core.Key = GCPhys;
477 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
478 {
479 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
480 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
481 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
482 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
483 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
484 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
485 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
486
487 return pStats;
488 }
489 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
490 MMHyperFree(pVM, pStats);
491 }
492 return NULL;
493}
494
495#endif /* VBOX_WITH_STATISTICS */
496
497/**
498 * Registers a I/O port ring-3 handler.
499 *
500 * This API is called by PDM on behalf of a device. Devices must first register
501 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
502 * and IOMR3IOPortRegisterR0().
503 *
504 *
505 * @returns VBox status code.
506 *
507 * @param pVM Pointer to the VM.
508 * @param pDevIns PDM device instance owning the port range.
509 * @param PortStart First port number in the range.
510 * @param cPorts Number of ports to register.
511 * @param pvUser User argument for the callbacks.
512 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
513 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
514 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
515 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
516 * @param pszDesc Pointer to description string. This must not be freed.
517 */
518VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
519 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
520 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
521{
522 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
523 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
524
525 /*
526 * Validate input.
527 */
528 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
529 || (RTUINT)PortStart + cPorts > 0x10000)
530 {
531 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
532 return VERR_IOM_INVALID_IOPORT_RANGE;
533 }
534 if (!pfnOutCallback && !pfnInCallback)
535 {
536 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
537 return VERR_INVALID_PARAMETER;
538 }
539 if (!pfnOutCallback)
540 pfnOutCallback = iomR3IOPortDummyOut;
541 if (!pfnInCallback)
542 pfnInCallback = iomR3IOPortDummyIn;
543 if (!pfnOutStrCallback)
544 pfnOutStrCallback = iomR3IOPortDummyOutStr;
545 if (!pfnInStrCallback)
546 pfnInStrCallback = iomR3IOPortDummyInStr;
547
548 /* Flush the IO port lookup cache */
549 iomR3FlushCache(pVM);
550
551 /*
552 * Allocate new range record and initialize it.
553 */
554 PIOMIOPORTRANGER3 pRange;
555 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
556 if (RT_SUCCESS(rc))
557 {
558 pRange->Core.Key = PortStart;
559 pRange->Core.KeyLast = PortStart + (cPorts - 1);
560 pRange->Port = PortStart;
561 pRange->cPorts = cPorts;
562 pRange->pvUser = pvUser;
563 pRange->pDevIns = pDevIns;
564 pRange->pfnOutCallback = pfnOutCallback;
565 pRange->pfnInCallback = pfnInCallback;
566 pRange->pfnOutStrCallback = pfnOutStrCallback;
567 pRange->pfnInStrCallback = pfnInStrCallback;
568 pRange->pszDesc = pszDesc;
569
570 /*
571 * Try Insert it.
572 */
573 IOM_LOCK(pVM);
574 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
575 {
576#ifdef VBOX_WITH_STATISTICS
577 for (unsigned iPort = 0; iPort < cPorts; iPort++)
578 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
579#endif
580 IOM_UNLOCK(pVM);
581 return VINF_SUCCESS;
582 }
583 IOM_UNLOCK(pVM);
584
585 /* conflict. */
586 DBGFR3Info(pVM->pUVM, "ioport", NULL, NULL);
587 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
588 MMHyperFree(pVM, pRange);
589 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
590 }
591
592 return rc;
593}
594
595
596/**
597 * Registers a I/O port RC handler.
598 *
599 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
600 * using IOMIOPortRegisterR3() before calling this function.
601 *
602 *
603 * @returns VBox status code.
604 *
605 * @param pVM Pointer to the VM.
606 * @param pDevIns PDM device instance owning the port range.
607 * @param PortStart First port number in the range.
608 * @param cPorts Number of ports to register.
609 * @param pvUser User argument for the callbacks.
610 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
611 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
612 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
613 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
614 * @param pszDesc Pointer to description string. This must not be freed.
615 */
616VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
617 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
618 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
619{
620 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
621 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
622
623 /*
624 * Validate input.
625 */
626 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
627 || (RTUINT)PortStart + cPorts > 0x10000)
628 {
629 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
630 return VERR_IOM_INVALID_IOPORT_RANGE;
631 }
632 RTIOPORT PortLast = PortStart + (cPorts - 1);
633 if (!pfnOutCallback && !pfnInCallback)
634 {
635 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
636 return VERR_INVALID_PARAMETER;
637 }
638
639 IOM_LOCK(pVM);
640
641 /*
642 * Validate that there are ring-3 ranges for the ports.
643 */
644 RTIOPORT Port = PortStart;
645 while (Port <= PortLast && Port >= PortStart)
646 {
647 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
648 if (!pRange)
649 {
650 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
651 IOM_UNLOCK(pVM);
652 return VERR_IOM_NO_R3_IOPORT_RANGE;
653 }
654#ifndef IOM_NO_PDMINS_CHECKS
655# ifndef IN_RC
656 if (pRange->pDevIns != pDevIns)
657# else
658 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
659# endif
660 {
661 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
662 IOM_UNLOCK(pVM);
663 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
664 }
665#endif
666 Port = pRange->Core.KeyLast + 1;
667 }
668
669 /* Flush the IO port lookup cache */
670 iomR3FlushCache(pVM);
671
672 /*
673 * Allocate new range record and initialize it.
674 */
675 PIOMIOPORTRANGERC pRange;
676 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
677 if (RT_SUCCESS(rc))
678 {
679 pRange->Core.Key = PortStart;
680 pRange->Core.KeyLast = PortLast;
681 pRange->Port = PortStart;
682 pRange->cPorts = cPorts;
683 pRange->pvUser = pvUser;
684 pRange->pfnOutCallback = pfnOutCallback;
685 pRange->pfnInCallback = pfnInCallback;
686 pRange->pfnOutStrCallback = pfnOutStrCallback;
687 pRange->pfnInStrCallback = pfnInStrCallback;
688 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
689 pRange->pszDesc = pszDesc;
690
691 /*
692 * Insert it.
693 */
694 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
695 {
696 IOM_UNLOCK(pVM);
697 return VINF_SUCCESS;
698 }
699
700 /* conflict. */
701 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
702 MMHyperFree(pVM, pRange);
703 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
704 }
705 IOM_UNLOCK(pVM);
706 return rc;
707}
708
709
710/**
711 * Registers a Port IO R0 handler.
712 *
713 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
714 * using IOMR3IOPortRegisterR3() before calling this function.
715 *
716 *
717 * @returns VBox status code.
718 *
719 * @param pVM Pointer to the VM.
720 * @param pDevIns PDM device instance owning the port range.
721 * @param PortStart First port number in the range.
722 * @param cPorts Number of ports to register.
723 * @param pvUser User argument for the callbacks.
724 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
725 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
726 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
727 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
728 * @param pszDesc Pointer to description string. This must not be freed.
729 */
730VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
731 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
732 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
733 const char *pszDesc)
734{
735 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
736 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
737
738 /*
739 * Validate input.
740 */
741 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
742 || (RTUINT)PortStart + cPorts > 0x10000)
743 {
744 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
745 return VERR_IOM_INVALID_IOPORT_RANGE;
746 }
747 RTIOPORT PortLast = PortStart + (cPorts - 1);
748 if (!pfnOutCallback && !pfnInCallback)
749 {
750 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
751 return VERR_INVALID_PARAMETER;
752 }
753
754 IOM_LOCK(pVM);
755 /*
756 * Validate that there are ring-3 ranges for the ports.
757 */
758 RTIOPORT Port = PortStart;
759 while (Port <= PortLast && Port >= PortStart)
760 {
761 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
762 if (!pRange)
763 {
764 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
765 IOM_UNLOCK(pVM);
766 return VERR_IOM_NO_R3_IOPORT_RANGE;
767 }
768#ifndef IOM_NO_PDMINS_CHECKS
769# ifndef IN_RC
770 if (pRange->pDevIns != pDevIns)
771# else
772 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
773# endif
774 {
775 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
776 IOM_UNLOCK(pVM);
777 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
778 }
779#endif
780 Port = pRange->Core.KeyLast + 1;
781 }
782
783 /* Flush the IO port lookup cache */
784 iomR3FlushCache(pVM);
785
786 /*
787 * Allocate new range record and initialize it.
788 */
789 PIOMIOPORTRANGER0 pRange;
790 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
791 if (RT_SUCCESS(rc))
792 {
793 pRange->Core.Key = PortStart;
794 pRange->Core.KeyLast = PortLast;
795 pRange->Port = PortStart;
796 pRange->cPorts = cPorts;
797 pRange->pvUser = pvUser;
798 pRange->pfnOutCallback = pfnOutCallback;
799 pRange->pfnInCallback = pfnInCallback;
800 pRange->pfnOutStrCallback = pfnOutStrCallback;
801 pRange->pfnInStrCallback = pfnInStrCallback;
802 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
803 pRange->pszDesc = pszDesc;
804
805 /*
806 * Insert it.
807 */
808 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
809 {
810 IOM_UNLOCK(pVM);
811 return VINF_SUCCESS;
812 }
813
814 /* conflict. */
815 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
816 MMHyperFree(pVM, pRange);
817 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
818 }
819 IOM_UNLOCK(pVM);
820 return rc;
821}
822
823
824/**
825 * Deregisters a I/O Port range.
826 *
827 * The specified range must be registered using IOMR3IOPortRegister previous to
828 * this call. The range does can be a smaller part of the range specified to
829 * IOMR3IOPortRegister, but it can never be larger.
830 *
831 * This function will remove GC, R0 and R3 context port handlers for this range.
832 *
833 * @returns VBox status code.
834 *
835 * @param pVM The virtual machine.
836 * @param pDevIns The device instance associated with the range.
837 * @param PortStart First port number in the range.
838 * @param cPorts Number of ports to remove starting at PortStart.
839 *
840 * @remark This function mainly for PCI PnP Config and will not do
841 * all the checks you might expect it to do.
842 */
843VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
844{
845 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
846
847 /*
848 * Validate input.
849 */
850 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
851 || (RTUINT)PortStart + cPorts > 0x10000)
852 {
853 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
854 return VERR_IOM_INVALID_IOPORT_RANGE;
855 }
856
857 IOM_LOCK(pVM);
858
859 /* Flush the IO port lookup cache */
860 iomR3FlushCache(pVM);
861
862 /*
863 * Check ownership.
864 */
865 RTIOPORT PortLast = PortStart + (cPorts - 1);
866 RTIOPORT Port = PortStart;
867 while (Port <= PortLast && Port >= PortStart)
868 {
869 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
870 if (pRange)
871 {
872 Assert(Port <= pRange->Core.KeyLast);
873#ifndef IOM_NO_PDMINS_CHECKS
874 if (pRange->pDevIns != pDevIns)
875 {
876 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
877 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
878 IOM_UNLOCK(pVM);
879 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
880 }
881#endif /* !IOM_NO_PDMINS_CHECKS */
882 Port = pRange->Core.KeyLast;
883 }
884 Port++;
885 }
886
887 /*
888 * Remove any RC ranges first.
889 */
890 int rc = VINF_SUCCESS;
891 Port = PortStart;
892 while (Port <= PortLast && Port >= PortStart)
893 {
894 /*
895 * Try find range.
896 */
897 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
898 if (pRange)
899 {
900 if ( pRange->Core.Key == Port
901 && pRange->Core.KeyLast <= PortLast)
902 {
903 /*
904 * Kick out the entire range.
905 */
906 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
907 Assert(pv == (void *)pRange); NOREF(pv);
908 Port += pRange->cPorts;
909 MMHyperFree(pVM, pRange);
910 }
911 else if (pRange->Core.Key == Port)
912 {
913 /*
914 * Cut of the head of the range, done.
915 */
916 pRange->cPorts -= Port - pRange->Port;
917 pRange->Core.Key = Port;
918 pRange->Port = Port;
919 break;
920 }
921 else if (pRange->Core.KeyLast <= PortLast)
922 {
923 /*
924 * Just cut of the tail.
925 */
926 unsigned c = pRange->Core.KeyLast - Port + 1;
927 pRange->Core.KeyLast -= c;
928 pRange->cPorts -= c;
929 Port += c;
930 }
931 else
932 {
933 /*
934 * Split the range, done.
935 */
936 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
937 /* create tail. */
938 PIOMIOPORTRANGERC pRangeNew;
939 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
940 if (RT_FAILURE(rc2))
941 {
942 IOM_UNLOCK(pVM);
943 return rc2;
944 }
945 *pRangeNew = *pRange;
946 pRangeNew->Core.Key = PortLast;
947 pRangeNew->Port = PortLast;
948 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
949
950 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
951
952 /* adjust head */
953 pRange->Core.KeyLast = Port - 1;
954 pRange->cPorts = Port - pRange->Port;
955
956 /* insert */
957 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
958 {
959 AssertMsgFailed(("This cannot happen!\n"));
960 MMHyperFree(pVM, pRangeNew);
961 rc = VERR_IOM_IOPORT_IPE_1;
962 }
963 break;
964 }
965 }
966 else /* next port */
967 Port++;
968 } /* for all ports - RC. */
969
970
971 /*
972 * Remove any R0 ranges.
973 */
974 Port = PortStart;
975 while (Port <= PortLast && Port >= PortStart)
976 {
977 /*
978 * Try find range.
979 */
980 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
981 if (pRange)
982 {
983 if ( pRange->Core.Key == Port
984 && pRange->Core.KeyLast <= PortLast)
985 {
986 /*
987 * Kick out the entire range.
988 */
989 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
990 Assert(pv == (void *)pRange); NOREF(pv);
991 Port += pRange->cPorts;
992 MMHyperFree(pVM, pRange);
993 }
994 else if (pRange->Core.Key == Port)
995 {
996 /*
997 * Cut of the head of the range, done.
998 */
999 pRange->cPorts -= Port - pRange->Port;
1000 pRange->Core.Key = Port;
1001 pRange->Port = Port;
1002 break;
1003 }
1004 else if (pRange->Core.KeyLast <= PortLast)
1005 {
1006 /*
1007 * Just cut of the tail.
1008 */
1009 unsigned c = pRange->Core.KeyLast - Port + 1;
1010 pRange->Core.KeyLast -= c;
1011 pRange->cPorts -= c;
1012 Port += c;
1013 }
1014 else
1015 {
1016 /*
1017 * Split the range, done.
1018 */
1019 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1020 /* create tail. */
1021 PIOMIOPORTRANGER0 pRangeNew;
1022 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1023 if (RT_FAILURE(rc2))
1024 {
1025 IOM_UNLOCK(pVM);
1026 return rc2;
1027 }
1028 *pRangeNew = *pRange;
1029 pRangeNew->Core.Key = PortLast;
1030 pRangeNew->Port = PortLast;
1031 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1032
1033 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1034
1035 /* adjust head */
1036 pRange->Core.KeyLast = Port - 1;
1037 pRange->cPorts = Port - pRange->Port;
1038
1039 /* insert */
1040 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1041 {
1042 AssertMsgFailed(("This cannot happen!\n"));
1043 MMHyperFree(pVM, pRangeNew);
1044 rc = VERR_IOM_IOPORT_IPE_1;
1045 }
1046 break;
1047 }
1048 }
1049 else /* next port */
1050 Port++;
1051 } /* for all ports - R0. */
1052
1053 /*
1054 * And the same procedure for ring-3 ranges.
1055 */
1056 Port = PortStart;
1057 while (Port <= PortLast && Port >= PortStart)
1058 {
1059 /*
1060 * Try find range.
1061 */
1062 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1063 if (pRange)
1064 {
1065 if ( pRange->Core.Key == Port
1066 && pRange->Core.KeyLast <= PortLast)
1067 {
1068 /*
1069 * Kick out the entire range.
1070 */
1071 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1072 Assert(pv == (void *)pRange); NOREF(pv);
1073 Port += pRange->cPorts;
1074 MMHyperFree(pVM, pRange);
1075 }
1076 else if (pRange->Core.Key == Port)
1077 {
1078 /*
1079 * Cut of the head of the range, done.
1080 */
1081 pRange->cPorts -= Port - pRange->Port;
1082 pRange->Core.Key = Port;
1083 pRange->Port = Port;
1084 break;
1085 }
1086 else if (pRange->Core.KeyLast <= PortLast)
1087 {
1088 /*
1089 * Just cut of the tail.
1090 */
1091 unsigned c = pRange->Core.KeyLast - Port + 1;
1092 pRange->Core.KeyLast -= c;
1093 pRange->cPorts -= c;
1094 Port += c;
1095 }
1096 else
1097 {
1098 /*
1099 * Split the range, done.
1100 */
1101 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1102 /* create tail. */
1103 PIOMIOPORTRANGER3 pRangeNew;
1104 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1105 if (RT_FAILURE(rc2))
1106 {
1107 IOM_UNLOCK(pVM);
1108 return rc2;
1109 }
1110 *pRangeNew = *pRange;
1111 pRangeNew->Core.Key = PortLast;
1112 pRangeNew->Port = PortLast;
1113 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1114
1115 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1116
1117 /* adjust head */
1118 pRange->Core.KeyLast = Port - 1;
1119 pRange->cPorts = Port - pRange->Port;
1120
1121 /* insert */
1122 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1123 {
1124 AssertMsgFailed(("This cannot happen!\n"));
1125 MMHyperFree(pVM, pRangeNew);
1126 rc = VERR_IOM_IOPORT_IPE_1;
1127 }
1128 break;
1129 }
1130 }
1131 else /* next port */
1132 Port++;
1133 } /* for all ports - ring-3. */
1134
1135 /* done */
1136 IOM_UNLOCK(pVM);
1137 return rc;
1138}
1139
1140
1141/**
1142 * Dummy Port I/O Handler for IN operations.
1143 *
1144 * @returns VBox status code.
1145 *
1146 * @param pDevIns The device instance.
1147 * @param pvUser User argument.
1148 * @param Port Port number used for the IN operation.
1149 * @param pu32 Where to store the result.
1150 * @param cb Number of bytes read.
1151 */
1152static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1153{
1154 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1155 switch (cb)
1156 {
1157 case 1: *pu32 = 0xff; break;
1158 case 2: *pu32 = 0xffff; break;
1159 case 4: *pu32 = UINT32_C(0xffffffff); break;
1160 default:
1161 AssertReleaseMsgFailed(("cb=%d\n", cb));
1162 return VERR_IOM_IOPORT_IPE_2;
1163 }
1164 return VINF_SUCCESS;
1165}
1166
1167
1168/**
1169 * Dummy Port I/O Handler for string IN operations.
1170 *
1171 * @returns VBox status code.
1172 *
1173 * @param pDevIns The device instance.
1174 * @param pvUser User argument.
1175 * @param Port Port number used for the string IN operation.
1176 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1177 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1178 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1179 */
1180static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1181 PRTGCUINTREG pcTransfer, unsigned cb)
1182{
1183 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1184 return VINF_SUCCESS;
1185}
1186
1187
1188/**
1189 * Dummy Port I/O Handler for OUT operations.
1190 *
1191 * @returns VBox status code.
1192 *
1193 * @param pDevIns The device instance.
1194 * @param pvUser User argument.
1195 * @param Port Port number used for the OUT operation.
1196 * @param u32 The value to output.
1197 * @param cb The value size in bytes.
1198 */
1199static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1200{
1201 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1202 return VINF_SUCCESS;
1203}
1204
1205
1206/**
1207 * Dummy Port I/O Handler for string OUT operations.
1208 *
1209 * @returns VBox status code.
1210 *
1211 * @param pDevIns The device instance.
1212 * @param pvUser User argument.
1213 * @param Port Port number used for the string OUT operation.
1214 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1215 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1216 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1217 */
1218static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1219 PRTGCUINTREG pcTransfer, unsigned cb)
1220{
1221 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1222 return VINF_SUCCESS;
1223}
1224
1225
1226/**
1227 * Display a single I/O port ring-3 range.
1228 *
1229 * @returns 0
1230 * @param pNode Pointer to I/O port HC range.
1231 * @param pvUser Pointer to info output callback structure.
1232 */
1233static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1234{
1235 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1236 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1237 pHlp->pfnPrintf(pHlp,
1238 "%04x-%04x %p %p %p %p %s\n",
1239 pRange->Core.Key,
1240 pRange->Core.KeyLast,
1241 pRange->pDevIns,
1242 pRange->pfnInCallback,
1243 pRange->pfnOutCallback,
1244 pRange->pvUser,
1245 pRange->pszDesc);
1246 return 0;
1247}
1248
1249
1250/**
1251 * Display a single I/O port GC range.
1252 *
1253 * @returns 0
1254 * @param pNode Pointer to IOPORT GC range.
1255 * @param pvUser Pointer to info output callback structure.
1256 */
1257static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1258{
1259 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1260 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1261 pHlp->pfnPrintf(pHlp,
1262 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1263 pRange->Core.Key,
1264 pRange->Core.KeyLast,
1265 pRange->pDevIns,
1266 pRange->pfnInCallback,
1267 pRange->pfnOutCallback,
1268 pRange->pvUser,
1269 pRange->pszDesc);
1270 return 0;
1271}
1272
1273
1274/**
1275 * Display all registered I/O port ranges.
1276 *
1277 * @param pVM Pointer to the VM.
1278 * @param pHlp The info helpers.
1279 * @param pszArgs Arguments, ignored.
1280 */
1281static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1282{
1283 NOREF(pszArgs);
1284 pHlp->pfnPrintf(pHlp,
1285 "I/O Port R3 ranges (pVM=%p)\n"
1286 "Range %.*s %.*s %.*s %.*s Description\n",
1287 pVM,
1288 sizeof(RTHCPTR) * 2, "pDevIns ",
1289 sizeof(RTHCPTR) * 2, "In ",
1290 sizeof(RTHCPTR) * 2, "Out ",
1291 sizeof(RTHCPTR) * 2, "pvUser ");
1292 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1293
1294 pHlp->pfnPrintf(pHlp,
1295 "I/O Port R0 ranges (pVM=%p)\n"
1296 "Range %.*s %.*s %.*s %.*s Description\n",
1297 pVM,
1298 sizeof(RTHCPTR) * 2, "pDevIns ",
1299 sizeof(RTHCPTR) * 2, "In ",
1300 sizeof(RTHCPTR) * 2, "Out ",
1301 sizeof(RTHCPTR) * 2, "pvUser ");
1302 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1303
1304 pHlp->pfnPrintf(pHlp,
1305 "I/O Port GC ranges (pVM=%p)\n"
1306 "Range %.*s %.*s %.*s %.*s Description\n",
1307 pVM,
1308 sizeof(RTRCPTR) * 2, "pDevIns ",
1309 sizeof(RTRCPTR) * 2, "In ",
1310 sizeof(RTRCPTR) * 2, "Out ",
1311 sizeof(RTRCPTR) * 2, "pvUser ");
1312 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1313
1314 if (pVM->iom.s.pRangeLastReadRC)
1315 {
1316 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1317 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n",
1318 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1319 }
1320 if (pVM->iom.s.pStatsLastReadRC)
1321 {
1322 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1323 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n",
1324 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1325 }
1326
1327 if (pVM->iom.s.pRangeLastWriteRC)
1328 {
1329 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1330 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n",
1331 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1332 }
1333 if (pVM->iom.s.pStatsLastWriteRC)
1334 {
1335 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1336 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n",
1337 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1338 }
1339
1340 if (pVM->iom.s.pRangeLastReadR3)
1341 {
1342 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1343 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %p %s\n",
1344 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1345 }
1346 if (pVM->iom.s.pStatsLastReadR3)
1347 {
1348 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1349 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %p\n",
1350 pRange->Core.Key, pRange);
1351 }
1352
1353 if (pVM->iom.s.pRangeLastWriteR3)
1354 {
1355 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1356 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %p %s\n",
1357 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1358 }
1359 if (pVM->iom.s.pStatsLastWriteR3)
1360 {
1361 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1362 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %p\n",
1363 pRange->Core.Key, pRange);
1364 }
1365
1366 if (pVM->iom.s.pRangeLastReadR0)
1367 {
1368 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1369 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %p %s\n",
1370 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1371 }
1372 if (pVM->iom.s.pStatsLastReadR0)
1373 {
1374 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1375 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %p\n",
1376 pRange->Core.Key, pRange);
1377 }
1378
1379 if (pVM->iom.s.pRangeLastWriteR0)
1380 {
1381 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1382 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
1383 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1384 }
1385 if (pVM->iom.s.pStatsLastWriteR0)
1386 {
1387 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1388 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %p\n",
1389 pRange->Core.Key, pRange);
1390 }
1391}
1392
1393
1394/**
1395 * Registers a Memory Mapped I/O R3 handler.
1396 *
1397 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1398 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1399 *
1400 * @returns VBox status code.
1401 *
1402 * @param pVM Pointer to the VM.
1403 * @param pDevIns PDM device instance owning the MMIO range.
1404 * @param GCPhysStart First physical address in the range.
1405 * @param cbRange The size of the range (in bytes).
1406 * @param pvUser User argument for the callbacks.
1407 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1408 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1409 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1410 * @param pszDesc Pointer to description string. This must not be freed.
1411 */
1412VMMR3_INT_DECL(int)
1413IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1414 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1415 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1416{
1417 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1418 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1419 int rc;
1420
1421 /*
1422 * Validate input.
1423 */
1424 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1425 VERR_IOM_INVALID_MMIO_RANGE);
1426 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1427 && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
1428 && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
1429 ("%#x\n", fFlags),
1430 VERR_INVALID_PARAMETER);
1431
1432 /*
1433 * Resolve the GC/R0 handler addresses lazily because of init order.
1434 */
1435 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1436 {
1437 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1438 AssertLogRelRCReturn(rc, rc);
1439 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1440 AssertLogRelRCReturn(rc, rc);
1441 }
1442
1443 /*
1444 * Allocate new range record and initialize it.
1445 */
1446 PIOMMMIORANGE pRange;
1447 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1448 if (RT_SUCCESS(rc))
1449 {
1450 pRange->Core.Key = GCPhysStart;
1451 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1452 pRange->GCPhys = GCPhysStart;
1453 pRange->cb = cbRange;
1454 pRange->cRefs = 1; /* The tree reference. */
1455 pRange->pszDesc = pszDesc;
1456
1457 //pRange->pvUserR0 = NIL_RTR0PTR;
1458 //pRange->pDevInsR0 = NIL_RTR0PTR;
1459 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1460 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1461 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1462
1463 //pRange->pvUserRC = NIL_RTRCPTR;
1464 //pRange->pDevInsRC = NIL_RTRCPTR;
1465 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1466 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1467 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1468
1469 pRange->fFlags = fFlags;
1470
1471 pRange->pvUserR3 = pvUser;
1472 pRange->pDevInsR3 = pDevIns;
1473 pRange->pfnReadCallbackR3 = pfnReadCallback;
1474 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1475 pRange->pfnFillCallbackR3 = pfnFillCallback;
1476
1477 /*
1478 * Try register it with PGM and then insert it into the tree.
1479 */
1480 IOM_LOCK(pVM);
1481 iomR3FlushCache(pVM);
1482 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1483 IOMR3MMIOHandler, pRange,
1484 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1485 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1486 if (RT_SUCCESS(rc))
1487 {
1488 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1489 {
1490 IOM_UNLOCK(pVM);
1491 return VINF_SUCCESS;
1492 }
1493
1494 /* bail out */
1495 IOM_UNLOCK(pVM);
1496 DBGFR3Info(pVM->pUVM, "mmio", NULL, NULL);
1497 AssertMsgFailed(("This cannot happen!\n"));
1498 rc = VERR_IOM_IOPORT_IPE_3;
1499 }
1500 else
1501 IOM_UNLOCK(pVM);
1502
1503 MMHyperFree(pVM, pRange);
1504 }
1505 if (pDevIns->iInstance > 0)
1506 MMR3HeapFree((void *)pszDesc);
1507 return rc;
1508}
1509
1510
1511/**
1512 * Registers a Memory Mapped I/O RC handler range.
1513 *
1514 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1515 * using IOMMMIORegisterR3() before calling this function.
1516 *
1517 *
1518 * @returns VBox status code.
1519 *
1520 * @param pVM Pointer to the VM.
1521 * @param pDevIns PDM device instance owning the MMIO range.
1522 * @param GCPhysStart First physical address in the range.
1523 * @param cbRange The size of the range (in bytes).
1524 * @param pvUser User argument for the callbacks.
1525 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1526 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1527 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1528 */
1529VMMR3_INT_DECL(int)
1530IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1531 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1532 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1533{
1534 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1535 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1536
1537 /*
1538 * Validate input.
1539 */
1540 if (!pfnWriteCallback && !pfnReadCallback)
1541 {
1542 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1543 return VERR_INVALID_PARAMETER;
1544 }
1545
1546 /*
1547 * Find the MMIO range and check that the input matches.
1548 */
1549 IOM_LOCK(pVM);
1550 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1551 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1552 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1553 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1554 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1555
1556 pRange->pvUserRC = pvUser;
1557 pRange->pfnReadCallbackRC = pfnReadCallback;
1558 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1559 pRange->pfnFillCallbackRC = pfnFillCallback;
1560 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1561 IOM_UNLOCK(pVM);
1562
1563 return VINF_SUCCESS;
1564}
1565
1566
1567/**
1568 * Registers a Memory Mapped I/O R0 handler range.
1569 *
1570 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1571 * using IOMMR3MIORegisterHC() before calling this function.
1572 *
1573 *
1574 * @returns VBox status code.
1575 *
1576 * @param pVM Pointer to the VM.
1577 * @param pDevIns PDM device instance owning the MMIO range.
1578 * @param GCPhysStart First physical address in the range.
1579 * @param cbRange The size of the range (in bytes).
1580 * @param pvUser User argument for the callbacks.
1581 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1582 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1583 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1584 */
1585VMMR3_INT_DECL(int)
1586IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1587 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1588 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1589 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1590{
1591 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1592 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1593
1594 /*
1595 * Validate input.
1596 */
1597 if (!pfnWriteCallback && !pfnReadCallback)
1598 {
1599 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1600 return VERR_INVALID_PARAMETER;
1601 }
1602
1603 /*
1604 * Find the MMIO range and check that the input matches.
1605 */
1606 IOM_LOCK(pVM);
1607 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1608 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1609 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1610 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1611 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1612
1613 pRange->pvUserR0 = pvUser;
1614 pRange->pfnReadCallbackR0 = pfnReadCallback;
1615 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1616 pRange->pfnFillCallbackR0 = pfnFillCallback;
1617 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1618 IOM_UNLOCK(pVM);
1619
1620 return VINF_SUCCESS;
1621}
1622
1623
1624/**
1625 * Deregisters a Memory Mapped I/O handler range.
1626 *
1627 * Registered GC, R0, and R3 ranges are affected.
1628 *
1629 * @returns VBox status code.
1630 *
1631 * @param pVM The virtual machine.
1632 * @param pDevIns Device instance which the MMIO region is registered.
1633 * @param GCPhysStart First physical address (GC) in the range.
1634 * @param cbRange Number of bytes to deregister.
1635 *
1636 * @remark This function mainly for PCI PnP Config and will not do
1637 * all the checks you might expect it to do.
1638 */
1639VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1640{
1641 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1642
1643 /*
1644 * Validate input.
1645 */
1646 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1647 if (GCPhysLast < GCPhysStart)
1648 {
1649 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1650 return VERR_IOM_INVALID_MMIO_RANGE;
1651 }
1652
1653 IOM_LOCK(pVM);
1654
1655 /*
1656 * Check ownership and such for the entire area.
1657 */
1658 RTGCPHYS GCPhys = GCPhysStart;
1659 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1660 {
1661 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
1662 if (!pRange)
1663 {
1664 IOM_UNLOCK(pVM);
1665 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1666 }
1667 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1668 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1669 IOM_UNLOCK(pVM),
1670 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1671 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1672 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1673 IOM_UNLOCK(pVM),
1674 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1675
1676 /* next */
1677 Assert(GCPhys <= pRange->Core.KeyLast);
1678 GCPhys = pRange->Core.KeyLast + 1;
1679 }
1680
1681 /*
1682 * Do the actual removing of the MMIO ranges.
1683 */
1684 GCPhys = GCPhysStart;
1685 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1686 {
1687 iomR3FlushCache(pVM);
1688
1689 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1690 Assert(pRange);
1691 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1692 IOM_UNLOCK(pVM); /** @todo r=bird: Why are we leaving the lock here? We don't leave it when registering the range above... */
1693
1694 /* remove it from PGM */
1695 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1696 AssertRC(rc);
1697
1698 IOM_LOCK(pVM);
1699
1700 /* advance and free. */
1701 GCPhys = pRange->Core.KeyLast + 1;
1702 if (pDevIns->iInstance > 0)
1703 {
1704 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1705 MMR3HeapFree(pvDesc);
1706 }
1707 iomMmioReleaseRange(pVM, pRange);
1708 }
1709
1710 IOM_UNLOCK(pVM);
1711 return VINF_SUCCESS;
1712}
1713
1714
1715/**
1716 * Display a single MMIO range.
1717 *
1718 * @returns 0
1719 * @param pNode Pointer to MMIO R3 range.
1720 * @param pvUser Pointer to info output callback structure.
1721 */
1722static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1723{
1724 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1725 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1726 pHlp->pfnPrintf(pHlp,
1727 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1728 pRange->Core.Key,
1729 pRange->Core.KeyLast,
1730 pRange->pDevInsR3,
1731 pRange->pfnReadCallbackR3,
1732 pRange->pfnWriteCallbackR3,
1733 pRange->pfnFillCallbackR3,
1734 pRange->pvUserR3,
1735 pRange->pszDesc);
1736 pHlp->pfnPrintf(pHlp,
1737 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1738 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1739 pRange->pDevInsR0,
1740 pRange->pfnReadCallbackR0,
1741 pRange->pfnWriteCallbackR0,
1742 pRange->pfnFillCallbackR0,
1743 pRange->pvUserR0);
1744 pHlp->pfnPrintf(pHlp,
1745 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1746 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1747 pRange->pDevInsRC,
1748 pRange->pfnReadCallbackRC,
1749 pRange->pfnWriteCallbackRC,
1750 pRange->pfnFillCallbackRC,
1751 pRange->pvUserRC);
1752 return 0;
1753}
1754
1755
1756/**
1757 * Display registered MMIO ranges to the log.
1758 *
1759 * @param pVM Pointer to the VM.
1760 * @param pHlp The info helpers.
1761 * @param pszArgs Arguments, ignored.
1762 */
1763static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1764{
1765 NOREF(pszArgs);
1766 pHlp->pfnPrintf(pHlp,
1767 "MMIO ranges (pVM=%p)\n"
1768 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1769 pVM,
1770 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1771 sizeof(RTHCPTR) * 2, "pDevIns ",
1772 sizeof(RTHCPTR) * 2, "Read ",
1773 sizeof(RTHCPTR) * 2, "Write ",
1774 sizeof(RTHCPTR) * 2, "Fill ",
1775 sizeof(RTHCPTR) * 2, "pvUser ",
1776 "Description");
1777 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1778}
1779
1780
1781#ifdef VBOX_WITH_STATISTICS
1782/**
1783 * Tries to come up with the standard name for a port.
1784 *
1785 * @returns Pointer to readonly string if known.
1786 * @returns NULL if unknown port number.
1787 *
1788 * @param Port The port to name.
1789 */
1790static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1791{
1792 switch (Port)
1793 {
1794 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1795 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1796 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1797 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1798 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1799 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1800 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1801 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1802 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1803 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1804 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1805 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1806 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1807 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1808 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1809 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1810
1811 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1812 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1813 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1814 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1815 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1816 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1817 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1818 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1819 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1820 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1821 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1822 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1823 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1824 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1825 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1826 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1827 return "System Reserved";
1828
1829 case 0x60:
1830 case 0x64:
1831 return "Keyboard & Mouse";
1832
1833 case 0x378:
1834 case 0x379:
1835 case 0x37a:
1836 case 0x37b:
1837 case 0x37c:
1838 case 0x37d:
1839 case 0x37e:
1840 case 0x37f:
1841 case 0x3bc:
1842 case 0x3bd:
1843 case 0x3be:
1844 case 0x3bf:
1845 case 0x278:
1846 case 0x279:
1847 case 0x27a:
1848 case 0x27b:
1849 case 0x27c:
1850 case 0x27d:
1851 case 0x27e:
1852 case 0x27f:
1853 return "LPT1/2/3";
1854
1855 case 0x3f8:
1856 case 0x3f9:
1857 case 0x3fa:
1858 case 0x3fb:
1859 case 0x3fc:
1860 case 0x3fd:
1861 case 0x3fe:
1862 case 0x3ff:
1863 return "COM1";
1864
1865 case 0x2f8:
1866 case 0x2f9:
1867 case 0x2fa:
1868 case 0x2fb:
1869 case 0x2fc:
1870 case 0x2fd:
1871 case 0x2fe:
1872 case 0x2ff:
1873 return "COM2";
1874
1875 case 0x3e8:
1876 case 0x3e9:
1877 case 0x3ea:
1878 case 0x3eb:
1879 case 0x3ec:
1880 case 0x3ed:
1881 case 0x3ee:
1882 case 0x3ef:
1883 return "COM3";
1884
1885 case 0x2e8:
1886 case 0x2e9:
1887 case 0x2ea:
1888 case 0x2eb:
1889 case 0x2ec:
1890 case 0x2ed:
1891 case 0x2ee:
1892 case 0x2ef:
1893 return "COM4";
1894
1895 case 0x200:
1896 case 0x201:
1897 case 0x202:
1898 case 0x203:
1899 case 0x204:
1900 case 0x205:
1901 case 0x206:
1902 case 0x207:
1903 return "Joystick";
1904
1905 case 0x3f0:
1906 case 0x3f1:
1907 case 0x3f2:
1908 case 0x3f3:
1909 case 0x3f4:
1910 case 0x3f5:
1911 case 0x3f6:
1912 case 0x3f7:
1913 return "Floppy";
1914
1915 case 0x1f0:
1916 case 0x1f1:
1917 case 0x1f2:
1918 case 0x1f3:
1919 case 0x1f4:
1920 case 0x1f5:
1921 case 0x1f6:
1922 case 0x1f7:
1923 //case 0x3f6:
1924 //case 0x3f7:
1925 return "IDE 1st";
1926
1927 case 0x170:
1928 case 0x171:
1929 case 0x172:
1930 case 0x173:
1931 case 0x174:
1932 case 0x175:
1933 case 0x176:
1934 case 0x177:
1935 case 0x376:
1936 case 0x377:
1937 return "IDE 2nd";
1938
1939 case 0x1e0:
1940 case 0x1e1:
1941 case 0x1e2:
1942 case 0x1e3:
1943 case 0x1e4:
1944 case 0x1e5:
1945 case 0x1e6:
1946 case 0x1e7:
1947 case 0x3e6:
1948 case 0x3e7:
1949 return "IDE 3rd";
1950
1951 case 0x160:
1952 case 0x161:
1953 case 0x162:
1954 case 0x163:
1955 case 0x164:
1956 case 0x165:
1957 case 0x166:
1958 case 0x167:
1959 case 0x366:
1960 case 0x367:
1961 return "IDE 4th";
1962
1963 case 0x130: case 0x140: case 0x150:
1964 case 0x131: case 0x141: case 0x151:
1965 case 0x132: case 0x142: case 0x152:
1966 case 0x133: case 0x143: case 0x153:
1967 case 0x134: case 0x144: case 0x154:
1968 case 0x135: case 0x145: case 0x155:
1969 case 0x136: case 0x146: case 0x156:
1970 case 0x137: case 0x147: case 0x157:
1971 case 0x138: case 0x148: case 0x158:
1972 case 0x139: case 0x149: case 0x159:
1973 case 0x13a: case 0x14a: case 0x15a:
1974 case 0x13b: case 0x14b: case 0x15b:
1975 case 0x13c: case 0x14c: case 0x15c:
1976 case 0x13d: case 0x14d: case 0x15d:
1977 case 0x13e: case 0x14e: case 0x15e:
1978 case 0x13f: case 0x14f: case 0x15f:
1979 case 0x220: case 0x230:
1980 case 0x221: case 0x231:
1981 case 0x222: case 0x232:
1982 case 0x223: case 0x233:
1983 case 0x224: case 0x234:
1984 case 0x225: case 0x235:
1985 case 0x226: case 0x236:
1986 case 0x227: case 0x237:
1987 case 0x228: case 0x238:
1988 case 0x229: case 0x239:
1989 case 0x22a: case 0x23a:
1990 case 0x22b: case 0x23b:
1991 case 0x22c: case 0x23c:
1992 case 0x22d: case 0x23d:
1993 case 0x22e: case 0x23e:
1994 case 0x22f: case 0x23f:
1995 case 0x330: case 0x340: case 0x350:
1996 case 0x331: case 0x341: case 0x351:
1997 case 0x332: case 0x342: case 0x352:
1998 case 0x333: case 0x343: case 0x353:
1999 case 0x334: case 0x344: case 0x354:
2000 case 0x335: case 0x345: case 0x355:
2001 case 0x336: case 0x346: case 0x356:
2002 case 0x337: case 0x347: case 0x357:
2003 case 0x338: case 0x348: case 0x358:
2004 case 0x339: case 0x349: case 0x359:
2005 case 0x33a: case 0x34a: case 0x35a:
2006 case 0x33b: case 0x34b: case 0x35b:
2007 case 0x33c: case 0x34c: case 0x35c:
2008 case 0x33d: case 0x34d: case 0x35d:
2009 case 0x33e: case 0x34e: case 0x35e:
2010 case 0x33f: case 0x34f: case 0x35f:
2011 return "SCSI (typically)";
2012
2013 case 0x320:
2014 case 0x321:
2015 case 0x322:
2016 case 0x323:
2017 case 0x324:
2018 case 0x325:
2019 case 0x326:
2020 case 0x327:
2021 return "XT HD";
2022
2023 case 0x3b0:
2024 case 0x3b1:
2025 case 0x3b2:
2026 case 0x3b3:
2027 case 0x3b4:
2028 case 0x3b5:
2029 case 0x3b6:
2030 case 0x3b7:
2031 case 0x3b8:
2032 case 0x3b9:
2033 case 0x3ba:
2034 case 0x3bb:
2035 return "VGA";
2036
2037 case 0x3c0: case 0x3d0:
2038 case 0x3c1: case 0x3d1:
2039 case 0x3c2: case 0x3d2:
2040 case 0x3c3: case 0x3d3:
2041 case 0x3c4: case 0x3d4:
2042 case 0x3c5: case 0x3d5:
2043 case 0x3c6: case 0x3d6:
2044 case 0x3c7: case 0x3d7:
2045 case 0x3c8: case 0x3d8:
2046 case 0x3c9: case 0x3d9:
2047 case 0x3ca: case 0x3da:
2048 case 0x3cb: case 0x3db:
2049 case 0x3cc: case 0x3dc:
2050 case 0x3cd: case 0x3dd:
2051 case 0x3ce: case 0x3de:
2052 case 0x3cf: case 0x3df:
2053 return "VGA/EGA";
2054
2055 case 0x240: case 0x260: case 0x280:
2056 case 0x241: case 0x261: case 0x281:
2057 case 0x242: case 0x262: case 0x282:
2058 case 0x243: case 0x263: case 0x283:
2059 case 0x244: case 0x264: case 0x284:
2060 case 0x245: case 0x265: case 0x285:
2061 case 0x246: case 0x266: case 0x286:
2062 case 0x247: case 0x267: case 0x287:
2063 case 0x248: case 0x268: case 0x288:
2064 case 0x249: case 0x269: case 0x289:
2065 case 0x24a: case 0x26a: case 0x28a:
2066 case 0x24b: case 0x26b: case 0x28b:
2067 case 0x24c: case 0x26c: case 0x28c:
2068 case 0x24d: case 0x26d: case 0x28d:
2069 case 0x24e: case 0x26e: case 0x28e:
2070 case 0x24f: case 0x26f: case 0x28f:
2071 case 0x300:
2072 case 0x301:
2073 case 0x388:
2074 case 0x389:
2075 case 0x38a:
2076 case 0x38b:
2077 return "Sound Card (typically)";
2078
2079 default:
2080 return NULL;
2081 }
2082}
2083#endif /* VBOX_WITH_STATISTICS */
2084
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