VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 45305

Last change on this file since 45305 was 45305, checked in by vboxsync, 12 years ago

IOM: Adding pVCpu to a lot of calls and moving the lookup caches from VM to VMCPU.
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1/* $Id: IOM.cpp 45305 2013-04-03 11:15:02Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91/** @todo MMIO - simplifying the device end.
92 * - Add a return status for doing DBGFSTOP on access where there are no known
93 * registers.
94 * -
95 *
96 * */
97
98
99/*******************************************************************************
100* Header Files *
101*******************************************************************************/
102#define LOG_GROUP LOG_GROUP_IOM
103#include <VBox/vmm/iom.h>
104#include <VBox/vmm/cpum.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/sup.h>
107#include <VBox/vmm/mm.h>
108#include <VBox/vmm/stam.h>
109#include <VBox/vmm/dbgf.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/pdmdev.h>
112#include "IOMInternal.h"
113#include <VBox/vmm/vm.h>
114
115#include <VBox/param.h>
116#include <iprt/assert.h>
117#include <iprt/alloc.h>
118#include <iprt/string.h>
119#include <VBox/log.h>
120#include <VBox/err.h>
121
122#include "IOMInline.h"
123
124
125/*******************************************************************************
126* Internal Functions *
127*******************************************************************************/
128static void iomR3FlushCache(PVM pVM);
129static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
130static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
131static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
132static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
133static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
134static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
135static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
136static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
137
138#ifdef VBOX_WITH_STATISTICS
139static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
140#endif
141
142
143/**
144 * Initializes the IOM.
145 *
146 * @returns VBox status code.
147 * @param pVM Pointer to the VM.
148 */
149VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
150{
151 LogFlow(("IOMR3Init:\n"));
152
153 /*
154 * Assert alignment and sizes.
155 */
156 AssertCompileMemberAlignment(VM, iom.s, 32);
157 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
158 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
159
160 /*
161 * Setup any fixed pointers and offsets.
162 */
163 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
164
165 /*
166 * Initialize the REM critical section.
167 */
168#ifdef IOM_WITH_CRIT_SECT_RW
169 int rc = PDMR3CritSectRwInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
170#else
171 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
172#endif
173 AssertRCReturn(rc, rc);
174
175 /*
176 * Allocate the trees structure.
177 */
178 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
179 if (RT_SUCCESS(rc))
180 {
181 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
182 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
183 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
184 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
185
186 /*
187 * Info.
188 */
189 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
190 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
191
192 /*
193 * Statistics.
194 */
195 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
205 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
207 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
208 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
209 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
210 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
211#ifdef IOM_WITH_MOVS_SUPPORT
212 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
214 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
215 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
216#endif
217 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
218 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
219 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
220 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
221 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
222 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
223 }
224
225 /* Redundant, but just in case we change something in the future */
226 iomR3FlushCache(pVM);
227
228 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
229 return rc;
230}
231
232
233/**
234 * Flushes the IOM port & statistics lookup cache
235 *
236 * @param pVM The VM.
237 */
238static void iomR3FlushCache(PVM pVM)
239{
240 /*
241 * Since all relevant (1) cache use requires at least read access to the
242 * critical section, we can exclude all other EMTs by grabbing exclusive
243 * access to the critical section and then safely update the caches of
244 * other EMTs.
245 * (1) The irrelvant access not holding the lock is in assertion code.
246 */
247 IOM_LOCK(pVM);
248 VMCPUID iCpu = pVM->cCpus;
249 while (iCpu-- > 0)
250 {
251 PVMCPU pVCpu = &pVM->aCpus[iCpu];
252 pVCpu->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
253 pVCpu->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
254 pVCpu->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
255 pVCpu->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
256 pVCpu->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
257 pVCpu->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
258
259 pVCpu->iom.s.pRangeLastReadR3 = NULL;
260 pVCpu->iom.s.pRangeLastWriteR3 = NULL;
261 pVCpu->iom.s.pStatsLastReadR3 = NULL;
262 pVCpu->iom.s.pStatsLastWriteR3 = NULL;
263 pVCpu->iom.s.pMMIORangeLastR3 = NULL;
264 pVCpu->iom.s.pMMIOStatsLastR3 = NULL;
265
266 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
267 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
268 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
269 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
270 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
271 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
272 }
273
274 IOM_UNLOCK(pVM);
275}
276
277
278/**
279 * The VM is being reset.
280 *
281 * @param pVM Pointer to the VM.
282 */
283VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
284{
285 iomR3FlushCache(pVM);
286}
287
288
289/**
290 * Applies relocations to data and code managed by this
291 * component. This function will be called at init and
292 * whenever the VMM need to relocate it self inside the GC.
293 *
294 * The IOM will update the addresses used by the switcher.
295 *
296 * @param pVM The VM.
297 * @param offDelta Relocation delta relative to old location.
298 */
299VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
300{
301 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
302
303 /*
304 * Apply relocations to the GC callbacks.
305 */
306 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
307 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
308 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
309
310 if (pVM->iom.s.pfnMMIOHandlerRC)
311 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
312
313 /*
314 * Reset the raw-mode cache (don't bother relocating it).
315 */
316 VMCPUID iCpu = pVM->cCpus;
317 while (iCpu-- > 0)
318 {
319 PVMCPU pVCpu = &pVM->aCpus[iCpu];
320 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
321 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
322 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
323 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
324 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
325 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
326 }
327}
328
329
330/**
331 * Callback function for relocating a I/O port range.
332 *
333 * @returns 0 (continue enum)
334 * @param pNode Pointer to a IOMIOPORTRANGERC node.
335 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
336 * not certain the delta will fit in a void pointer for all possible configs.
337 */
338static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
339{
340 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
341 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
342
343 Assert(pRange->pDevIns);
344 pRange->pDevIns += offDelta;
345 if (pRange->pfnOutCallback)
346 pRange->pfnOutCallback += offDelta;
347 if (pRange->pfnInCallback)
348 pRange->pfnInCallback += offDelta;
349 if (pRange->pfnOutStrCallback)
350 pRange->pfnOutStrCallback += offDelta;
351 if (pRange->pfnInStrCallback)
352 pRange->pfnInStrCallback += offDelta;
353 if (pRange->pvUser > _64K)
354 pRange->pvUser += offDelta;
355 return 0;
356}
357
358
359/**
360 * Callback function for relocating a MMIO range.
361 *
362 * @returns 0 (continue enum)
363 * @param pNode Pointer to a IOMMMIORANGE node.
364 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
365 * not certain the delta will fit in a void pointer for all possible configs.
366 */
367static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
368{
369 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
370 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
371
372 if (pRange->pDevInsRC)
373 pRange->pDevInsRC += offDelta;
374 if (pRange->pfnWriteCallbackRC)
375 pRange->pfnWriteCallbackRC += offDelta;
376 if (pRange->pfnReadCallbackRC)
377 pRange->pfnReadCallbackRC += offDelta;
378 if (pRange->pfnFillCallbackRC)
379 pRange->pfnFillCallbackRC += offDelta;
380 if (pRange->pvUserRC > _64K)
381 pRange->pvUserRC += offDelta;
382
383 return 0;
384}
385
386
387/**
388 * Terminates the IOM.
389 *
390 * Termination means cleaning up and freeing all resources,
391 * the VM it self is at this point powered off or suspended.
392 *
393 * @returns VBox status code.
394 * @param pVM Pointer to the VM.
395 */
396VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
397{
398 /*
399 * IOM is not owning anything but automatically freed resources,
400 * so there's nothing to do here.
401 */
402 NOREF(pVM);
403 return VINF_SUCCESS;
404}
405
406#ifdef VBOX_WITH_STATISTICS
407
408/**
409 * Create the statistics node for an I/O port.
410 *
411 * @returns Pointer to new stats node.
412 *
413 * @param pVM Pointer to the VM.
414 * @param Port Port.
415 * @param pszDesc Description.
416 */
417PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
418{
419 Assert(IOM_IS_EXCL_LOCK_OWNER(pVM));
420
421 /* check if it already exists. */
422 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
423 if (pPort)
424 return pPort;
425
426 /* allocate stats node. */
427 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
428 AssertRC(rc);
429 if (RT_SUCCESS(rc))
430 {
431 /* insert into the tree. */
432 pPort->Core.Key = Port;
433 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
434 {
435 /* put a name on common ports. */
436 if (!pszDesc)
437 pszDesc = iomR3IOPortGetStandardName(Port);
438
439 /* register the statistics counters. */
440 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
441 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
442 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
443 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
444 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
445 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
446
447 /* Profiling */
448 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
449 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
450 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
451 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
452
453 return pPort;
454 }
455 AssertMsgFailed(("what! Port=%d\n", Port));
456 MMHyperFree(pVM, pPort);
457 }
458 return NULL;
459}
460
461
462/**
463 * Create the statistics node for an MMIO address.
464 *
465 * @returns Pointer to new stats node.
466 *
467 * @param pVM Pointer to the VM.
468 * @param GCPhys The address.
469 * @param pszDesc Description.
470 */
471PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
472{
473 Assert(IOM_IS_EXCL_LOCK_OWNER(pVM));
474#ifdef DEBUG_sandervl
475 AssertGCPhys32(GCPhys);
476#endif
477
478 /* check if it already exists. */
479 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
480 if (pStats)
481 return pStats;
482
483 /* allocate stats node. */
484 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
485 AssertRC(rc);
486 if (RT_SUCCESS(rc))
487 {
488 /* insert into the tree. */
489 pStats->Core.Key = GCPhys;
490 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
491 {
492 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
493 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
494 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
495 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
496 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
497 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
498 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
499
500 return pStats;
501 }
502 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
503 MMHyperFree(pVM, pStats);
504 }
505 return NULL;
506}
507
508#endif /* VBOX_WITH_STATISTICS */
509
510/**
511 * Registers a I/O port ring-3 handler.
512 *
513 * This API is called by PDM on behalf of a device. Devices must first register
514 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
515 * and IOMR3IOPortRegisterR0().
516 *
517 *
518 * @returns VBox status code.
519 *
520 * @param pVM Pointer to the VM.
521 * @param pDevIns PDM device instance owning the port range.
522 * @param PortStart First port number in the range.
523 * @param cPorts Number of ports to register.
524 * @param pvUser User argument for the callbacks.
525 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
526 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
527 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
528 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
529 * @param pszDesc Pointer to description string. This must not be freed.
530 */
531VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
532 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
533 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
534{
535 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
536 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
537
538 /*
539 * Validate input.
540 */
541 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
542 || (RTUINT)PortStart + cPorts > 0x10000)
543 {
544 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
545 return VERR_IOM_INVALID_IOPORT_RANGE;
546 }
547 if (!pfnOutCallback && !pfnInCallback)
548 {
549 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
550 return VERR_INVALID_PARAMETER;
551 }
552 if (!pfnOutCallback)
553 pfnOutCallback = iomR3IOPortDummyOut;
554 if (!pfnInCallback)
555 pfnInCallback = iomR3IOPortDummyIn;
556 if (!pfnOutStrCallback)
557 pfnOutStrCallback = iomR3IOPortDummyOutStr;
558 if (!pfnInStrCallback)
559 pfnInStrCallback = iomR3IOPortDummyInStr;
560
561 /* Flush the IO port lookup cache */
562 iomR3FlushCache(pVM);
563
564 /*
565 * Allocate new range record and initialize it.
566 */
567 PIOMIOPORTRANGER3 pRange;
568 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
569 if (RT_SUCCESS(rc))
570 {
571 pRange->Core.Key = PortStart;
572 pRange->Core.KeyLast = PortStart + (cPorts - 1);
573 pRange->Port = PortStart;
574 pRange->cPorts = cPorts;
575 pRange->pvUser = pvUser;
576 pRange->pDevIns = pDevIns;
577 pRange->pfnOutCallback = pfnOutCallback;
578 pRange->pfnInCallback = pfnInCallback;
579 pRange->pfnOutStrCallback = pfnOutStrCallback;
580 pRange->pfnInStrCallback = pfnInStrCallback;
581 pRange->pszDesc = pszDesc;
582
583 /*
584 * Try Insert it.
585 */
586 IOM_LOCK(pVM);
587 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
588 {
589#ifdef VBOX_WITH_STATISTICS
590 for (unsigned iPort = 0; iPort < cPorts; iPort++)
591 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
592#endif
593 IOM_UNLOCK(pVM);
594 return VINF_SUCCESS;
595 }
596 IOM_UNLOCK(pVM);
597
598 /* conflict. */
599 DBGFR3Info(pVM->pUVM, "ioport", NULL, NULL);
600 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
601 MMHyperFree(pVM, pRange);
602 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
603 }
604
605 return rc;
606}
607
608
609/**
610 * Registers a I/O port RC handler.
611 *
612 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
613 * using IOMIOPortRegisterR3() before calling this function.
614 *
615 *
616 * @returns VBox status code.
617 *
618 * @param pVM Pointer to the VM.
619 * @param pDevIns PDM device instance owning the port range.
620 * @param PortStart First port number in the range.
621 * @param cPorts Number of ports to register.
622 * @param pvUser User argument for the callbacks.
623 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
624 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
625 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
626 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
627 * @param pszDesc Pointer to description string. This must not be freed.
628 */
629VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
630 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
631 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
632{
633 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
634 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
635
636 /*
637 * Validate input.
638 */
639 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
640 || (RTUINT)PortStart + cPorts > 0x10000)
641 {
642 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
643 return VERR_IOM_INVALID_IOPORT_RANGE;
644 }
645 RTIOPORT PortLast = PortStart + (cPorts - 1);
646 if (!pfnOutCallback && !pfnInCallback)
647 {
648 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
649 return VERR_INVALID_PARAMETER;
650 }
651
652 IOM_LOCK(pVM);
653
654 /*
655 * Validate that there are ring-3 ranges for the ports.
656 */
657 RTIOPORT Port = PortStart;
658 while (Port <= PortLast && Port >= PortStart)
659 {
660 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
661 if (!pRange)
662 {
663 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
664 IOM_UNLOCK(pVM);
665 return VERR_IOM_NO_R3_IOPORT_RANGE;
666 }
667#ifndef IOM_NO_PDMINS_CHECKS
668# ifndef IN_RC
669 if (pRange->pDevIns != pDevIns)
670# else
671 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
672# endif
673 {
674 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
675 IOM_UNLOCK(pVM);
676 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
677 }
678#endif
679 Port = pRange->Core.KeyLast + 1;
680 }
681
682 /* Flush the IO port lookup cache */
683 iomR3FlushCache(pVM);
684
685 /*
686 * Allocate new range record and initialize it.
687 */
688 PIOMIOPORTRANGERC pRange;
689 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
690 if (RT_SUCCESS(rc))
691 {
692 pRange->Core.Key = PortStart;
693 pRange->Core.KeyLast = PortLast;
694 pRange->Port = PortStart;
695 pRange->cPorts = cPorts;
696 pRange->pvUser = pvUser;
697 pRange->pfnOutCallback = pfnOutCallback;
698 pRange->pfnInCallback = pfnInCallback;
699 pRange->pfnOutStrCallback = pfnOutStrCallback;
700 pRange->pfnInStrCallback = pfnInStrCallback;
701 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
702 pRange->pszDesc = pszDesc;
703
704 /*
705 * Insert it.
706 */
707 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
708 {
709 IOM_UNLOCK(pVM);
710 return VINF_SUCCESS;
711 }
712
713 /* conflict. */
714 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
715 MMHyperFree(pVM, pRange);
716 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
717 }
718 IOM_UNLOCK(pVM);
719 return rc;
720}
721
722
723/**
724 * Registers a Port IO R0 handler.
725 *
726 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
727 * using IOMR3IOPortRegisterR3() before calling this function.
728 *
729 *
730 * @returns VBox status code.
731 *
732 * @param pVM Pointer to the VM.
733 * @param pDevIns PDM device instance owning the port range.
734 * @param PortStart First port number in the range.
735 * @param cPorts Number of ports to register.
736 * @param pvUser User argument for the callbacks.
737 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
738 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
739 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
740 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
741 * @param pszDesc Pointer to description string. This must not be freed.
742 */
743VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
744 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
745 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
746 const char *pszDesc)
747{
748 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
749 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
750
751 /*
752 * Validate input.
753 */
754 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
755 || (RTUINT)PortStart + cPorts > 0x10000)
756 {
757 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
758 return VERR_IOM_INVALID_IOPORT_RANGE;
759 }
760 RTIOPORT PortLast = PortStart + (cPorts - 1);
761 if (!pfnOutCallback && !pfnInCallback)
762 {
763 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
764 return VERR_INVALID_PARAMETER;
765 }
766
767 IOM_LOCK(pVM);
768 /*
769 * Validate that there are ring-3 ranges for the ports.
770 */
771 RTIOPORT Port = PortStart;
772 while (Port <= PortLast && Port >= PortStart)
773 {
774 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
775 if (!pRange)
776 {
777 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
778 IOM_UNLOCK(pVM);
779 return VERR_IOM_NO_R3_IOPORT_RANGE;
780 }
781#ifndef IOM_NO_PDMINS_CHECKS
782# ifndef IN_RC
783 if (pRange->pDevIns != pDevIns)
784# else
785 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
786# endif
787 {
788 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
789 IOM_UNLOCK(pVM);
790 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
791 }
792#endif
793 Port = pRange->Core.KeyLast + 1;
794 }
795
796 /* Flush the IO port lookup cache */
797 iomR3FlushCache(pVM);
798
799 /*
800 * Allocate new range record and initialize it.
801 */
802 PIOMIOPORTRANGER0 pRange;
803 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
804 if (RT_SUCCESS(rc))
805 {
806 pRange->Core.Key = PortStart;
807 pRange->Core.KeyLast = PortLast;
808 pRange->Port = PortStart;
809 pRange->cPorts = cPorts;
810 pRange->pvUser = pvUser;
811 pRange->pfnOutCallback = pfnOutCallback;
812 pRange->pfnInCallback = pfnInCallback;
813 pRange->pfnOutStrCallback = pfnOutStrCallback;
814 pRange->pfnInStrCallback = pfnInStrCallback;
815 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
816 pRange->pszDesc = pszDesc;
817
818 /*
819 * Insert it.
820 */
821 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
822 {
823 IOM_UNLOCK(pVM);
824 return VINF_SUCCESS;
825 }
826
827 /* conflict. */
828 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
829 MMHyperFree(pVM, pRange);
830 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
831 }
832 IOM_UNLOCK(pVM);
833 return rc;
834}
835
836
837/**
838 * Deregisters a I/O Port range.
839 *
840 * The specified range must be registered using IOMR3IOPortRegister previous to
841 * this call. The range does can be a smaller part of the range specified to
842 * IOMR3IOPortRegister, but it can never be larger.
843 *
844 * This function will remove GC, R0 and R3 context port handlers for this range.
845 *
846 * @returns VBox status code.
847 *
848 * @param pVM The virtual machine.
849 * @param pDevIns The device instance associated with the range.
850 * @param PortStart First port number in the range.
851 * @param cPorts Number of ports to remove starting at PortStart.
852 *
853 * @remark This function mainly for PCI PnP Config and will not do
854 * all the checks you might expect it to do.
855 */
856VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
857{
858 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
859
860 /*
861 * Validate input.
862 */
863 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
864 || (RTUINT)PortStart + cPorts > 0x10000)
865 {
866 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
867 return VERR_IOM_INVALID_IOPORT_RANGE;
868 }
869
870 IOM_LOCK(pVM);
871
872 /* Flush the IO port lookup cache */
873 iomR3FlushCache(pVM);
874
875 /*
876 * Check ownership.
877 */
878 RTIOPORT PortLast = PortStart + (cPorts - 1);
879 RTIOPORT Port = PortStart;
880 while (Port <= PortLast && Port >= PortStart)
881 {
882 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
883 if (pRange)
884 {
885 Assert(Port <= pRange->Core.KeyLast);
886#ifndef IOM_NO_PDMINS_CHECKS
887 if (pRange->pDevIns != pDevIns)
888 {
889 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
890 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
891 IOM_UNLOCK(pVM);
892 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
893 }
894#endif /* !IOM_NO_PDMINS_CHECKS */
895 Port = pRange->Core.KeyLast;
896 }
897 Port++;
898 }
899
900 /*
901 * Remove any RC ranges first.
902 */
903 int rc = VINF_SUCCESS;
904 Port = PortStart;
905 while (Port <= PortLast && Port >= PortStart)
906 {
907 /*
908 * Try find range.
909 */
910 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
911 if (pRange)
912 {
913 if ( pRange->Core.Key == Port
914 && pRange->Core.KeyLast <= PortLast)
915 {
916 /*
917 * Kick out the entire range.
918 */
919 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
920 Assert(pv == (void *)pRange); NOREF(pv);
921 Port += pRange->cPorts;
922 MMHyperFree(pVM, pRange);
923 }
924 else if (pRange->Core.Key == Port)
925 {
926 /*
927 * Cut of the head of the range, done.
928 */
929 pRange->cPorts -= Port - pRange->Port;
930 pRange->Core.Key = Port;
931 pRange->Port = Port;
932 break;
933 }
934 else if (pRange->Core.KeyLast <= PortLast)
935 {
936 /*
937 * Just cut of the tail.
938 */
939 unsigned c = pRange->Core.KeyLast - Port + 1;
940 pRange->Core.KeyLast -= c;
941 pRange->cPorts -= c;
942 Port += c;
943 }
944 else
945 {
946 /*
947 * Split the range, done.
948 */
949 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
950 /* create tail. */
951 PIOMIOPORTRANGERC pRangeNew;
952 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
953 if (RT_FAILURE(rc2))
954 {
955 IOM_UNLOCK(pVM);
956 return rc2;
957 }
958 *pRangeNew = *pRange;
959 pRangeNew->Core.Key = PortLast;
960 pRangeNew->Port = PortLast;
961 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
962
963 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
964
965 /* adjust head */
966 pRange->Core.KeyLast = Port - 1;
967 pRange->cPorts = Port - pRange->Port;
968
969 /* insert */
970 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
971 {
972 AssertMsgFailed(("This cannot happen!\n"));
973 MMHyperFree(pVM, pRangeNew);
974 rc = VERR_IOM_IOPORT_IPE_1;
975 }
976 break;
977 }
978 }
979 else /* next port */
980 Port++;
981 } /* for all ports - RC. */
982
983
984 /*
985 * Remove any R0 ranges.
986 */
987 Port = PortStart;
988 while (Port <= PortLast && Port >= PortStart)
989 {
990 /*
991 * Try find range.
992 */
993 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
994 if (pRange)
995 {
996 if ( pRange->Core.Key == Port
997 && pRange->Core.KeyLast <= PortLast)
998 {
999 /*
1000 * Kick out the entire range.
1001 */
1002 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1003 Assert(pv == (void *)pRange); NOREF(pv);
1004 Port += pRange->cPorts;
1005 MMHyperFree(pVM, pRange);
1006 }
1007 else if (pRange->Core.Key == Port)
1008 {
1009 /*
1010 * Cut of the head of the range, done.
1011 */
1012 pRange->cPorts -= Port - pRange->Port;
1013 pRange->Core.Key = Port;
1014 pRange->Port = Port;
1015 break;
1016 }
1017 else if (pRange->Core.KeyLast <= PortLast)
1018 {
1019 /*
1020 * Just cut of the tail.
1021 */
1022 unsigned c = pRange->Core.KeyLast - Port + 1;
1023 pRange->Core.KeyLast -= c;
1024 pRange->cPorts -= c;
1025 Port += c;
1026 }
1027 else
1028 {
1029 /*
1030 * Split the range, done.
1031 */
1032 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1033 /* create tail. */
1034 PIOMIOPORTRANGER0 pRangeNew;
1035 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1036 if (RT_FAILURE(rc2))
1037 {
1038 IOM_UNLOCK(pVM);
1039 return rc2;
1040 }
1041 *pRangeNew = *pRange;
1042 pRangeNew->Core.Key = PortLast;
1043 pRangeNew->Port = PortLast;
1044 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1045
1046 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1047
1048 /* adjust head */
1049 pRange->Core.KeyLast = Port - 1;
1050 pRange->cPorts = Port - pRange->Port;
1051
1052 /* insert */
1053 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1054 {
1055 AssertMsgFailed(("This cannot happen!\n"));
1056 MMHyperFree(pVM, pRangeNew);
1057 rc = VERR_IOM_IOPORT_IPE_1;
1058 }
1059 break;
1060 }
1061 }
1062 else /* next port */
1063 Port++;
1064 } /* for all ports - R0. */
1065
1066 /*
1067 * And the same procedure for ring-3 ranges.
1068 */
1069 Port = PortStart;
1070 while (Port <= PortLast && Port >= PortStart)
1071 {
1072 /*
1073 * Try find range.
1074 */
1075 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1076 if (pRange)
1077 {
1078 if ( pRange->Core.Key == Port
1079 && pRange->Core.KeyLast <= PortLast)
1080 {
1081 /*
1082 * Kick out the entire range.
1083 */
1084 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1085 Assert(pv == (void *)pRange); NOREF(pv);
1086 Port += pRange->cPorts;
1087 MMHyperFree(pVM, pRange);
1088 }
1089 else if (pRange->Core.Key == Port)
1090 {
1091 /*
1092 * Cut of the head of the range, done.
1093 */
1094 pRange->cPorts -= Port - pRange->Port;
1095 pRange->Core.Key = Port;
1096 pRange->Port = Port;
1097 break;
1098 }
1099 else if (pRange->Core.KeyLast <= PortLast)
1100 {
1101 /*
1102 * Just cut of the tail.
1103 */
1104 unsigned c = pRange->Core.KeyLast - Port + 1;
1105 pRange->Core.KeyLast -= c;
1106 pRange->cPorts -= c;
1107 Port += c;
1108 }
1109 else
1110 {
1111 /*
1112 * Split the range, done.
1113 */
1114 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1115 /* create tail. */
1116 PIOMIOPORTRANGER3 pRangeNew;
1117 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1118 if (RT_FAILURE(rc2))
1119 {
1120 IOM_UNLOCK(pVM);
1121 return rc2;
1122 }
1123 *pRangeNew = *pRange;
1124 pRangeNew->Core.Key = PortLast;
1125 pRangeNew->Port = PortLast;
1126 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1127
1128 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1129
1130 /* adjust head */
1131 pRange->Core.KeyLast = Port - 1;
1132 pRange->cPorts = Port - pRange->Port;
1133
1134 /* insert */
1135 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1136 {
1137 AssertMsgFailed(("This cannot happen!\n"));
1138 MMHyperFree(pVM, pRangeNew);
1139 rc = VERR_IOM_IOPORT_IPE_1;
1140 }
1141 break;
1142 }
1143 }
1144 else /* next port */
1145 Port++;
1146 } /* for all ports - ring-3. */
1147
1148 /* done */
1149 IOM_UNLOCK(pVM);
1150 return rc;
1151}
1152
1153
1154/**
1155 * Dummy Port I/O Handler for IN operations.
1156 *
1157 * @returns VBox status code.
1158 *
1159 * @param pDevIns The device instance.
1160 * @param pvUser User argument.
1161 * @param Port Port number used for the IN operation.
1162 * @param pu32 Where to store the result.
1163 * @param cb Number of bytes read.
1164 */
1165static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1166{
1167 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1168 switch (cb)
1169 {
1170 case 1: *pu32 = 0xff; break;
1171 case 2: *pu32 = 0xffff; break;
1172 case 4: *pu32 = UINT32_C(0xffffffff); break;
1173 default:
1174 AssertReleaseMsgFailed(("cb=%d\n", cb));
1175 return VERR_IOM_IOPORT_IPE_2;
1176 }
1177 return VINF_SUCCESS;
1178}
1179
1180
1181/**
1182 * Dummy Port I/O Handler for string IN operations.
1183 *
1184 * @returns VBox status code.
1185 *
1186 * @param pDevIns The device instance.
1187 * @param pvUser User argument.
1188 * @param Port Port number used for the string IN operation.
1189 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1190 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1191 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1192 */
1193static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1194 PRTGCUINTREG pcTransfer, unsigned cb)
1195{
1196 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1197 return VINF_SUCCESS;
1198}
1199
1200
1201/**
1202 * Dummy Port I/O Handler for OUT operations.
1203 *
1204 * @returns VBox status code.
1205 *
1206 * @param pDevIns The device instance.
1207 * @param pvUser User argument.
1208 * @param Port Port number used for the OUT operation.
1209 * @param u32 The value to output.
1210 * @param cb The value size in bytes.
1211 */
1212static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1213{
1214 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1215 return VINF_SUCCESS;
1216}
1217
1218
1219/**
1220 * Dummy Port I/O Handler for string OUT operations.
1221 *
1222 * @returns VBox status code.
1223 *
1224 * @param pDevIns The device instance.
1225 * @param pvUser User argument.
1226 * @param Port Port number used for the string OUT operation.
1227 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1228 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1229 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1230 */
1231static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1232 PRTGCUINTREG pcTransfer, unsigned cb)
1233{
1234 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1235 return VINF_SUCCESS;
1236}
1237
1238
1239/**
1240 * Display a single I/O port ring-3 range.
1241 *
1242 * @returns 0
1243 * @param pNode Pointer to I/O port HC range.
1244 * @param pvUser Pointer to info output callback structure.
1245 */
1246static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1247{
1248 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1249 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1250 pHlp->pfnPrintf(pHlp,
1251 "%04x-%04x %p %p %p %p %s\n",
1252 pRange->Core.Key,
1253 pRange->Core.KeyLast,
1254 pRange->pDevIns,
1255 pRange->pfnInCallback,
1256 pRange->pfnOutCallback,
1257 pRange->pvUser,
1258 pRange->pszDesc);
1259 return 0;
1260}
1261
1262
1263/**
1264 * Display a single I/O port GC range.
1265 *
1266 * @returns 0
1267 * @param pNode Pointer to IOPORT GC range.
1268 * @param pvUser Pointer to info output callback structure.
1269 */
1270static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1271{
1272 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1273 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1274 pHlp->pfnPrintf(pHlp,
1275 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1276 pRange->Core.Key,
1277 pRange->Core.KeyLast,
1278 pRange->pDevIns,
1279 pRange->pfnInCallback,
1280 pRange->pfnOutCallback,
1281 pRange->pvUser,
1282 pRange->pszDesc);
1283 return 0;
1284}
1285
1286
1287/**
1288 * Display all registered I/O port ranges.
1289 *
1290 * @param pVM Pointer to the VM.
1291 * @param pHlp The info helpers.
1292 * @param pszArgs Arguments, ignored.
1293 */
1294static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1295{
1296 NOREF(pszArgs);
1297 pHlp->pfnPrintf(pHlp,
1298 "I/O Port R3 ranges (pVM=%p)\n"
1299 "Range %.*s %.*s %.*s %.*s Description\n",
1300 pVM,
1301 sizeof(RTHCPTR) * 2, "pDevIns ",
1302 sizeof(RTHCPTR) * 2, "In ",
1303 sizeof(RTHCPTR) * 2, "Out ",
1304 sizeof(RTHCPTR) * 2, "pvUser ");
1305 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1306
1307 pHlp->pfnPrintf(pHlp,
1308 "I/O Port R0 ranges (pVM=%p)\n"
1309 "Range %.*s %.*s %.*s %.*s Description\n",
1310 pVM,
1311 sizeof(RTHCPTR) * 2, "pDevIns ",
1312 sizeof(RTHCPTR) * 2, "In ",
1313 sizeof(RTHCPTR) * 2, "Out ",
1314 sizeof(RTHCPTR) * 2, "pvUser ");
1315 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1316
1317 pHlp->pfnPrintf(pHlp,
1318 "I/O Port GC ranges (pVM=%p)\n"
1319 "Range %.*s %.*s %.*s %.*s Description\n",
1320 pVM,
1321 sizeof(RTRCPTR) * 2, "pDevIns ",
1322 sizeof(RTRCPTR) * 2, "In ",
1323 sizeof(RTRCPTR) * 2, "Out ",
1324 sizeof(RTRCPTR) * 2, "pvUser ");
1325 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1326}
1327
1328
1329/**
1330 * Registers a Memory Mapped I/O R3 handler.
1331 *
1332 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1333 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1334 *
1335 * @returns VBox status code.
1336 *
1337 * @param pVM Pointer to the VM.
1338 * @param pDevIns PDM device instance owning the MMIO range.
1339 * @param GCPhysStart First physical address in the range.
1340 * @param cbRange The size of the range (in bytes).
1341 * @param pvUser User argument for the callbacks.
1342 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1343 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1344 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1345 * @param pszDesc Pointer to description string. This must not be freed.
1346 */
1347VMMR3_INT_DECL(int)
1348IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1349 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1350 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1351{
1352 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1353 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1354 int rc;
1355
1356 /*
1357 * Validate input.
1358 */
1359 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1360 VERR_IOM_INVALID_MMIO_RANGE);
1361 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1362 && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
1363 && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
1364 ("%#x\n", fFlags),
1365 VERR_INVALID_PARAMETER);
1366
1367 /*
1368 * Resolve the GC/R0 handler addresses lazily because of init order.
1369 */
1370 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1371 {
1372 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1373 AssertLogRelRCReturn(rc, rc);
1374 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1375 AssertLogRelRCReturn(rc, rc);
1376 }
1377
1378 /*
1379 * Allocate new range record and initialize it.
1380 */
1381 PIOMMMIORANGE pRange;
1382 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1383 if (RT_SUCCESS(rc))
1384 {
1385 pRange->Core.Key = GCPhysStart;
1386 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1387 pRange->GCPhys = GCPhysStart;
1388 pRange->cb = cbRange;
1389 pRange->cRefs = 1; /* The tree reference. */
1390 pRange->pszDesc = pszDesc;
1391
1392 //pRange->pvUserR0 = NIL_RTR0PTR;
1393 //pRange->pDevInsR0 = NIL_RTR0PTR;
1394 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1395 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1396 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1397
1398 //pRange->pvUserRC = NIL_RTRCPTR;
1399 //pRange->pDevInsRC = NIL_RTRCPTR;
1400 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1401 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1402 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1403
1404 pRange->fFlags = fFlags;
1405
1406 pRange->pvUserR3 = pvUser;
1407 pRange->pDevInsR3 = pDevIns;
1408 pRange->pfnReadCallbackR3 = pfnReadCallback;
1409 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1410 pRange->pfnFillCallbackR3 = pfnFillCallback;
1411
1412 /*
1413 * Try register it with PGM and then insert it into the tree.
1414 */
1415 IOM_LOCK(pVM);
1416 iomR3FlushCache(pVM);
1417 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1418 IOMR3MMIOHandler, pRange,
1419 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1420 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1421 if (RT_SUCCESS(rc))
1422 {
1423 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1424 {
1425 IOM_UNLOCK(pVM);
1426 return VINF_SUCCESS;
1427 }
1428
1429 /* bail out */
1430 IOM_UNLOCK(pVM);
1431 DBGFR3Info(pVM->pUVM, "mmio", NULL, NULL);
1432 AssertMsgFailed(("This cannot happen!\n"));
1433 rc = VERR_IOM_IOPORT_IPE_3;
1434 }
1435 else
1436 IOM_UNLOCK(pVM);
1437
1438 MMHyperFree(pVM, pRange);
1439 }
1440 if (pDevIns->iInstance > 0)
1441 MMR3HeapFree((void *)pszDesc);
1442 return rc;
1443}
1444
1445
1446/**
1447 * Registers a Memory Mapped I/O RC handler range.
1448 *
1449 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1450 * using IOMMMIORegisterR3() before calling this function.
1451 *
1452 *
1453 * @returns VBox status code.
1454 *
1455 * @param pVM Pointer to the VM.
1456 * @param pDevIns PDM device instance owning the MMIO range.
1457 * @param GCPhysStart First physical address in the range.
1458 * @param cbRange The size of the range (in bytes).
1459 * @param pvUser User argument for the callbacks.
1460 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1461 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1462 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1463 * @thread EMT
1464 */
1465VMMR3_INT_DECL(int)
1466IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1467 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1468 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1469{
1470 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1471 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1472
1473 /*
1474 * Validate input.
1475 */
1476 if (!pfnWriteCallback && !pfnReadCallback)
1477 {
1478 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1479 return VERR_INVALID_PARAMETER;
1480 }
1481 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1482
1483 /*
1484 * Find the MMIO range and check that the input matches.
1485 */
1486 IOM_LOCK(pVM);
1487 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1488 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1489 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1490 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1491 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1492
1493 pRange->pvUserRC = pvUser;
1494 pRange->pfnReadCallbackRC = pfnReadCallback;
1495 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1496 pRange->pfnFillCallbackRC = pfnFillCallback;
1497 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1498 IOM_UNLOCK(pVM);
1499
1500 return VINF_SUCCESS;
1501}
1502
1503
1504/**
1505 * Registers a Memory Mapped I/O R0 handler range.
1506 *
1507 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1508 * using IOMMR3MIORegisterHC() before calling this function.
1509 *
1510 *
1511 * @returns VBox status code.
1512 *
1513 * @param pVM Pointer to the VM.
1514 * @param pDevIns PDM device instance owning the MMIO range.
1515 * @param GCPhysStart First physical address in the range.
1516 * @param cbRange The size of the range (in bytes).
1517 * @param pvUser User argument for the callbacks.
1518 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1519 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1520 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1521 * @thread EMT
1522 */
1523VMMR3_INT_DECL(int)
1524IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1525 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1526 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1527 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1528{
1529 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1530 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1531
1532 /*
1533 * Validate input.
1534 */
1535 if (!pfnWriteCallback && !pfnReadCallback)
1536 {
1537 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1538 return VERR_INVALID_PARAMETER;
1539 }
1540 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1541
1542 /*
1543 * Find the MMIO range and check that the input matches.
1544 */
1545 IOM_LOCK(pVM);
1546 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1547 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1548 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1549 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1550 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1551
1552 pRange->pvUserR0 = pvUser;
1553 pRange->pfnReadCallbackR0 = pfnReadCallback;
1554 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1555 pRange->pfnFillCallbackR0 = pfnFillCallback;
1556 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1557 IOM_UNLOCK(pVM);
1558
1559 return VINF_SUCCESS;
1560}
1561
1562
1563/**
1564 * Deregisters a Memory Mapped I/O handler range.
1565 *
1566 * Registered GC, R0, and R3 ranges are affected.
1567 *
1568 * @returns VBox status code.
1569 *
1570 * @param pVM The virtual machine.
1571 * @param pDevIns Device instance which the MMIO region is registered.
1572 * @param GCPhysStart First physical address (GC) in the range.
1573 * @param cbRange Number of bytes to deregister.
1574 *
1575 * @remark This function mainly for PCI PnP Config and will not do
1576 * all the checks you might expect it to do.
1577 */
1578VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1579{
1580 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1581
1582 /*
1583 * Validate input.
1584 */
1585 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1586 if (GCPhysLast < GCPhysStart)
1587 {
1588 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1589 return VERR_IOM_INVALID_MMIO_RANGE;
1590 }
1591 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1592
1593 IOM_LOCK(pVM);
1594
1595 /*
1596 * Check ownership and such for the entire area.
1597 */
1598 RTGCPHYS GCPhys = GCPhysStart;
1599 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1600 {
1601 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
1602 if (!pRange)
1603 {
1604 IOM_UNLOCK(pVM);
1605 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1606 }
1607 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1608 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1609 IOM_UNLOCK(pVM),
1610 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1611 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1612 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1613 IOM_UNLOCK(pVM),
1614 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1615
1616 /* next */
1617 Assert(GCPhys <= pRange->Core.KeyLast);
1618 GCPhys = pRange->Core.KeyLast + 1;
1619 }
1620
1621 /*
1622 * Do the actual removing of the MMIO ranges.
1623 */
1624 GCPhys = GCPhysStart;
1625 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1626 {
1627 iomR3FlushCache(pVM);
1628
1629 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1630 Assert(pRange);
1631 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1632 IOM_UNLOCK(pVM); /** @todo r=bird: Why are we leaving the lock here? We don't leave it when registering the range above... */
1633
1634 /* remove it from PGM */
1635 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1636 AssertRC(rc);
1637
1638 IOM_LOCK(pVM);
1639
1640 /* advance and free. */
1641 GCPhys = pRange->Core.KeyLast + 1;
1642 if (pDevIns->iInstance > 0)
1643 {
1644 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1645 MMR3HeapFree(pvDesc);
1646 }
1647 iomMmioReleaseRange(pVM, pRange);
1648 }
1649
1650 IOM_UNLOCK(pVM);
1651 return VINF_SUCCESS;
1652}
1653
1654
1655/**
1656 * Display a single MMIO range.
1657 *
1658 * @returns 0
1659 * @param pNode Pointer to MMIO R3 range.
1660 * @param pvUser Pointer to info output callback structure.
1661 */
1662static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1663{
1664 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1665 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1666 pHlp->pfnPrintf(pHlp,
1667 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1668 pRange->Core.Key,
1669 pRange->Core.KeyLast,
1670 pRange->pDevInsR3,
1671 pRange->pfnReadCallbackR3,
1672 pRange->pfnWriteCallbackR3,
1673 pRange->pfnFillCallbackR3,
1674 pRange->pvUserR3,
1675 pRange->pszDesc);
1676 pHlp->pfnPrintf(pHlp,
1677 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1678 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1679 pRange->pDevInsR0,
1680 pRange->pfnReadCallbackR0,
1681 pRange->pfnWriteCallbackR0,
1682 pRange->pfnFillCallbackR0,
1683 pRange->pvUserR0);
1684 pHlp->pfnPrintf(pHlp,
1685 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1686 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1687 pRange->pDevInsRC,
1688 pRange->pfnReadCallbackRC,
1689 pRange->pfnWriteCallbackRC,
1690 pRange->pfnFillCallbackRC,
1691 pRange->pvUserRC);
1692 return 0;
1693}
1694
1695
1696/**
1697 * Display registered MMIO ranges to the log.
1698 *
1699 * @param pVM Pointer to the VM.
1700 * @param pHlp The info helpers.
1701 * @param pszArgs Arguments, ignored.
1702 */
1703static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1704{
1705 NOREF(pszArgs);
1706 pHlp->pfnPrintf(pHlp,
1707 "MMIO ranges (pVM=%p)\n"
1708 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1709 pVM,
1710 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1711 sizeof(RTHCPTR) * 2, "pDevIns ",
1712 sizeof(RTHCPTR) * 2, "Read ",
1713 sizeof(RTHCPTR) * 2, "Write ",
1714 sizeof(RTHCPTR) * 2, "Fill ",
1715 sizeof(RTHCPTR) * 2, "pvUser ",
1716 "Description");
1717 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1718}
1719
1720
1721#ifdef VBOX_WITH_STATISTICS
1722/**
1723 * Tries to come up with the standard name for a port.
1724 *
1725 * @returns Pointer to readonly string if known.
1726 * @returns NULL if unknown port number.
1727 *
1728 * @param Port The port to name.
1729 */
1730static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1731{
1732 switch (Port)
1733 {
1734 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1735 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1736 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1737 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1738 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1739 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1740 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1741 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1742 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1743 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1744 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1745 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1746 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1747 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1748 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1749 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1750
1751 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1752 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1753 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1754 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1755 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1756 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1757 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1758 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1759 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1760 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1761 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1762 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1763 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1764 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1765 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1766 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1767 return "System Reserved";
1768
1769 case 0x60:
1770 case 0x64:
1771 return "Keyboard & Mouse";
1772
1773 case 0x378:
1774 case 0x379:
1775 case 0x37a:
1776 case 0x37b:
1777 case 0x37c:
1778 case 0x37d:
1779 case 0x37e:
1780 case 0x37f:
1781 case 0x3bc:
1782 case 0x3bd:
1783 case 0x3be:
1784 case 0x3bf:
1785 case 0x278:
1786 case 0x279:
1787 case 0x27a:
1788 case 0x27b:
1789 case 0x27c:
1790 case 0x27d:
1791 case 0x27e:
1792 case 0x27f:
1793 return "LPT1/2/3";
1794
1795 case 0x3f8:
1796 case 0x3f9:
1797 case 0x3fa:
1798 case 0x3fb:
1799 case 0x3fc:
1800 case 0x3fd:
1801 case 0x3fe:
1802 case 0x3ff:
1803 return "COM1";
1804
1805 case 0x2f8:
1806 case 0x2f9:
1807 case 0x2fa:
1808 case 0x2fb:
1809 case 0x2fc:
1810 case 0x2fd:
1811 case 0x2fe:
1812 case 0x2ff:
1813 return "COM2";
1814
1815 case 0x3e8:
1816 case 0x3e9:
1817 case 0x3ea:
1818 case 0x3eb:
1819 case 0x3ec:
1820 case 0x3ed:
1821 case 0x3ee:
1822 case 0x3ef:
1823 return "COM3";
1824
1825 case 0x2e8:
1826 case 0x2e9:
1827 case 0x2ea:
1828 case 0x2eb:
1829 case 0x2ec:
1830 case 0x2ed:
1831 case 0x2ee:
1832 case 0x2ef:
1833 return "COM4";
1834
1835 case 0x200:
1836 case 0x201:
1837 case 0x202:
1838 case 0x203:
1839 case 0x204:
1840 case 0x205:
1841 case 0x206:
1842 case 0x207:
1843 return "Joystick";
1844
1845 case 0x3f0:
1846 case 0x3f1:
1847 case 0x3f2:
1848 case 0x3f3:
1849 case 0x3f4:
1850 case 0x3f5:
1851 case 0x3f6:
1852 case 0x3f7:
1853 return "Floppy";
1854
1855 case 0x1f0:
1856 case 0x1f1:
1857 case 0x1f2:
1858 case 0x1f3:
1859 case 0x1f4:
1860 case 0x1f5:
1861 case 0x1f6:
1862 case 0x1f7:
1863 //case 0x3f6:
1864 //case 0x3f7:
1865 return "IDE 1st";
1866
1867 case 0x170:
1868 case 0x171:
1869 case 0x172:
1870 case 0x173:
1871 case 0x174:
1872 case 0x175:
1873 case 0x176:
1874 case 0x177:
1875 case 0x376:
1876 case 0x377:
1877 return "IDE 2nd";
1878
1879 case 0x1e0:
1880 case 0x1e1:
1881 case 0x1e2:
1882 case 0x1e3:
1883 case 0x1e4:
1884 case 0x1e5:
1885 case 0x1e6:
1886 case 0x1e7:
1887 case 0x3e6:
1888 case 0x3e7:
1889 return "IDE 3rd";
1890
1891 case 0x160:
1892 case 0x161:
1893 case 0x162:
1894 case 0x163:
1895 case 0x164:
1896 case 0x165:
1897 case 0x166:
1898 case 0x167:
1899 case 0x366:
1900 case 0x367:
1901 return "IDE 4th";
1902
1903 case 0x130: case 0x140: case 0x150:
1904 case 0x131: case 0x141: case 0x151:
1905 case 0x132: case 0x142: case 0x152:
1906 case 0x133: case 0x143: case 0x153:
1907 case 0x134: case 0x144: case 0x154:
1908 case 0x135: case 0x145: case 0x155:
1909 case 0x136: case 0x146: case 0x156:
1910 case 0x137: case 0x147: case 0x157:
1911 case 0x138: case 0x148: case 0x158:
1912 case 0x139: case 0x149: case 0x159:
1913 case 0x13a: case 0x14a: case 0x15a:
1914 case 0x13b: case 0x14b: case 0x15b:
1915 case 0x13c: case 0x14c: case 0x15c:
1916 case 0x13d: case 0x14d: case 0x15d:
1917 case 0x13e: case 0x14e: case 0x15e:
1918 case 0x13f: case 0x14f: case 0x15f:
1919 case 0x220: case 0x230:
1920 case 0x221: case 0x231:
1921 case 0x222: case 0x232:
1922 case 0x223: case 0x233:
1923 case 0x224: case 0x234:
1924 case 0x225: case 0x235:
1925 case 0x226: case 0x236:
1926 case 0x227: case 0x237:
1927 case 0x228: case 0x238:
1928 case 0x229: case 0x239:
1929 case 0x22a: case 0x23a:
1930 case 0x22b: case 0x23b:
1931 case 0x22c: case 0x23c:
1932 case 0x22d: case 0x23d:
1933 case 0x22e: case 0x23e:
1934 case 0x22f: case 0x23f:
1935 case 0x330: case 0x340: case 0x350:
1936 case 0x331: case 0x341: case 0x351:
1937 case 0x332: case 0x342: case 0x352:
1938 case 0x333: case 0x343: case 0x353:
1939 case 0x334: case 0x344: case 0x354:
1940 case 0x335: case 0x345: case 0x355:
1941 case 0x336: case 0x346: case 0x356:
1942 case 0x337: case 0x347: case 0x357:
1943 case 0x338: case 0x348: case 0x358:
1944 case 0x339: case 0x349: case 0x359:
1945 case 0x33a: case 0x34a: case 0x35a:
1946 case 0x33b: case 0x34b: case 0x35b:
1947 case 0x33c: case 0x34c: case 0x35c:
1948 case 0x33d: case 0x34d: case 0x35d:
1949 case 0x33e: case 0x34e: case 0x35e:
1950 case 0x33f: case 0x34f: case 0x35f:
1951 return "SCSI (typically)";
1952
1953 case 0x320:
1954 case 0x321:
1955 case 0x322:
1956 case 0x323:
1957 case 0x324:
1958 case 0x325:
1959 case 0x326:
1960 case 0x327:
1961 return "XT HD";
1962
1963 case 0x3b0:
1964 case 0x3b1:
1965 case 0x3b2:
1966 case 0x3b3:
1967 case 0x3b4:
1968 case 0x3b5:
1969 case 0x3b6:
1970 case 0x3b7:
1971 case 0x3b8:
1972 case 0x3b9:
1973 case 0x3ba:
1974 case 0x3bb:
1975 return "VGA";
1976
1977 case 0x3c0: case 0x3d0:
1978 case 0x3c1: case 0x3d1:
1979 case 0x3c2: case 0x3d2:
1980 case 0x3c3: case 0x3d3:
1981 case 0x3c4: case 0x3d4:
1982 case 0x3c5: case 0x3d5:
1983 case 0x3c6: case 0x3d6:
1984 case 0x3c7: case 0x3d7:
1985 case 0x3c8: case 0x3d8:
1986 case 0x3c9: case 0x3d9:
1987 case 0x3ca: case 0x3da:
1988 case 0x3cb: case 0x3db:
1989 case 0x3cc: case 0x3dc:
1990 case 0x3cd: case 0x3dd:
1991 case 0x3ce: case 0x3de:
1992 case 0x3cf: case 0x3df:
1993 return "VGA/EGA";
1994
1995 case 0x240: case 0x260: case 0x280:
1996 case 0x241: case 0x261: case 0x281:
1997 case 0x242: case 0x262: case 0x282:
1998 case 0x243: case 0x263: case 0x283:
1999 case 0x244: case 0x264: case 0x284:
2000 case 0x245: case 0x265: case 0x285:
2001 case 0x246: case 0x266: case 0x286:
2002 case 0x247: case 0x267: case 0x287:
2003 case 0x248: case 0x268: case 0x288:
2004 case 0x249: case 0x269: case 0x289:
2005 case 0x24a: case 0x26a: case 0x28a:
2006 case 0x24b: case 0x26b: case 0x28b:
2007 case 0x24c: case 0x26c: case 0x28c:
2008 case 0x24d: case 0x26d: case 0x28d:
2009 case 0x24e: case 0x26e: case 0x28e:
2010 case 0x24f: case 0x26f: case 0x28f:
2011 case 0x300:
2012 case 0x301:
2013 case 0x388:
2014 case 0x389:
2015 case 0x38a:
2016 case 0x38b:
2017 return "Sound Card (typically)";
2018
2019 default:
2020 return NULL;
2021 }
2022}
2023#endif /* VBOX_WITH_STATISTICS */
2024
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