VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 45578

Last change on this file since 45578 was 45311, checked in by vboxsync, 12 years ago

IOM: Prepared for using read/write locking, still using the old exclusive stuff though. Found and fixed an REM/IOM lock order issue.
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  • Property svn:keywords set to Id Revision
File size: 79.3 KB
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1/* $Id: IOM.cpp 45311 2013-04-03 14:55:30Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91/** @todo MMIO - simplifying the device end.
92 * - Add a return status for doing DBGFSTOP on access where there are no known
93 * registers.
94 * -
95 *
96 * */
97
98
99/*******************************************************************************
100* Header Files *
101*******************************************************************************/
102#define LOG_GROUP LOG_GROUP_IOM
103#include <VBox/vmm/iom.h>
104#include <VBox/vmm/cpum.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/sup.h>
107#include <VBox/vmm/mm.h>
108#include <VBox/vmm/stam.h>
109#include <VBox/vmm/dbgf.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/pdmdev.h>
112#include "IOMInternal.h"
113#include <VBox/vmm/vm.h>
114
115#include <VBox/param.h>
116#include <iprt/assert.h>
117#include <iprt/alloc.h>
118#include <iprt/string.h>
119#include <VBox/log.h>
120#include <VBox/err.h>
121
122#include "IOMInline.h"
123
124
125/*******************************************************************************
126* Internal Functions *
127*******************************************************************************/
128static void iomR3FlushCache(PVM pVM);
129static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
130static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
131static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
132static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
133static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
134static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
135static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
136static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
137
138#ifdef VBOX_WITH_STATISTICS
139static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
140#endif
141
142
143/**
144 * Initializes the IOM.
145 *
146 * @returns VBox status code.
147 * @param pVM Pointer to the VM.
148 */
149VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
150{
151 LogFlow(("IOMR3Init:\n"));
152
153 /*
154 * Assert alignment and sizes.
155 */
156 AssertCompileMemberAlignment(VM, iom.s, 32);
157 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
158 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
159
160 /*
161 * Setup any fixed pointers and offsets.
162 */
163 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
164
165 /*
166 * Initialize the REM critical section.
167 */
168#ifdef IOM_WITH_CRIT_SECT_RW
169 int rc = PDMR3CritSectRwInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
170#else
171 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
172#endif
173 AssertRCReturn(rc, rc);
174
175 /*
176 * Allocate the trees structure.
177 */
178 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
179 if (RT_SUCCESS(rc))
180 {
181 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
182 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
183 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
184 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
185
186 /*
187 * Info.
188 */
189 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
190 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
191
192 /*
193 * Statistics.
194 */
195 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
205 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
207 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
208 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
209 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
210 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
211#ifdef IOM_WITH_MOVS_SUPPORT
212 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
214 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
215 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
216#endif
217 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
218 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
219 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
220 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
221 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
222 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
223 }
224
225 /* Redundant, but just in case we change something in the future */
226 iomR3FlushCache(pVM);
227
228 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
229 return rc;
230}
231
232
233/**
234 * Flushes the IOM port & statistics lookup cache
235 *
236 * @param pVM The VM.
237 */
238static void iomR3FlushCache(PVM pVM)
239{
240 /*
241 * Since all relevant (1) cache use requires at least read access to the
242 * critical section, we can exclude all other EMTs by grabbing exclusive
243 * access to the critical section and then safely update the caches of
244 * other EMTs.
245 * (1) The irrelvant access not holding the lock is in assertion code.
246 */
247 IOM_LOCK_EXCL(pVM);
248 VMCPUID iCpu = pVM->cCpus;
249 while (iCpu-- > 0)
250 {
251 PVMCPU pVCpu = &pVM->aCpus[iCpu];
252 pVCpu->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
253 pVCpu->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
254 pVCpu->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
255 pVCpu->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
256 pVCpu->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
257 pVCpu->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
258
259 pVCpu->iom.s.pRangeLastReadR3 = NULL;
260 pVCpu->iom.s.pRangeLastWriteR3 = NULL;
261 pVCpu->iom.s.pStatsLastReadR3 = NULL;
262 pVCpu->iom.s.pStatsLastWriteR3 = NULL;
263 pVCpu->iom.s.pMMIORangeLastR3 = NULL;
264 pVCpu->iom.s.pMMIOStatsLastR3 = NULL;
265
266 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
267 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
268 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
269 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
270 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
271 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
272 }
273
274 IOM_UNLOCK_EXCL(pVM);
275}
276
277
278/**
279 * The VM is being reset.
280 *
281 * @param pVM Pointer to the VM.
282 */
283VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
284{
285 iomR3FlushCache(pVM);
286}
287
288
289/**
290 * Applies relocations to data and code managed by this
291 * component. This function will be called at init and
292 * whenever the VMM need to relocate it self inside the GC.
293 *
294 * The IOM will update the addresses used by the switcher.
295 *
296 * @param pVM The VM.
297 * @param offDelta Relocation delta relative to old location.
298 */
299VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
300{
301 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
302
303 /*
304 * Apply relocations to the GC callbacks.
305 */
306 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
307 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
308 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
309
310 if (pVM->iom.s.pfnMMIOHandlerRC)
311 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
312
313 /*
314 * Reset the raw-mode cache (don't bother relocating it).
315 */
316 VMCPUID iCpu = pVM->cCpus;
317 while (iCpu-- > 0)
318 {
319 PVMCPU pVCpu = &pVM->aCpus[iCpu];
320 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
321 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
322 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
323 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
324 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
325 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
326 }
327}
328
329
330/**
331 * Callback function for relocating a I/O port range.
332 *
333 * @returns 0 (continue enum)
334 * @param pNode Pointer to a IOMIOPORTRANGERC node.
335 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
336 * not certain the delta will fit in a void pointer for all possible configs.
337 */
338static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
339{
340 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
341 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
342
343 Assert(pRange->pDevIns);
344 pRange->pDevIns += offDelta;
345 if (pRange->pfnOutCallback)
346 pRange->pfnOutCallback += offDelta;
347 if (pRange->pfnInCallback)
348 pRange->pfnInCallback += offDelta;
349 if (pRange->pfnOutStrCallback)
350 pRange->pfnOutStrCallback += offDelta;
351 if (pRange->pfnInStrCallback)
352 pRange->pfnInStrCallback += offDelta;
353 if (pRange->pvUser > _64K)
354 pRange->pvUser += offDelta;
355 return 0;
356}
357
358
359/**
360 * Callback function for relocating a MMIO range.
361 *
362 * @returns 0 (continue enum)
363 * @param pNode Pointer to a IOMMMIORANGE node.
364 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
365 * not certain the delta will fit in a void pointer for all possible configs.
366 */
367static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
368{
369 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
370 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
371
372 if (pRange->pDevInsRC)
373 pRange->pDevInsRC += offDelta;
374 if (pRange->pfnWriteCallbackRC)
375 pRange->pfnWriteCallbackRC += offDelta;
376 if (pRange->pfnReadCallbackRC)
377 pRange->pfnReadCallbackRC += offDelta;
378 if (pRange->pfnFillCallbackRC)
379 pRange->pfnFillCallbackRC += offDelta;
380 if (pRange->pvUserRC > _64K)
381 pRange->pvUserRC += offDelta;
382
383 return 0;
384}
385
386
387/**
388 * Terminates the IOM.
389 *
390 * Termination means cleaning up and freeing all resources,
391 * the VM it self is at this point powered off or suspended.
392 *
393 * @returns VBox status code.
394 * @param pVM Pointer to the VM.
395 */
396VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
397{
398 /*
399 * IOM is not owning anything but automatically freed resources,
400 * so there's nothing to do here.
401 */
402 NOREF(pVM);
403 return VINF_SUCCESS;
404}
405
406#ifdef VBOX_WITH_STATISTICS
407
408/**
409 * Create the statistics node for an I/O port.
410 *
411 * @returns Pointer to new stats node.
412 *
413 * @param pVM Pointer to the VM.
414 * @param Port Port.
415 * @param pszDesc Description.
416 */
417static PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
418{
419 IOM_LOCK_EXCL(pVM);
420
421 /* check if it already exists. */
422 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
423 if (pPort)
424 {
425 IOM_UNLOCK_EXCL(pVM);
426 return pPort;
427 }
428
429 /* allocate stats node. */
430 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
431 AssertRC(rc);
432 if (RT_SUCCESS(rc))
433 {
434 /* insert into the tree. */
435 pPort->Core.Key = Port;
436 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
437 {
438 IOM_UNLOCK_EXCL(pVM);
439
440 /* put a name on common ports. */
441 if (!pszDesc)
442 pszDesc = iomR3IOPortGetStandardName(Port);
443
444 /* register the statistics counters. */
445 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
446 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
447 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
448 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
449 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
450 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
451
452 /* Profiling */
453 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
454 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
455 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
456 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
457
458 return pPort;
459 }
460
461 AssertMsgFailed(("what! Port=%d\n", Port));
462 MMHyperFree(pVM, pPort);
463 }
464 IOM_UNLOCK_EXCL(pVM);
465 return NULL;
466}
467
468
469/**
470 * Create the statistics node for an MMIO address.
471 *
472 * @returns Pointer to new stats node.
473 *
474 * @param pVM Pointer to the VM.
475 * @param GCPhys The address.
476 * @param pszDesc Description.
477 */
478PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
479{
480 IOM_LOCK_EXCL(pVM);
481
482 /* check if it already exists. */
483 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
484 if (pStats)
485 {
486 IOM_UNLOCK_EXCL(pVM);
487 return pStats;
488 }
489
490 /* allocate stats node. */
491 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
492 AssertRC(rc);
493 if (RT_SUCCESS(rc))
494 {
495 /* insert into the tree. */
496 pStats->Core.Key = GCPhys;
497 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
498 {
499 IOM_UNLOCK_EXCL(pVM);
500
501 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
502 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
503 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
504 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
505 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
506 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
507 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
508
509 return pStats;
510 }
511 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
512 MMHyperFree(pVM, pStats);
513 }
514 IOM_UNLOCK_EXCL(pVM);
515 return NULL;
516}
517
518#endif /* VBOX_WITH_STATISTICS */
519
520/**
521 * Registers a I/O port ring-3 handler.
522 *
523 * This API is called by PDM on behalf of a device. Devices must first register
524 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
525 * and IOMR3IOPortRegisterR0().
526 *
527 *
528 * @returns VBox status code.
529 *
530 * @param pVM Pointer to the VM.
531 * @param pDevIns PDM device instance owning the port range.
532 * @param PortStart First port number in the range.
533 * @param cPorts Number of ports to register.
534 * @param pvUser User argument for the callbacks.
535 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
536 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
537 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
538 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
539 * @param pszDesc Pointer to description string. This must not be freed.
540 */
541VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
542 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
543 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
544{
545 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
546 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
547
548 /*
549 * Validate input.
550 */
551 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
552 || (RTUINT)PortStart + cPorts > 0x10000)
553 {
554 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
555 return VERR_IOM_INVALID_IOPORT_RANGE;
556 }
557 if (!pfnOutCallback && !pfnInCallback)
558 {
559 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
560 return VERR_INVALID_PARAMETER;
561 }
562 if (!pfnOutCallback)
563 pfnOutCallback = iomR3IOPortDummyOut;
564 if (!pfnInCallback)
565 pfnInCallback = iomR3IOPortDummyIn;
566 if (!pfnOutStrCallback)
567 pfnOutStrCallback = iomR3IOPortDummyOutStr;
568 if (!pfnInStrCallback)
569 pfnInStrCallback = iomR3IOPortDummyInStr;
570
571 /* Flush the IO port lookup cache */
572 iomR3FlushCache(pVM);
573
574 /*
575 * Allocate new range record and initialize it.
576 */
577 PIOMIOPORTRANGER3 pRange;
578 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
579 if (RT_SUCCESS(rc))
580 {
581 pRange->Core.Key = PortStart;
582 pRange->Core.KeyLast = PortStart + (cPorts - 1);
583 pRange->Port = PortStart;
584 pRange->cPorts = cPorts;
585 pRange->pvUser = pvUser;
586 pRange->pDevIns = pDevIns;
587 pRange->pfnOutCallback = pfnOutCallback;
588 pRange->pfnInCallback = pfnInCallback;
589 pRange->pfnOutStrCallback = pfnOutStrCallback;
590 pRange->pfnInStrCallback = pfnInStrCallback;
591 pRange->pszDesc = pszDesc;
592
593 /*
594 * Try Insert it.
595 */
596 IOM_LOCK_EXCL(pVM);
597 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
598 {
599#ifdef VBOX_WITH_STATISTICS
600 for (unsigned iPort = 0; iPort < cPorts; iPort++)
601 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
602#endif
603 IOM_UNLOCK_EXCL(pVM);
604 return VINF_SUCCESS;
605 }
606 IOM_UNLOCK_EXCL(pVM);
607
608 /* conflict. */
609 DBGFR3Info(pVM->pUVM, "ioport", NULL, NULL);
610 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
611 MMHyperFree(pVM, pRange);
612 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
613 }
614
615 return rc;
616}
617
618
619/**
620 * Registers a I/O port RC handler.
621 *
622 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
623 * using IOMIOPortRegisterR3() before calling this function.
624 *
625 *
626 * @returns VBox status code.
627 *
628 * @param pVM Pointer to the VM.
629 * @param pDevIns PDM device instance owning the port range.
630 * @param PortStart First port number in the range.
631 * @param cPorts Number of ports to register.
632 * @param pvUser User argument for the callbacks.
633 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
634 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
635 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
636 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
637 * @param pszDesc Pointer to description string. This must not be freed.
638 */
639VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
640 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
641 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
642{
643 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
644 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
645
646 /*
647 * Validate input.
648 */
649 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
650 || (RTUINT)PortStart + cPorts > 0x10000)
651 {
652 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
653 return VERR_IOM_INVALID_IOPORT_RANGE;
654 }
655 RTIOPORT PortLast = PortStart + (cPorts - 1);
656 if (!pfnOutCallback && !pfnInCallback)
657 {
658 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
659 return VERR_INVALID_PARAMETER;
660 }
661
662 IOM_LOCK_EXCL(pVM);
663
664 /*
665 * Validate that there are ring-3 ranges for the ports.
666 */
667 RTIOPORT Port = PortStart;
668 while (Port <= PortLast && Port >= PortStart)
669 {
670 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
671 if (!pRange)
672 {
673 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
674 IOM_UNLOCK_EXCL(pVM);
675 return VERR_IOM_NO_R3_IOPORT_RANGE;
676 }
677#ifndef IOM_NO_PDMINS_CHECKS
678# ifndef IN_RC
679 if (pRange->pDevIns != pDevIns)
680# else
681 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
682# endif
683 {
684 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
685 IOM_UNLOCK_EXCL(pVM);
686 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
687 }
688#endif
689 Port = pRange->Core.KeyLast + 1;
690 }
691
692 /* Flush the IO port lookup cache */
693 iomR3FlushCache(pVM);
694
695 /*
696 * Allocate new range record and initialize it.
697 */
698 PIOMIOPORTRANGERC pRange;
699 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
700 if (RT_SUCCESS(rc))
701 {
702 pRange->Core.Key = PortStart;
703 pRange->Core.KeyLast = PortLast;
704 pRange->Port = PortStart;
705 pRange->cPorts = cPorts;
706 pRange->pvUser = pvUser;
707 pRange->pfnOutCallback = pfnOutCallback;
708 pRange->pfnInCallback = pfnInCallback;
709 pRange->pfnOutStrCallback = pfnOutStrCallback;
710 pRange->pfnInStrCallback = pfnInStrCallback;
711 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
712 pRange->pszDesc = pszDesc;
713
714 /*
715 * Insert it.
716 */
717 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
718 {
719 IOM_UNLOCK_EXCL(pVM);
720 return VINF_SUCCESS;
721 }
722
723 /* conflict. */
724 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
725 MMHyperFree(pVM, pRange);
726 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
727 }
728 IOM_UNLOCK_EXCL(pVM);
729 return rc;
730}
731
732
733/**
734 * Registers a Port IO R0 handler.
735 *
736 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
737 * using IOMR3IOPortRegisterR3() before calling this function.
738 *
739 *
740 * @returns VBox status code.
741 *
742 * @param pVM Pointer to the VM.
743 * @param pDevIns PDM device instance owning the port range.
744 * @param PortStart First port number in the range.
745 * @param cPorts Number of ports to register.
746 * @param pvUser User argument for the callbacks.
747 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
748 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
749 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
750 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
751 * @param pszDesc Pointer to description string. This must not be freed.
752 */
753VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
754 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
755 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
756 const char *pszDesc)
757{
758 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
759 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
760
761 /*
762 * Validate input.
763 */
764 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
765 || (RTUINT)PortStart + cPorts > 0x10000)
766 {
767 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
768 return VERR_IOM_INVALID_IOPORT_RANGE;
769 }
770 RTIOPORT PortLast = PortStart + (cPorts - 1);
771 if (!pfnOutCallback && !pfnInCallback)
772 {
773 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
774 return VERR_INVALID_PARAMETER;
775 }
776
777 IOM_LOCK_EXCL(pVM);
778
779 /*
780 * Validate that there are ring-3 ranges for the ports.
781 */
782 RTIOPORT Port = PortStart;
783 while (Port <= PortLast && Port >= PortStart)
784 {
785 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
786 if (!pRange)
787 {
788 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
789 IOM_UNLOCK_EXCL(pVM);
790 return VERR_IOM_NO_R3_IOPORT_RANGE;
791 }
792#ifndef IOM_NO_PDMINS_CHECKS
793# ifndef IN_RC
794 if (pRange->pDevIns != pDevIns)
795# else
796 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
797# endif
798 {
799 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
800 IOM_UNLOCK_EXCL(pVM);
801 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
802 }
803#endif
804 Port = pRange->Core.KeyLast + 1;
805 }
806
807 /* Flush the IO port lookup cache */
808 iomR3FlushCache(pVM);
809
810 /*
811 * Allocate new range record and initialize it.
812 */
813 PIOMIOPORTRANGER0 pRange;
814 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
815 if (RT_SUCCESS(rc))
816 {
817 pRange->Core.Key = PortStart;
818 pRange->Core.KeyLast = PortLast;
819 pRange->Port = PortStart;
820 pRange->cPorts = cPorts;
821 pRange->pvUser = pvUser;
822 pRange->pfnOutCallback = pfnOutCallback;
823 pRange->pfnInCallback = pfnInCallback;
824 pRange->pfnOutStrCallback = pfnOutStrCallback;
825 pRange->pfnInStrCallback = pfnInStrCallback;
826 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
827 pRange->pszDesc = pszDesc;
828
829 /*
830 * Insert it.
831 */
832 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
833 {
834 IOM_UNLOCK_EXCL(pVM);
835 return VINF_SUCCESS;
836 }
837
838 /* conflict. */
839 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
840 MMHyperFree(pVM, pRange);
841 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
842 }
843 IOM_UNLOCK_EXCL(pVM);
844 return rc;
845}
846
847
848/**
849 * Deregisters a I/O Port range.
850 *
851 * The specified range must be registered using IOMR3IOPortRegister previous to
852 * this call. The range does can be a smaller part of the range specified to
853 * IOMR3IOPortRegister, but it can never be larger.
854 *
855 * This function will remove GC, R0 and R3 context port handlers for this range.
856 *
857 * @returns VBox status code.
858 *
859 * @param pVM The virtual machine.
860 * @param pDevIns The device instance associated with the range.
861 * @param PortStart First port number in the range.
862 * @param cPorts Number of ports to remove starting at PortStart.
863 *
864 * @remark This function mainly for PCI PnP Config and will not do
865 * all the checks you might expect it to do.
866 */
867VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
868{
869 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
870
871 /*
872 * Validate input.
873 */
874 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
875 || (RTUINT)PortStart + cPorts > 0x10000)
876 {
877 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
878 return VERR_IOM_INVALID_IOPORT_RANGE;
879 }
880
881 IOM_LOCK_EXCL(pVM);
882
883 /* Flush the IO port lookup cache */
884 iomR3FlushCache(pVM);
885
886 /*
887 * Check ownership.
888 */
889 RTIOPORT PortLast = PortStart + (cPorts - 1);
890 RTIOPORT Port = PortStart;
891 while (Port <= PortLast && Port >= PortStart)
892 {
893 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
894 if (pRange)
895 {
896 Assert(Port <= pRange->Core.KeyLast);
897#ifndef IOM_NO_PDMINS_CHECKS
898 if (pRange->pDevIns != pDevIns)
899 {
900 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
901 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
902 IOM_UNLOCK_EXCL(pVM);
903 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
904 }
905#endif /* !IOM_NO_PDMINS_CHECKS */
906 Port = pRange->Core.KeyLast;
907 }
908 Port++;
909 }
910
911 /*
912 * Remove any RC ranges first.
913 */
914 int rc = VINF_SUCCESS;
915 Port = PortStart;
916 while (Port <= PortLast && Port >= PortStart)
917 {
918 /*
919 * Try find range.
920 */
921 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
922 if (pRange)
923 {
924 if ( pRange->Core.Key == Port
925 && pRange->Core.KeyLast <= PortLast)
926 {
927 /*
928 * Kick out the entire range.
929 */
930 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
931 Assert(pv == (void *)pRange); NOREF(pv);
932 Port += pRange->cPorts;
933 MMHyperFree(pVM, pRange);
934 }
935 else if (pRange->Core.Key == Port)
936 {
937 /*
938 * Cut of the head of the range, done.
939 */
940 pRange->cPorts -= Port - pRange->Port;
941 pRange->Core.Key = Port;
942 pRange->Port = Port;
943 break;
944 }
945 else if (pRange->Core.KeyLast <= PortLast)
946 {
947 /*
948 * Just cut of the tail.
949 */
950 unsigned c = pRange->Core.KeyLast - Port + 1;
951 pRange->Core.KeyLast -= c;
952 pRange->cPorts -= c;
953 Port += c;
954 }
955 else
956 {
957 /*
958 * Split the range, done.
959 */
960 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
961 /* create tail. */
962 PIOMIOPORTRANGERC pRangeNew;
963 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
964 if (RT_FAILURE(rc2))
965 {
966 IOM_UNLOCK_EXCL(pVM);
967 return rc2;
968 }
969 *pRangeNew = *pRange;
970 pRangeNew->Core.Key = PortLast;
971 pRangeNew->Port = PortLast;
972 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
973
974 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
975
976 /* adjust head */
977 pRange->Core.KeyLast = Port - 1;
978 pRange->cPorts = Port - pRange->Port;
979
980 /* insert */
981 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
982 {
983 AssertMsgFailed(("This cannot happen!\n"));
984 MMHyperFree(pVM, pRangeNew);
985 rc = VERR_IOM_IOPORT_IPE_1;
986 }
987 break;
988 }
989 }
990 else /* next port */
991 Port++;
992 } /* for all ports - RC. */
993
994
995 /*
996 * Remove any R0 ranges.
997 */
998 Port = PortStart;
999 while (Port <= PortLast && Port >= PortStart)
1000 {
1001 /*
1002 * Try find range.
1003 */
1004 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1005 if (pRange)
1006 {
1007 if ( pRange->Core.Key == Port
1008 && pRange->Core.KeyLast <= PortLast)
1009 {
1010 /*
1011 * Kick out the entire range.
1012 */
1013 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1014 Assert(pv == (void *)pRange); NOREF(pv);
1015 Port += pRange->cPorts;
1016 MMHyperFree(pVM, pRange);
1017 }
1018 else if (pRange->Core.Key == Port)
1019 {
1020 /*
1021 * Cut of the head of the range, done.
1022 */
1023 pRange->cPorts -= Port - pRange->Port;
1024 pRange->Core.Key = Port;
1025 pRange->Port = Port;
1026 break;
1027 }
1028 else if (pRange->Core.KeyLast <= PortLast)
1029 {
1030 /*
1031 * Just cut of the tail.
1032 */
1033 unsigned c = pRange->Core.KeyLast - Port + 1;
1034 pRange->Core.KeyLast -= c;
1035 pRange->cPorts -= c;
1036 Port += c;
1037 }
1038 else
1039 {
1040 /*
1041 * Split the range, done.
1042 */
1043 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1044 /* create tail. */
1045 PIOMIOPORTRANGER0 pRangeNew;
1046 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1047 if (RT_FAILURE(rc2))
1048 {
1049 IOM_UNLOCK_EXCL(pVM);
1050 return rc2;
1051 }
1052 *pRangeNew = *pRange;
1053 pRangeNew->Core.Key = PortLast;
1054 pRangeNew->Port = PortLast;
1055 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1056
1057 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1058
1059 /* adjust head */
1060 pRange->Core.KeyLast = Port - 1;
1061 pRange->cPorts = Port - pRange->Port;
1062
1063 /* insert */
1064 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1065 {
1066 AssertMsgFailed(("This cannot happen!\n"));
1067 MMHyperFree(pVM, pRangeNew);
1068 rc = VERR_IOM_IOPORT_IPE_1;
1069 }
1070 break;
1071 }
1072 }
1073 else /* next port */
1074 Port++;
1075 } /* for all ports - R0. */
1076
1077 /*
1078 * And the same procedure for ring-3 ranges.
1079 */
1080 Port = PortStart;
1081 while (Port <= PortLast && Port >= PortStart)
1082 {
1083 /*
1084 * Try find range.
1085 */
1086 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1087 if (pRange)
1088 {
1089 if ( pRange->Core.Key == Port
1090 && pRange->Core.KeyLast <= PortLast)
1091 {
1092 /*
1093 * Kick out the entire range.
1094 */
1095 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1096 Assert(pv == (void *)pRange); NOREF(pv);
1097 Port += pRange->cPorts;
1098 MMHyperFree(pVM, pRange);
1099 }
1100 else if (pRange->Core.Key == Port)
1101 {
1102 /*
1103 * Cut of the head of the range, done.
1104 */
1105 pRange->cPorts -= Port - pRange->Port;
1106 pRange->Core.Key = Port;
1107 pRange->Port = Port;
1108 break;
1109 }
1110 else if (pRange->Core.KeyLast <= PortLast)
1111 {
1112 /*
1113 * Just cut of the tail.
1114 */
1115 unsigned c = pRange->Core.KeyLast - Port + 1;
1116 pRange->Core.KeyLast -= c;
1117 pRange->cPorts -= c;
1118 Port += c;
1119 }
1120 else
1121 {
1122 /*
1123 * Split the range, done.
1124 */
1125 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1126 /* create tail. */
1127 PIOMIOPORTRANGER3 pRangeNew;
1128 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1129 if (RT_FAILURE(rc2))
1130 {
1131 IOM_UNLOCK_EXCL(pVM);
1132 return rc2;
1133 }
1134 *pRangeNew = *pRange;
1135 pRangeNew->Core.Key = PortLast;
1136 pRangeNew->Port = PortLast;
1137 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1138
1139 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1140
1141 /* adjust head */
1142 pRange->Core.KeyLast = Port - 1;
1143 pRange->cPorts = Port - pRange->Port;
1144
1145 /* insert */
1146 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1147 {
1148 AssertMsgFailed(("This cannot happen!\n"));
1149 MMHyperFree(pVM, pRangeNew);
1150 rc = VERR_IOM_IOPORT_IPE_1;
1151 }
1152 break;
1153 }
1154 }
1155 else /* next port */
1156 Port++;
1157 } /* for all ports - ring-3. */
1158
1159 /* done */
1160 IOM_UNLOCK_EXCL(pVM);
1161 return rc;
1162}
1163
1164
1165/**
1166 * Dummy Port I/O Handler for IN operations.
1167 *
1168 * @returns VBox status code.
1169 *
1170 * @param pDevIns The device instance.
1171 * @param pvUser User argument.
1172 * @param Port Port number used for the IN operation.
1173 * @param pu32 Where to store the result.
1174 * @param cb Number of bytes read.
1175 */
1176static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1177{
1178 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1179 switch (cb)
1180 {
1181 case 1: *pu32 = 0xff; break;
1182 case 2: *pu32 = 0xffff; break;
1183 case 4: *pu32 = UINT32_C(0xffffffff); break;
1184 default:
1185 AssertReleaseMsgFailed(("cb=%d\n", cb));
1186 return VERR_IOM_IOPORT_IPE_2;
1187 }
1188 return VINF_SUCCESS;
1189}
1190
1191
1192/**
1193 * Dummy Port I/O Handler for string IN operations.
1194 *
1195 * @returns VBox status code.
1196 *
1197 * @param pDevIns The device instance.
1198 * @param pvUser User argument.
1199 * @param Port Port number used for the string IN operation.
1200 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1201 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1202 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1203 */
1204static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1205 PRTGCUINTREG pcTransfer, unsigned cb)
1206{
1207 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1208 return VINF_SUCCESS;
1209}
1210
1211
1212/**
1213 * Dummy Port I/O Handler for OUT operations.
1214 *
1215 * @returns VBox status code.
1216 *
1217 * @param pDevIns The device instance.
1218 * @param pvUser User argument.
1219 * @param Port Port number used for the OUT operation.
1220 * @param u32 The value to output.
1221 * @param cb The value size in bytes.
1222 */
1223static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1224{
1225 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1226 return VINF_SUCCESS;
1227}
1228
1229
1230/**
1231 * Dummy Port I/O Handler for string OUT operations.
1232 *
1233 * @returns VBox status code.
1234 *
1235 * @param pDevIns The device instance.
1236 * @param pvUser User argument.
1237 * @param Port Port number used for the string OUT operation.
1238 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1239 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1240 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1241 */
1242static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1243 PRTGCUINTREG pcTransfer, unsigned cb)
1244{
1245 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1246 return VINF_SUCCESS;
1247}
1248
1249
1250/**
1251 * Display a single I/O port ring-3 range.
1252 *
1253 * @returns 0
1254 * @param pNode Pointer to I/O port HC range.
1255 * @param pvUser Pointer to info output callback structure.
1256 */
1257static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1258{
1259 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1260 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1261 pHlp->pfnPrintf(pHlp,
1262 "%04x-%04x %p %p %p %p %s\n",
1263 pRange->Core.Key,
1264 pRange->Core.KeyLast,
1265 pRange->pDevIns,
1266 pRange->pfnInCallback,
1267 pRange->pfnOutCallback,
1268 pRange->pvUser,
1269 pRange->pszDesc);
1270 return 0;
1271}
1272
1273
1274/**
1275 * Display a single I/O port GC range.
1276 *
1277 * @returns 0
1278 * @param pNode Pointer to IOPORT GC range.
1279 * @param pvUser Pointer to info output callback structure.
1280 */
1281static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1282{
1283 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1284 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1285 pHlp->pfnPrintf(pHlp,
1286 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1287 pRange->Core.Key,
1288 pRange->Core.KeyLast,
1289 pRange->pDevIns,
1290 pRange->pfnInCallback,
1291 pRange->pfnOutCallback,
1292 pRange->pvUser,
1293 pRange->pszDesc);
1294 return 0;
1295}
1296
1297
1298/**
1299 * Display all registered I/O port ranges.
1300 *
1301 * @param pVM Pointer to the VM.
1302 * @param pHlp The info helpers.
1303 * @param pszArgs Arguments, ignored.
1304 */
1305static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1306{
1307 NOREF(pszArgs);
1308 pHlp->pfnPrintf(pHlp,
1309 "I/O Port R3 ranges (pVM=%p)\n"
1310 "Range %.*s %.*s %.*s %.*s Description\n",
1311 pVM,
1312 sizeof(RTHCPTR) * 2, "pDevIns ",
1313 sizeof(RTHCPTR) * 2, "In ",
1314 sizeof(RTHCPTR) * 2, "Out ",
1315 sizeof(RTHCPTR) * 2, "pvUser ");
1316 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1317
1318 pHlp->pfnPrintf(pHlp,
1319 "I/O Port R0 ranges (pVM=%p)\n"
1320 "Range %.*s %.*s %.*s %.*s Description\n",
1321 pVM,
1322 sizeof(RTHCPTR) * 2, "pDevIns ",
1323 sizeof(RTHCPTR) * 2, "In ",
1324 sizeof(RTHCPTR) * 2, "Out ",
1325 sizeof(RTHCPTR) * 2, "pvUser ");
1326 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1327
1328 pHlp->pfnPrintf(pHlp,
1329 "I/O Port GC ranges (pVM=%p)\n"
1330 "Range %.*s %.*s %.*s %.*s Description\n",
1331 pVM,
1332 sizeof(RTRCPTR) * 2, "pDevIns ",
1333 sizeof(RTRCPTR) * 2, "In ",
1334 sizeof(RTRCPTR) * 2, "Out ",
1335 sizeof(RTRCPTR) * 2, "pvUser ");
1336 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1337}
1338
1339
1340/**
1341 * Registers a Memory Mapped I/O R3 handler.
1342 *
1343 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1344 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1345 *
1346 * @returns VBox status code.
1347 *
1348 * @param pVM Pointer to the VM.
1349 * @param pDevIns PDM device instance owning the MMIO range.
1350 * @param GCPhysStart First physical address in the range.
1351 * @param cbRange The size of the range (in bytes).
1352 * @param pvUser User argument for the callbacks.
1353 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1354 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1355 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1356 * @param pszDesc Pointer to description string. This must not be freed.
1357 */
1358VMMR3_INT_DECL(int)
1359IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1360 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1361 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1362{
1363 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1364 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1365 int rc;
1366
1367 /*
1368 * Validate input.
1369 */
1370 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1371 VERR_IOM_INVALID_MMIO_RANGE);
1372 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1373 && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
1374 && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
1375 ("%#x\n", fFlags),
1376 VERR_INVALID_PARAMETER);
1377
1378 /*
1379 * Resolve the GC/R0 handler addresses lazily because of init order.
1380 */
1381 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1382 {
1383 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1384 AssertLogRelRCReturn(rc, rc);
1385 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1386 AssertLogRelRCReturn(rc, rc);
1387 }
1388
1389 /*
1390 * Allocate new range record and initialize it.
1391 */
1392 PIOMMMIORANGE pRange;
1393 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1394 if (RT_SUCCESS(rc))
1395 {
1396 pRange->Core.Key = GCPhysStart;
1397 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1398 pRange->GCPhys = GCPhysStart;
1399 pRange->cb = cbRange;
1400 pRange->cRefs = 1; /* The tree reference. */
1401 pRange->pszDesc = pszDesc;
1402
1403 //pRange->pvUserR0 = NIL_RTR0PTR;
1404 //pRange->pDevInsR0 = NIL_RTR0PTR;
1405 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1406 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1407 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1408
1409 //pRange->pvUserRC = NIL_RTRCPTR;
1410 //pRange->pDevInsRC = NIL_RTRCPTR;
1411 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1412 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1413 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1414
1415 pRange->fFlags = fFlags;
1416
1417 pRange->pvUserR3 = pvUser;
1418 pRange->pDevInsR3 = pDevIns;
1419 pRange->pfnReadCallbackR3 = pfnReadCallback;
1420 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1421 pRange->pfnFillCallbackR3 = pfnFillCallback;
1422
1423 /*
1424 * Try register it with PGM and then insert it into the tree.
1425 */
1426 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1427 IOMR3MMIOHandler, pRange,
1428 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1429 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1430 if (RT_SUCCESS(rc))
1431 {
1432 IOM_LOCK_EXCL(pVM);
1433 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1434 {
1435 iomR3FlushCache(pVM);
1436 IOM_UNLOCK_EXCL(pVM);
1437 return VINF_SUCCESS;
1438 }
1439
1440 /* bail out */
1441 IOM_UNLOCK_EXCL(pVM);
1442 DBGFR3Info(pVM->pUVM, "mmio", NULL, NULL);
1443 AssertMsgFailed(("This cannot happen!\n"));
1444 rc = VERR_IOM_IOPORT_IPE_3;
1445 }
1446
1447 MMHyperFree(pVM, pRange);
1448 }
1449 if (pDevIns->iInstance > 0)
1450 MMR3HeapFree((void *)pszDesc);
1451 return rc;
1452}
1453
1454
1455/**
1456 * Registers a Memory Mapped I/O RC handler range.
1457 *
1458 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1459 * using IOMMMIORegisterR3() before calling this function.
1460 *
1461 *
1462 * @returns VBox status code.
1463 *
1464 * @param pVM Pointer to the VM.
1465 * @param pDevIns PDM device instance owning the MMIO range.
1466 * @param GCPhysStart First physical address in the range.
1467 * @param cbRange The size of the range (in bytes).
1468 * @param pvUser User argument for the callbacks.
1469 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1470 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1471 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1472 * @thread EMT
1473 */
1474VMMR3_INT_DECL(int)
1475IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1476 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1477 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1478{
1479 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1480 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1481
1482 /*
1483 * Validate input.
1484 */
1485 if (!pfnWriteCallback && !pfnReadCallback)
1486 {
1487 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1488 return VERR_INVALID_PARAMETER;
1489 }
1490 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1491
1492 /*
1493 * Find the MMIO range and check that the input matches.
1494 */
1495 IOM_LOCK_EXCL(pVM);
1496 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1497 AssertReturnStmt(pRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1498 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK_EXCL(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1499 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1500 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1501
1502 pRange->pvUserRC = pvUser;
1503 pRange->pfnReadCallbackRC = pfnReadCallback;
1504 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1505 pRange->pfnFillCallbackRC = pfnFillCallback;
1506 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1507 IOM_UNLOCK_EXCL(pVM);
1508
1509 return VINF_SUCCESS;
1510}
1511
1512
1513/**
1514 * Registers a Memory Mapped I/O R0 handler range.
1515 *
1516 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1517 * using IOMMR3MIORegisterHC() before calling this function.
1518 *
1519 *
1520 * @returns VBox status code.
1521 *
1522 * @param pVM Pointer to the VM.
1523 * @param pDevIns PDM device instance owning the MMIO range.
1524 * @param GCPhysStart First physical address in the range.
1525 * @param cbRange The size of the range (in bytes).
1526 * @param pvUser User argument for the callbacks.
1527 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1528 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1529 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1530 * @thread EMT
1531 */
1532VMMR3_INT_DECL(int)
1533IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1534 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1535 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1536 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1537{
1538 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1539 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1540
1541 /*
1542 * Validate input.
1543 */
1544 if (!pfnWriteCallback && !pfnReadCallback)
1545 {
1546 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1547 return VERR_INVALID_PARAMETER;
1548 }
1549 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1550
1551 /*
1552 * Find the MMIO range and check that the input matches.
1553 */
1554 IOM_LOCK_EXCL(pVM);
1555 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1556 AssertReturnStmt(pRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1557 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK_EXCL(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1558 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1559 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1560
1561 pRange->pvUserR0 = pvUser;
1562 pRange->pfnReadCallbackR0 = pfnReadCallback;
1563 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1564 pRange->pfnFillCallbackR0 = pfnFillCallback;
1565 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1566 IOM_UNLOCK_EXCL(pVM);
1567
1568 return VINF_SUCCESS;
1569}
1570
1571
1572/**
1573 * Deregisters a Memory Mapped I/O handler range.
1574 *
1575 * Registered GC, R0, and R3 ranges are affected.
1576 *
1577 * @returns VBox status code.
1578 *
1579 * @param pVM The virtual machine.
1580 * @param pDevIns Device instance which the MMIO region is registered.
1581 * @param GCPhysStart First physical address (GC) in the range.
1582 * @param cbRange Number of bytes to deregister.
1583 *
1584 * @remark This function mainly for PCI PnP Config and will not do
1585 * all the checks you might expect it to do.
1586 */
1587VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1588{
1589 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1590
1591 /*
1592 * Validate input.
1593 */
1594 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1595 if (GCPhysLast < GCPhysStart)
1596 {
1597 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1598 return VERR_IOM_INVALID_MMIO_RANGE;
1599 }
1600 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1601
1602 IOM_LOCK_EXCL(pVM);
1603
1604 /*
1605 * Check ownership and such for the entire area.
1606 */
1607 RTGCPHYS GCPhys = GCPhysStart;
1608 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1609 {
1610 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
1611 if (!pRange)
1612 {
1613 IOM_UNLOCK_EXCL(pVM);
1614 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1615 }
1616 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1617 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1618 IOM_UNLOCK_EXCL(pVM),
1619 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1620 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1621 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1622 IOM_UNLOCK_EXCL(pVM),
1623 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1624
1625 /* next */
1626 Assert(GCPhys <= pRange->Core.KeyLast);
1627 GCPhys = pRange->Core.KeyLast + 1;
1628 }
1629
1630 /*
1631 * Do the actual removing of the MMIO ranges.
1632 */
1633 GCPhys = GCPhysStart;
1634 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1635 {
1636 iomR3FlushCache(pVM);
1637
1638 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1639 Assert(pRange);
1640 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1641 IOM_UNLOCK_EXCL(pVM); /* Lock order fun. */
1642
1643 /* remove it from PGM */
1644 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1645 AssertRC(rc);
1646
1647 IOM_LOCK_EXCL(pVM);
1648
1649 /* advance and free. */
1650 GCPhys = pRange->Core.KeyLast + 1;
1651 if (pDevIns->iInstance > 0)
1652 {
1653 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1654 MMR3HeapFree(pvDesc);
1655 }
1656 iomMmioReleaseRange(pVM, pRange);
1657 }
1658
1659 IOM_UNLOCK_EXCL(pVM);
1660 return VINF_SUCCESS;
1661}
1662
1663
1664/**
1665 * Display a single MMIO range.
1666 *
1667 * @returns 0
1668 * @param pNode Pointer to MMIO R3 range.
1669 * @param pvUser Pointer to info output callback structure.
1670 */
1671static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1672{
1673 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1674 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1675 pHlp->pfnPrintf(pHlp,
1676 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1677 pRange->Core.Key,
1678 pRange->Core.KeyLast,
1679 pRange->pDevInsR3,
1680 pRange->pfnReadCallbackR3,
1681 pRange->pfnWriteCallbackR3,
1682 pRange->pfnFillCallbackR3,
1683 pRange->pvUserR3,
1684 pRange->pszDesc);
1685 pHlp->pfnPrintf(pHlp,
1686 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1687 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1688 pRange->pDevInsR0,
1689 pRange->pfnReadCallbackR0,
1690 pRange->pfnWriteCallbackR0,
1691 pRange->pfnFillCallbackR0,
1692 pRange->pvUserR0);
1693 pHlp->pfnPrintf(pHlp,
1694 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1695 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1696 pRange->pDevInsRC,
1697 pRange->pfnReadCallbackRC,
1698 pRange->pfnWriteCallbackRC,
1699 pRange->pfnFillCallbackRC,
1700 pRange->pvUserRC);
1701 return 0;
1702}
1703
1704
1705/**
1706 * Display registered MMIO ranges to the log.
1707 *
1708 * @param pVM Pointer to the VM.
1709 * @param pHlp The info helpers.
1710 * @param pszArgs Arguments, ignored.
1711 */
1712static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1713{
1714 NOREF(pszArgs);
1715 pHlp->pfnPrintf(pHlp,
1716 "MMIO ranges (pVM=%p)\n"
1717 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1718 pVM,
1719 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1720 sizeof(RTHCPTR) * 2, "pDevIns ",
1721 sizeof(RTHCPTR) * 2, "Read ",
1722 sizeof(RTHCPTR) * 2, "Write ",
1723 sizeof(RTHCPTR) * 2, "Fill ",
1724 sizeof(RTHCPTR) * 2, "pvUser ",
1725 "Description");
1726 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1727}
1728
1729
1730#ifdef VBOX_WITH_STATISTICS
1731/**
1732 * Tries to come up with the standard name for a port.
1733 *
1734 * @returns Pointer to readonly string if known.
1735 * @returns NULL if unknown port number.
1736 *
1737 * @param Port The port to name.
1738 */
1739static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1740{
1741 switch (Port)
1742 {
1743 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1744 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1745 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1746 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1747 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1748 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1749 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1750 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1751 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1752 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1753 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1754 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1755 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1756 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1757 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1758 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1759
1760 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1761 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1762 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1763 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1764 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1765 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1766 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1767 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1768 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1769 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1770 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1771 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1772 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1773 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1774 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1775 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1776 return "System Reserved";
1777
1778 case 0x60:
1779 case 0x64:
1780 return "Keyboard & Mouse";
1781
1782 case 0x378:
1783 case 0x379:
1784 case 0x37a:
1785 case 0x37b:
1786 case 0x37c:
1787 case 0x37d:
1788 case 0x37e:
1789 case 0x37f:
1790 case 0x3bc:
1791 case 0x3bd:
1792 case 0x3be:
1793 case 0x3bf:
1794 case 0x278:
1795 case 0x279:
1796 case 0x27a:
1797 case 0x27b:
1798 case 0x27c:
1799 case 0x27d:
1800 case 0x27e:
1801 case 0x27f:
1802 return "LPT1/2/3";
1803
1804 case 0x3f8:
1805 case 0x3f9:
1806 case 0x3fa:
1807 case 0x3fb:
1808 case 0x3fc:
1809 case 0x3fd:
1810 case 0x3fe:
1811 case 0x3ff:
1812 return "COM1";
1813
1814 case 0x2f8:
1815 case 0x2f9:
1816 case 0x2fa:
1817 case 0x2fb:
1818 case 0x2fc:
1819 case 0x2fd:
1820 case 0x2fe:
1821 case 0x2ff:
1822 return "COM2";
1823
1824 case 0x3e8:
1825 case 0x3e9:
1826 case 0x3ea:
1827 case 0x3eb:
1828 case 0x3ec:
1829 case 0x3ed:
1830 case 0x3ee:
1831 case 0x3ef:
1832 return "COM3";
1833
1834 case 0x2e8:
1835 case 0x2e9:
1836 case 0x2ea:
1837 case 0x2eb:
1838 case 0x2ec:
1839 case 0x2ed:
1840 case 0x2ee:
1841 case 0x2ef:
1842 return "COM4";
1843
1844 case 0x200:
1845 case 0x201:
1846 case 0x202:
1847 case 0x203:
1848 case 0x204:
1849 case 0x205:
1850 case 0x206:
1851 case 0x207:
1852 return "Joystick";
1853
1854 case 0x3f0:
1855 case 0x3f1:
1856 case 0x3f2:
1857 case 0x3f3:
1858 case 0x3f4:
1859 case 0x3f5:
1860 case 0x3f6:
1861 case 0x3f7:
1862 return "Floppy";
1863
1864 case 0x1f0:
1865 case 0x1f1:
1866 case 0x1f2:
1867 case 0x1f3:
1868 case 0x1f4:
1869 case 0x1f5:
1870 case 0x1f6:
1871 case 0x1f7:
1872 //case 0x3f6:
1873 //case 0x3f7:
1874 return "IDE 1st";
1875
1876 case 0x170:
1877 case 0x171:
1878 case 0x172:
1879 case 0x173:
1880 case 0x174:
1881 case 0x175:
1882 case 0x176:
1883 case 0x177:
1884 case 0x376:
1885 case 0x377:
1886 return "IDE 2nd";
1887
1888 case 0x1e0:
1889 case 0x1e1:
1890 case 0x1e2:
1891 case 0x1e3:
1892 case 0x1e4:
1893 case 0x1e5:
1894 case 0x1e6:
1895 case 0x1e7:
1896 case 0x3e6:
1897 case 0x3e7:
1898 return "IDE 3rd";
1899
1900 case 0x160:
1901 case 0x161:
1902 case 0x162:
1903 case 0x163:
1904 case 0x164:
1905 case 0x165:
1906 case 0x166:
1907 case 0x167:
1908 case 0x366:
1909 case 0x367:
1910 return "IDE 4th";
1911
1912 case 0x130: case 0x140: case 0x150:
1913 case 0x131: case 0x141: case 0x151:
1914 case 0x132: case 0x142: case 0x152:
1915 case 0x133: case 0x143: case 0x153:
1916 case 0x134: case 0x144: case 0x154:
1917 case 0x135: case 0x145: case 0x155:
1918 case 0x136: case 0x146: case 0x156:
1919 case 0x137: case 0x147: case 0x157:
1920 case 0x138: case 0x148: case 0x158:
1921 case 0x139: case 0x149: case 0x159:
1922 case 0x13a: case 0x14a: case 0x15a:
1923 case 0x13b: case 0x14b: case 0x15b:
1924 case 0x13c: case 0x14c: case 0x15c:
1925 case 0x13d: case 0x14d: case 0x15d:
1926 case 0x13e: case 0x14e: case 0x15e:
1927 case 0x13f: case 0x14f: case 0x15f:
1928 case 0x220: case 0x230:
1929 case 0x221: case 0x231:
1930 case 0x222: case 0x232:
1931 case 0x223: case 0x233:
1932 case 0x224: case 0x234:
1933 case 0x225: case 0x235:
1934 case 0x226: case 0x236:
1935 case 0x227: case 0x237:
1936 case 0x228: case 0x238:
1937 case 0x229: case 0x239:
1938 case 0x22a: case 0x23a:
1939 case 0x22b: case 0x23b:
1940 case 0x22c: case 0x23c:
1941 case 0x22d: case 0x23d:
1942 case 0x22e: case 0x23e:
1943 case 0x22f: case 0x23f:
1944 case 0x330: case 0x340: case 0x350:
1945 case 0x331: case 0x341: case 0x351:
1946 case 0x332: case 0x342: case 0x352:
1947 case 0x333: case 0x343: case 0x353:
1948 case 0x334: case 0x344: case 0x354:
1949 case 0x335: case 0x345: case 0x355:
1950 case 0x336: case 0x346: case 0x356:
1951 case 0x337: case 0x347: case 0x357:
1952 case 0x338: case 0x348: case 0x358:
1953 case 0x339: case 0x349: case 0x359:
1954 case 0x33a: case 0x34a: case 0x35a:
1955 case 0x33b: case 0x34b: case 0x35b:
1956 case 0x33c: case 0x34c: case 0x35c:
1957 case 0x33d: case 0x34d: case 0x35d:
1958 case 0x33e: case 0x34e: case 0x35e:
1959 case 0x33f: case 0x34f: case 0x35f:
1960 return "SCSI (typically)";
1961
1962 case 0x320:
1963 case 0x321:
1964 case 0x322:
1965 case 0x323:
1966 case 0x324:
1967 case 0x325:
1968 case 0x326:
1969 case 0x327:
1970 return "XT HD";
1971
1972 case 0x3b0:
1973 case 0x3b1:
1974 case 0x3b2:
1975 case 0x3b3:
1976 case 0x3b4:
1977 case 0x3b5:
1978 case 0x3b6:
1979 case 0x3b7:
1980 case 0x3b8:
1981 case 0x3b9:
1982 case 0x3ba:
1983 case 0x3bb:
1984 return "VGA";
1985
1986 case 0x3c0: case 0x3d0:
1987 case 0x3c1: case 0x3d1:
1988 case 0x3c2: case 0x3d2:
1989 case 0x3c3: case 0x3d3:
1990 case 0x3c4: case 0x3d4:
1991 case 0x3c5: case 0x3d5:
1992 case 0x3c6: case 0x3d6:
1993 case 0x3c7: case 0x3d7:
1994 case 0x3c8: case 0x3d8:
1995 case 0x3c9: case 0x3d9:
1996 case 0x3ca: case 0x3da:
1997 case 0x3cb: case 0x3db:
1998 case 0x3cc: case 0x3dc:
1999 case 0x3cd: case 0x3dd:
2000 case 0x3ce: case 0x3de:
2001 case 0x3cf: case 0x3df:
2002 return "VGA/EGA";
2003
2004 case 0x240: case 0x260: case 0x280:
2005 case 0x241: case 0x261: case 0x281:
2006 case 0x242: case 0x262: case 0x282:
2007 case 0x243: case 0x263: case 0x283:
2008 case 0x244: case 0x264: case 0x284:
2009 case 0x245: case 0x265: case 0x285:
2010 case 0x246: case 0x266: case 0x286:
2011 case 0x247: case 0x267: case 0x287:
2012 case 0x248: case 0x268: case 0x288:
2013 case 0x249: case 0x269: case 0x289:
2014 case 0x24a: case 0x26a: case 0x28a:
2015 case 0x24b: case 0x26b: case 0x28b:
2016 case 0x24c: case 0x26c: case 0x28c:
2017 case 0x24d: case 0x26d: case 0x28d:
2018 case 0x24e: case 0x26e: case 0x28e:
2019 case 0x24f: case 0x26f: case 0x28f:
2020 case 0x300:
2021 case 0x301:
2022 case 0x388:
2023 case 0x389:
2024 case 0x38a:
2025 case 0x38b:
2026 return "Sound Card (typically)";
2027
2028 default:
2029 return NULL;
2030 }
2031}
2032#endif /* VBOX_WITH_STATISTICS */
2033
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