VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 55493

Last change on this file since 55493 was 55493, checked in by vboxsync, 10 years ago

PGM,++: Separated physical access handler callback function pointers from the access handler registrations to reduce footprint and simplify adding a couple of more callbacks.
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1/* $Id: IOM.cpp 55493 2015-04-28 16:51:35Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91/** @todo MMIO - simplifying the device end.
92 * - Add a return status for doing DBGFSTOP on access where there are no known
93 * registers.
94 * -
95 *
96 * */
97
98
99/*******************************************************************************
100* Header Files *
101*******************************************************************************/
102#define LOG_GROUP LOG_GROUP_IOM
103#include <VBox/vmm/iom.h>
104#include <VBox/vmm/cpum.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/sup.h>
107#include <VBox/vmm/hm.h>
108#include <VBox/vmm/mm.h>
109#include <VBox/vmm/stam.h>
110#include <VBox/vmm/dbgf.h>
111#include <VBox/vmm/pdmapi.h>
112#include <VBox/vmm/pdmdev.h>
113#include "IOMInternal.h"
114#include <VBox/vmm/vm.h>
115
116#include <VBox/param.h>
117#include <iprt/assert.h>
118#include <iprt/alloc.h>
119#include <iprt/string.h>
120#include <VBox/log.h>
121#include <VBox/err.h>
122
123#include "IOMInline.h"
124
125
126/*******************************************************************************
127* Internal Functions *
128*******************************************************************************/
129static void iomR3FlushCache(PVM pVM);
130static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
131static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
132static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
133static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
134static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
135static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
136static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
137static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
138
139#ifdef VBOX_WITH_STATISTICS
140static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
141#endif
142
143
144/**
145 * Initializes the IOM.
146 *
147 * @returns VBox status code.
148 * @param pVM Pointer to the VM.
149 */
150VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
151{
152 LogFlow(("IOMR3Init:\n"));
153
154 /*
155 * Assert alignment and sizes.
156 */
157 AssertCompileMemberAlignment(VM, iom.s, 32);
158 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
159 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
160
161 /*
162 * Setup any fixed pointers and offsets.
163 */
164 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
165
166 /*
167 * Initialize the REM critical section.
168 */
169#ifdef IOM_WITH_CRIT_SECT_RW
170 int rc = PDMR3CritSectRwInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
171#else
172 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
173#endif
174 AssertRCReturn(rc, rc);
175
176 /*
177 * Allocate the trees structure.
178 */
179 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
180 if (RT_SUCCESS(rc))
181 {
182 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
183 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
184
185 /*
186 * Register the MMIO access handler type.
187 */
188 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_MMIO,
189 IOMR3MMIOHandler,
190 NULL, "IOMMMIOHandler",
191 NULL, "IOMMMIOHandler",
192 "MMIO",
193 &pVM->iom.s.hMmioHandlerType);
194 AssertRC(rc);
195 if (RT_SUCCESS(rc))
196 {
197
198 /*
199 * Info.
200 */
201 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
202 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
203
204 /*
205 * Statistics.
206 */
207 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
208 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
209 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
210 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
211 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
212 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
214 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
215 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
216 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
217 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
218 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
219 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
220 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
221 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
222 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
223#ifdef IOM_WITH_MOVS_SUPPORT
224 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
225 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
226 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
227 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
228#endif
229 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
230 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
231 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
232 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
233 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
234 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
235 }
236 }
237
238 /* Redundant, but just in case we change something in the future */
239 iomR3FlushCache(pVM);
240
241 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
242 return rc;
243}
244
245
246/**
247 * Flushes the IOM port & statistics lookup cache
248 *
249 * @param pVM The VM.
250 */
251static void iomR3FlushCache(PVM pVM)
252{
253 /*
254 * Since all relevant (1) cache use requires at least read access to the
255 * critical section, we can exclude all other EMTs by grabbing exclusive
256 * access to the critical section and then safely update the caches of
257 * other EMTs.
258 * (1) The irrelvant access not holding the lock is in assertion code.
259 */
260 IOM_LOCK_EXCL(pVM);
261 VMCPUID iCpu = pVM->cCpus;
262 while (iCpu-- > 0)
263 {
264 PVMCPU pVCpu = &pVM->aCpus[iCpu];
265 pVCpu->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
266 pVCpu->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
267 pVCpu->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
268 pVCpu->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
269 pVCpu->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
270 pVCpu->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
271
272 pVCpu->iom.s.pRangeLastReadR3 = NULL;
273 pVCpu->iom.s.pRangeLastWriteR3 = NULL;
274 pVCpu->iom.s.pStatsLastReadR3 = NULL;
275 pVCpu->iom.s.pStatsLastWriteR3 = NULL;
276 pVCpu->iom.s.pMMIORangeLastR3 = NULL;
277 pVCpu->iom.s.pMMIOStatsLastR3 = NULL;
278
279 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
280 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
281 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
282 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
283 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
284 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
285 }
286
287 IOM_UNLOCK_EXCL(pVM);
288}
289
290
291/**
292 * The VM is being reset.
293 *
294 * @param pVM Pointer to the VM.
295 */
296VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
297{
298 iomR3FlushCache(pVM);
299}
300
301
302/**
303 * Applies relocations to data and code managed by this
304 * component. This function will be called at init and
305 * whenever the VMM need to relocate it self inside the GC.
306 *
307 * The IOM will update the addresses used by the switcher.
308 *
309 * @param pVM The VM.
310 * @param offDelta Relocation delta relative to old location.
311 */
312VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
313{
314 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
315
316 /*
317 * Apply relocations to the GC callbacks.
318 */
319 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
320 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
321 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
322
323 /*
324 * Reset the raw-mode cache (don't bother relocating it).
325 */
326 VMCPUID iCpu = pVM->cCpus;
327 while (iCpu-- > 0)
328 {
329 PVMCPU pVCpu = &pVM->aCpus[iCpu];
330 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
331 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
332 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
333 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
334 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
335 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
336 }
337}
338
339
340/**
341 * Callback function for relocating a I/O port range.
342 *
343 * @returns 0 (continue enum)
344 * @param pNode Pointer to a IOMIOPORTRANGERC node.
345 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
346 * not certain the delta will fit in a void pointer for all possible configs.
347 */
348static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
349{
350 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
351 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
352
353 Assert(pRange->pDevIns);
354 pRange->pDevIns += offDelta;
355 if (pRange->pfnOutCallback)
356 pRange->pfnOutCallback += offDelta;
357 if (pRange->pfnInCallback)
358 pRange->pfnInCallback += offDelta;
359 if (pRange->pfnOutStrCallback)
360 pRange->pfnOutStrCallback += offDelta;
361 if (pRange->pfnInStrCallback)
362 pRange->pfnInStrCallback += offDelta;
363 if (pRange->pvUser > _64K)
364 pRange->pvUser += offDelta;
365 return 0;
366}
367
368
369/**
370 * Callback function for relocating a MMIO range.
371 *
372 * @returns 0 (continue enum)
373 * @param pNode Pointer to a IOMMMIORANGE node.
374 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
375 * not certain the delta will fit in a void pointer for all possible configs.
376 */
377static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
378{
379 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
380 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
381
382 if (pRange->pDevInsRC)
383 pRange->pDevInsRC += offDelta;
384 if (pRange->pfnWriteCallbackRC)
385 pRange->pfnWriteCallbackRC += offDelta;
386 if (pRange->pfnReadCallbackRC)
387 pRange->pfnReadCallbackRC += offDelta;
388 if (pRange->pfnFillCallbackRC)
389 pRange->pfnFillCallbackRC += offDelta;
390 if (pRange->pvUserRC > _64K)
391 pRange->pvUserRC += offDelta;
392
393 return 0;
394}
395
396
397/**
398 * Terminates the IOM.
399 *
400 * Termination means cleaning up and freeing all resources,
401 * the VM it self is at this point powered off or suspended.
402 *
403 * @returns VBox status code.
404 * @param pVM Pointer to the VM.
405 */
406VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
407{
408 /*
409 * IOM is not owning anything but automatically freed resources,
410 * so there's nothing to do here.
411 */
412 NOREF(pVM);
413 return VINF_SUCCESS;
414}
415
416#ifdef VBOX_WITH_STATISTICS
417
418/**
419 * Create the statistics node for an I/O port.
420 *
421 * @returns Pointer to new stats node.
422 *
423 * @param pVM Pointer to the VM.
424 * @param Port Port.
425 * @param pszDesc Description.
426 */
427static PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
428{
429 IOM_LOCK_EXCL(pVM);
430
431 /* check if it already exists. */
432 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
433 if (pPort)
434 {
435 IOM_UNLOCK_EXCL(pVM);
436 return pPort;
437 }
438
439 /* allocate stats node. */
440 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
441 AssertRC(rc);
442 if (RT_SUCCESS(rc))
443 {
444 /* insert into the tree. */
445 pPort->Core.Key = Port;
446 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
447 {
448 IOM_UNLOCK_EXCL(pVM);
449
450 /* put a name on common ports. */
451 if (!pszDesc)
452 pszDesc = iomR3IOPortGetStandardName(Port);
453
454 /* register the statistics counters. */
455 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
456 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
457 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
458 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
459 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
460 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
461
462 /* Profiling */
463 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
464 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
465 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
466 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
467
468 return pPort;
469 }
470
471 AssertMsgFailed(("what! Port=%d\n", Port));
472 MMHyperFree(pVM, pPort);
473 }
474 IOM_UNLOCK_EXCL(pVM);
475 return NULL;
476}
477
478
479/**
480 * Create the statistics node for an MMIO address.
481 *
482 * @returns Pointer to new stats node.
483 *
484 * @param pVM Pointer to the VM.
485 * @param GCPhys The address.
486 * @param pszDesc Description.
487 */
488PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
489{
490 IOM_LOCK_EXCL(pVM);
491
492 /* check if it already exists. */
493 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
494 if (pStats)
495 {
496 IOM_UNLOCK_EXCL(pVM);
497 return pStats;
498 }
499
500 /* allocate stats node. */
501 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
502 AssertRC(rc);
503 if (RT_SUCCESS(rc))
504 {
505 /* insert into the tree. */
506 pStats->Core.Key = GCPhys;
507 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
508 {
509 IOM_UNLOCK_EXCL(pVM);
510
511 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
512 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
513 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
514 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
515 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
516 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
517 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
518
519 return pStats;
520 }
521 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
522 MMHyperFree(pVM, pStats);
523 }
524 IOM_UNLOCK_EXCL(pVM);
525 return NULL;
526}
527
528#endif /* VBOX_WITH_STATISTICS */
529
530/**
531 * Registers a I/O port ring-3 handler.
532 *
533 * This API is called by PDM on behalf of a device. Devices must first register
534 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
535 * and IOMR3IOPortRegisterR0().
536 *
537 *
538 * @returns VBox status code.
539 *
540 * @param pVM Pointer to the VM.
541 * @param pDevIns PDM device instance owning the port range.
542 * @param PortStart First port number in the range.
543 * @param cPorts Number of ports to register.
544 * @param pvUser User argument for the callbacks.
545 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
546 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
547 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
548 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
549 * @param pszDesc Pointer to description string. This must not be freed.
550 */
551VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
552 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
553 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
554{
555 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
556 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
557
558 /*
559 * Validate input.
560 */
561 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
562 || (RTUINT)PortStart + cPorts > 0x10000)
563 {
564 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
565 return VERR_IOM_INVALID_IOPORT_RANGE;
566 }
567 if (!pfnOutCallback && !pfnInCallback)
568 {
569 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
570 return VERR_INVALID_PARAMETER;
571 }
572 if (!pfnOutCallback)
573 pfnOutCallback = iomR3IOPortDummyOut;
574 if (!pfnInCallback)
575 pfnInCallback = iomR3IOPortDummyIn;
576 if (!pfnOutStrCallback)
577 pfnOutStrCallback = iomR3IOPortDummyOutStr;
578 if (!pfnInStrCallback)
579 pfnInStrCallback = iomR3IOPortDummyInStr;
580
581 /* Flush the IO port lookup cache */
582 iomR3FlushCache(pVM);
583
584 /*
585 * Allocate new range record and initialize it.
586 */
587 PIOMIOPORTRANGER3 pRange;
588 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
589 if (RT_SUCCESS(rc))
590 {
591 pRange->Core.Key = PortStart;
592 pRange->Core.KeyLast = PortStart + (cPorts - 1);
593 pRange->Port = PortStart;
594 pRange->cPorts = cPorts;
595 pRange->pvUser = pvUser;
596 pRange->pDevIns = pDevIns;
597 pRange->pfnOutCallback = pfnOutCallback;
598 pRange->pfnInCallback = pfnInCallback;
599 pRange->pfnOutStrCallback = pfnOutStrCallback;
600 pRange->pfnInStrCallback = pfnInStrCallback;
601 pRange->pszDesc = pszDesc;
602
603 /*
604 * Try Insert it.
605 */
606 IOM_LOCK_EXCL(pVM);
607 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
608 {
609#ifdef VBOX_WITH_STATISTICS
610 for (unsigned iPort = 0; iPort < cPorts; iPort++)
611 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
612#endif
613 IOM_UNLOCK_EXCL(pVM);
614 return VINF_SUCCESS;
615 }
616 IOM_UNLOCK_EXCL(pVM);
617
618 /* conflict. */
619 DBGFR3Info(pVM->pUVM, "ioport", NULL, NULL);
620 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
621 MMHyperFree(pVM, pRange);
622 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
623 }
624
625 return rc;
626}
627
628
629/**
630 * Registers a I/O port RC handler.
631 *
632 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
633 * using IOMIOPortRegisterR3() before calling this function.
634 *
635 *
636 * @returns VBox status code.
637 *
638 * @param pVM Pointer to the VM.
639 * @param pDevIns PDM device instance owning the port range.
640 * @param PortStart First port number in the range.
641 * @param cPorts Number of ports to register.
642 * @param pvUser User argument for the callbacks.
643 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
644 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
645 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
646 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
647 * @param pszDesc Pointer to description string. This must not be freed.
648 */
649VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
650 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
651 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
652{
653 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
654 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
655 AssertReturn(!HMIsEnabled(pVM), VERR_IOM_HM_IPE);
656
657 /*
658 * Validate input.
659 */
660 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
661 || (RTUINT)PortStart + cPorts > 0x10000)
662 {
663 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
664 return VERR_IOM_INVALID_IOPORT_RANGE;
665 }
666 RTIOPORT PortLast = PortStart + (cPorts - 1);
667 if (!pfnOutCallback && !pfnInCallback)
668 {
669 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
670 return VERR_INVALID_PARAMETER;
671 }
672
673 IOM_LOCK_EXCL(pVM);
674
675 /*
676 * Validate that there are ring-3 ranges for the ports.
677 */
678 RTIOPORT Port = PortStart;
679 while (Port <= PortLast && Port >= PortStart)
680 {
681 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
682 if (!pRange)
683 {
684 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
685 IOM_UNLOCK_EXCL(pVM);
686 return VERR_IOM_NO_R3_IOPORT_RANGE;
687 }
688#ifndef IOM_NO_PDMINS_CHECKS
689# ifndef IN_RC
690 if (pRange->pDevIns != pDevIns)
691# else
692 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
693# endif
694 {
695 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
696 IOM_UNLOCK_EXCL(pVM);
697 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
698 }
699#endif
700 Port = pRange->Core.KeyLast + 1;
701 }
702
703 /* Flush the IO port lookup cache */
704 iomR3FlushCache(pVM);
705
706 /*
707 * Allocate new range record and initialize it.
708 */
709 PIOMIOPORTRANGERC pRange;
710 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
711 if (RT_SUCCESS(rc))
712 {
713 pRange->Core.Key = PortStart;
714 pRange->Core.KeyLast = PortLast;
715 pRange->Port = PortStart;
716 pRange->cPorts = cPorts;
717 pRange->pvUser = pvUser;
718 pRange->pfnOutCallback = pfnOutCallback;
719 pRange->pfnInCallback = pfnInCallback;
720 pRange->pfnOutStrCallback = pfnOutStrCallback;
721 pRange->pfnInStrCallback = pfnInStrCallback;
722 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
723 pRange->pszDesc = pszDesc;
724
725 /*
726 * Insert it.
727 */
728 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
729 {
730 IOM_UNLOCK_EXCL(pVM);
731 return VINF_SUCCESS;
732 }
733
734 /* conflict. */
735 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
736 MMHyperFree(pVM, pRange);
737 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
738 }
739 IOM_UNLOCK_EXCL(pVM);
740 return rc;
741}
742
743
744/**
745 * Registers a Port IO R0 handler.
746 *
747 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
748 * using IOMR3IOPortRegisterR3() before calling this function.
749 *
750 *
751 * @returns VBox status code.
752 *
753 * @param pVM Pointer to the VM.
754 * @param pDevIns PDM device instance owning the port range.
755 * @param PortStart First port number in the range.
756 * @param cPorts Number of ports to register.
757 * @param pvUser User argument for the callbacks.
758 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
759 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
760 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
761 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
762 * @param pszDesc Pointer to description string. This must not be freed.
763 */
764VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
765 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
766 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
767 const char *pszDesc)
768{
769 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
770 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
771
772 /*
773 * Validate input.
774 */
775 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
776 || (RTUINT)PortStart + cPorts > 0x10000)
777 {
778 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
779 return VERR_IOM_INVALID_IOPORT_RANGE;
780 }
781 RTIOPORT PortLast = PortStart + (cPorts - 1);
782 if (!pfnOutCallback && !pfnInCallback)
783 {
784 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
785 return VERR_INVALID_PARAMETER;
786 }
787
788 IOM_LOCK_EXCL(pVM);
789
790 /*
791 * Validate that there are ring-3 ranges for the ports.
792 */
793 RTIOPORT Port = PortStart;
794 while (Port <= PortLast && Port >= PortStart)
795 {
796 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
797 if (!pRange)
798 {
799 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
800 IOM_UNLOCK_EXCL(pVM);
801 return VERR_IOM_NO_R3_IOPORT_RANGE;
802 }
803#ifndef IOM_NO_PDMINS_CHECKS
804# ifndef IN_RC
805 if (pRange->pDevIns != pDevIns)
806# else
807 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
808# endif
809 {
810 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
811 IOM_UNLOCK_EXCL(pVM);
812 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
813 }
814#endif
815 Port = pRange->Core.KeyLast + 1;
816 }
817
818 /* Flush the IO port lookup cache */
819 iomR3FlushCache(pVM);
820
821 /*
822 * Allocate new range record and initialize it.
823 */
824 PIOMIOPORTRANGER0 pRange;
825 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
826 if (RT_SUCCESS(rc))
827 {
828 pRange->Core.Key = PortStart;
829 pRange->Core.KeyLast = PortLast;
830 pRange->Port = PortStart;
831 pRange->cPorts = cPorts;
832 pRange->pvUser = pvUser;
833 pRange->pfnOutCallback = pfnOutCallback;
834 pRange->pfnInCallback = pfnInCallback;
835 pRange->pfnOutStrCallback = pfnOutStrCallback;
836 pRange->pfnInStrCallback = pfnInStrCallback;
837 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
838 pRange->pszDesc = pszDesc;
839
840 /*
841 * Insert it.
842 */
843 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
844 {
845 IOM_UNLOCK_EXCL(pVM);
846 return VINF_SUCCESS;
847 }
848
849 /* conflict. */
850 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
851 MMHyperFree(pVM, pRange);
852 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
853 }
854 IOM_UNLOCK_EXCL(pVM);
855 return rc;
856}
857
858
859/**
860 * Deregisters a I/O Port range.
861 *
862 * The specified range must be registered using IOMR3IOPortRegister previous to
863 * this call. The range does can be a smaller part of the range specified to
864 * IOMR3IOPortRegister, but it can never be larger.
865 *
866 * This function will remove GC, R0 and R3 context port handlers for this range.
867 *
868 * @returns VBox status code.
869 *
870 * @param pVM The virtual machine.
871 * @param pDevIns The device instance associated with the range.
872 * @param PortStart First port number in the range.
873 * @param cPorts Number of ports to remove starting at PortStart.
874 *
875 * @remark This function mainly for PCI PnP Config and will not do
876 * all the checks you might expect it to do.
877 */
878VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
879{
880 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
881
882 /*
883 * Validate input.
884 */
885 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
886 || (RTUINT)PortStart + cPorts > 0x10000)
887 {
888 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
889 return VERR_IOM_INVALID_IOPORT_RANGE;
890 }
891
892 IOM_LOCK_EXCL(pVM);
893
894 /* Flush the IO port lookup cache */
895 iomR3FlushCache(pVM);
896
897 /*
898 * Check ownership.
899 */
900 RTIOPORT PortLast = PortStart + (cPorts - 1);
901 RTIOPORT Port = PortStart;
902 while (Port <= PortLast && Port >= PortStart)
903 {
904 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
905 if (pRange)
906 {
907 Assert(Port <= pRange->Core.KeyLast);
908#ifndef IOM_NO_PDMINS_CHECKS
909 if (pRange->pDevIns != pDevIns)
910 {
911 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
912 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
913 IOM_UNLOCK_EXCL(pVM);
914 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
915 }
916#endif /* !IOM_NO_PDMINS_CHECKS */
917 Port = pRange->Core.KeyLast;
918 }
919 Port++;
920 }
921
922 /*
923 * Remove any RC ranges first.
924 */
925 int rc = VINF_SUCCESS;
926 Port = PortStart;
927 while (Port <= PortLast && Port >= PortStart)
928 {
929 /*
930 * Try find range.
931 */
932 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
933 if (pRange)
934 {
935 if ( pRange->Core.Key == Port
936 && pRange->Core.KeyLast <= PortLast)
937 {
938 /*
939 * Kick out the entire range.
940 */
941 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
942 Assert(pv == (void *)pRange); NOREF(pv);
943 Port += pRange->cPorts;
944 MMHyperFree(pVM, pRange);
945 }
946 else if (pRange->Core.Key == Port)
947 {
948 /*
949 * Cut of the head of the range, done.
950 */
951 pRange->cPorts -= Port - pRange->Port;
952 pRange->Core.Key = Port;
953 pRange->Port = Port;
954 break;
955 }
956 else if (pRange->Core.KeyLast <= PortLast)
957 {
958 /*
959 * Just cut of the tail.
960 */
961 unsigned c = pRange->Core.KeyLast - Port + 1;
962 pRange->Core.KeyLast -= c;
963 pRange->cPorts -= c;
964 Port += c;
965 }
966 else
967 {
968 /*
969 * Split the range, done.
970 */
971 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
972 /* create tail. */
973 PIOMIOPORTRANGERC pRangeNew;
974 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
975 if (RT_FAILURE(rc2))
976 {
977 IOM_UNLOCK_EXCL(pVM);
978 return rc2;
979 }
980 *pRangeNew = *pRange;
981 pRangeNew->Core.Key = PortLast;
982 pRangeNew->Port = PortLast;
983 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
984
985 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
986
987 /* adjust head */
988 pRange->Core.KeyLast = Port - 1;
989 pRange->cPorts = Port - pRange->Port;
990
991 /* insert */
992 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
993 {
994 AssertMsgFailed(("This cannot happen!\n"));
995 MMHyperFree(pVM, pRangeNew);
996 rc = VERR_IOM_IOPORT_IPE_1;
997 }
998 break;
999 }
1000 }
1001 else /* next port */
1002 Port++;
1003 } /* for all ports - RC. */
1004
1005
1006 /*
1007 * Remove any R0 ranges.
1008 */
1009 Port = PortStart;
1010 while (Port <= PortLast && Port >= PortStart)
1011 {
1012 /*
1013 * Try find range.
1014 */
1015 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1016 if (pRange)
1017 {
1018 if ( pRange->Core.Key == Port
1019 && pRange->Core.KeyLast <= PortLast)
1020 {
1021 /*
1022 * Kick out the entire range.
1023 */
1024 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1025 Assert(pv == (void *)pRange); NOREF(pv);
1026 Port += pRange->cPorts;
1027 MMHyperFree(pVM, pRange);
1028 }
1029 else if (pRange->Core.Key == Port)
1030 {
1031 /*
1032 * Cut of the head of the range, done.
1033 */
1034 pRange->cPorts -= Port - pRange->Port;
1035 pRange->Core.Key = Port;
1036 pRange->Port = Port;
1037 break;
1038 }
1039 else if (pRange->Core.KeyLast <= PortLast)
1040 {
1041 /*
1042 * Just cut of the tail.
1043 */
1044 unsigned c = pRange->Core.KeyLast - Port + 1;
1045 pRange->Core.KeyLast -= c;
1046 pRange->cPorts -= c;
1047 Port += c;
1048 }
1049 else
1050 {
1051 /*
1052 * Split the range, done.
1053 */
1054 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1055 /* create tail. */
1056 PIOMIOPORTRANGER0 pRangeNew;
1057 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1058 if (RT_FAILURE(rc2))
1059 {
1060 IOM_UNLOCK_EXCL(pVM);
1061 return rc2;
1062 }
1063 *pRangeNew = *pRange;
1064 pRangeNew->Core.Key = PortLast;
1065 pRangeNew->Port = PortLast;
1066 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1067
1068 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1069
1070 /* adjust head */
1071 pRange->Core.KeyLast = Port - 1;
1072 pRange->cPorts = Port - pRange->Port;
1073
1074 /* insert */
1075 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1076 {
1077 AssertMsgFailed(("This cannot happen!\n"));
1078 MMHyperFree(pVM, pRangeNew);
1079 rc = VERR_IOM_IOPORT_IPE_1;
1080 }
1081 break;
1082 }
1083 }
1084 else /* next port */
1085 Port++;
1086 } /* for all ports - R0. */
1087
1088 /*
1089 * And the same procedure for ring-3 ranges.
1090 */
1091 Port = PortStart;
1092 while (Port <= PortLast && Port >= PortStart)
1093 {
1094 /*
1095 * Try find range.
1096 */
1097 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1098 if (pRange)
1099 {
1100 if ( pRange->Core.Key == Port
1101 && pRange->Core.KeyLast <= PortLast)
1102 {
1103 /*
1104 * Kick out the entire range.
1105 */
1106 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1107 Assert(pv == (void *)pRange); NOREF(pv);
1108 Port += pRange->cPorts;
1109 MMHyperFree(pVM, pRange);
1110 }
1111 else if (pRange->Core.Key == Port)
1112 {
1113 /*
1114 * Cut of the head of the range, done.
1115 */
1116 pRange->cPorts -= Port - pRange->Port;
1117 pRange->Core.Key = Port;
1118 pRange->Port = Port;
1119 break;
1120 }
1121 else if (pRange->Core.KeyLast <= PortLast)
1122 {
1123 /*
1124 * Just cut of the tail.
1125 */
1126 unsigned c = pRange->Core.KeyLast - Port + 1;
1127 pRange->Core.KeyLast -= c;
1128 pRange->cPorts -= c;
1129 Port += c;
1130 }
1131 else
1132 {
1133 /*
1134 * Split the range, done.
1135 */
1136 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1137 /* create tail. */
1138 PIOMIOPORTRANGER3 pRangeNew;
1139 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1140 if (RT_FAILURE(rc2))
1141 {
1142 IOM_UNLOCK_EXCL(pVM);
1143 return rc2;
1144 }
1145 *pRangeNew = *pRange;
1146 pRangeNew->Core.Key = PortLast;
1147 pRangeNew->Port = PortLast;
1148 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1149
1150 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1151
1152 /* adjust head */
1153 pRange->Core.KeyLast = Port - 1;
1154 pRange->cPorts = Port - pRange->Port;
1155
1156 /* insert */
1157 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1158 {
1159 AssertMsgFailed(("This cannot happen!\n"));
1160 MMHyperFree(pVM, pRangeNew);
1161 rc = VERR_IOM_IOPORT_IPE_1;
1162 }
1163 break;
1164 }
1165 }
1166 else /* next port */
1167 Port++;
1168 } /* for all ports - ring-3. */
1169
1170 /* done */
1171 IOM_UNLOCK_EXCL(pVM);
1172 return rc;
1173}
1174
1175
1176/**
1177 * Dummy Port I/O Handler for IN operations.
1178 *
1179 * @returns VBox status code.
1180 *
1181 * @param pDevIns The device instance.
1182 * @param pvUser User argument.
1183 * @param Port Port number used for the IN operation.
1184 * @param pu32 Where to store the result.
1185 * @param cb Number of bytes read.
1186 */
1187static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1188{
1189 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1190 switch (cb)
1191 {
1192 case 1: *pu32 = 0xff; break;
1193 case 2: *pu32 = 0xffff; break;
1194 case 4: *pu32 = UINT32_C(0xffffffff); break;
1195 default:
1196 AssertReleaseMsgFailed(("cb=%d\n", cb));
1197 return VERR_IOM_IOPORT_IPE_2;
1198 }
1199 return VINF_SUCCESS;
1200}
1201
1202
1203/**
1204 * Dummy Port I/O Handler for string IN operations.
1205 *
1206 * @returns VBox status code.
1207 *
1208 * @param pDevIns The device instance.
1209 * @param pvUser User argument.
1210 * @param Port Port number used for the string IN operation.
1211 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1212 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1213 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1214 */
1215static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1216 PRTGCUINTREG pcTransfer, unsigned cb)
1217{
1218 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1219 return VINF_SUCCESS;
1220}
1221
1222
1223/**
1224 * Dummy Port I/O Handler for OUT operations.
1225 *
1226 * @returns VBox status code.
1227 *
1228 * @param pDevIns The device instance.
1229 * @param pvUser User argument.
1230 * @param Port Port number used for the OUT operation.
1231 * @param u32 The value to output.
1232 * @param cb The value size in bytes.
1233 */
1234static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1235{
1236 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1237 return VINF_SUCCESS;
1238}
1239
1240
1241/**
1242 * Dummy Port I/O Handler for string OUT operations.
1243 *
1244 * @returns VBox status code.
1245 *
1246 * @param pDevIns The device instance.
1247 * @param pvUser User argument.
1248 * @param Port Port number used for the string OUT operation.
1249 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1250 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1251 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1252 */
1253static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1254 PRTGCUINTREG pcTransfer, unsigned cb)
1255{
1256 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1257 return VINF_SUCCESS;
1258}
1259
1260
1261/**
1262 * Display a single I/O port ring-3 range.
1263 *
1264 * @returns 0
1265 * @param pNode Pointer to I/O port HC range.
1266 * @param pvUser Pointer to info output callback structure.
1267 */
1268static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1269{
1270 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1271 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1272 pHlp->pfnPrintf(pHlp,
1273 "%04x-%04x %p %p %p %p %s\n",
1274 pRange->Core.Key,
1275 pRange->Core.KeyLast,
1276 pRange->pDevIns,
1277 pRange->pfnInCallback,
1278 pRange->pfnOutCallback,
1279 pRange->pvUser,
1280 pRange->pszDesc);
1281 return 0;
1282}
1283
1284
1285/**
1286 * Display a single I/O port GC range.
1287 *
1288 * @returns 0
1289 * @param pNode Pointer to IOPORT GC range.
1290 * @param pvUser Pointer to info output callback structure.
1291 */
1292static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1293{
1294 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1295 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1296 pHlp->pfnPrintf(pHlp,
1297 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1298 pRange->Core.Key,
1299 pRange->Core.KeyLast,
1300 pRange->pDevIns,
1301 pRange->pfnInCallback,
1302 pRange->pfnOutCallback,
1303 pRange->pvUser,
1304 pRange->pszDesc);
1305 return 0;
1306}
1307
1308
1309/**
1310 * Display all registered I/O port ranges.
1311 *
1312 * @param pVM Pointer to the VM.
1313 * @param pHlp The info helpers.
1314 * @param pszArgs Arguments, ignored.
1315 */
1316static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1317{
1318 NOREF(pszArgs);
1319 pHlp->pfnPrintf(pHlp,
1320 "I/O Port R3 ranges (pVM=%p)\n"
1321 "Range %.*s %.*s %.*s %.*s Description\n",
1322 pVM,
1323 sizeof(RTHCPTR) * 2, "pDevIns ",
1324 sizeof(RTHCPTR) * 2, "In ",
1325 sizeof(RTHCPTR) * 2, "Out ",
1326 sizeof(RTHCPTR) * 2, "pvUser ");
1327 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1328
1329 pHlp->pfnPrintf(pHlp,
1330 "I/O Port R0 ranges (pVM=%p)\n"
1331 "Range %.*s %.*s %.*s %.*s Description\n",
1332 pVM,
1333 sizeof(RTHCPTR) * 2, "pDevIns ",
1334 sizeof(RTHCPTR) * 2, "In ",
1335 sizeof(RTHCPTR) * 2, "Out ",
1336 sizeof(RTHCPTR) * 2, "pvUser ");
1337 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1338
1339 pHlp->pfnPrintf(pHlp,
1340 "I/O Port GC ranges (pVM=%p)\n"
1341 "Range %.*s %.*s %.*s %.*s Description\n",
1342 pVM,
1343 sizeof(RTRCPTR) * 2, "pDevIns ",
1344 sizeof(RTRCPTR) * 2, "In ",
1345 sizeof(RTRCPTR) * 2, "Out ",
1346 sizeof(RTRCPTR) * 2, "pvUser ");
1347 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1348}
1349
1350
1351/**
1352 * Registers a Memory Mapped I/O R3 handler.
1353 *
1354 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1355 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1356 *
1357 * @returns VBox status code.
1358 *
1359 * @param pVM Pointer to the VM.
1360 * @param pDevIns PDM device instance owning the MMIO range.
1361 * @param GCPhysStart First physical address in the range.
1362 * @param cbRange The size of the range (in bytes).
1363 * @param pvUser User argument for the callbacks.
1364 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1365 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1366 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1367 * @param pszDesc Pointer to description string. This must not be freed.
1368 */
1369VMMR3_INT_DECL(int)
1370IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1371 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1372 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1373{
1374 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1375 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1376 int rc;
1377
1378 /*
1379 * Validate input.
1380 */
1381 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1382 VERR_IOM_INVALID_MMIO_RANGE);
1383 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1384 && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
1385 && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
1386 ("%#x\n", fFlags),
1387 VERR_INVALID_PARAMETER);
1388
1389 /*
1390 * Allocate new range record and initialize it.
1391 */
1392 PIOMMMIORANGE pRange;
1393 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1394 if (RT_SUCCESS(rc))
1395 {
1396 pRange->Core.Key = GCPhysStart;
1397 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1398 pRange->GCPhys = GCPhysStart;
1399 pRange->cb = cbRange;
1400 pRange->cRefs = 1; /* The tree reference. */
1401 pRange->pszDesc = pszDesc;
1402
1403 //pRange->pvUserR0 = NIL_RTR0PTR;
1404 //pRange->pDevInsR0 = NIL_RTR0PTR;
1405 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1406 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1407 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1408
1409 //pRange->pvUserRC = NIL_RTRCPTR;
1410 //pRange->pDevInsRC = NIL_RTRCPTR;
1411 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1412 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1413 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1414
1415 pRange->fFlags = fFlags;
1416
1417 pRange->pvUserR3 = pvUser;
1418 pRange->pDevInsR3 = pDevIns;
1419 pRange->pfnReadCallbackR3 = pfnReadCallback;
1420 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1421 pRange->pfnFillCallbackR3 = pfnFillCallback;
1422
1423 /*
1424 * Try register it with PGM and then insert it into the tree.
1425 */
1426 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange, pVM->iom.s.hMmioHandlerType,
1427 pRange, MMHyperR3ToR0(pVM, pRange), MMHyperR3ToRC(pVM, pRange), pszDesc);
1428 if (RT_SUCCESS(rc))
1429 {
1430 IOM_LOCK_EXCL(pVM);
1431 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1432 {
1433 iomR3FlushCache(pVM);
1434 IOM_UNLOCK_EXCL(pVM);
1435 return VINF_SUCCESS;
1436 }
1437
1438 /* bail out */
1439 IOM_UNLOCK_EXCL(pVM);
1440 DBGFR3Info(pVM->pUVM, "mmio", NULL, NULL);
1441 AssertMsgFailed(("This cannot happen!\n"));
1442 rc = VERR_IOM_IOPORT_IPE_3;
1443 }
1444
1445 MMHyperFree(pVM, pRange);
1446 }
1447 if (pDevIns->iInstance > 0)
1448 MMR3HeapFree((void *)pszDesc);
1449 return rc;
1450}
1451
1452
1453/**
1454 * Registers a Memory Mapped I/O RC handler range.
1455 *
1456 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1457 * using IOMMMIORegisterR3() before calling this function.
1458 *
1459 *
1460 * @returns VBox status code.
1461 *
1462 * @param pVM Pointer to the VM.
1463 * @param pDevIns PDM device instance owning the MMIO range.
1464 * @param GCPhysStart First physical address in the range.
1465 * @param cbRange The size of the range (in bytes).
1466 * @param pvUser User argument for the callbacks.
1467 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1468 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1469 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1470 * @thread EMT
1471 */
1472VMMR3_INT_DECL(int)
1473IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1474 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1475 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1476{
1477 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1478 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1479 AssertReturn(!HMIsEnabled(pVM), VERR_IOM_HM_IPE);
1480
1481 /*
1482 * Validate input.
1483 */
1484 if (!pfnWriteCallback && !pfnReadCallback)
1485 {
1486 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1487 return VERR_INVALID_PARAMETER;
1488 }
1489 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1490
1491 /*
1492 * Find the MMIO range and check that the input matches.
1493 */
1494 IOM_LOCK_EXCL(pVM);
1495 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1496 AssertReturnStmt(pRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1497 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK_EXCL(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1498 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1499 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1500
1501 pRange->pvUserRC = pvUser;
1502 pRange->pfnReadCallbackRC = pfnReadCallback;
1503 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1504 pRange->pfnFillCallbackRC = pfnFillCallback;
1505 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1506 IOM_UNLOCK_EXCL(pVM);
1507
1508 return VINF_SUCCESS;
1509}
1510
1511
1512/**
1513 * Registers a Memory Mapped I/O R0 handler range.
1514 *
1515 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1516 * using IOMMR3MIORegisterHC() before calling this function.
1517 *
1518 *
1519 * @returns VBox status code.
1520 *
1521 * @param pVM Pointer to the VM.
1522 * @param pDevIns PDM device instance owning the MMIO range.
1523 * @param GCPhysStart First physical address in the range.
1524 * @param cbRange The size of the range (in bytes).
1525 * @param pvUser User argument for the callbacks.
1526 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1527 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1528 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1529 * @thread EMT
1530 */
1531VMMR3_INT_DECL(int)
1532IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1533 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1534 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1535 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1536{
1537 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1538 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1539
1540 /*
1541 * Validate input.
1542 */
1543 if (!pfnWriteCallback && !pfnReadCallback)
1544 {
1545 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1546 return VERR_INVALID_PARAMETER;
1547 }
1548 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1549
1550 /*
1551 * Find the MMIO range and check that the input matches.
1552 */
1553 IOM_LOCK_EXCL(pVM);
1554 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1555 AssertReturnStmt(pRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1556 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK_EXCL(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1557 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1558 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1559
1560 pRange->pvUserR0 = pvUser;
1561 pRange->pfnReadCallbackR0 = pfnReadCallback;
1562 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1563 pRange->pfnFillCallbackR0 = pfnFillCallback;
1564 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1565 IOM_UNLOCK_EXCL(pVM);
1566
1567 return VINF_SUCCESS;
1568}
1569
1570
1571/**
1572 * Deregisters a Memory Mapped I/O handler range.
1573 *
1574 * Registered GC, R0, and R3 ranges are affected.
1575 *
1576 * @returns VBox status code.
1577 *
1578 * @param pVM The virtual machine.
1579 * @param pDevIns Device instance which the MMIO region is registered.
1580 * @param GCPhysStart First physical address (GC) in the range.
1581 * @param cbRange Number of bytes to deregister.
1582 *
1583 * @remark This function mainly for PCI PnP Config and will not do
1584 * all the checks you might expect it to do.
1585 */
1586VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1587{
1588 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1589
1590 /*
1591 * Validate input.
1592 */
1593 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1594 if (GCPhysLast < GCPhysStart)
1595 {
1596 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1597 return VERR_IOM_INVALID_MMIO_RANGE;
1598 }
1599 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1600
1601 IOM_LOCK_EXCL(pVM);
1602
1603 /*
1604 * Check ownership and such for the entire area.
1605 */
1606 RTGCPHYS GCPhys = GCPhysStart;
1607 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1608 {
1609 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
1610 if (!pRange)
1611 {
1612 IOM_UNLOCK_EXCL(pVM);
1613 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1614 }
1615 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1616 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1617 IOM_UNLOCK_EXCL(pVM),
1618 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1619 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1620 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1621 IOM_UNLOCK_EXCL(pVM),
1622 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1623
1624 /* next */
1625 Assert(GCPhys <= pRange->Core.KeyLast);
1626 GCPhys = pRange->Core.KeyLast + 1;
1627 }
1628
1629 /*
1630 * Do the actual removing of the MMIO ranges.
1631 */
1632 GCPhys = GCPhysStart;
1633 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1634 {
1635 iomR3FlushCache(pVM);
1636
1637 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1638 Assert(pRange);
1639 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1640 IOM_UNLOCK_EXCL(pVM); /* Lock order fun. */
1641
1642 /* remove it from PGM */
1643 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1644 AssertRC(rc);
1645
1646 IOM_LOCK_EXCL(pVM);
1647
1648 /* advance and free. */
1649 GCPhys = pRange->Core.KeyLast + 1;
1650 if (pDevIns->iInstance > 0)
1651 {
1652 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1653 MMR3HeapFree(pvDesc);
1654 }
1655 iomMmioReleaseRange(pVM, pRange);
1656 }
1657
1658 IOM_UNLOCK_EXCL(pVM);
1659 return VINF_SUCCESS;
1660}
1661
1662
1663/**
1664 * Display a single MMIO range.
1665 *
1666 * @returns 0
1667 * @param pNode Pointer to MMIO R3 range.
1668 * @param pvUser Pointer to info output callback structure.
1669 */
1670static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1671{
1672 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1673 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1674 pHlp->pfnPrintf(pHlp,
1675 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1676 pRange->Core.Key,
1677 pRange->Core.KeyLast,
1678 pRange->pDevInsR3,
1679 pRange->pfnReadCallbackR3,
1680 pRange->pfnWriteCallbackR3,
1681 pRange->pfnFillCallbackR3,
1682 pRange->pvUserR3,
1683 pRange->pszDesc);
1684 pHlp->pfnPrintf(pHlp,
1685 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1686 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1687 pRange->pDevInsR0,
1688 pRange->pfnReadCallbackR0,
1689 pRange->pfnWriteCallbackR0,
1690 pRange->pfnFillCallbackR0,
1691 pRange->pvUserR0);
1692 pHlp->pfnPrintf(pHlp,
1693 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1694 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1695 pRange->pDevInsRC,
1696 pRange->pfnReadCallbackRC,
1697 pRange->pfnWriteCallbackRC,
1698 pRange->pfnFillCallbackRC,
1699 pRange->pvUserRC);
1700 return 0;
1701}
1702
1703
1704/**
1705 * Display registered MMIO ranges to the log.
1706 *
1707 * @param pVM Pointer to the VM.
1708 * @param pHlp The info helpers.
1709 * @param pszArgs Arguments, ignored.
1710 */
1711static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1712{
1713 NOREF(pszArgs);
1714 pHlp->pfnPrintf(pHlp,
1715 "MMIO ranges (pVM=%p)\n"
1716 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1717 pVM,
1718 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1719 sizeof(RTHCPTR) * 2, "pDevIns ",
1720 sizeof(RTHCPTR) * 2, "Read ",
1721 sizeof(RTHCPTR) * 2, "Write ",
1722 sizeof(RTHCPTR) * 2, "Fill ",
1723 sizeof(RTHCPTR) * 2, "pvUser ",
1724 "Description");
1725 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1726}
1727
1728
1729#ifdef VBOX_WITH_STATISTICS
1730/**
1731 * Tries to come up with the standard name for a port.
1732 *
1733 * @returns Pointer to readonly string if known.
1734 * @returns NULL if unknown port number.
1735 *
1736 * @param Port The port to name.
1737 */
1738static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1739{
1740 switch (Port)
1741 {
1742 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1743 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1744 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1745 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1746 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1747 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1748 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1749 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1750 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1751 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1752 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1753 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1754 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1755 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1756 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1757 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1758
1759 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1760 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1761 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1762 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1763 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1764 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1765 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1766 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1767 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1768 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1769 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1770 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1771 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1772 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1773 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1774 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1775 return "System Reserved";
1776
1777 case 0x60:
1778 case 0x64:
1779 return "Keyboard & Mouse";
1780
1781 case 0x378:
1782 case 0x379:
1783 case 0x37a:
1784 case 0x37b:
1785 case 0x37c:
1786 case 0x37d:
1787 case 0x37e:
1788 case 0x37f:
1789 case 0x3bc:
1790 case 0x3bd:
1791 case 0x3be:
1792 case 0x3bf:
1793 case 0x278:
1794 case 0x279:
1795 case 0x27a:
1796 case 0x27b:
1797 case 0x27c:
1798 case 0x27d:
1799 case 0x27e:
1800 case 0x27f:
1801 return "LPT1/2/3";
1802
1803 case 0x3f8:
1804 case 0x3f9:
1805 case 0x3fa:
1806 case 0x3fb:
1807 case 0x3fc:
1808 case 0x3fd:
1809 case 0x3fe:
1810 case 0x3ff:
1811 return "COM1";
1812
1813 case 0x2f8:
1814 case 0x2f9:
1815 case 0x2fa:
1816 case 0x2fb:
1817 case 0x2fc:
1818 case 0x2fd:
1819 case 0x2fe:
1820 case 0x2ff:
1821 return "COM2";
1822
1823 case 0x3e8:
1824 case 0x3e9:
1825 case 0x3ea:
1826 case 0x3eb:
1827 case 0x3ec:
1828 case 0x3ed:
1829 case 0x3ee:
1830 case 0x3ef:
1831 return "COM3";
1832
1833 case 0x2e8:
1834 case 0x2e9:
1835 case 0x2ea:
1836 case 0x2eb:
1837 case 0x2ec:
1838 case 0x2ed:
1839 case 0x2ee:
1840 case 0x2ef:
1841 return "COM4";
1842
1843 case 0x200:
1844 case 0x201:
1845 case 0x202:
1846 case 0x203:
1847 case 0x204:
1848 case 0x205:
1849 case 0x206:
1850 case 0x207:
1851 return "Joystick";
1852
1853 case 0x3f0:
1854 case 0x3f1:
1855 case 0x3f2:
1856 case 0x3f3:
1857 case 0x3f4:
1858 case 0x3f5:
1859 case 0x3f6:
1860 case 0x3f7:
1861 return "Floppy";
1862
1863 case 0x1f0:
1864 case 0x1f1:
1865 case 0x1f2:
1866 case 0x1f3:
1867 case 0x1f4:
1868 case 0x1f5:
1869 case 0x1f6:
1870 case 0x1f7:
1871 //case 0x3f6:
1872 //case 0x3f7:
1873 return "IDE 1st";
1874
1875 case 0x170:
1876 case 0x171:
1877 case 0x172:
1878 case 0x173:
1879 case 0x174:
1880 case 0x175:
1881 case 0x176:
1882 case 0x177:
1883 case 0x376:
1884 case 0x377:
1885 return "IDE 2nd";
1886
1887 case 0x1e0:
1888 case 0x1e1:
1889 case 0x1e2:
1890 case 0x1e3:
1891 case 0x1e4:
1892 case 0x1e5:
1893 case 0x1e6:
1894 case 0x1e7:
1895 case 0x3e6:
1896 case 0x3e7:
1897 return "IDE 3rd";
1898
1899 case 0x160:
1900 case 0x161:
1901 case 0x162:
1902 case 0x163:
1903 case 0x164:
1904 case 0x165:
1905 case 0x166:
1906 case 0x167:
1907 case 0x366:
1908 case 0x367:
1909 return "IDE 4th";
1910
1911 case 0x130: case 0x140: case 0x150:
1912 case 0x131: case 0x141: case 0x151:
1913 case 0x132: case 0x142: case 0x152:
1914 case 0x133: case 0x143: case 0x153:
1915 case 0x134: case 0x144: case 0x154:
1916 case 0x135: case 0x145: case 0x155:
1917 case 0x136: case 0x146: case 0x156:
1918 case 0x137: case 0x147: case 0x157:
1919 case 0x138: case 0x148: case 0x158:
1920 case 0x139: case 0x149: case 0x159:
1921 case 0x13a: case 0x14a: case 0x15a:
1922 case 0x13b: case 0x14b: case 0x15b:
1923 case 0x13c: case 0x14c: case 0x15c:
1924 case 0x13d: case 0x14d: case 0x15d:
1925 case 0x13e: case 0x14e: case 0x15e:
1926 case 0x13f: case 0x14f: case 0x15f:
1927 case 0x220: case 0x230:
1928 case 0x221: case 0x231:
1929 case 0x222: case 0x232:
1930 case 0x223: case 0x233:
1931 case 0x224: case 0x234:
1932 case 0x225: case 0x235:
1933 case 0x226: case 0x236:
1934 case 0x227: case 0x237:
1935 case 0x228: case 0x238:
1936 case 0x229: case 0x239:
1937 case 0x22a: case 0x23a:
1938 case 0x22b: case 0x23b:
1939 case 0x22c: case 0x23c:
1940 case 0x22d: case 0x23d:
1941 case 0x22e: case 0x23e:
1942 case 0x22f: case 0x23f:
1943 case 0x330: case 0x340: case 0x350:
1944 case 0x331: case 0x341: case 0x351:
1945 case 0x332: case 0x342: case 0x352:
1946 case 0x333: case 0x343: case 0x353:
1947 case 0x334: case 0x344: case 0x354:
1948 case 0x335: case 0x345: case 0x355:
1949 case 0x336: case 0x346: case 0x356:
1950 case 0x337: case 0x347: case 0x357:
1951 case 0x338: case 0x348: case 0x358:
1952 case 0x339: case 0x349: case 0x359:
1953 case 0x33a: case 0x34a: case 0x35a:
1954 case 0x33b: case 0x34b: case 0x35b:
1955 case 0x33c: case 0x34c: case 0x35c:
1956 case 0x33d: case 0x34d: case 0x35d:
1957 case 0x33e: case 0x34e: case 0x35e:
1958 case 0x33f: case 0x34f: case 0x35f:
1959 return "SCSI (typically)";
1960
1961 case 0x320:
1962 case 0x321:
1963 case 0x322:
1964 case 0x323:
1965 case 0x324:
1966 case 0x325:
1967 case 0x326:
1968 case 0x327:
1969 return "XT HD";
1970
1971 case 0x3b0:
1972 case 0x3b1:
1973 case 0x3b2:
1974 case 0x3b3:
1975 case 0x3b4:
1976 case 0x3b5:
1977 case 0x3b6:
1978 case 0x3b7:
1979 case 0x3b8:
1980 case 0x3b9:
1981 case 0x3ba:
1982 case 0x3bb:
1983 return "VGA";
1984
1985 case 0x3c0: case 0x3d0:
1986 case 0x3c1: case 0x3d1:
1987 case 0x3c2: case 0x3d2:
1988 case 0x3c3: case 0x3d3:
1989 case 0x3c4: case 0x3d4:
1990 case 0x3c5: case 0x3d5:
1991 case 0x3c6: case 0x3d6:
1992 case 0x3c7: case 0x3d7:
1993 case 0x3c8: case 0x3d8:
1994 case 0x3c9: case 0x3d9:
1995 case 0x3ca: case 0x3da:
1996 case 0x3cb: case 0x3db:
1997 case 0x3cc: case 0x3dc:
1998 case 0x3cd: case 0x3dd:
1999 case 0x3ce: case 0x3de:
2000 case 0x3cf: case 0x3df:
2001 return "VGA/EGA";
2002
2003 case 0x240: case 0x260: case 0x280:
2004 case 0x241: case 0x261: case 0x281:
2005 case 0x242: case 0x262: case 0x282:
2006 case 0x243: case 0x263: case 0x283:
2007 case 0x244: case 0x264: case 0x284:
2008 case 0x245: case 0x265: case 0x285:
2009 case 0x246: case 0x266: case 0x286:
2010 case 0x247: case 0x267: case 0x287:
2011 case 0x248: case 0x268: case 0x288:
2012 case 0x249: case 0x269: case 0x289:
2013 case 0x24a: case 0x26a: case 0x28a:
2014 case 0x24b: case 0x26b: case 0x28b:
2015 case 0x24c: case 0x26c: case 0x28c:
2016 case 0x24d: case 0x26d: case 0x28d:
2017 case 0x24e: case 0x26e: case 0x28e:
2018 case 0x24f: case 0x26f: case 0x28f:
2019 case 0x300:
2020 case 0x301:
2021 case 0x388:
2022 case 0x389:
2023 case 0x38a:
2024 case 0x38b:
2025 return "Sound Card (typically)";
2026
2027 default:
2028 return NULL;
2029 }
2030}
2031#endif /* VBOX_WITH_STATISTICS */
2032
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