IOMR3IoPort.cpp@ 107215

Last change on this file since 107215 was 107194, checked in by vboxsync, 7 weeks ago
VMM: More adjustments for VBOX_WITH_ONLY_PGM_NEM_MODE, VBOX_WITH_MINIMAL_R0, VBOX_WITH_HWVIRT and such. jiraref:VBP-1466
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1	/* $Id: IOMR3IoPort.cpp 107194 2024-11-29 14:47:06Z vboxsync $ */
2	/** @file
3	* IOM - Input / Output Monitor, I/O port related APIs.
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_IOM_IOPORT
33	#include <VBox/vmm/iom.h>
34	#include <VBox/sup.h>
35	#include <VBox/vmm/mm.h>
36	#include <VBox/vmm/stam.h>
37	#include <VBox/vmm/dbgf.h>
38	#include <VBox/vmm/pdmapi.h>
39	#include <VBox/vmm/pdmdev.h>
40	#include "IOMInternal.h"
41	#include <VBox/vmm/vm.h>
42
43	#include <VBox/param.h>
44	#include <iprt/assert.h>
45	#include <iprt/mem.h>
46	#include <iprt/string.h>
47	#include <VBox/log.h>
48	#include <VBox/err.h>
49
50	#include "IOMInline.h"
51
52
53	#ifdef VBOX_WITH_STATISTICS
54
55	/**
56	* Register statistics for an I/O port entry.
57	*/
58	void iomR3IoPortRegStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry)
59	{
60	bool const fDoRZ = pRegEntry->fRing0 \|\| pRegEntry->fRawMode;
61	PIOMIOPORTSTATSENTRY pStats = &pVM->iom.s.paIoPortStats[pRegEntry->idxStats];
62	PCIOMIOPORTDESC pExtDesc = pRegEntry->paExtDescs;
63	unsigned uPort = pRegEntry->uPort;
64	unsigned const uFirstPort = uPort;
65	unsigned const uEndPort = uPort + pRegEntry->cPorts;
66
67	/* Register a dummy statistics for the prefix. */
68	char szName[80];
69	size_t cchPrefix;
70	if (uFirstPort < uEndPort - 1)
71	cchPrefix = RTStrPrintf(szName, sizeof(szName), "/IOM/IoPorts/%04x-%04x", uFirstPort, uEndPort - 1);
72	else
73	cchPrefix = RTStrPrintf(szName, sizeof(szName), "/IOM/IoPorts/%04x", uPort);
74	const char *pszDesc = pRegEntry->pszDesc;
75	char *pszFreeDesc = NULL;
76	if (pRegEntry->pDevIns && pRegEntry->pDevIns->iInstance > 0 && pszDesc)
77	pszDesc = pszFreeDesc = RTStrAPrintf2("%u / %s", pRegEntry->pDevIns->iInstance, pszDesc);
78	int rc = STAMR3Register(pVM, &pStats->Total, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, szName,
79	STAMUNIT_NONE, pRegEntry->pszDesc);
80	AssertRC(rc);
81	RTStrFree(pszFreeDesc);
82
83	/* Register stats for each port under it */
84	do
85	{
86	size_t cchBaseNm;
87	if (uFirstPort < uEndPort - 1)
88	cchBaseNm = cchPrefix + RTStrPrintf(&szName[cchPrefix], sizeof(szName) - cchPrefix, "/%04x-", uPort);
89	else
90	{
91	szName[cchPrefix] = '/';
92	cchBaseNm = cchPrefix + 1;
93	}
94
95	# define SET_NM_SUFFIX(a_sz) memcpy(&szName[cchBaseNm], a_sz, sizeof(a_sz));
96	const char * const pszInDesc = pExtDesc ? pExtDesc->pszIn : NULL;
97	const char * const pszOutDesc = pExtDesc ? pExtDesc->pszOut : NULL;
98
99	/* register the statistics counters. */
100	SET_NM_SUFFIX("In-R3");
101	rc = STAMR3Register(pVM, &pStats->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszInDesc); AssertRC(rc);
102	SET_NM_SUFFIX("Out-R3");
103	rc = STAMR3Register(pVM, &pStats->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszOutDesc); AssertRC(rc);
104	if (fDoRZ)
105	{
106	SET_NM_SUFFIX("In-RZ");
107	rc = STAMR3Register(pVM, &pStats->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszInDesc); AssertRC(rc);
108	SET_NM_SUFFIX("Out-RZ");
109	rc = STAMR3Register(pVM, &pStats->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszOutDesc); AssertRC(rc);
110	SET_NM_SUFFIX("In-RZtoR3");
111	rc = STAMR3Register(pVM, &pStats->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
112	SET_NM_SUFFIX("Out-RZtoR3");
113	rc = STAMR3Register(pVM, &pStats->OutRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
114	}
115
116	/* Profiling */
117	SET_NM_SUFFIX("In-R3-Prof");
118	rc = STAMR3Register(pVM, &pStats->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszInDesc); AssertRC(rc);
119	SET_NM_SUFFIX("Out-R3-Prof");
120	rc = STAMR3Register(pVM, &pStats->ProfOutR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszOutDesc); AssertRC(rc);
121	if (fDoRZ)
122	{
123	SET_NM_SUFFIX("In-RZ-Prof");
124	rc = STAMR3Register(pVM, &pStats->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszInDesc); AssertRC(rc);
125	SET_NM_SUFFIX("Out-RZ-Prof");
126	rc = STAMR3Register(pVM, &pStats->ProfOutRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszOutDesc); AssertRC(rc);
127	}
128
129	pStats++;
130	uPort++;
131	if (pExtDesc)
132	pExtDesc = pszInDesc \|\| pszOutDesc ? pExtDesc + 1 : NULL;
133	} while (uPort < uEndPort);
134	}
135
136
137	/**
138	* Deregister statistics for an I/O port entry.
139	*/
140	static void iomR3IoPortDeregStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry, unsigned uPort)
141	{
142	char szPrefix[80];
143	size_t cchPrefix;
144	if (pRegEntry->cPorts > 1)
145	cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/IoPorts/%04x-%04x", uPort, uPort + pRegEntry->cPorts - 1);
146	else
147	cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/IoPorts/%04x", uPort);
148	STAMR3DeregisterByPrefix(pVM->pUVM, szPrefix);
149	}
150
151	#endif /* VBOX_WITH_STATISTICS */
152
153
154	/**
155	* @callback_method_impl{FNIOMIOPORTNEWIN,
156	* Dummy Port I/O Handler for IN operations.}
157	*/
158	static DECLCALLBACK(VBOXSTRICTRC)
159	iomR3IOPortDummyNewIn(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32, unsigned cb)
160	{
161	NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
162	switch (cb)
163	{
164	case 1: *pu32 = 0xff; break;
165	case 2: *pu32 = 0xffff; break;
166	case 4: *pu32 = UINT32_C(0xffffffff); break;
167	default:
168	AssertReleaseMsgFailed(("cb=%d\n", cb));
169	return VERR_IOM_IOPORT_IPE_2;
170	}
171	return VINF_SUCCESS;
172	}
173
174
175	/**
176	* @callback_method_impl{FNIOMIOPORTNEWINSTRING,
177	* Dummy Port I/O Handler for string IN operations.}
178	*/
179	static DECLCALLBACK(VBOXSTRICTRC)
180	iomR3IOPortDummyNewInStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint8_t pbDst, uint32_t *pcTransfer, unsigned cb)
181	{
182	NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pbDst); NOREF(pcTransfer); NOREF(cb);
183	return VINF_SUCCESS;
184	}
185
186
187	/**
188	* @callback_method_impl{FNIOMIOPORTNEWOUT,
189	* Dummy Port I/O Handler for OUT operations.}
190	*/
191	static DECLCALLBACK(VBOXSTRICTRC)
192	iomR3IOPortDummyNewOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
193	{
194	NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
195	return VINF_SUCCESS;
196	}
197
198
199	/**
200	* @callback_method_impl{FNIOMIOPORTNEWOUTSTRING,
201	* Dummy Port I/O Handler for string OUT operations.}
202	*/
203	static DECLCALLBACK(VBOXSTRICTRC)
204	iomR3IOPortDummyNewOutStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint8_t const pbSrc, uint32_t *pcTransfer, unsigned cb)
205	{
206	NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pbSrc); NOREF(pcTransfer); NOREF(cb);
207	return VINF_SUCCESS;
208	}
209
210
211	#ifdef VBOX_WITH_STATISTICS
212	/**
213	* Grows the statistics table.
214	*
215	* @returns VBox status code.
216	* @param pVM The cross context VM structure.
217	* @param cNewEntries The minimum number of new entrie.
218	* @see IOMR0IoPortGrowStatisticsTable
219	*/
220	static int iomR3IoPortGrowStatisticsTable(PVM pVM, uint32_t cNewEntries)
221	{
222	AssertReturn(cNewEntries <= _64K, VERR_IOM_TOO_MANY_IOPORT_REGISTRATIONS);
223
224	int rc;
225	# if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
226	if (!SUPR3IsDriverless())
227	{
228	rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_IOM_GROW_IO_PORT_STATS, cNewEntries, NULL);
229	AssertLogRelRCReturn(rc, rc);
230	AssertReturn(cNewEntries <= pVM->iom.s.cIoPortStatsAllocation, VERR_IOM_IOPORT_IPE_2);
231	}
232	else
233	# endif
234	{
235	/*
236	* Validate input and state.
237	*/
238	uint32_t const cOldEntries = pVM->iom.s.cIoPortStatsAllocation;
239	AssertReturn(cNewEntries > cOldEntries, VERR_IOM_IOPORT_IPE_1);
240	AssertReturn(pVM->iom.s.cIoPortStats <= cOldEntries, VERR_IOM_IOPORT_IPE_2);
241
242	/*
243	* Calc size and allocate a new table.
244	*/
245	uint32_t const cbNew = RT_ALIGN_32(cNewEntries * sizeof(IOMIOPORTSTATSENTRY), HOST_PAGE_SIZE);
246	cNewEntries = cbNew / sizeof(IOMIOPORTSTATSENTRY);
247
248	PIOMIOPORTSTATSENTRY const paIoPortStats = (PIOMIOPORTSTATSENTRY)RTMemPageAllocZ(cbNew);
249	if (paIoPortStats)
250	{
251	/*
252	* Anything to copy over, update and free the old one.
253	*/
254	PIOMIOPORTSTATSENTRY const pOldIoPortStats = pVM->iom.s.paIoPortStats;
255	if (pOldIoPortStats)
256	memcpy(paIoPortStats, pOldIoPortStats, cOldEntries * sizeof(IOMIOPORTSTATSENTRY));
257
258	pVM->iom.s.paIoPortStats = paIoPortStats;
259	pVM->iom.s.cIoPortStatsAllocation = cNewEntries;
260
261	RTMemPageFree(pOldIoPortStats, RT_ALIGN_32(cOldEntries * sizeof(IOMIOPORTSTATSENTRY), HOST_PAGE_SIZE));
262
263	rc = VINF_SUCCESS;
264	}
265	else
266	rc = VERR_NO_PAGE_MEMORY;
267	}
268
269	return rc;
270	}
271	#endif
272
273
274	/**
275	* Grows the I/O port registration statistics table.
276	*
277	* @returns VBox status code.
278	* @param pVM The cross context VM structure.
279	* @param cNewEntries The minimum number of new entrie.
280	* @see IOMR0IoPortGrowRegistrationTables
281	*/
282	static int iomR3IoPortGrowTable(PVM pVM, uint32_t cNewEntries)
283	{
284	AssertReturn(cNewEntries <= _4K, VERR_IOM_TOO_MANY_IOPORT_REGISTRATIONS);
285
286	int rc;
287	#if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
288	if (!SUPR3IsDriverless())
289	{
290	rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_IOM_GROW_IO_PORTS, cNewEntries, NULL);
291	AssertLogRelRCReturn(rc, rc);
292	AssertReturn(cNewEntries <= pVM->iom.s.cIoPortAlloc, VERR_IOM_IOPORT_IPE_2);
293	}
294	else
295	#endif
296	{
297	/*
298	* Validate input and state.
299	*/
300	uint32_t const cOldEntries = pVM->iom.s.cIoPortAlloc;
301	AssertReturn(cNewEntries >= cOldEntries, VERR_IOM_IOPORT_IPE_1);
302
303	/*
304	* Allocate the new tables. We use a single allocation for the three tables (ring-0,
305	* ring-3, lookup) and does a partial mapping of the result to ring-3.
306	*/
307	uint32_t const cbRing3 = RT_ALIGN_32(cNewEntries * sizeof(IOMIOPORTENTRYR3), HOST_PAGE_SIZE);
308	uint32_t const cbShared = RT_ALIGN_32(cNewEntries * sizeof(IOMIOPORTLOOKUPENTRY), HOST_PAGE_SIZE);
309	uint32_t const cbNew = cbRing3 + cbShared;
310
311	/* Use the rounded up space as best we can. */
312	cNewEntries = RT_MIN(cbRing3 / sizeof(IOMIOPORTENTRYR3), cbShared / sizeof(IOMIOPORTLOOKUPENTRY));
313
314	PIOMIOPORTENTRYR3 const paRing3 = (PIOMIOPORTENTRYR3)RTMemPageAllocZ(cbNew);
315	if (paRing3)
316	{
317	PIOMIOPORTLOOKUPENTRY const paLookup = (PIOMIOPORTLOOKUPENTRY)((uintptr_t)paRing3 + cbRing3);
318
319	/*
320	* Copy over the old info and initialize the idxSelf and idxStats members.
321	*/
322	if (pVM->iom.s.paIoPortRegs != NULL)
323	{
324	memcpy(paRing3, pVM->iom.s.paIoPortRegs, sizeof(paRing3[0]) * cOldEntries);
325	memcpy(paLookup, pVM->iom.s.paIoPortLookup, sizeof(paLookup[0]) * cOldEntries);
326	}
327
328	size_t i = cbRing3 / sizeof(*paRing3);
329	while (i-- > cOldEntries)
330	{
331	paRing3[i].idxSelf = (uint16_t)i;
332	paRing3[i].idxStats = UINT16_MAX;
333	}
334
335	/*
336	* Update the variables and free the old memory.
337	*/
338	void * const pvFree = pVM->iom.s.paIoPortRegs;
339
340	pVM->iom.s.paIoPortRegs = paRing3;
341	pVM->iom.s.paIoPortLookup = paLookup;
342	pVM->iom.s.cIoPortAlloc = cNewEntries;
343
344	RTMemPageFree(pvFree,
345	RT_ALIGN_32(cOldEntries * sizeof(IOMIOPORTENTRYR3), HOST_PAGE_SIZE)
346	+ RT_ALIGN_32(cOldEntries * sizeof(IOMIOPORTLOOKUPENTRY), HOST_PAGE_SIZE));
347
348	rc = VINF_SUCCESS;
349	}
350	else
351	rc = VERR_NO_PAGE_MEMORY;
352	}
353	return rc;
354	}
355
356
357	/**
358	* Worker for PDMDEVHLPR3::pfnIoPortCreateEx.
359	*/
360	VMMR3_INT_DECL(int) IOMR3IoPortCreate(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT cPorts, uint32_t fFlags, PPDMPCIDEV pPciDev,
361	uint32_t iPciRegion, PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
362	PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr, RTR3PTR pvUser,
363	const char *pszDesc, PCIOMIOPORTDESC paExtDescs, PIOMIOPORTHANDLE phIoPorts)
364	{
365	/*
366	* Validate input.
367	*/
368	AssertPtrReturn(phIoPorts, VERR_INVALID_POINTER);
369	*phIoPorts = UINT32_MAX;
370	VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
371	VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
372	AssertReturn(!pVM->iom.s.fIoPortsFrozen, VERR_WRONG_ORDER);
373
374	AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
375
376	AssertMsgReturn(cPorts > 0 && cPorts <= _8K, ("cPorts=%#x\n", cPorts), VERR_OUT_OF_RANGE);
377	AssertReturn(!(fFlags & ~IOM_IOPORT_F_VALID_MASK), VERR_INVALID_FLAGS);
378
379	AssertReturn(pfnOut \|\| pfnIn \|\| pfnOutStr \|\| pfnInStr, VERR_INVALID_PARAMETER);
380	AssertPtrNullReturn(pfnOut, VERR_INVALID_POINTER);
381	AssertPtrNullReturn(pfnIn, VERR_INVALID_POINTER);
382	AssertPtrNullReturn(pfnOutStr, VERR_INVALID_POINTER);
383	AssertPtrNullReturn(pfnInStr, VERR_INVALID_POINTER);
384	AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
385	AssertReturn(*pszDesc != '\0', VERR_INVALID_POINTER);
386	AssertReturn(strlen(pszDesc) < 128, VERR_INVALID_POINTER);
387	if (paExtDescs)
388	{
389	AssertPtrReturn(paExtDescs, VERR_INVALID_POINTER);
390	for (size_t i = 0;; i++)
391	{
392	const char *pszIn = paExtDescs[i].pszIn;
393	const char *pszOut = paExtDescs[i].pszOut;
394	if (!pszIn && !pszOut)
395	break;
396	AssertReturn(i < _8K, VERR_OUT_OF_RANGE);
397	AssertReturn(!pszIn \|\| strlen(pszIn) < 128, VERR_INVALID_POINTER);
398	AssertReturn(!pszOut \|\| strlen(pszOut) < 128, VERR_INVALID_POINTER);
399	}
400	}
401
402	/*
403	* Ensure that we've got table space for it.
404	*/
405	#ifndef VBOX_WITH_STATISTICS
406	uint16_t const idxStats = UINT16_MAX;
407	#else
408	uint32_t const idxStats = pVM->iom.s.cIoPortStats;
409	uint32_t const cNewIoPortStats = idxStats + cPorts;
410	AssertReturn(cNewIoPortStats <= _64K, VERR_IOM_TOO_MANY_IOPORT_REGISTRATIONS);
411	if (cNewIoPortStats > pVM->iom.s.cIoPortStatsAllocation)
412	{
413	int rc = iomR3IoPortGrowStatisticsTable(pVM, cNewIoPortStats);
414	AssertRCReturn(rc, rc);
415	AssertReturn(idxStats == pVM->iom.s.cIoPortStats, VERR_IOM_IOPORT_IPE_1);
416	}
417	#endif
418
419	uint32_t idx = pVM->iom.s.cIoPortRegs;
420	if (idx >= pVM->iom.s.cIoPortAlloc)
421	{
422	int rc = iomR3IoPortGrowTable(pVM, pVM->iom.s.cIoPortAlloc + 1);
423	AssertRCReturn(rc, rc);
424	AssertReturn(idx == pVM->iom.s.cIoPortRegs, VERR_IOM_IOPORT_IPE_1);
425	AssertReturn(idx < pVM->iom.s.cIoPortAlloc, VERR_IOM_IOPORT_IPE_2);
426	}
427
428	/*
429	* Enter it.
430	*/
431	pVM->iom.s.paIoPortRegs[idx].pvUser = pvUser;
432	pVM->iom.s.paIoPortRegs[idx].pDevIns = pDevIns;
433	pVM->iom.s.paIoPortRegs[idx].pfnOutCallback = pfnOut ? pfnOut : iomR3IOPortDummyNewOut;
434	pVM->iom.s.paIoPortRegs[idx].pfnInCallback = pfnIn ? pfnIn : iomR3IOPortDummyNewIn;
435	pVM->iom.s.paIoPortRegs[idx].pfnOutStrCallback = pfnOutStr ? pfnOutStr : iomR3IOPortDummyNewOutStr;
436	pVM->iom.s.paIoPortRegs[idx].pfnInStrCallback = pfnInStr ? pfnInStr : iomR3IOPortDummyNewInStr;
437	pVM->iom.s.paIoPortRegs[idx].pszDesc = pszDesc;
438	pVM->iom.s.paIoPortRegs[idx].paExtDescs = paExtDescs;
439	pVM->iom.s.paIoPortRegs[idx].pPciDev = pPciDev;
440	pVM->iom.s.paIoPortRegs[idx].iPciRegion = iPciRegion;
441	pVM->iom.s.paIoPortRegs[idx].cPorts = cPorts;
442	pVM->iom.s.paIoPortRegs[idx].uPort = UINT16_MAX;
443	pVM->iom.s.paIoPortRegs[idx].idxStats = (uint16_t)idxStats;
444	pVM->iom.s.paIoPortRegs[idx].fMapped = false;
445	pVM->iom.s.paIoPortRegs[idx].fFlags = (uint8_t)fFlags;
446	pVM->iom.s.paIoPortRegs[idx].idxSelf = idx;
447
448	pVM->iom.s.cIoPortRegs = idx + 1;
449	#ifdef VBOX_WITH_STATISTICS
450	pVM->iom.s.cIoPortStats = cNewIoPortStats;
451	#endif
452	*phIoPorts = idx;
453	LogFlow(("IOMR3IoPortCreate: idx=%#x cPorts=%u %s\n", idx, cPorts, pszDesc));
454	return VINF_SUCCESS;
455	}
456
457
458	/**
459	* Worker for PDMDEVHLPR3::pfnIoPortMap.
460	*/
461	VMMR3_INT_DECL(int) IOMR3IoPortMap(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, RTIOPORT uPort)
462	{
463	/*
464	* Validate input and state.
465	*/
466	AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
467	AssertReturn(hIoPorts < pVM->iom.s.cIoPortRegs, VERR_IOM_INVALID_IOPORT_HANDLE);
468	PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
469	AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
470
471	RTIOPORT const cPorts = pRegEntry->cPorts;
472	AssertMsgReturn(cPorts > 0 && cPorts <= _8K, ("cPorts=%s\n", cPorts), VERR_IOM_IOPORT_IPE_1);
473	AssertReturn((uint32_t)uPort + cPorts <= _64K, VERR_OUT_OF_RANGE);
474	RTIOPORT const uLastPort = uPort + cPorts - 1;
475	LogFlow(("IOMR3IoPortMap: hIoPorts=%#RX64 %RTiop..%RTiop (%u ports)\n", hIoPorts, uPort, uLastPort, cPorts));
476
477	/*
478	* Do the mapping.
479	*/
480	int rc = VINF_SUCCESS;
481	IOM_LOCK_EXCL(pVM);
482
483	if (!pRegEntry->fMapped)
484	{
485	uint32_t const cEntries = RT_MIN(pVM->iom.s.cIoPortLookupEntries, pVM->iom.s.cIoPortRegs);
486	Assert(pVM->iom.s.cIoPortLookupEntries == cEntries);
487
488	PIOMIOPORTLOOKUPENTRY paEntries = pVM->iom.s.paIoPortLookup;
489	PIOMIOPORTLOOKUPENTRY pEntry;
490	if (cEntries > 0)
491	{
492	uint32_t iFirst = 0;
493	uint32_t iEnd = cEntries;
494	uint32_t i = cEntries / 2;
495	for (;;)
496	{
497	pEntry = &paEntries[i];
498	if (pEntry->uLastPort < uPort)
499	{
500	i += 1;
501	if (i < iEnd)
502	iFirst = i;
503	else
504	{
505	/* Insert after the entry we just considered: */
506	pEntry += 1;
507	if (i < cEntries)
508	memmove(pEntry + 1, pEntry, sizeof(pEntry) (cEntries - i));
509	break;
510	}
511	}
512	else if (pEntry->uFirstPort > uLastPort)
513	{
514	if (i > iFirst)
515	iEnd = i;
516	else
517	{
518	/* Insert at the entry we just considered: */
519	if (i < cEntries)
520	memmove(pEntry + 1, pEntry, sizeof(pEntry) (cEntries - i));
521	break;
522	}
523	}
524	else
525	{
526	/* Oops! We've got a conflict. */
527	AssertLogRelMsgFailed(("%x..%x (%s) conflicts with existing mapping %x..%x (%s)\n",
528	uPort, uLastPort, pRegEntry->pszDesc,
529	pEntry->uFirstPort, pEntry->uLastPort, pVM->iom.s.paIoPortRegs[pEntry->idx].pszDesc));
530	IOM_UNLOCK_EXCL(pVM);
531	return VERR_IOM_IOPORT_RANGE_CONFLICT;
532	}
533
534	i = iFirst + (iEnd - iFirst) / 2;
535	}
536	}
537	else
538	pEntry = paEntries;
539
540	/*
541	* Fill in the entry and bump the table size.
542	*/
543	pEntry->idx = hIoPorts;
544	pEntry->uFirstPort = uPort;
545	pEntry->uLastPort = uLastPort;
546	pVM->iom.s.cIoPortLookupEntries = cEntries + 1;
547
548	pRegEntry->uPort = uPort;
549	pRegEntry->fMapped = true;
550
551	#ifdef VBOX_WITH_STATISTICS
552	/* Don't register stats here when we're creating the VM as the
553	statistics table may still be reallocated. */
554	if (pVM->enmVMState >= VMSTATE_CREATED)
555	iomR3IoPortRegStats(pVM, pRegEntry);
556	#endif
557
558	#ifdef VBOX_STRICT
559	/*
560	* Assert table sanity.
561	*/
562	AssertMsg(paEntries[0].uLastPort >= paEntries[0].uFirstPort, ("%#x %#x\n", paEntries[0].uLastPort, paEntries[0].uFirstPort));
563	AssertMsg(paEntries[0].idx < pVM->iom.s.cIoPortRegs, ("%#x %#x\n", paEntries[0].idx, pVM->iom.s.cIoPortRegs));
564
565	RTIOPORT uPortPrev = paEntries[0].uLastPort;
566	for (size_t i = 1; i <= cEntries; i++)
567	{
568	AssertMsg(paEntries[i].uLastPort >= paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, paEntries[i].uLastPort, paEntries[i].uFirstPort));
569	AssertMsg(paEntries[i].idx < pVM->iom.s.cIoPortRegs, ("%u: %#x %#x\n", i, paEntries[i].idx, pVM->iom.s.cIoPortRegs));
570	AssertMsg(uPortPrev < paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, uPortPrev, paEntries[i].uFirstPort));
571	AssertMsg(paEntries[i].uLastPort - paEntries[i].uFirstPort + 1 == pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts,
572	("%u: %#x %#x..%#x -> %u, expected %u\n", i, uPortPrev, paEntries[i].uFirstPort, paEntries[i].uLastPort,
573	paEntries[i].uLastPort - paEntries[i].uFirstPort + 1, pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts));
574	uPortPrev = paEntries[i].uLastPort;
575	}
576	#endif
577	}
578	else
579	{
580	AssertFailed();
581	rc = VERR_IOM_IOPORTS_ALREADY_MAPPED;
582	}
583
584	IOM_UNLOCK_EXCL(pVM);
585	return rc;
586	}
587
588
589	/**
590	* Worker for PDMDEVHLPR3::pfnIoPortUnmap.
591	*/
592	VMMR3_INT_DECL(int) IOMR3IoPortUnmap(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
593	{
594	/*
595	* Validate input and state.
596	*/
597	AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
598	AssertReturn(hIoPorts < pVM->iom.s.cIoPortRegs, VERR_IOM_INVALID_IOPORT_HANDLE);
599	PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
600	AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
601
602	/*
603	* Do the mapping.
604	*/
605	int rc;
606	IOM_LOCK_EXCL(pVM);
607
608	if (pRegEntry->fMapped)
609	{
610	RTIOPORT const uPort = pRegEntry->uPort;
611	RTIOPORT const uLastPort = uPort + pRegEntry->cPorts - 1;
612	uint32_t const cEntries = RT_MIN(pVM->iom.s.cIoPortLookupEntries, pVM->iom.s.cIoPortRegs);
613	Assert(pVM->iom.s.cIoPortLookupEntries == cEntries);
614	Assert(cEntries > 0);
615	LogFlow(("IOMR3IoPortUnmap: hIoPorts=%#RX64 %RTiop..%RTiop (%u ports)\n", hIoPorts, uPort, uLastPort, pRegEntry->cPorts));
616
617	PIOMIOPORTLOOKUPENTRY paEntries = pVM->iom.s.paIoPortLookup;
618	uint32_t iFirst = 0;
619	uint32_t iEnd = cEntries;
620	uint32_t i = cEntries / 2;
621	for (;;)
622	{
623	PIOMIOPORTLOOKUPENTRY pEntry = &paEntries[i];
624	if (pEntry->uLastPort < uPort)
625	{
626	i += 1;
627	if (i < iEnd)
628	iFirst = i;
629	else
630	{
631	rc = VERR_IOM_IOPORT_IPE_1;
632	AssertLogRelMsgFailedBreak(("%x..%x (%s) not found!\n", uPort, uLastPort, pRegEntry->pszDesc));
633	}
634	}
635	else if (pEntry->uFirstPort > uLastPort)
636	{
637	if (i > iFirst)
638	iEnd = i;
639	else
640	{
641	rc = VERR_IOM_IOPORT_IPE_1;
642	AssertLogRelMsgFailedBreak(("%x..%x (%s) not found!\n", uPort, uLastPort, pRegEntry->pszDesc));
643	}
644	}
645	else if (pEntry->idx == hIoPorts)
646	{
647	Assert(pEntry->uFirstPort == uPort);
648	Assert(pEntry->uLastPort == uLastPort);
649	#ifdef VBOX_WITH_STATISTICS
650	iomR3IoPortDeregStats(pVM, pRegEntry, uPort);
651	#endif
652	if (i + 1 < cEntries)
653	memmove(pEntry, pEntry + 1, sizeof(pEntry) (cEntries - i - 1));
654	pVM->iom.s.cIoPortLookupEntries = cEntries - 1;
655	pRegEntry->uPort = UINT16_MAX;
656	pRegEntry->fMapped = false;
657	rc = VINF_SUCCESS;
658	break;
659	}
660	else
661	{
662	AssertLogRelMsgFailed(("Lookig for %x..%x (%s), found %x..%x (%s) instead!\n",
663	uPort, uLastPort, pRegEntry->pszDesc,
664	pEntry->uFirstPort, pEntry->uLastPort, pVM->iom.s.paIoPortRegs[pEntry->idx].pszDesc));
665	rc = VERR_IOM_IOPORT_IPE_1;
666	break;
667	}
668
669	i = iFirst + (iEnd - iFirst) / 2;
670	}
671
672	#ifdef VBOX_STRICT
673	/*
674	* Assert table sanity.
675	*/
676	AssertMsg(paEntries[0].uLastPort >= paEntries[0].uFirstPort, ("%#x %#x\n", paEntries[0].uLastPort, paEntries[0].uFirstPort));
677	AssertMsg(paEntries[0].idx < pVM->iom.s.cIoPortRegs, ("%#x %#x\n", paEntries[0].idx, pVM->iom.s.cIoPortRegs));
678
679	RTIOPORT uPortPrev = paEntries[0].uLastPort;
680	for (i = 1; i < cEntries - 1; i++)
681	{
682	AssertMsg(paEntries[i].uLastPort >= paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, paEntries[i].uLastPort, paEntries[i].uFirstPort));
683	AssertMsg(paEntries[i].idx < pVM->iom.s.cIoPortRegs, ("%u: %#x %#x\n", i, paEntries[i].idx, pVM->iom.s.cIoPortRegs));
684	AssertMsg(uPortPrev < paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, uPortPrev, paEntries[i].uFirstPort));
685	AssertMsg(paEntries[i].uLastPort - paEntries[i].uFirstPort + 1 == pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts,
686	("%u: %#x %#x..%#x -> %u, expected %u\n", i, uPortPrev, paEntries[i].uFirstPort, paEntries[i].uLastPort,
687	paEntries[i].uLastPort - paEntries[i].uFirstPort + 1, pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts));
688	uPortPrev = paEntries[i].uLastPort;
689	}
690	#endif
691	}
692	else
693	{
694	AssertFailed();
695	rc = VERR_IOM_IOPORTS_NOT_MAPPED;
696	}
697
698	IOM_UNLOCK_EXCL(pVM);
699	return rc;
700	}
701
702
703	/**
704	* Validates @a hIoPorts, making sure it belongs to @a pDevIns.
705	*
706	* @returns VBox status code.
707	* @param pVM The cross context VM structure.
708	* @param pDevIns The device which allegedly owns @a hIoPorts.
709	* @param hIoPorts The handle to validate.
710	*/
711	VMMR3_INT_DECL(int) IOMR3IoPortValidateHandle(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
712	{
713	AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
714	AssertReturn(hIoPorts < RT_MIN(pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc), VERR_IOM_INVALID_IOPORT_HANDLE);
715	PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
716	AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
717	return VINF_SUCCESS;
718	}
719
720
721	/**
722	* Gets the mapping address of I/O ports @a hIoPorts.
723	*
724	* @returns Mapping address if mapped, UINT32_MAX if not mapped or invalid
725	* input.
726	* @param pVM The cross context VM structure.
727	* @param pDevIns The device which allegedly owns @a hRegion.
728	* @param hIoPorts The handle to I/O port region.
729	*/
730	VMMR3_INT_DECL(uint32_t) IOMR3IoPortGetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
731	{
732	AssertPtrReturn(pDevIns, UINT32_MAX);
733	AssertReturn(hIoPorts < RT_MIN(pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc), UINT32_MAX);
734	IOMIOPORTENTRYR3 volatile * const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
735	AssertReturn(pRegEntry->pDevIns == pDevIns, UINT32_MAX);
736	for (uint32_t iTry = 0; ; iTry++)
737	{
738	bool fMapped = pRegEntry->fMapped;
739	RTIOPORT uPort = pRegEntry->uPort;
740	if ( ( ASMAtomicReadBool(&pRegEntry->fMapped) == fMapped
741	&& uPort == pRegEntry->uPort)
742	\|\| iTry > 1024)
743	return fMapped ? uPort : UINT32_MAX;
744	ASMNopPause();
745	}
746	}
747
748
749	/**
750	* Display all registered I/O port ranges.
751	*
752	* @param pVM The cross context VM structure.
753	* @param pHlp The info helpers.
754	* @param pszArgs Arguments, ignored.
755	*/
756	DECLCALLBACK(void) iomR3IoPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
757	{
758	RT_NOREF(pszArgs);
759
760	/* No locking needed here as registerations are only happening during VMSTATE_CREATING. */
761	pHlp->pfnPrintf(pHlp,
762	"I/O port registrations: %u (%u allocated)\n"
763	" ## Ctx Ports Mapping PCI Description\n",
764	pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc);
765	PIOMIOPORTENTRYR3 paRegs = pVM->iom.s.paIoPortRegs;
766	for (uint32_t i = 0; i < pVM->iom.s.cIoPortRegs; i++)
767	{
768	const char * const pszRing = paRegs[i].fRing0 ? paRegs[i].fRawMode ? "+0+C" : "+0 "
769	: paRegs[i].fRawMode ? "+C " : " ";
770	if (paRegs[i].fMapped && paRegs[i].pPciDev)
771	pHlp->pfnPrintf(pHlp, "%3u R3%s %04x %04x-%04x pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts,
772	paRegs[i].uPort, paRegs[i].uPort + paRegs[i].cPorts - 1,
773	paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc);
774	else if (paRegs[i].fMapped && !paRegs[i].pPciDev)
775	pHlp->pfnPrintf(pHlp, "%3u R3%s %04x %04x-%04x %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts,
776	paRegs[i].uPort, paRegs[i].uPort + paRegs[i].cPorts - 1, paRegs[i].pszDesc);
777	else if (paRegs[i].pPciDev)
778	pHlp->pfnPrintf(pHlp, "%3u R3%s %04x unmapped pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts,
779	paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc);
780	else
781	pHlp->pfnPrintf(pHlp, "%3u R3%s %04x unmapped %s\n",
782	paRegs[i].idxSelf, pszRing, paRegs[i].cPorts, paRegs[i].pszDesc);
783	}
784	}
785

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source: vbox/trunk/src/VBox/VMM/VMMR3/IOMR3IoPort.cpp@ 107215

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