VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/NEMR3.cpp@ 107227

Last change on this file since 107227 was 107227, checked in by vboxsync, 6 weeks ago

VMM: Cleaning up ARMv8 / x86 split. jiraref:VBP-1470

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 19.2 KB
Line 
1/* $Id: NEMR3.cpp 107227 2024-12-04 15:20:14Z vboxsync $ */
2/** @file
3 * NEM - Native execution manager.
4 */
5
6/*
7 * Copyright (C) 2018-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28/** @page pg_nem NEM - Native Execution Manager.
29 *
30 * This is an alternative execution manage to HM and raw-mode. On one host
31 * (Windows) we're forced to use this, on the others we just do it because we
32 * can. Since this is host specific in nature, information about an
33 * implementation is contained in the NEMR3Native-xxxx.cpp files.
34 *
35 * @ref pg_nem_win
36 */
37
38
39/*********************************************************************************************************************************
40* Header Files *
41*********************************************************************************************************************************/
42#define LOG_GROUP LOG_GROUP_NEM
43#include <VBox/vmm/dbgf.h>
44#include <VBox/vmm/nem.h>
45#include <VBox/vmm/gim.h>
46#include "NEMInternal.h"
47#include <VBox/vmm/vm.h>
48#include <VBox/vmm/uvm.h>
49#include <VBox/err.h>
50
51#include <iprt/asm.h>
52#include <iprt/string.h>
53
54
55
56/**
57 * Basic init and configuration reading.
58 *
59 * Always call NEMR3Term after calling this.
60 *
61 * @returns VBox status code.
62 * @param pVM The cross context VM structure.
63 */
64VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
65{
66 LogFlow(("NEMR3Init\n"));
67
68 /*
69 * Assert alignment and sizes.
70 */
71 AssertCompileMemberAlignment(VM, nem.s, 64);
72 AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
73
74 /*
75 * Initialize state info so NEMR3Term will always be happy.
76 * No returning prior to setting magics!
77 */
78 pVM->nem.s.u32Magic = NEM_MAGIC;
79 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
80 {
81 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
82 pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
83 }
84
85 /*
86 * Read configuration.
87 */
88 PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
89
90 /*
91 * Validate the NEM settings.
92 */
93 int rc = CFGMR3ValidateConfig(pCfgNem,
94 "/NEM/",
95 "Enabled"
96 "|Allow64BitGuests"
97 "|LovelyMesaDrvWorkaround"
98#ifdef RT_OS_WINDOWS
99 "|UseRing0Runloop"
100#elif defined(RT_OS_DARWIN)
101 "|VmxPleGap"
102 "|VmxPleWindow"
103 "|VmxLbr"
104#endif
105#ifdef VBOX_VMM_TARGET_ARMV8
106 "|VTimerInterrupt"
107#endif
108 ,
109 "" /* pszValidNodes */, "NEM" /* pszWho */, 0 /* uInstance */);
110 if (RT_FAILURE(rc))
111 return rc;
112
113 /** @cfgm{/NEM/NEMEnabled, bool, true}
114 * Whether NEM is enabled. */
115 rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
116 AssertLogRelRCReturn(rc, rc);
117
118
119#ifdef VBOX_WITH_64_BITS_GUESTS
120 /** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
121 * Enables AMD64 CPU features.
122 * On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
123 * already have the support. */
124 rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
125 AssertLogRelRCReturn(rc, rc);
126#else
127 pVM->nem.s.fAllow64BitGuests = false;
128#endif
129
130 /** @cfgm{/NEM/LovelyMesaDrvWorkaround, bool, false}
131 * Workaround for mesa vmsvga 3d driver making incorrect assumptions about
132 * the hypervisor it is running under. */
133 bool f;
134 rc = CFGMR3QueryBoolDef(pCfgNem, "LovelyMesaDrvWorkaround", &f, false);
135 AssertLogRelRCReturn(rc, rc);
136 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
137 {
138 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
139 pVCpu->nem.s.fTrapXcptGpForLovelyMesaDrv = f;
140 }
141
142#ifdef VBOX_VMM_TARGET_ARMV8
143 /** @cfgm{/NEM/VTimerInterrupt, uint32_t}
144 * Specifies the interrupt identifier for the VTimer. */
145 rc = CFGMR3QueryU32(pCfgNem, "VTimerInterrupt", &pVM->nem.s.u32GicPpiVTimer);
146 AssertLogRelRCReturn(rc, rc);
147#endif
148
149 return VINF_SUCCESS;
150}
151
152
153/**
154 * This is called by HMR3Init() when HM cannot be used.
155 *
156 * Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
157 * native hypervisor API to execute the VM.
158 *
159 * @returns VBox status code.
160 * @param pVM The cross context VM structure.
161 * @param fFallback Whether this is a fallback call. Cleared if the VM is
162 * configured to use NEM instead of HM.
163 * @param fForced Whether /HM/HMForced was set. If set and we fail to
164 * enable NEM, we'll return a failure status code.
165 * Otherwise we'll assume HMR3Init falls back on raw-mode.
166 */
167VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
168{
169 Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
170 int rc;
171 if (pVM->nem.s.fEnabled)
172 {
173#ifdef VBOX_WITH_NATIVE_NEM
174 rc = nemR3NativeInit(pVM, fFallback, fForced);
175 ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
176#else
177 RT_NOREF(fFallback);
178 rc = VINF_SUCCESS;
179#endif
180 if (RT_SUCCESS(rc))
181 {
182 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
183 {
184#ifndef VBOX_WITH_HWVIRT /* Don't complain if there are no other alternatives. */
185# ifdef RT_OS_WINDOWS /* The WHv* API is extremely slow at handling VM exits. The AppleHv and
186 KVM APIs are much faster, thus the different mode name. :-) */
187 LogRel(("NEM:\n"
188 "NEM: NEMR3Init: Snail execution mode is active!\n"
189 "NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
190 "NEM: To see VirtualBox run at max speed you need to disable all Windows features\n"
191 "NEM: making use of Hyper-V. That is a moving target, so google how and carefully\n"
192 "NEM: consider the consequences of disabling these features.\n"
193 "NEM:\n"));
194# else
195 LogRel(("NEM:\n"
196 "NEM: NEMR3Init: Turtle execution mode is active!\n"
197 "NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
198 "NEM:\n"));
199# endif
200#endif
201 }
202 else
203 {
204 LogRel(("NEM: NEMR3Init: Not available.\n"));
205 if (fForced)
206 rc = VERR_NEM_NOT_AVAILABLE;
207 }
208 }
209 else
210 LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
211 }
212 else
213 {
214 LogRel(("NEM: NEMR3Init: Disabled.\n"));
215 rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
216 }
217 return rc;
218}
219
220
221/**
222 * Perform initialization that depends on CPUM working.
223 *
224 * This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
225 *
226 * @returns VBox status code.
227 * @param pVM The cross context VM structure.
228 */
229VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
230{
231 int rc = VINF_SUCCESS;
232 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
233 {
234 /*
235 * Do native after-CPUM init.
236 */
237#ifdef VBOX_WITH_NATIVE_NEM
238 rc = nemR3NativeInitAfterCPUM(pVM);
239#else
240 RT_NOREF(pVM);
241#endif
242 }
243 return rc;
244}
245
246
247/**
248 * Called when a init phase has completed.
249 *
250 * @returns VBox status code.
251 * @param pVM The cross context VM structure.
252 * @param enmWhat The phase that completed.
253 */
254VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
255{
256 /*
257 * Check if GIM needs #UD, since that applies to everyone.
258 */
259 if (enmWhat == VMINITCOMPLETED_RING3)
260 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
261 {
262 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
263 pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
264 }
265
266 /*
267 * Call native code.
268 */
269 int rc = VINF_SUCCESS;
270#ifdef VBOX_WITH_NATIVE_NEM
271 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
272 rc = nemR3NativeInitCompleted(pVM, enmWhat);
273#else
274 RT_NOREF(pVM, enmWhat);
275#endif
276 return rc;
277}
278
279
280/**
281 *
282 * @returns VBox status code.
283 * @param pVM The cross context VM structure.
284 */
285VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
286{
287 AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
288 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
289 AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
290
291 /* Do native termination. */
292 int rc = VINF_SUCCESS;
293#ifdef VBOX_WITH_NATIVE_NEM
294 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
295 rc = nemR3NativeTerm(pVM);
296#endif
297
298 /* Mark it as terminated. */
299 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
300 {
301 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
302 pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
303 }
304 pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
305 return rc;
306}
307
308/**
309 * External interface for querying whether native execution API is used.
310 *
311 * @returns true if NEM is being used, otherwise false.
312 * @param pUVM The user mode VM handle.
313 * @sa HMR3IsEnabled
314 */
315VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
316{
317 UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
318 PVM pVM = pUVM->pVM;
319 VM_ASSERT_VALID_EXT_RETURN(pVM, false);
320 return VM_IS_NEM_ENABLED(pVM);
321}
322
323
324/**
325 * The VM is being reset.
326 *
327 * @param pVM The cross context VM structure.
328 */
329VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
330{
331#ifdef VBOX_WITH_NATIVE_NEM
332 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
333 nemR3NativeReset(pVM);
334#else
335 RT_NOREF(pVM);
336#endif
337}
338
339
340/**
341 * Resets a virtual CPU.
342 *
343 * Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
344 *
345 * @param pVCpu The cross context virtual CPU structure to reset.
346 * @param fInitIpi Set if being reset due to INIT IPI.
347 */
348VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
349{
350#ifdef VBOX_WITH_NATIVE_NEM
351 if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
352 nemR3NativeResetCpu(pVCpu, fInitIpi);
353#else
354 RT_NOREF(pVCpu, fInitIpi);
355#endif
356}
357
358
359/**
360 * Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
361 *
362 * @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
363 * @param pVM The cross context VM structure.
364 */
365VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
366{
367#ifdef VBOX_WITH_NATIVE_NEM
368 if (VM_IS_NEM_ENABLED(pVM))
369 return true;
370#else
371 RT_NOREF(pVM);
372#endif
373 return false;
374}
375
376
377/**
378 * Gets the name of a generic NEM exit code.
379 *
380 * @returns Pointer to read only string if @a uExit is known, otherwise NULL.
381 * @param uExit The NEM exit to name.
382 */
383VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
384{
385 switch ((NEMEXITTYPE)uExit)
386 {
387 case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
388 case NEMEXITTYPE_HALT: return "NEM halt";
389
390 case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
391 case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
392 case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
393 case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
394 case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
395 case NEMEXITTYPE_CANCELED: return "NEM canceled";
396 case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
397
398 case NEMEXITTYPE_INTERNAL_ERROR_EMULATION: return "NEM emulation IPE";
399 case NEMEXITTYPE_INTERNAL_ERROR_FATAL: return "NEM fatal IPE";
400 case NEMEXITTYPE_INTERRUPTED: return "NEM interrupted";
401 case NEMEXITTYPE_FAILED_ENTRY: return "NEM failed VT-x/AMD-V entry";
402
403 case NEMEXITTYPE_INVALID:
404 case NEMEXITTYPE_END:
405 break;
406 }
407
408 return NULL;
409}
410
411
412VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
413{
414 Assert(VM_IS_NEM_ENABLED(pVM));
415#ifdef VBOX_WITH_NATIVE_NEM
416 return nemR3NativeRunGC(pVM, pVCpu);
417#else
418 NOREF(pVM); NOREF(pVCpu);
419 return VERR_INTERNAL_ERROR_3;
420#endif
421}
422
423
424#ifndef VBOX_WITH_NATIVE_NEM
425VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
426{
427 RT_NOREF(pVM, pVCpu);
428 return false;
429}
430#endif
431
432
433VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
434{
435 Assert(VM_IS_NEM_ENABLED(pVM));
436#ifdef VBOX_WITH_NATIVE_NEM
437 return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
438#else
439 NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
440 return false;
441#endif
442}
443
444
445VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
446{
447 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
448#ifdef VBOX_WITH_NATIVE_NEM
449 nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
450#else
451 RT_NOREF(pVM, pVCpu, fFlags);
452#endif
453}
454
455#ifndef VBOX_WITH_NATIVE_NEM
456
457VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
458{
459 RT_NOREF(pVCpu, fEnabled);
460}
461
462# ifdef VBOX_WITH_PGM_NEM_MODE
463
464VMMR3_INT_DECL(bool) NEMR3IsMmio2DirtyPageTrackingSupported(PVM pVM)
465{
466 RT_NOREF(pVM);
467 return false;
468}
469
470
471VMMR3_INT_DECL(int) NEMR3PhysMmio2QueryAndResetDirtyBitmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t uNemRange,
472 void *pvBitmap, size_t cbBitmap)
473{
474 RT_NOREF(pVM, GCPhys, cb, uNemRange, pvBitmap, cbBitmap);
475 AssertFailed();
476 return VERR_INTERNAL_ERROR_2;
477}
478
479
480VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
481 void *pvRam, void *pvMmio2, uint8_t *pu2State, uint32_t *puNemRange)
482{
483 RT_NOREF(pVM, GCPhys, cb, fFlags, pvRam, pvMmio2, pu2State, puNemRange);
484 AssertFailed();
485 return VERR_INTERNAL_ERROR_2;
486}
487
488# endif /* VBOX_WITH_PGM_NEM_MODE */
489#endif /* !VBOX_WITH_NATIVE_NEM */
490
491/**
492 * Notification callback from DBGF when interrupt breakpoints or generic debug
493 * event settings changes.
494 *
495 * DBGF will call NEMR3NotifyDebugEventChangedPerCpu on each CPU afterwards, this
496 * function is just updating the VM globals.
497 *
498 * @param pVM The VM cross context VM structure.
499 * @thread EMT(0)
500 */
501VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChanged(PVM pVM)
502{
503 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
504
505#ifdef VBOX_WITH_NATIVE_NEM
506 /* Interrupts. */
507 bool fUseDebugLoop = pVM->dbgf.ro.cSoftIntBreakpoints > 0
508 || pVM->dbgf.ro.cHardIntBreakpoints > 0;
509
510 /* CPU Exceptions. */
511 for (DBGFEVENTTYPE enmEvent = DBGFEVENT_XCPT_FIRST;
512 !fUseDebugLoop && enmEvent <= DBGFEVENT_XCPT_LAST;
513 enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
514 fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
515
516 /* Common VM exits. */
517 for (DBGFEVENTTYPE enmEvent = DBGFEVENT_EXIT_FIRST;
518 !fUseDebugLoop && enmEvent <= DBGFEVENT_EXIT_LAST_COMMON;
519 enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
520 fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
521
522 /* Done. */
523 pVM->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChanged(pVM, fUseDebugLoop);
524#else
525 RT_NOREF(pVM);
526#endif
527}
528
529
530/**
531 * Follow up notification callback to NEMR3NotifyDebugEventChanged for each CPU.
532 *
533 * NEM uses this to combine the decision made NEMR3NotifyDebugEventChanged with
534 * per CPU settings.
535 *
536 * @param pVM The VM cross context VM structure.
537 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
538 */
539VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu)
540{
541 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
542
543#ifdef VBOX_WITH_NATIVE_NEM
544 pVCpu->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChangedPerCpu(pVM, pVCpu,
545 pVCpu->nem.s.fSingleInstruction | pVM->nem.s.fUseDebugLoop);
546#else
547 RT_NOREF(pVM, pVCpu);
548#endif
549}
550
551
552/**
553 * Disables a CPU ISA extension, like MONITOR/MWAIT.
554 *
555 * @returns VBox status code
556 * @param pVM The cross context VM structure.
557 * @param pszIsaExt The ISA extension name in the config tree.
558 */
559int nemR3DisableCpuIsaExt(PVM pVM, const char *pszIsaExt)
560{
561 /*
562 * Get IsaExts config node under CPUM.
563 */
564 PCFGMNODE pIsaExts = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/CPUM/IsaExts");
565 if (!pIsaExts)
566 {
567 int rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "/CPUM/IsaExts", &pIsaExts);
568 AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertNode: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
569 }
570
571 /*
572 * Look for a value by the given name (pszIsaExt).
573 */
574 /* Integer values 1 (CPUMISAEXTCFG_ENABLED_SUPPORTED) and 9 (CPUMISAEXTCFG_ENABLED_PORTABLE) will be replaced. */
575 uint64_t u64Value;
576 int rc = CFGMR3QueryInteger(pIsaExts, pszIsaExt, &u64Value);
577 if (RT_SUCCESS(rc))
578 {
579 if (u64Value != 1 && u64Value != 9)
580 {
581 LogRel(("NEM: Not disabling IsaExt '%s', already configured with int value %lld\n", pszIsaExt, u64Value));
582 return VINF_SUCCESS;
583 }
584 CFGMR3RemoveValue(pIsaExts, pszIsaExt);
585 }
586 /* String value 'default', 'enabled' and 'portable' will be replaced. */
587 else if (rc == VERR_CFGM_NOT_INTEGER)
588 {
589 char szValue[32];
590 rc = CFGMR3QueryString(pIsaExts, pszIsaExt, szValue, sizeof(szValue));
591 AssertRCReturn(rc, VINF_SUCCESS);
592
593 if ( RTStrICmpAscii(szValue, "default") != 0
594 && RTStrICmpAscii(szValue, "def") != 0
595 && RTStrICmpAscii(szValue, "enabled") != 0
596 && RTStrICmpAscii(szValue, "enable") != 0
597 && RTStrICmpAscii(szValue, "on") != 0
598 && RTStrICmpAscii(szValue, "yes") != 0
599 && RTStrICmpAscii(szValue, "portable") != 0)
600 {
601 LogRel(("NEM: Not disabling IsaExt '%s', already configured with string value '%s'\n", pszIsaExt, szValue));
602 return VINF_SUCCESS;
603 }
604 CFGMR3RemoveValue(pIsaExts, pszIsaExt);
605 }
606 else
607 AssertLogRelMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND, ("CFGMR3QueryInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt),
608 VERR_NEM_IPE_8);
609
610 /*
611 * Insert the disabling value.
612 */
613 rc = CFGMR3InsertInteger(pIsaExts, pszIsaExt, 0 /* disabled */);
614 AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
615
616 return VINF_SUCCESS;
617}
618
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette