VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/NEMR3.cpp@ 71800

Last change on this file since 71800 was 71284, checked in by vboxsync, 7 years ago

NEM: Working on the @page docs for windows. bugref:9044
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1/* $Id: NEMR3.cpp 71284 2018-03-09 12:38:30Z vboxsync $ */
2/** @file
3 * NEM - Native execution manager.
4 */
5
6/*
7 * Copyright (C) 2018 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @page pg_nem NEM - Native Execution Manager.
19 *
20 * This is an alternative execution manage to HM and raw-mode. On one host
21 * (Windows) we're forced to use this, on the others we just do it because we
22 * can. Since this is host specific in nature, information about an
23 * implementation is contained in the NEMR3Native-xxxx.cpp files.
24 *
25 * @ref pg_nem_win
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_NEM
33#include <VBox/vmm/nem.h>
34#include "NEMInternal.h"
35#include <VBox/vmm/vm.h>
36
37#include <iprt/asm.h>
38
39
40
41/**
42 * Basic init and configuration reading.
43 *
44 * Always call NEMR3Term after calling this.
45 *
46 * @returns VBox status code.
47 * @param pVM The cross context VM structure.
48 */
49VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
50{
51 LogFlow(("NEMR3Init\n"));
52
53 /*
54 * Assert alignment and sizes.
55 */
56 AssertCompileMemberAlignment(VM, nem.s, 64);
57 AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
58
59 /*
60 * Initialize state info so NEMR3Term will always be happy.
61 * No returning prior to setting magics!
62 */
63 pVM->nem.s.u32Magic = NEM_MAGIC;
64 for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++)
65 pVM->aCpus[iCpu].nem.s.u32Magic = NEMCPU_MAGIC;
66
67 /*
68 * Read configuration.
69 */
70 PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
71
72 /*
73 * Validate the NEM settings.
74 */
75 int rc = CFGMR3ValidateConfig(pCfgNem,
76 "/NEM/",
77 "Enabled",
78 "" /* pszValidNodes */, "NEM" /* pszWho */, 0 /* uInstance */);
79 if (RT_FAILURE(rc))
80 return rc;
81
82 /** @cfgm{/NEM/NEMEnabled, bool, true}
83 * Whether NEM is enabled. */
84 rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
85 AssertLogRelRCReturn(rc, rc);
86
87 return VINF_SUCCESS;
88}
89
90
91/**
92 * This is called by HMR3Init() when HM cannot be used.
93 *
94 * Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
95 * native hypervisor API to execute the VM.
96 *
97 * @returns VBox status code.
98 * @param pVM The cross context VM structure.
99 * @param fFallback Whether this is a fallback call. Cleared if the VM is
100 * configured to use NEM instead of HM.
101 * @param fForced Whether /HM/HMForced was set. If set and we fail to
102 * enable NEM, we'll return a failure status code.
103 * Otherwise we'll assume HMR3Init falls back on raw-mode.
104 */
105VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
106{
107 Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
108 int rc;
109 if (pVM->nem.s.fEnabled)
110 {
111#ifdef VBOX_WITH_NATIVE_NEM
112 rc = nemR3NativeInit(pVM, fFallback, fForced);
113 ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
114#else
115 RT_NOREF(fFallback);
116 rc = VINF_SUCCESS;
117#endif
118 if (RT_SUCCESS(rc))
119 {
120 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
121 LogRel(("NEM: NEMR3Init: Active.\n"));
122 else
123 {
124 LogRel(("NEM: NEMR3Init: Not available.\n"));
125 if (fForced)
126 rc = VERR_NEM_NOT_AVAILABLE;
127 }
128 }
129 else
130 LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
131 }
132 else
133 {
134 LogRel(("NEM: NEMR3Init: Disabled.\n"));
135 rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
136 }
137 return rc;
138}
139
140
141/**
142 * Perform initialization that depends on CPUM working.
143 *
144 * This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
145 *
146 * @returns VBox status code.
147 * @param pVM The cross context VM structure.
148 */
149VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
150{
151 int rc = VINF_SUCCESS;
152#ifdef VBOX_WITH_NATIVE_NEM
153 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
154 rc = nemR3NativeInitAfterCPUM(pVM);
155#else
156 RT_NOREF(pVM);
157#endif
158 return rc;
159}
160
161
162/**
163 * Called when a init phase has completed.
164 *
165 * @returns VBox status code.
166 * @param pVM The cross context VM structure.
167 * @param enmWhat The phase that completed.
168 */
169VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
170{
171 int rc = VINF_SUCCESS;
172#ifdef VBOX_WITH_NATIVE_NEM
173 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
174 rc = nemR3NativeInitCompleted(pVM, enmWhat);
175#else
176 RT_NOREF(pVM, enmWhat);
177#endif
178 return rc;
179}
180
181
182/**
183 *
184 * @returns VBox status code.
185 * @param pVM The cross context VM structure.
186 */
187VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
188{
189 AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
190 for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++)
191 AssertReturn(pVM->aCpus[iCpu].nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
192
193 /* Do native termination. */
194 int rc = VINF_SUCCESS;
195#ifdef VBOX_WITH_NATIVE_NEM
196 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
197 rc = nemR3NativeTerm(pVM);
198#endif
199
200 /* Mark it as terminated. */
201 for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++)
202 pVM->aCpus[iCpu].nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
203 pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
204 return rc;
205}
206
207
208/**
209 * The VM is being reset.
210 *
211 * @param pVM The cross context VM structure.
212 */
213VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
214{
215#ifdef VBOX_WITH_NATIVE_NEM
216 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
217 nemR3NativeReset(pVM);
218#else
219 RT_NOREF(pVM);
220#endif
221}
222
223
224/**
225 * Resets a virtual CPU.
226 *
227 * Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
228 *
229 * @param pVCpu The cross context virtual CPU structure to reset.
230 * @param fInitIpi Set if being reset due to INIT IPI.
231 */
232VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
233{
234#ifdef VBOX_WITH_NATIVE_NEM
235 if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
236 nemR3NativeResetCpu(pVCpu, fInitIpi);
237#else
238 RT_NOREF(pVCpu, fInitIpi);
239#endif
240}
241
242
243VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
244{
245 Assert(VM_IS_NEM_ENABLED(pVM));
246#ifdef VBOX_WITH_NATIVE_NEM
247 return nemR3NativeRunGC(pVM, pVCpu);
248#else
249 NOREF(pVM); NOREF(pVCpu);
250 return VERR_INTERNAL_ERROR_3;
251#endif
252}
253
254
255VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
256{
257 Assert(VM_IS_NEM_ENABLED(pVM));
258#ifdef VBOX_WITH_NATIVE_NEM
259 return nemR3NativeCanExecuteGuest(pVM, pVCpu, pCtx);
260#else
261 NOREF(pVM); NOREF(pVCpu); NOREF(pCtx);
262 return false;
263#endif
264}
265
266
267VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
268{
269 Assert(VM_IS_NEM_ENABLED(pVM));
270#ifdef VBOX_WITH_NATIVE_NEM
271 return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
272#else
273 NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
274 return false;
275#endif
276}
277
278
279VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
280{
281 AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
282#ifdef VBOX_WITH_NATIVE_NEM
283 nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
284#else
285 RT_NOREF(pVM, pVCpu, fFlags);
286#endif
287}
288
289
290
291
292VMMR3_INT_DECL(int) NEMR3NotifyPhysRamRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb)
293{
294 int rc = VINF_SUCCESS;
295#ifdef VBOX_WITH_NATIVE_NEM
296 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
297 rc = nemR3NativeNotifyPhysRamRegister(pVM, GCPhys, cb);
298#else
299 NOREF(pVM); NOREF(GCPhys); NOREF(cb);
300#endif
301 return rc;
302}
303
304
305VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags, void *pvMmio2)
306{
307 int rc = VINF_SUCCESS;
308#ifdef VBOX_WITH_NATIVE_NEM
309 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
310 rc = nemR3NativeNotifyPhysMmioExMap(pVM, GCPhys, cb, fFlags, pvMmio2);
311#else
312 NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags); NOREF(pvMmio2);
313#endif
314 return rc;
315}
316
317
318VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExUnmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags)
319{
320 int rc = VINF_SUCCESS;
321#ifdef VBOX_WITH_NATIVE_NEM
322 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
323 rc = nemR3NativeNotifyPhysMmioExUnmap(pVM, GCPhys, cb, fFlags);
324#else
325 NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags);
326#endif
327 return rc;
328}
329
330
331VMMR3_INT_DECL(int) NEMR3NotifyPhysRomRegisterEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags)
332{
333 int rc = VINF_SUCCESS;
334#ifdef VBOX_WITH_NATIVE_NEM
335 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
336 rc = nemR3NativeNotifyPhysRomRegisterEarly(pVM, GCPhys, cb, fFlags);
337#else
338 NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags);
339#endif
340 return rc;
341}
342
343
344/**
345 * Called after the ROM range has been fully completed.
346 *
347 * This will be preceeded by a NEMR3NotifyPhysRomRegisterEarly() call as well a
348 * number of NEMHCNotifyPhysPageProtChanged calls.
349 *
350 * @returns VBox status code
351 * @param pVM The cross context VM structure.
352 * @param GCPhys The ROM address (page aligned).
353 * @param cb The size (page aligned).
354 * @param fFlags NEM_NOTIFY_PHYS_ROM_F_XXX.
355 */
356VMMR3_INT_DECL(int) NEMR3NotifyPhysRomRegisterLate(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags)
357{
358 int rc = VINF_SUCCESS;
359#ifdef VBOX_WITH_NATIVE_NEM
360 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
361 rc = nemR3NativeNotifyPhysRomRegisterLate(pVM, GCPhys, cb, fFlags);
362#else
363 NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags);
364#endif
365 return rc;
366}
367
368
369VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
370{
371#ifdef VBOX_WITH_NATIVE_NEM
372 if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
373 nemR3NativeNotifySetA20(pVCpu, fEnabled);
374#else
375 NOREF(pVCpu); NOREF(fEnabled);
376#endif
377}
378
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