PATMPatch.cpp@ 45457

Last change on this file since 45457 was 45276, checked in by vboxsync, 12 years ago

Ring-1 compression patches, courtesy of trivirt AG:

main: diff to remove the hwvirt requirement for QNX
rem: diff for dealing with raw ring 0/1 selectors and general changes to allowed guest execution states
vmm: changes for using the guest's TSS selector index as our hypervisor TSS selector (makes str safe) (VBOX_WITH_SAFE_STR )
vmm: changes for dealing with guest ring 1 code (VBOX_WITH_RAW_RING1)
vmm: change to emulate smsw in RC/R0 (QNX uses this old style instruction a lot so going to qemu for emulation is very expensive)
vmm: change (hack) to kick out patm virtual handlers in case they conflict with guest GDT/TSS write monitors; we should allow multiple handlers per page, but that change would be rather invasive

Property svn:eol-style set to native
Property svn:keywords set to Id Revision

File size: 52.9 KB

Line
1	/* $Id: PATMPatch.cpp 45276 2013-04-02 08:17:11Z vboxsync $ */
2	/** @file
3	* PATMPatch - Dynamic Guest OS Instruction patches
4	*
5	* NOTE: CSAM assumes patch memory is never reused!!
6	*/
7
8	/*
9	* Copyright (C) 2006-2013 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23	#define LOG_GROUP LOG_GROUP_PATM
24	#include <VBox/vmm/patm.h>
25	#include <VBox/vmm/stam.h>
26	#include <VBox/vmm/pgm.h>
27	#include <VBox/vmm/cpum.h>
28	#include <VBox/vmm/mm.h>
29	#include <VBox/vmm/em.h>
30	#include <VBox/vmm/trpm.h>
31	#include <VBox/param.h>
32	#include <iprt/avl.h>
33	#include "PATMInternal.h"
34	#include <VBox/vmm/vm.h>
35	#include <VBox/vmm/csam.h>
36
37	#include <VBox/dbg.h>
38	#include <VBox/err.h>
39	#include <VBox/log.h>
40	#include <iprt/assert.h>
41	#include <iprt/asm.h>
42	#include <iprt/string.h>
43	#include <VBox/dis.h>
44	#include <VBox/disopcode.h>
45
46	#include <stdlib.h>
47	#include <stdio.h>
48	#include "PATMA.h"
49	#include "PATMPatch.h"
50
51	/* internal structure for passing more information about call fixups to patmPatchGenCode */
52	typedef struct
53	{
54	RTRCPTR pTargetGC;
55	RTRCPTR pCurInstrGC;
56	RTRCPTR pNextInstrGC;
57	RTRCPTR pReturnGC;
58	} PATMCALLINFO, *PPATMCALLINFO;
59
60	int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTRCPTR pSource, RTRCPTR pDest)
61	{
62	PRELOCREC pRec;
63
64	Assert(uType == FIXUP_ABSOLUTE \|\| ((uType == FIXUP_REL_JMPTOPATCH \|\| uType == FIXUP_REL_JMPTOGUEST) && pSource && pDest));
65
66	LogFlow(("patmPatchAddReloc32 type=%d pRelocGC=%RRv source=%RRv dest=%RRv\n", uType, pRelocHC - pVM->patm.s.pPatchMemGC + pVM->patm.s.pPatchMemGC , pSource, pDest));
67
68	pRec = (PRELOCREC)MMR3HeapAllocZ(pVM, MM_TAG_PATM_PATCH, sizeof(*pRec));
69	Assert(pRec);
70	pRec->Core.Key = (AVLPVKEY)pRelocHC;
71	pRec->pRelocPos = pRelocHC; /* @todo redundant. */
72	pRec->pSource = pSource;
73	pRec->pDest = pDest;
74	pRec->uType = uType;
75
76	bool ret = RTAvlPVInsert(&pPatch->FixupTree, &pRec->Core);
77	Assert(ret); NOREF(ret);
78	pPatch->nrFixups++;
79
80	return VINF_SUCCESS;
81	}
82
83	int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTRCPTR pTargetGC, uint32_t opcode)
84	{
85	PJUMPREC pRec;
86
87	pRec = (PJUMPREC)MMR3HeapAllocZ(pVM, MM_TAG_PATM_PATCH, sizeof(*pRec));
88	Assert(pRec);
89
90	pRec->Core.Key = (AVLPVKEY)pJumpHC;
91	pRec->pJumpHC = pJumpHC; /* @todo redundant. */
92	pRec->offDispl = offset;
93	pRec->pTargetGC = pTargetGC;
94	pRec->opcode = opcode;
95
96	bool ret = RTAvlPVInsert(&pPatch->JumpTree, &pRec->Core);
97	Assert(ret); NOREF(ret);
98	pPatch->nrJumpRecs++;
99
100	return VINF_SUCCESS;
101	}
102
103	#define PATCHGEN_PROLOG_NODEF(pVM, pPatch) \
104	pPB = PATCHCODE_PTR_HC(pPatch) + pPatch->uCurPatchOffset; \
105	\
106	if (pPB + 256 >= pVM->patm.s.pPatchMemHC + pVM->patm.s.cbPatchMem) \
107	{ \
108	pVM->patm.s.fOutOfMemory = true; \
109	Assert(pPB + 256 >= pVM->patm.s.pPatchMemHC + pVM->patm.s.cbPatchMem); \
110	return VERR_NO_MEMORY; \
111	}
112
113	#define PATCHGEN_PROLOG(pVM, pPatch) \
114	uint8_t *pPB; \
115	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
116
117
118	#define PATCHGEN_EPILOG(pPatch, size) \
119	Assert(size <= 640); \
120	pPatch->uCurPatchOffset += size;
121
122
123	static uint32_t patmPatchGenCode(PVM pVM, PPATCHINFO pPatch, uint8_t pPB, PPATCHASMRECORD pAsmRecord, RCPTRTYPE(uint8_t ) pReturnAddrGC, bool fGenJump,
124	PPATMCALLINFO pCallInfo = 0)
125	{
126	uint32_t i, j;
127
128	Assert(fGenJump == false \|\| pReturnAddrGC);
129	Assert(fGenJump == false \|\| pAsmRecord->offJump);
130	Assert(pAsmRecord && pAsmRecord->size > sizeof(pAsmRecord->uReloc[0]));
131
132	// Copy the code block
133	memcpy(pPB, pAsmRecord->pFunction, pAsmRecord->size);
134
135	// Process all fixups
136	for (j=0,i=0;i<pAsmRecord->nrRelocs*2; i+=2)
137	{
138	for (;j<pAsmRecord->size;j++)
139	{
140	if ((uint32_t)&pPB[j] == pAsmRecord->uReloc[i])
141	{
142	RCPTRTYPE(uint32_t *) dest;
143
144	#ifdef VBOX_STRICT
145	if (pAsmRecord->uReloc[i] == PATM_FIXUP)
146	Assert(pAsmRecord->uReloc[i+1] != 0);
147	else
148	Assert(pAsmRecord->uReloc[i+1] == 0);
149	#endif
150
151	/**
152	* BE VERY CAREFUL WITH THESE FIXUPS. TAKE INTO ACCOUNT THAT PROBLEMS MAY ARISE WHEN RESTORING A SAVED STATE WITH
153	* A DIFFERENT HYPERVISOR LAYOUT.
154	*/
155	switch (pAsmRecord->uReloc[i])
156	{
157	case PATM_VMFLAGS:
158	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uVMFlags);
159	break;
160
161	case PATM_PENDINGACTION:
162	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uPendingAction);
163	break;
164
165	case PATM_FIXUP:
166	/* Offset in uReloc[i+1] is from the base of the function. */
167	dest = (RTGCUINTPTR32)pVM->patm.s.pPatchMemGC + pAsmRecord->uReloc[i+1] + (RTGCUINTPTR32)(pPB - pVM->patm.s.pPatchMemHC);
168	break;
169	#ifdef VBOX_WITH_STATISTICS
170	case PATM_ALLPATCHCALLS:
171	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uPatchCalls);
172	break;
173
174	case PATM_IRETEFLAGS:
175	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uIretEFlags);
176	break;
177
178	case PATM_IRETCS:
179	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uIretCS);
180	break;
181
182	case PATM_IRETEIP:
183	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uIretEIP);
184	break;
185
186	case PATM_PERPATCHCALLS:
187	dest = patmPatchQueryStatAddress(pVM, pPatch);
188	break;
189	#endif
190	case PATM_STACKPTR:
191	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Psp);
192	break;
193
194	/* The first part of our PATM stack is used to store offsets of patch return addresses; the 2nd
195	* part to store the original return addresses.
196	*/
197	case PATM_STACKBASE:
198	dest = pVM->patm.s.pGCStackGC;
199	break;
200
201	case PATM_STACKBASE_GUEST:
202	dest = pVM->patm.s.pGCStackGC + PATM_STACK_SIZE;
203	break;
204
205	case PATM_RETURNADDR: /* absolute guest address; no fixup required */
206	Assert(pCallInfo && pAsmRecord->uReloc[i] >= PATM_NO_FIXUP);
207	dest = pCallInfo->pReturnGC;
208	break;
209
210	case PATM_PATCHNEXTBLOCK: /* relative address of instruction following this block */
211	Assert(pCallInfo && pAsmRecord->uReloc[i] >= PATM_NO_FIXUP);
212
213	/** @note hardcoded assumption that we must return to the instruction following this block */
214	dest = (uintptr_t)pPB - (uintptr_t)pVM->patm.s.pPatchMemHC + pAsmRecord->size;
215	break;
216
217	case PATM_CALLTARGET: /* relative to patch address; no fixup required */
218	Assert(pCallInfo && pAsmRecord->uReloc[i] >= PATM_NO_FIXUP);
219
220	/* Address must be filled in later. (see patmr3SetBranchTargets) */
221	patmPatchAddJump(pVM, pPatch, &pPB[j-1], 1, pCallInfo->pTargetGC, OP_CALL);
222	dest = PATM_ILLEGAL_DESTINATION;
223	break;
224
225	case PATM_PATCHBASE: /* Patch GC base address */
226	dest = pVM->patm.s.pPatchMemGC;
227	break;
228
229	case PATM_CPUID_STD_PTR:
230	/* @todo dirty hack when correcting this fixup (state restore) */
231	dest = CPUMR3GetGuestCpuIdStdRCPtr(pVM);
232	break;
233
234	case PATM_CPUID_EXT_PTR:
235	/* @todo dirty hack when correcting this fixup (state restore) */
236	dest = CPUMR3GetGuestCpuIdExtRCPtr(pVM);
237	break;
238
239	case PATM_CPUID_CENTAUR_PTR:
240	/* @todo dirty hack when correcting this fixup (state restore) */
241	dest = CPUMR3GetGuestCpuIdCentaurRCPtr(pVM);
242	break;
243
244	case PATM_CPUID_DEF_PTR:
245	/* @todo dirty hack when correcting this fixup (state restore) */
246	dest = CPUMR3GetGuestCpuIdDefRCPtr(pVM);
247	break;
248
249	case PATM_CPUID_STD_MAX:
250	dest = CPUMGetGuestCpuIdStdMax(pVM);
251	break;
252
253	case PATM_CPUID_EXT_MAX:
254	dest = CPUMGetGuestCpuIdExtMax(pVM);
255	break;
256
257	case PATM_CPUID_CENTAUR_MAX:
258	dest = CPUMGetGuestCpuIdCentaurMax(pVM);
259	break;
260
261	case PATM_INTERRUPTFLAG:
262	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, fPIF);
263	break;
264
265	case PATM_INHIBITIRQADDR:
266	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, GCPtrInhibitInterrupts);
267	break;
268
269	case PATM_NEXTINSTRADDR:
270	Assert(pCallInfo);
271	/* pNextInstrGC can be 0 if several instructions, that inhibit irqs, follow each other */
272	dest = pCallInfo->pNextInstrGC;
273	break;
274
275	case PATM_CURINSTRADDR:
276	Assert(pCallInfo);
277	dest = pCallInfo->pCurInstrGC;
278	break;
279
280	case PATM_VM_FORCEDACTIONS:
281	/* @todo dirty assumptions when correcting this fixup during saved state loading. */
282	dest = pVM->pVMRC + RT_OFFSETOF(VM, aCpus[0].fLocalForcedActions);
283	break;
284
285	case PATM_TEMP_EAX:
286	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uEAX);
287	break;
288	case PATM_TEMP_ECX:
289	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uECX);
290	break;
291	case PATM_TEMP_EDI:
292	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uEDI);
293	break;
294	case PATM_TEMP_EFLAGS:
295	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.eFlags);
296	break;
297	case PATM_TEMP_RESTORE_FLAGS:
298	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uFlags);
299	break;
300	case PATM_CALL_PATCH_TARGET_ADDR:
301	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, GCCallPatchTargetAddr);
302	break;
303	case PATM_CALL_RETURN_ADDR:
304	dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, GCCallReturnAddr);
305	break;
306
307	/* Relative address of global patm lookup and call function. */
308	case PATM_LOOKUP_AND_CALL_FUNCTION:
309	{
310	RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
311	Assert(pVM->patm.s.pfnHelperCallGC);
312	Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
313
314	/* Relative value is target minus address of instruction after the actual call instruction. */
315	dest = pVM->patm.s.pfnHelperCallGC - pInstrAfterCall;
316	break;
317	}
318
319	case PATM_RETURN_FUNCTION:
320	{
321	RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
322	Assert(pVM->patm.s.pfnHelperRetGC);
323	Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
324
325	/* Relative value is target minus address of instruction after the actual call instruction. */
326	dest = pVM->patm.s.pfnHelperRetGC - pInstrAfterCall;
327	break;
328	}
329
330	case PATM_IRET_FUNCTION:
331	{
332	RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
333	Assert(pVM->patm.s.pfnHelperIretGC);
334	Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
335
336	/* Relative value is target minus address of instruction after the actual call instruction. */
337	dest = pVM->patm.s.pfnHelperIretGC - pInstrAfterCall;
338	break;
339	}
340
341	case PATM_LOOKUP_AND_JUMP_FUNCTION:
342	{
343	RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
344	Assert(pVM->patm.s.pfnHelperJumpGC);
345	Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
346
347	/* Relative value is target minus address of instruction after the actual call instruction. */
348	dest = pVM->patm.s.pfnHelperJumpGC - pInstrAfterCall;
349	break;
350	}
351
352	default:
353	dest = PATM_ILLEGAL_DESTINATION;
354	AssertRelease(0);
355	break;
356	}
357
358	(RTRCPTR )&pPB[j] = dest;
359	if (pAsmRecord->uReloc[i] < PATM_NO_FIXUP)
360	{
361	patmPatchAddReloc32(pVM, pPatch, &pPB[j], FIXUP_ABSOLUTE);
362	}
363	break;
364	}
365	}
366	Assert(j < pAsmRecord->size);
367	}
368	Assert(pAsmRecord->uReloc[i] == 0xffffffff);
369
370	/* Add the jump back to guest code (if required) */
371	if (fGenJump)
372	{
373	int32_t displ = pReturnAddrGC - (PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset + pAsmRecord->offJump - 1 + SIZEOF_NEARJUMP32);
374
375	/* Add lookup record for patch to guest address translation */
376	Assert(pPB[pAsmRecord->offJump - 1] == 0xE9);
377	patmR3AddP2GLookupRecord(pVM, pPatch, &pPB[pAsmRecord->offJump - 1], pReturnAddrGC, PATM_LOOKUP_PATCH2GUEST);
378
379	(uint32_t )&pPB[pAsmRecord->offJump] = displ;
380	patmPatchAddReloc32(pVM, pPatch, &pPB[pAsmRecord->offJump], FIXUP_REL_JMPTOGUEST,
381	PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset + pAsmRecord->offJump - 1 + SIZEOF_NEARJUMP32,
382	pReturnAddrGC);
383	}
384
385	// Calculate the right size of this patch block
386	if ((fGenJump && pAsmRecord->offJump) \|\| (!fGenJump && !pAsmRecord->offJump))
387	{
388	return pAsmRecord->size;
389	}
390	else {
391	// if a jump instruction is present and we don't want one, then subtract SIZEOF_NEARJUMP32
392	return pAsmRecord->size - SIZEOF_NEARJUMP32;
393	}
394	}
395
396	/* Read bytes and check for overwritten instructions. */
397	static int patmPatchReadBytes(PVM pVM, uint8_t *pDest, RTRCPTR pSrc, uint32_t cb)
398	{
399	int rc = PGMPhysSimpleReadGCPtr(&pVM->aCpus[0], pDest, pSrc, cb);
400	AssertRCReturn(rc, rc);
401	/*
402	* Could be patched already; make sure this is checked!
403	*/
404	for (uint32_t i=0;i<cb;i++)
405	{
406	uint8_t temp;
407
408	int rc2 = PATMR3QueryOpcode(pVM, pSrc+i, &temp);
409	if (RT_SUCCESS(rc2))
410	{
411	pDest[i] = temp;
412	}
413	else
414	break; /* no more */
415	}
416	return VINF_SUCCESS;
417	}
418
419	int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE pCpu, RCPTRTYPE(uint8_t ) pCurInstrGC)
420	{
421	int rc = VINF_SUCCESS;
422	PATCHGEN_PROLOG(pVM, pPatch);
423
424	uint32_t const cbInstrShutUpGcc = pCpu->cbInstr;
425	rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, cbInstrShutUpGcc);
426	AssertRC(rc);
427	PATCHGEN_EPILOG(pPatch, cbInstrShutUpGcc);
428	return rc;
429	}
430
431	int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, bool fSizeOverride)
432	{
433	uint32_t size;
434	PATMCALLINFO callInfo;
435
436	PATCHGEN_PROLOG(pVM, pPatch);
437
438	AssertMsg(fSizeOverride == false, ("operand size override!!\n"));
439	callInfo.pCurInstrGC = pCurInstrGC;
440
441	#ifdef VBOX_WITH_RAW_RING1
442	if (EMIsRawRing1Enabled(pVM))
443	{
444	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMIretRing1Record, 0, false, &callInfo);
445	}
446	else
447	#endif
448	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMIretRecord, 0, false, &callInfo);
449
450	PATCHGEN_EPILOG(pPatch, size);
451	return VINF_SUCCESS;
452	}
453
454	int patmPatchGenCli(PVM pVM, PPATCHINFO pPatch)
455	{
456	uint32_t size;
457	PATCHGEN_PROLOG(pVM, pPatch);
458
459	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMCliRecord, 0, false);
460
461	PATCHGEN_EPILOG(pPatch, size);
462	return VINF_SUCCESS;
463	}
464
465	/*
466	* Generate an STI patch
467	*/
468	int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RTRCPTR pNextInstrGC)
469	{
470	PATMCALLINFO callInfo;
471	uint32_t size;
472
473	Log(("patmPatchGenSti at %RRv; next %RRv\n", pCurInstrGC, pNextInstrGC));
474	PATCHGEN_PROLOG(pVM, pPatch);
475	callInfo.pNextInstrGC = pNextInstrGC;
476	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMStiRecord, 0, false, &callInfo);
477	PATCHGEN_EPILOG(pPatch, size);
478
479	return VINF_SUCCESS;
480	}
481
482
483	int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack)
484	{
485	uint32_t size;
486	PATMCALLINFO callInfo;
487
488	PATCHGEN_PROLOG(pVM, pPatch);
489
490	callInfo.pNextInstrGC = pReturnAddrGC;
491
492	Log(("patmPatchGenPopf at %RRv\n", pReturnAddrGC));
493
494	/* Note: keep IOPL in mind when changing any of this!! (see comments in PATMA.asm, PATMPopf32Replacement) */
495	if (fSizeOverride == true)
496	{
497	Log(("operand size override!!\n"));
498	size = patmPatchGenCode(pVM, pPatch, pPB, (fGenJumpBack) ? &PATMPopf16Record : &PATMPopf16Record_NoExit , pReturnAddrGC, fGenJumpBack, &callInfo);
499	}
500	else
501	{
502	size = patmPatchGenCode(pVM, pPatch, pPB, (fGenJumpBack) ? &PATMPopf32Record : &PATMPopf32Record_NoExit, pReturnAddrGC, fGenJumpBack, &callInfo);
503	}
504
505	PATCHGEN_EPILOG(pPatch, size);
506	STAM_COUNTER_INC(&pVM->patm.s.StatGenPopf);
507	return VINF_SUCCESS;
508	}
509
510	int patmPatchGenPushf(PVM pVM, PPATCHINFO pPatch, bool fSizeOverride)
511	{
512	uint32_t size;
513	PATCHGEN_PROLOG(pVM, pPatch);
514
515	if (fSizeOverride == true)
516	{
517	Log(("operand size override!!\n"));
518	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMPushf16Record, 0, false);
519	}
520	else
521	{
522	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMPushf32Record, 0, false);
523	}
524
525	PATCHGEN_EPILOG(pPatch, size);
526	return VINF_SUCCESS;
527	}
528
529	int patmPatchGenPushCS(PVM pVM, PPATCHINFO pPatch)
530	{
531	uint32_t size;
532	PATCHGEN_PROLOG(pVM, pPatch);
533	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMPushCSRecord, 0, false);
534	PATCHGEN_EPILOG(pPatch, size);
535	return VINF_SUCCESS;
536	}
537
538	int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride)
539	{
540	uint32_t size = 0;
541	PPATCHASMRECORD pPatchAsmRec;
542
543	PATCHGEN_PROLOG(pVM, pPatch);
544
545	switch (opcode)
546	{
547	case OP_LOOP:
548	pPatchAsmRec = &PATMLoopRecord;
549	break;
550	case OP_LOOPNE:
551	pPatchAsmRec = &PATMLoopNZRecord;
552	break;
553	case OP_LOOPE:
554	pPatchAsmRec = &PATMLoopZRecord;
555	break;
556	case OP_JECXZ:
557	pPatchAsmRec = &PATMJEcxRecord;
558	break;
559	default:
560	AssertMsgFailed(("PatchGenLoop: invalid opcode %d\n", opcode));
561	return VERR_INVALID_PARAMETER;
562	}
563	Assert(pPatchAsmRec->offSizeOverride && pPatchAsmRec->offRelJump);
564
565	Log(("PatchGenLoop %d jump %d to %08x offrel=%d\n", opcode, pPatch->nrJumpRecs, pTargetGC, pPatchAsmRec->offRelJump));
566
567	// Generate the patch code
568	size = patmPatchGenCode(pVM, pPatch, pPB, pPatchAsmRec, 0, false);
569
570	if (fSizeOverride)
571	{
572	pPB[pPatchAsmRec->offSizeOverride] = 0x66; // ecx -> cx or vice versa
573	}
574
575	(RTRCPTR )&pPB[pPatchAsmRec->offRelJump] = 0xDEADBEEF;
576
577	patmPatchAddJump(pVM, pPatch, &pPB[pPatchAsmRec->offRelJump - 1], 1, pTargetGC, opcode);
578
579	PATCHGEN_EPILOG(pPatch, size);
580	return VINF_SUCCESS;
581	}
582
583	int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride)
584	{
585	uint32_t offset = 0;
586	PATCHGEN_PROLOG(pVM, pPatch);
587
588	// internal relative jumps from patch code to patch code; no relocation record required
589
590	Assert(PATMIsPatchGCAddr(pVM, pTargetGC) == false);
591
592	switch (opcode)
593	{
594	case OP_JO:
595	pPB[1] = 0x80;
596	break;
597	case OP_JNO:
598	pPB[1] = 0x81;
599	break;
600	case OP_JC:
601	pPB[1] = 0x82;
602	break;
603	case OP_JNC:
604	pPB[1] = 0x83;
605	break;
606	case OP_JE:
607	pPB[1] = 0x84;
608	break;
609	case OP_JNE:
610	pPB[1] = 0x85;
611	break;
612	case OP_JBE:
613	pPB[1] = 0x86;
614	break;
615	case OP_JNBE:
616	pPB[1] = 0x87;
617	break;
618	case OP_JS:
619	pPB[1] = 0x88;
620	break;
621	case OP_JNS:
622	pPB[1] = 0x89;
623	break;
624	case OP_JP:
625	pPB[1] = 0x8A;
626	break;
627	case OP_JNP:
628	pPB[1] = 0x8B;
629	break;
630	case OP_JL:
631	pPB[1] = 0x8C;
632	break;
633	case OP_JNL:
634	pPB[1] = 0x8D;
635	break;
636	case OP_JLE:
637	pPB[1] = 0x8E;
638	break;
639	case OP_JNLE:
640	pPB[1] = 0x8F;
641	break;
642
643	case OP_JMP:
644	/* If interrupted here, then jump to the target instruction. Used by PATM.cpp for jumping to known instructions. */
645	/* Add lookup record for patch to guest address translation */
646	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pTargetGC, PATM_LOOKUP_PATCH2GUEST);
647
648	pPB[0] = 0xE9;
649	break;
650
651	case OP_JECXZ:
652	case OP_LOOP:
653	case OP_LOOPNE:
654	case OP_LOOPE:
655	return patmPatchGenLoop(pVM, pPatch, pTargetGC, opcode, fSizeOverride);
656
657	default:
658	AssertMsg(0, ("Invalid jump opcode %d\n", opcode));
659	return VERR_PATCHING_REFUSED;
660	}
661	if (opcode != OP_JMP)
662	{
663	pPB[0] = 0xF;
664	offset += 2;
665	}
666	else offset++;
667
668	(RTRCPTR )&pPB[offset] = 0xDEADBEEF;
669
670	patmPatchAddJump(pVM, pPatch, pPB, offset, pTargetGC, opcode);
671
672	offset += sizeof(RTRCPTR);
673
674	PATCHGEN_EPILOG(pPatch, offset);
675	return VINF_SUCCESS;
676	}
677
678	/*
679	* Rewrite call to dynamic or currently unknown function (on-demand patching of function)
680	*/
681	int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC, RTRCPTR pTargetGC, bool fIndirect)
682	{
683	PATMCALLINFO callInfo;
684	uint32_t offset;
685	uint32_t i, size;
686	int rc;
687
688	/** @note Don't check for IF=1 here. The ret instruction will do this. */
689	/** @note It's dangerous to do this for 'normal' patches. the jump target might be inside the generated patch jump. (seen this!) */
690
691	/* 1: Clear PATM interrupt flag on entry. */
692	rc = patmPatchGenClearPIF(pVM, pPatch, pCurInstrGC);
693	if (rc == VERR_NO_MEMORY)
694	return rc;
695	AssertRCReturn(rc, rc);
696
697	PATCHGEN_PROLOG(pVM, pPatch);
698	/* 2: We must push the target address onto the stack before appending the indirect call code. */
699
700	if (fIndirect)
701	{
702	Log(("patmPatchGenIndirectCall\n"));
703	Assert(pCpu->Param1.cb == 4);
704	Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J);
705
706	/* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
707	* a page fault. The assembly code restores the stack afterwards.
708	*/
709	offset = 0;
710	/* include prefix byte to make sure we don't use the incorrect selector register. */
711	if (pCpu->fPrefix & DISPREFIX_SEG)
712	pPB[offset++] = DISQuerySegPrefixByte(pCpu);
713	pPB[offset++] = 0xFF; // push r/m32
714	pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm);
715	i = 2; /* standard offset of modrm bytes */
716	if (pCpu->fPrefix & DISPREFIX_OPSIZE)
717	i++; //skip operand prefix
718	if (pCpu->fPrefix & DISPREFIX_SEG)
719	i++; //skip segment prefix
720
721	rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
722	AssertRCReturn(rc, rc);
723	offset += (pCpu->cbInstr - i);
724	}
725	else
726	{
727	AssertMsg(PATMIsPatchGCAddr(pVM, pTargetGC) == false, ("Target is already a patch address (%RRv)?!?\n", pTargetGC));
728	Assert(pTargetGC);
729	Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) == OP_PARM_J);
730
731	/** @todo wasting memory as the complex search is overkill and we need only one lookup slot... */
732
733	/* Relative call to patch code (patch to patch -> no fixup). */
734	Log(("PatchGenCall from %RRv (next=%RRv) to %RRv\n", pCurInstrGC, pCurInstrGC + pCpu->cbInstr, pTargetGC));
735
736	/* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
737	* a page fault. The assembly code restores the stack afterwards.
738	*/
739	offset = 0;
740	pPB[offset++] = 0x68; // push %Iv
741	(RTRCPTR )&pPB[offset] = pTargetGC;
742	offset += sizeof(RTRCPTR);
743	}
744
745	/* align this block properly to make sure the jump table will not be misaligned. */
746	size = (RTHCUINTPTR)&pPB[offset] & 3;
747	if (size)
748	size = 4 - size;
749
750	for (i=0;i<size;i++)
751	{
752	pPB[offset++] = 0x90; /* nop */
753	}
754	PATCHGEN_EPILOG(pPatch, offset);
755
756	/* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
757	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
758	callInfo.pReturnGC = pCurInstrGC + pCpu->cbInstr;
759	callInfo.pTargetGC = (fIndirect) ? 0xDEADBEEF : pTargetGC;
760	size = patmPatchGenCode(pVM, pPatch, pPB, (fIndirect) ? &PATMCallIndirectRecord : &PATMCallRecord, 0, false, &callInfo);
761	PATCHGEN_EPILOG(pPatch, size);
762
763	/* Need to set PATM_INTERRUPTFLAG after the patched ret returns here. */
764	rc = patmPatchGenSetPIF(pVM, pPatch, pCurInstrGC);
765	if (rc == VERR_NO_MEMORY)
766	return rc;
767	AssertRCReturn(rc, rc);
768
769	STAM_COUNTER_INC(&pVM->patm.s.StatGenCall);
770	return VINF_SUCCESS;
771	}
772
773	/**
774	* Generate indirect jump to unknown destination
775	*
776	* @returns VBox status code.
777	* @param pVM Pointer to the VM.
778	* @param pPatch Patch record
779	* @param pCpu Disassembly state
780	* @param pCurInstrGC Current instruction address
781	*/
782	int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
783	{
784	PATMCALLINFO callInfo;
785	uint32_t offset;
786	uint32_t i, size;
787	int rc;
788
789	/* 1: Clear PATM interrupt flag on entry. */
790	rc = patmPatchGenClearPIF(pVM, pPatch, pCurInstrGC);
791	if (rc == VERR_NO_MEMORY)
792	return rc;
793	AssertRCReturn(rc, rc);
794
795	PATCHGEN_PROLOG(pVM, pPatch);
796	/* 2: We must push the target address onto the stack before appending the indirect call code. */
797
798	Log(("patmPatchGenIndirectJump\n"));
799	Assert(pCpu->Param1.cb == 4);
800	Assert(OP_PARM_VTYPE(pCpu->pCurInstr->fParam1) != OP_PARM_J);
801
802	/* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
803	* a page fault. The assembly code restores the stack afterwards.
804	*/
805	offset = 0;
806	/* include prefix byte to make sure we don't use the incorrect selector register. */
807	if (pCpu->fPrefix & DISPREFIX_SEG)
808	pPB[offset++] = DISQuerySegPrefixByte(pCpu);
809
810	pPB[offset++] = 0xFF; // push r/m32
811	pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm);
812	i = 2; /* standard offset of modrm bytes */
813	if (pCpu->fPrefix & DISPREFIX_OPSIZE)
814	i++; //skip operand prefix
815	if (pCpu->fPrefix & DISPREFIX_SEG)
816	i++; //skip segment prefix
817
818	rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
819	AssertRCReturn(rc, rc);
820	offset += (pCpu->cbInstr - i);
821
822	/* align this block properly to make sure the jump table will not be misaligned. */
823	size = (RTHCUINTPTR)&pPB[offset] & 3;
824	if (size)
825	size = 4 - size;
826
827	for (i=0;i<size;i++)
828	{
829	pPB[offset++] = 0x90; /* nop */
830	}
831	PATCHGEN_EPILOG(pPatch, offset);
832
833	/* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
834	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
835	callInfo.pReturnGC = pCurInstrGC + pCpu->cbInstr;
836	callInfo.pTargetGC = 0xDEADBEEF;
837	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMJumpIndirectRecord, 0, false, &callInfo);
838	PATCHGEN_EPILOG(pPatch, size);
839
840	STAM_COUNTER_INC(&pVM->patm.s.StatGenJump);
841	return VINF_SUCCESS;
842	}
843
844	/**
845	* Generate return instruction
846	*
847	* @returns VBox status code.
848	* @param pVM Pointer to the VM.
849	* @param pPatch Patch structure
850	* @param pCpu Disassembly struct
851	* @param pCurInstrGC Current instruction pointer
852	*
853	*/
854	int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE pCpu, RCPTRTYPE(uint8_t ) pCurInstrGC)
855	{
856	int size = 0, rc;
857	RTRCPTR pPatchRetInstrGC;
858
859	/* Remember start of this patch for below. */
860	pPatchRetInstrGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
861
862	Log(("patmPatchGenRet %RRv\n", pCurInstrGC));
863
864	/** @note optimization: multiple identical ret instruction in a single patch can share a single patched ret. */
865	if ( pPatch->pTempInfo->pPatchRetInstrGC
866	&& pPatch->pTempInfo->uPatchRetParam1 == (uint32_t)pCpu->Param1.uValue) /* nr of bytes popped off the stack should be identical of course! */
867	{
868	Assert(pCpu->pCurInstr->uOpcode == OP_RETN);
869	STAM_COUNTER_INC(&pVM->patm.s.StatGenRetReused);
870
871	return patmPatchGenPatchJump(pVM, pPatch, pCurInstrGC, pPatch->pTempInfo->pPatchRetInstrGC);
872	}
873
874	/* Jump back to the original instruction if IF is set again. */
875	Assert(!patmFindActivePatchByEntrypoint(pVM, pCurInstrGC));
876	rc = patmPatchGenCheckIF(pVM, pPatch, pCurInstrGC);
877	AssertRCReturn(rc, rc);
878
879	/* align this block properly to make sure the jump table will not be misaligned. */
880	PATCHGEN_PROLOG(pVM, pPatch);
881	size = (RTHCUINTPTR)pPB & 3;
882	if (size)
883	size = 4 - size;
884
885	for (int i=0;i<size;i++)
886	pPB[i] = 0x90; /* nop */
887	PATCHGEN_EPILOG(pPatch, size);
888
889	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
890	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMRetRecord, 0, false);
891	PATCHGEN_EPILOG(pPatch, size);
892
893	STAM_COUNTER_INC(&pVM->patm.s.StatGenRet);
894	/* Duplicate the ret or ret n instruction; it will use the PATM return address */
895	rc = patmPatchGenDuplicate(pVM, pPatch, pCpu, pCurInstrGC);
896
897	if (rc == VINF_SUCCESS)
898	{
899	pPatch->pTempInfo->pPatchRetInstrGC = pPatchRetInstrGC;
900	pPatch->pTempInfo->uPatchRetParam1 = pCpu->Param1.uValue;
901	}
902	return rc;
903	}
904
905	/**
906	* Generate all global patm functions
907	*
908	* @returns VBox status code.
909	* @param pVM Pointer to the VM.
910	* @param pPatch Patch structure
911	*
912	*/
913	int patmPatchGenGlobalFunctions(PVM pVM, PPATCHINFO pPatch)
914	{
915	int size = 0;
916
917	pVM->patm.s.pfnHelperCallGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
918	PATCHGEN_PROLOG(pVM, pPatch);
919	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMLookupAndCallRecord, 0, false);
920	PATCHGEN_EPILOG(pPatch, size);
921
922	/* Round to next 8 byte boundary. */
923	pPatch->uCurPatchOffset = RT_ALIGN_32(pPatch->uCurPatchOffset, 8);
924
925	pVM->patm.s.pfnHelperRetGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
926	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
927	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMRetFunctionRecord, 0, false);
928	PATCHGEN_EPILOG(pPatch, size);
929
930	/* Round to next 8 byte boundary. */
931	pPatch->uCurPatchOffset = RT_ALIGN_32(pPatch->uCurPatchOffset, 8);
932
933	pVM->patm.s.pfnHelperJumpGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
934	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
935	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMLookupAndJumpRecord, 0, false);
936	PATCHGEN_EPILOG(pPatch, size);
937
938	/* Round to next 8 byte boundary. */
939	pPatch->uCurPatchOffset = RT_ALIGN_32(pPatch->uCurPatchOffset, 8);
940
941	pVM->patm.s.pfnHelperIretGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
942	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
943	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMIretFunctionRecord, 0, false);
944	PATCHGEN_EPILOG(pPatch, size);
945
946	Log(("pfnHelperCallGC %RRv\n", pVM->patm.s.pfnHelperCallGC));
947	Log(("pfnHelperRetGC %RRv\n", pVM->patm.s.pfnHelperRetGC));
948	Log(("pfnHelperJumpGC %RRv\n", pVM->patm.s.pfnHelperJumpGC));
949	Log(("pfnHelperIretGC %RRv\n", pVM->patm.s.pfnHelperIretGC));
950
951	return VINF_SUCCESS;
952	}
953
954	/**
955	* Generate illegal instruction (int 3)
956	*
957	* @returns VBox status code.
958	* @param pVM Pointer to the VM.
959	* @param pPatch Patch structure
960	*
961	*/
962	int patmPatchGenIllegalInstr(PVM pVM, PPATCHINFO pPatch)
963	{
964	PATCHGEN_PROLOG(pVM, pPatch);
965
966	pPB[0] = 0xCC;
967
968	PATCHGEN_EPILOG(pPatch, 1);
969	return VINF_SUCCESS;
970	}
971
972	/**
973	* Check virtual IF flag and jump back to original guest code if set
974	*
975	* @returns VBox status code.
976	* @param pVM Pointer to the VM.
977	* @param pPatch Patch structure
978	* @param pCurInstrGC Guest context pointer to the current instruction
979	*
980	*/
981	int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC)
982	{
983	uint32_t size;
984
985	PATCHGEN_PROLOG(pVM, pPatch);
986
987	/* Add lookup record for patch to guest address translation */
988	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pCurInstrGC, PATM_LOOKUP_PATCH2GUEST);
989
990	/* Generate code to check for IF=1 before executing the call to the duplicated function. */
991	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMCheckIFRecord, pCurInstrGC, true);
992
993	PATCHGEN_EPILOG(pPatch, size);
994	return VINF_SUCCESS;
995	}
996
997	/**
998	* Set PATM interrupt flag
999	*
1000	* @returns VBox status code.
1001	* @param pVM Pointer to the VM.
1002	* @param pPatch Patch structure
1003	* @param pInstrGC Corresponding guest instruction
1004	*
1005	*/
1006	int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC)
1007	{
1008	PATCHGEN_PROLOG(pVM, pPatch);
1009
1010	/* Add lookup record for patch to guest address translation */
1011	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pInstrGC, PATM_LOOKUP_PATCH2GUEST);
1012
1013	int size = patmPatchGenCode(pVM, pPatch, pPB, &PATMSetPIFRecord, 0, false);
1014	PATCHGEN_EPILOG(pPatch, size);
1015	return VINF_SUCCESS;
1016	}
1017
1018	/**
1019	* Clear PATM interrupt flag
1020	*
1021	* @returns VBox status code.
1022	* @param pVM Pointer to the VM.
1023	* @param pPatch Patch structure
1024	* @param pInstrGC Corresponding guest instruction
1025	*
1026	*/
1027	int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC)
1028	{
1029	PATCHGEN_PROLOG(pVM, pPatch);
1030
1031	/* Add lookup record for patch to guest address translation */
1032	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pInstrGC, PATM_LOOKUP_PATCH2GUEST);
1033
1034	int size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearPIFRecord, 0, false);
1035	PATCHGEN_EPILOG(pPatch, size);
1036	return VINF_SUCCESS;
1037	}
1038
1039
1040	/**
1041	* Clear PATM inhibit irq flag
1042	*
1043	* @returns VBox status code.
1044	* @param pVM Pointer to the VM.
1045	* @param pPatch Patch structure
1046	* @param pNextInstrGC Next guest instruction
1047	*/
1048	int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTRCPTR pNextInstrGC)
1049	{
1050	int size;
1051	PATMCALLINFO callInfo;
1052
1053	PATCHGEN_PROLOG(pVM, pPatch);
1054
1055	Assert((pPatch->flags & (PATMFL_GENERATE_JUMPTOGUEST\|PATMFL_DUPLICATE_FUNCTION)) != (PATMFL_GENERATE_JUMPTOGUEST\|PATMFL_DUPLICATE_FUNCTION));
1056
1057	/* Add lookup record for patch to guest address translation */
1058	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pNextInstrGC, PATM_LOOKUP_PATCH2GUEST);
1059
1060	callInfo.pNextInstrGC = pNextInstrGC;
1061
1062	if (pPatch->flags & PATMFL_DUPLICATE_FUNCTION)
1063	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearInhibitIRQContIF0Record, 0, false, &callInfo);
1064	else
1065	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearInhibitIRQFaultIF0Record, 0, false, &callInfo);
1066
1067	PATCHGEN_EPILOG(pPatch, size);
1068	return VINF_SUCCESS;
1069	}
1070
1071	/**
1072	* Generate an interrupt handler entrypoint
1073	*
1074	* @returns VBox status code.
1075	* @param pVM Pointer to the VM.
1076	* @param pPatch Patch record
1077	* @param pIntHandlerGC IDT handler address
1078	*
1079	** @todo must check if virtual IF is already cleared on entry!!!!!!!!!!!!!!!!!!!!!!!
1080	*/
1081	int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pIntHandlerGC)
1082	{
1083	int rc = VINF_SUCCESS;
1084
1085	#ifdef VBOX_WITH_RAW_RING1
1086	if (!EMIsRawRing1Enabled(pVM)) /* direct passthru of interrupts is not allowed in the ring-1 support case as we can't deal with the ring-1/2 ambiguity in the patm asm code and we don't need it either as TRPMForwardTrap takes care of the details. */
1087	{
1088	#endif
1089	uint32_t size;
1090	PATCHGEN_PROLOG(pVM, pPatch);
1091
1092	/* Add lookup record for patch to guest address translation */
1093	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pIntHandlerGC, PATM_LOOKUP_PATCH2GUEST);
1094
1095	/* Generate entrypoint for the interrupt handler (correcting CS in the interrupt stack frame) */
1096	size = patmPatchGenCode(pVM, pPatch, pPB,
1097	(pPatch->flags & PATMFL_INTHANDLER_WITH_ERRORCODE) ? &PATMIntEntryRecordErrorCode : &PATMIntEntryRecord,
1098	0, false);
1099
1100	PATCHGEN_EPILOG(pPatch, size);
1101	#ifdef VBOX_WITH_RAW_RING1
1102	}
1103	#endif
1104
1105	// Interrupt gates set IF to 0
1106	rc = patmPatchGenCli(pVM, pPatch);
1107	AssertRCReturn(rc, rc);
1108
1109	return rc;
1110	}
1111
1112	/**
1113	* Generate a trap handler entrypoint
1114	*
1115	* @returns VBox status code.
1116	* @param pVM Pointer to the VM.
1117	* @param pPatch Patch record
1118	* @param pTrapHandlerGC IDT handler address
1119	*/
1120	int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pTrapHandlerGC)
1121	{
1122	uint32_t size;
1123
1124	Assert(!EMIsRawRing1Enabled(pVM));
1125
1126	PATCHGEN_PROLOG(pVM, pPatch);
1127
1128	/* Add lookup record for patch to guest address translation */
1129	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pTrapHandlerGC, PATM_LOOKUP_PATCH2GUEST);
1130
1131	/* Generate entrypoint for the trap handler (correcting CS in the interrupt stack frame) */
1132	size = patmPatchGenCode(pVM, pPatch, pPB,
1133	(pPatch->flags & PATMFL_TRAPHANDLER_WITH_ERRORCODE) ? &PATMTrapEntryRecordErrorCode : &PATMTrapEntryRecord,
1134	pTrapHandlerGC, true);
1135	PATCHGEN_EPILOG(pPatch, size);
1136
1137	return VINF_SUCCESS;
1138	}
1139
1140	#ifdef VBOX_WITH_STATISTICS
1141	int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC)
1142	{
1143	uint32_t size;
1144
1145	PATCHGEN_PROLOG(pVM, pPatch);
1146
1147	/* Add lookup record for stats code -> guest handler. */
1148	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pInstrGC, PATM_LOOKUP_PATCH2GUEST);
1149
1150	/* Generate code to keep calling statistics for this patch */
1151	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMStatsRecord, pInstrGC, false);
1152	PATCHGEN_EPILOG(pPatch, size);
1153
1154	return VINF_SUCCESS;
1155	}
1156	#endif
1157
1158	/**
1159	* Debug register moves to or from general purpose registers
1160	* mov GPR, DRx
1161	* mov DRx, GPR
1162	*
1163	* @todo: if we ever want to support hardware debug registers natively, then
1164	* this will need to be changed!
1165	*/
1166	int patmPatchGenMovDebug(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu)
1167	{
1168	int rc = VINF_SUCCESS;
1169	unsigned reg, mod, rm, dbgreg;
1170	uint32_t offset;
1171
1172	PATCHGEN_PROLOG(pVM, pPatch);
1173
1174	mod = 0; //effective address (only)
1175	rm = 5; //disp32
1176	if (pCpu->pCurInstr->fParam1 == OP_PARM_Dd)
1177	{
1178	Assert(0); // You not come here. Illegal!
1179
1180	// mov DRx, GPR
1181	pPB[0] = 0x89; //mov disp32, GPR
1182	Assert(pCpu->Param1.fUse & DISUSE_REG_DBG);
1183	Assert(pCpu->Param2.fUse & DISUSE_REG_GEN32);
1184
1185	dbgreg = pCpu->Param1.Base.idxDbgReg;
1186	reg = pCpu->Param2.Base.idxGenReg;
1187	}
1188	else
1189	{
1190	// mov GPR, DRx
1191	Assert(pCpu->Param1.fUse & DISUSE_REG_GEN32);
1192	Assert(pCpu->Param2.fUse & DISUSE_REG_DBG);
1193
1194	pPB[0] = 0x8B; // mov GPR, disp32
1195	reg = pCpu->Param1.Base.idxGenReg;
1196	dbgreg = pCpu->Param2.Base.idxDbgReg;
1197	}
1198
1199	pPB[1] = MAKE_MODRM(mod, reg, rm);
1200
1201	AssertReturn(dbgreg <= DISDREG_DR7, VERR_INVALID_PARAMETER);
1202	offset = RT_OFFSETOF(CPUMCTX, dr[dbgreg]);
1203
1204	(RTRCPTR )&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
1205	patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE);
1206
1207	PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTRCPTR));
1208	return rc;
1209	}
1210
1211	/*
1212	* Control register moves to or from general purpose registers
1213	* mov GPR, CRx
1214	* mov CRx, GPR
1215	*/
1216	int patmPatchGenMovControl(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu)
1217	{
1218	int rc = VINF_SUCCESS;
1219	int reg, mod, rm, ctrlreg;
1220	uint32_t offset;
1221
1222	PATCHGEN_PROLOG(pVM, pPatch);
1223
1224	mod = 0; //effective address (only)
1225	rm = 5; //disp32
1226	if (pCpu->pCurInstr->fParam1 == OP_PARM_Cd)
1227	{
1228	Assert(0); // You not come here. Illegal!
1229
1230	// mov CRx, GPR
1231	pPB[0] = 0x89; //mov disp32, GPR
1232	ctrlreg = pCpu->Param1.Base.idxCtrlReg;
1233	reg = pCpu->Param2.Base.idxGenReg;
1234	Assert(pCpu->Param1.fUse & DISUSE_REG_CR);
1235	Assert(pCpu->Param2.fUse & DISUSE_REG_GEN32);
1236	}
1237	else
1238	{
1239	// mov GPR, CRx
1240	Assert(pCpu->Param1.fUse & DISUSE_REG_GEN32);
1241	Assert(pCpu->Param2.fUse & DISUSE_REG_CR);
1242
1243	pPB[0] = 0x8B; // mov GPR, disp32
1244	reg = pCpu->Param1.Base.idxGenReg;
1245	ctrlreg = pCpu->Param2.Base.idxCtrlReg;
1246	}
1247
1248	pPB[1] = MAKE_MODRM(mod, reg, rm);
1249
1250	/// @todo: make this an array in the context structure
1251	switch (ctrlreg)
1252	{
1253	case DISCREG_CR0:
1254	offset = RT_OFFSETOF(CPUMCTX, cr0);
1255	break;
1256	case DISCREG_CR2:
1257	offset = RT_OFFSETOF(CPUMCTX, cr2);
1258	break;
1259	case DISCREG_CR3:
1260	offset = RT_OFFSETOF(CPUMCTX, cr3);
1261	break;
1262	case DISCREG_CR4:
1263	offset = RT_OFFSETOF(CPUMCTX, cr4);
1264	break;
1265	default: /* Shut up compiler warning. */
1266	AssertFailed();
1267	offset = 0;
1268	break;
1269	}
1270	(RTRCPTR )&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
1271	patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE);
1272
1273	PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTRCPTR));
1274	return rc;
1275	}
1276
1277	/*
1278	* mov GPR, SS
1279	*/
1280	int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
1281	{
1282	uint32_t size, offset;
1283
1284	Log(("patmPatchGenMovFromSS %RRv\n", pCurInstrGC));
1285
1286	Assert(pPatch->flags & PATMFL_CODE32);
1287
1288	PATCHGEN_PROLOG(pVM, pPatch);
1289	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearPIFRecord, 0, false);
1290	PATCHGEN_EPILOG(pPatch, size);
1291
1292	/* push ss */
1293	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
1294	offset = 0;
1295	if (pCpu->fPrefix & DISPREFIX_OPSIZE)
1296	pPB[offset++] = 0x66; /* size override -> 16 bits push */
1297	pPB[offset++] = 0x16;
1298	PATCHGEN_EPILOG(pPatch, offset);
1299
1300	/* checks and corrects RPL of pushed ss*/
1301	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
1302	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMMovFromSSRecord, 0, false);
1303	PATCHGEN_EPILOG(pPatch, size);
1304
1305	/* pop general purpose register */
1306	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
1307	offset = 0;
1308	if (pCpu->fPrefix & DISPREFIX_OPSIZE)
1309	pPB[offset++] = 0x66; /* size override -> 16 bits pop */
1310	pPB[offset++] = 0x58 + pCpu->Param1.Base.idxGenReg;
1311	PATCHGEN_EPILOG(pPatch, offset);
1312
1313
1314	PATCHGEN_PROLOG_NODEF(pVM, pPatch);
1315	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMSetPIFRecord, 0, false);
1316	PATCHGEN_EPILOG(pPatch, size);
1317
1318	return VINF_SUCCESS;
1319	}
1320
1321
1322	/**
1323	* Generate an sldt or str patch instruction
1324	*
1325	* @returns VBox status code.
1326	* @param pVM Pointer to the VM.
1327	* @param pPatch Patch record
1328	* @param pCpu Disassembly state
1329	* @param pCurInstrGC Guest instruction address
1330	*/
1331	int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
1332	{
1333	// sldt %Ew
1334	int rc = VINF_SUCCESS;
1335	uint32_t offset = 0;
1336	uint32_t i;
1337
1338	/** @todo segment prefix (untested) */
1339	Assert(pCpu->fPrefix == DISPREFIX_NONE \|\| pCpu->fPrefix == DISPREFIX_OPSIZE);
1340
1341	PATCHGEN_PROLOG(pVM, pPatch);
1342
1343	if (pCpu->Param1.fUse == DISUSE_REG_GEN32 \|\| pCpu->Param1.fUse == DISUSE_REG_GEN16)
1344	{
1345	/* Register operand */
1346	// 8B 15 [32 bits addr] mov edx, CPUMCTX.tr/ldtr
1347
1348	if (pCpu->fPrefix == DISPREFIX_OPSIZE)
1349	pPB[offset++] = 0x66;
1350
1351	pPB[offset++] = 0x8B; // mov destreg, CPUMCTX.tr/ldtr
1352	/* Modify REG part according to destination of original instruction */
1353	pPB[offset++] = MAKE_MODRM(0, pCpu->Param1.Base.idxGenReg, 5);
1354	if (pCpu->pCurInstr->uOpcode == OP_STR)
1355	{
1356	(RTRCPTR )&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
1357	}
1358	else
1359	{
1360	(RTRCPTR )&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
1361	}
1362	patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
1363	offset += sizeof(RTRCPTR);
1364	}
1365	else
1366	{
1367	/* Memory operand */
1368	//50 push eax
1369	//52 push edx
1370	//8D 15 48 7C 42 00 lea edx, dword ptr [dest]
1371	//66 A1 48 7C 42 00 mov ax, CPUMCTX.tr/ldtr
1372	//66 89 02 mov word ptr [edx],ax
1373	//5A pop edx
1374	//58 pop eax
1375
1376	pPB[offset++] = 0x50; // push eax
1377	pPB[offset++] = 0x52; // push edx
1378
1379	if (pCpu->fPrefix == DISPREFIX_SEG)
1380	{
1381	pPB[offset++] = DISQuerySegPrefixByte(pCpu);
1382	}
1383	pPB[offset++] = 0x8D; // lea edx, dword ptr [dest]
1384	// duplicate and modify modrm byte and additional bytes if present (e.g. direct address)
1385	pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, DISGREG_EDX , pCpu->ModRM.Bits.Rm);
1386
1387	i = 3; /* standard offset of modrm bytes */
1388	if (pCpu->fPrefix == DISPREFIX_OPSIZE)
1389	i++; //skip operand prefix
1390	if (pCpu->fPrefix == DISPREFIX_SEG)
1391	i++; //skip segment prefix
1392
1393	rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
1394	AssertRCReturn(rc, rc);
1395	offset += (pCpu->cbInstr - i);
1396
1397	pPB[offset++] = 0x66; // mov ax, CPUMCTX.tr/ldtr
1398	pPB[offset++] = 0xA1;
1399	if (pCpu->pCurInstr->uOpcode == OP_STR)
1400	{
1401	(RTRCPTR )&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
1402	}
1403	else
1404	{
1405	(RTRCPTR )&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
1406	}
1407	patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
1408	offset += sizeof(RTRCPTR);
1409
1410	pPB[offset++] = 0x66; // mov word ptr [edx],ax
1411	pPB[offset++] = 0x89;
1412	pPB[offset++] = 0x02;
1413
1414	pPB[offset++] = 0x5A; // pop edx
1415	pPB[offset++] = 0x58; // pop eax
1416	}
1417
1418	PATCHGEN_EPILOG(pPatch, offset);
1419
1420	return rc;
1421	}
1422
1423	/**
1424	* Generate an sgdt or sidt patch instruction
1425	*
1426	* @returns VBox status code.
1427	* @param pVM Pointer to the VM.
1428	* @param pPatch Patch record
1429	* @param pCpu Disassembly state
1430	* @param pCurInstrGC Guest instruction address
1431	*/
1432	int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
1433	{
1434	int rc = VINF_SUCCESS;
1435	uint32_t offset = 0, offset_base, offset_limit;
1436	uint32_t i;
1437
1438	/* @todo segment prefix (untested) */
1439	Assert(pCpu->fPrefix == DISPREFIX_NONE);
1440
1441	// sgdt %Ms
1442	// sidt %Ms
1443
1444	switch (pCpu->pCurInstr->uOpcode)
1445	{
1446	case OP_SGDT:
1447	offset_base = RT_OFFSETOF(CPUMCTX, gdtr.pGdt);
1448	offset_limit = RT_OFFSETOF(CPUMCTX, gdtr.cbGdt);
1449	break;
1450
1451	case OP_SIDT:
1452	offset_base = RT_OFFSETOF(CPUMCTX, idtr.pIdt);
1453	offset_limit = RT_OFFSETOF(CPUMCTX, idtr.cbIdt);
1454	break;
1455
1456	default:
1457	return VERR_INVALID_PARAMETER;
1458	}
1459
1460	//50 push eax
1461	//52 push edx
1462	//8D 15 48 7C 42 00 lea edx, dword ptr [dest]
1463	//66 A1 48 7C 42 00 mov ax, CPUMCTX.gdtr.limit
1464	//66 89 02 mov word ptr [edx],ax
1465	//A1 48 7C 42 00 mov eax, CPUMCTX.gdtr.base
1466	//89 42 02 mov dword ptr [edx+2],eax
1467	//5A pop edx
1468	//58 pop eax
1469
1470	PATCHGEN_PROLOG(pVM, pPatch);
1471	pPB[offset++] = 0x50; // push eax
1472	pPB[offset++] = 0x52; // push edx
1473
1474	if (pCpu->fPrefix == DISPREFIX_SEG)
1475	{
1476	pPB[offset++] = DISQuerySegPrefixByte(pCpu);
1477	}
1478	pPB[offset++] = 0x8D; // lea edx, dword ptr [dest]
1479	// duplicate and modify modrm byte and additional bytes if present (e.g. direct address)
1480	pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, DISGREG_EDX , pCpu->ModRM.Bits.Rm);
1481
1482	i = 3; /* standard offset of modrm bytes */
1483	if (pCpu->fPrefix == DISPREFIX_OPSIZE)
1484	i++; //skip operand prefix
1485	if (pCpu->fPrefix == DISPREFIX_SEG)
1486	i++; //skip segment prefix
1487	rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->cbInstr - i);
1488	AssertRCReturn(rc, rc);
1489	offset += (pCpu->cbInstr - i);
1490
1491	pPB[offset++] = 0x66; // mov ax, CPUMCTX.gdtr.limit
1492	pPB[offset++] = 0xA1;
1493	(RTRCPTR )&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_limit;
1494	patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
1495	offset += sizeof(RTRCPTR);
1496
1497	pPB[offset++] = 0x66; // mov word ptr [edx],ax
1498	pPB[offset++] = 0x89;
1499	pPB[offset++] = 0x02;
1500
1501	pPB[offset++] = 0xA1; // mov eax, CPUMCTX.gdtr.base
1502	(RTRCPTR )&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_base;
1503	patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
1504	offset += sizeof(RTRCPTR);
1505
1506	pPB[offset++] = 0x89; // mov dword ptr [edx+2],eax
1507	pPB[offset++] = 0x42;
1508	pPB[offset++] = 0x02;
1509
1510	pPB[offset++] = 0x5A; // pop edx
1511	pPB[offset++] = 0x58; // pop eax
1512
1513	PATCHGEN_EPILOG(pPatch, offset);
1514
1515	return rc;
1516	}
1517
1518	/**
1519	* Generate a cpuid patch instruction
1520	*
1521	* @returns VBox status code.
1522	* @param pVM Pointer to the VM.
1523	* @param pPatch Patch record
1524	* @param pCurInstrGC Guest instruction address
1525	*/
1526	int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC)
1527	{
1528	uint32_t size;
1529	PATCHGEN_PROLOG(pVM, pPatch);
1530
1531	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMCpuidRecord, 0, false);
1532
1533	PATCHGEN_EPILOG(pPatch, size);
1534	NOREF(pCurInstrGC);
1535	return VINF_SUCCESS;
1536	}
1537
1538	/**
1539	* Generate the jump from guest to patch code
1540	*
1541	* @returns VBox status code.
1542	* @param pVM Pointer to the VM.
1543	* @param pPatch Patch record
1544	* @param pTargetGC Guest target jump
1545	* @param fClearInhibitIRQs Clear inhibit irq flag
1546	*/
1547	int patmPatchGenJumpToGuest(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fClearInhibitIRQs)
1548	{
1549	int rc = VINF_SUCCESS;
1550	uint32_t size;
1551
1552	if (fClearInhibitIRQs)
1553	{
1554	rc = patmPatchGenClearInhibitIRQ(pVM, pPatch, pReturnAddrGC);
1555	if (rc == VERR_NO_MEMORY)
1556	return rc;
1557	AssertRCReturn(rc, rc);
1558	}
1559
1560	PATCHGEN_PROLOG(pVM, pPatch);
1561
1562	/* Add lookup record for patch to guest address translation */
1563	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pReturnAddrGC, PATM_LOOKUP_PATCH2GUEST);
1564
1565	/* Generate code to jump to guest code if IF=1, else fault. */
1566	size = patmPatchGenCode(pVM, pPatch, pPB, &PATMJumpToGuest_IF1Record, pReturnAddrGC, true);
1567	PATCHGEN_EPILOG(pPatch, size);
1568
1569	return rc;
1570	}
1571
1572	/*
1573	* Relative jump from patch code to patch code (no fixup required)
1574	*/
1575	int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord)
1576	{
1577	int32_t displ;
1578	int rc = VINF_SUCCESS;
1579
1580	Assert(PATMIsPatchGCAddr(pVM, pPatchAddrGC));
1581	PATCHGEN_PROLOG(pVM, pPatch);
1582
1583	if (fAddLookupRecord)
1584	{
1585	/* Add lookup record for patch to guest address translation */
1586	patmR3AddP2GLookupRecord(pVM, pPatch, pPB, pCurInstrGC, PATM_LOOKUP_PATCH2GUEST);
1587	}
1588
1589	pPB[0] = 0xE9; //JMP
1590
1591	displ = pPatchAddrGC - (PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset + SIZEOF_NEARJUMP32);
1592
1593	(uint32_t )&pPB[1] = displ;
1594
1595	PATCHGEN_EPILOG(pPatch, SIZEOF_NEARJUMP32);
1596
1597	return rc;
1598	}

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source: vbox/trunk/src/VBox/VMM/VMMR3/PATMPatch.cpp@ 45457

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