VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 39944

Last change on this file since 39944 was 39402, checked in by vboxsync, 13 years ago

VMM: don't use generic IPE status codes, use specific ones. Part 1.

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1/* $Id: PDMDevHlp.cpp 39402 2011-11-23 16:25:04Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2011 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/mm.h>
26#include <VBox/vmm/pgm.h>
27#include <VBox/vmm/iom.h>
28#include <VBox/vmm/rem.h>
29#include <VBox/vmm/dbgf.h>
30#include <VBox/vmm/vmapi.h>
31#include <VBox/vmm/vm.h>
32#include <VBox/vmm/uvm.h>
33#include <VBox/vmm/vmm.h>
34
35#include <VBox/version.h>
36#include <VBox/log.h>
37#include <VBox/err.h>
38#include <iprt/asm.h>
39#include <iprt/assert.h>
40#include <iprt/ctype.h>
41#include <iprt/string.h>
42#include <iprt/thread.h>
43
44
45/*******************************************************************************
46* Defined Constants And Macros *
47*******************************************************************************/
48/** @def PDM_DEVHLP_DEADLOCK_DETECTION
49 * Define this to enable the deadlock detection when accessing physical memory.
50 */
51#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
52# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
53#endif
54
55
56
57/**
58 * Wrapper around PDMR3LdrGetSymbolRCLazy.
59 */
60DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
61{
62 return PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3,
63 pDevIns->Internal.s.pDevR3->pReg->szRCMod,
64 pDevIns->Internal.s.pDevR3->pszRCSearchPath,
65 pszSymbol, ppvValue);
66}
67
68
69/**
70 * Wrapper around PDMR3LdrGetSymbolR0Lazy.
71 */
72DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
73{
74 return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
75 pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
76 pDevIns->Internal.s.pDevR3->pszR0SearchPath,
77 pszSymbol, ppvValue);
78}
79
80
81/** @name R3 DevHlp
82 * @{
83 */
84
85
86/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
87static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
88 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
89{
90 PDMDEV_ASSERT_DEVINS(pDevIns);
91 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
92 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
93 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
94
95#if 0 /** @todo needs a real string cache for this */
96 if (pDevIns->iInstance > 0)
97 {
98 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
99 if (pszDesc2)
100 pszDesc = pszDesc2;
101 }
102#endif
103
104 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser,
105 pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
106
107 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
108 return rc;
109}
110
111
112/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
113static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
114 const char *pszOut, const char *pszIn,
115 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
116{
117 PDMDEV_ASSERT_DEVINS(pDevIns);
118 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
119 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
120 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
121
122 /*
123 * Resolve the functions (one of the can be NULL).
124 */
125 int rc = VINF_SUCCESS;
126 if ( pDevIns->pReg->szRCMod[0]
127 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
128 {
129 RTRCPTR RCPtrIn = NIL_RTRCPTR;
130 if (pszIn)
131 {
132 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
133 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
134 }
135 RTRCPTR RCPtrOut = NIL_RTRCPTR;
136 if (pszOut && RT_SUCCESS(rc))
137 {
138 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
139 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
140 }
141 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
142 if (pszInStr && RT_SUCCESS(rc))
143 {
144 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
145 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
146 }
147 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
148 if (pszOutStr && RT_SUCCESS(rc))
149 {
150 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
151 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
152 }
153
154 if (RT_SUCCESS(rc))
155 {
156#if 0 /** @todo needs a real string cache for this */
157 if (pDevIns->iInstance > 0)
158 {
159 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
160 if (pszDesc2)
161 pszDesc = pszDesc2;
162 }
163#endif
164
165 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
166 }
167 }
168 else
169 {
170 AssertMsgFailed(("No GC module for this driver!\n"));
171 rc = VERR_INVALID_PARAMETER;
172 }
173
174 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
175 return rc;
176}
177
178
179/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
180static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
181 const char *pszOut, const char *pszIn,
182 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
186 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
187 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
188
189 /*
190 * Resolve the functions (one of the can be NULL).
191 */
192 int rc = VINF_SUCCESS;
193 if ( pDevIns->pReg->szR0Mod[0]
194 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
195 {
196 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
197 if (pszIn)
198 {
199 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
200 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
201 }
202 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
203 if (pszOut && RT_SUCCESS(rc))
204 {
205 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
206 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
207 }
208 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
209 if (pszInStr && RT_SUCCESS(rc))
210 {
211 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
212 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
213 }
214 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
215 if (pszOutStr && RT_SUCCESS(rc))
216 {
217 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
218 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
219 }
220
221 if (RT_SUCCESS(rc))
222 {
223#if 0 /** @todo needs a real string cache for this */
224 if (pDevIns->iInstance > 0)
225 {
226 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
227 if (pszDesc2)
228 pszDesc = pszDesc2;
229 }
230#endif
231
232 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
233 }
234 }
235 else
236 {
237 AssertMsgFailed(("No R0 module for this driver!\n"));
238 rc = VERR_INVALID_PARAMETER;
239 }
240
241 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
242 return rc;
243}
244
245
246/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
247static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
248{
249 PDMDEV_ASSERT_DEVINS(pDevIns);
250 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
251 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
252 Port, cPorts));
253
254 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
255
256 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
257 return rc;
258}
259
260
261/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
262static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
263 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
264 uint32_t fFlags, const char *pszDesc)
265{
266 PDMDEV_ASSERT_DEVINS(pDevIns);
267 PVM pVM = pDevIns->Internal.s.pVMR3;
268 VM_ASSERT_EMT(pVM);
269 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p fFlags=%#x pszDesc=%p:{%s}\n",
270 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, fFlags, pszDesc));
271
272 if (pDevIns->iInstance > 0)
273 {
274 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
275 if (pszDesc2)
276 pszDesc = pszDesc2;
277 }
278
279 int rc = IOMR3MmioRegisterR3(pVM, pDevIns, GCPhysStart, cbRange, pvUser,
280 pfnWrite, pfnRead, pfnFill, fFlags, pszDesc);
281
282 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
283 return rc;
284}
285
286
287/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
288static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
289 const char *pszWrite, const char *pszRead, const char *pszFill)
290{
291 PDMDEV_ASSERT_DEVINS(pDevIns);
292 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
293 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
294 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
295
296
297 /*
298 * Resolve the functions.
299 * Not all function have to present, leave it to IOM to enforce this.
300 */
301 int rc = VINF_SUCCESS;
302 if ( pDevIns->pReg->szRCMod[0]
303 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
304 {
305 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
306 if (pszWrite)
307 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
308
309 RTRCPTR RCPtrRead = NIL_RTRCPTR;
310 int rc2 = VINF_SUCCESS;
311 if (pszRead)
312 rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
313
314 RTRCPTR RCPtrFill = NIL_RTRCPTR;
315 int rc3 = VINF_SUCCESS;
316 if (pszFill)
317 rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
318
319 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
320 rc = IOMR3MmioRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
321 else
322 {
323 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
324 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
325 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
326 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
327 rc = rc2;
328 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
329 rc = rc3;
330 }
331 }
332 else
333 {
334 AssertMsgFailed(("No GC module for this driver!\n"));
335 rc = VERR_INVALID_PARAMETER;
336 }
337
338 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
339 return rc;
340}
341
342/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
343static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
344 const char *pszWrite, const char *pszRead, const char *pszFill)
345{
346 PDMDEV_ASSERT_DEVINS(pDevIns);
347 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
348 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
349 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
350
351 /*
352 * Resolve the functions.
353 * Not all function have to present, leave it to IOM to enforce this.
354 */
355 int rc = VINF_SUCCESS;
356 if ( pDevIns->pReg->szR0Mod[0]
357 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
358 {
359 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
360 if (pszWrite)
361 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
362 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
363 int rc2 = VINF_SUCCESS;
364 if (pszRead)
365 rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
366 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
367 int rc3 = VINF_SUCCESS;
368 if (pszFill)
369 rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
370 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
371 rc = IOMR3MmioRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
372 else
373 {
374 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
375 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
376 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
377 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
378 rc = rc2;
379 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
380 rc = rc3;
381 }
382 }
383 else
384 {
385 AssertMsgFailed(("No R0 module for this driver!\n"));
386 rc = VERR_INVALID_PARAMETER;
387 }
388
389 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
390 return rc;
391}
392
393
394/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
395static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
396{
397 PDMDEV_ASSERT_DEVINS(pDevIns);
398 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
399 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
400 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
401
402 int rc = IOMR3MmioDeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
403
404 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
405 return rc;
406}
407
408
409/**
410 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
411 */
412static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
413{
414 PDMDEV_ASSERT_DEVINS(pDevIns);
415 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
416 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
417 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
418
419/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
420 * use a real string cache. */
421 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
422
423 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
424 return rc;
425}
426
427
428/**
429 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
430 */
431static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
432{
433 PDMDEV_ASSERT_DEVINS(pDevIns);
434 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
435 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
436 pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
437
438 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
439
440 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
441
442 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
443 return rc;
444}
445
446
447/**
448 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
449 */
450static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
451{
452 PDMDEV_ASSERT_DEVINS(pDevIns);
453 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
454 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
455 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
456
457 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
458
459 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
460 return rc;
461}
462
463
464/**
465 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
466 */
467static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
468{
469 PDMDEV_ASSERT_DEVINS(pDevIns);
470 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
471 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
472 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
473
474 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
475
476 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
477 return rc;
478}
479
480
481/**
482 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
483 */
484static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
485 const char *pszDesc, PRTRCPTR pRCPtr)
486{
487 PDMDEV_ASSERT_DEVINS(pDevIns);
488 PVM pVM = pDevIns->Internal.s.pVMR3;
489 VM_ASSERT_EMT(pVM);
490 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
491 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
492
493 if (pDevIns->iInstance > 0)
494 {
495 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
496 if (pszDesc2)
497 pszDesc = pszDesc2;
498 }
499
500 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
501
502 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pRCPtr));
503 return rc;
504}
505
506
507/**
508 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
509 */
510static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
511 const char *pszDesc, PRTR0PTR pR0Ptr)
512{
513 PDMDEV_ASSERT_DEVINS(pDevIns);
514 PVM pVM = pDevIns->Internal.s.pVMR3;
515 VM_ASSERT_EMT(pVM);
516 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
517 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
518
519 if (pDevIns->iInstance > 0)
520 {
521 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
522 if (pszDesc2)
523 pszDesc = pszDesc2;
524 }
525
526 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
527
528 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pR0Ptr));
529 return rc;
530}
531
532
533/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
534static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
535 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
536{
537 PDMDEV_ASSERT_DEVINS(pDevIns);
538 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
539 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
540 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
541
542/** @todo can we mangle pszDesc? */
543 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
544
545 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
546 return rc;
547}
548
549
550/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
551static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
552{
553 PDMDEV_ASSERT_DEVINS(pDevIns);
554 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
555 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
556
557 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
558
559 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
560 return rc;
561}
562
563
564/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
565static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
566 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
567 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
568 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
569{
570 PDMDEV_ASSERT_DEVINS(pDevIns);
571 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
572 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
573 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
574 pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
575 pfnLivePrep, pfnLiveExec, pfnLiveVote,
576 pfnSavePrep, pfnSaveExec, pfnSaveDone,
577 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
578
579 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
580 uVersion, cbGuess, pszBefore,
581 pfnLivePrep, pfnLiveExec, pfnLiveVote,
582 pfnSavePrep, pfnSaveExec, pfnSaveDone,
583 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
584
585 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
586 return rc;
587}
588
589
590/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
591static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
592{
593 PDMDEV_ASSERT_DEVINS(pDevIns);
594 PVM pVM = pDevIns->Internal.s.pVMR3;
595 VM_ASSERT_EMT(pVM);
596 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
597 pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
598
599 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
600 {
601 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
602 if (pszDesc2)
603 pszDesc = pszDesc2;
604 }
605
606 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
607
608 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
609 return rc;
610}
611
612
613/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
614static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
615{
616 PDMDEV_ASSERT_DEVINS(pDevIns);
617 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
618 pDevIns->pReg->szName, pDevIns->iInstance, pTime));
619
620 pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
621
622 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
623 return pTime;
624}
625
626
627/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
628static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
629{
630 PDMDEV_ASSERT_DEVINS(pDevIns);
631 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'\n",
632 pDevIns->pReg->szName, pDevIns->iInstance));
633
634 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
635
636 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
637 return u64Time;
638}
639
640
641/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
642static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
643{
644 PDMDEV_ASSERT_DEVINS(pDevIns);
645 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'\n",
646 pDevIns->pReg->szName, pDevIns->iInstance));
647
648 uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
649
650 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
651 return u64Freq;
652}
653
654
655/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
656static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
657{
658 PDMDEV_ASSERT_DEVINS(pDevIns);
659 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'\n",
660 pDevIns->pReg->szName, pDevIns->iInstance));
661
662 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
663 uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
664
665 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
666 return u64Nano;
667}
668
669
670/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
671static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
672{
673 PDMDEV_ASSERT_DEVINS(pDevIns);
674 PVM pVM = pDevIns->Internal.s.pVMR3;
675 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
676 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
677
678#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
679 if (!VM_IS_EMT(pVM))
680 {
681 char szNames[128];
682 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
683 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
684 }
685#endif
686
687 int rc;
688 if (VM_IS_EMT(pVM))
689 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
690 else
691 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
692
693 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
694 return rc;
695}
696
697
698/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
699static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
700{
701 PDMDEV_ASSERT_DEVINS(pDevIns);
702 PVM pVM = pDevIns->Internal.s.pVMR3;
703 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
704 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
705
706#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
707 if (!VM_IS_EMT(pVM))
708 {
709 char szNames[128];
710 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
711 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
712 }
713#endif
714
715 int rc;
716 if (VM_IS_EMT(pVM))
717 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
718 else
719 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
720
721 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
722 return rc;
723}
724
725
726/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
727static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
728{
729 PDMDEV_ASSERT_DEVINS(pDevIns);
730 PVM pVM = pDevIns->Internal.s.pVMR3;
731 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
732 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
733 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
734
735#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
736 if (!VM_IS_EMT(pVM))
737 {
738 char szNames[128];
739 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
740 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
741 }
742#endif
743
744 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
745
746 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
747 return rc;
748}
749
750
751/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
752static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
753{
754 PDMDEV_ASSERT_DEVINS(pDevIns);
755 PVM pVM = pDevIns->Internal.s.pVMR3;
756 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
757 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
758 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
759
760#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
761 if (!VM_IS_EMT(pVM))
762 {
763 char szNames[128];
764 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
765 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
766 }
767#endif
768
769 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
770
771 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
772 return rc;
773}
774
775
776/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
777static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
778{
779 PDMDEV_ASSERT_DEVINS(pDevIns);
780 PVM pVM = pDevIns->Internal.s.pVMR3;
781 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
782 pDevIns->pReg->szName, pDevIns->iInstance, pLock));
783
784 PGMPhysReleasePageMappingLock(pVM, pLock);
785
786 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
787}
788
789
790/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
791static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
792{
793 PDMDEV_ASSERT_DEVINS(pDevIns);
794 PVM pVM = pDevIns->Internal.s.pVMR3;
795 VM_ASSERT_EMT(pVM);
796 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
797 pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
798
799 PVMCPU pVCpu = VMMGetCpu(pVM);
800 if (!pVCpu)
801 return VERR_ACCESS_DENIED;
802#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
803 /** @todo SMP. */
804#endif
805
806 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
807
808 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
809
810 return rc;
811}
812
813
814/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
815static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
816{
817 PDMDEV_ASSERT_DEVINS(pDevIns);
818 PVM pVM = pDevIns->Internal.s.pVMR3;
819 VM_ASSERT_EMT(pVM);
820 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
821 pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
822
823 PVMCPU pVCpu = VMMGetCpu(pVM);
824 if (!pVCpu)
825 return VERR_ACCESS_DENIED;
826#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
827 /** @todo SMP. */
828#endif
829
830 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
831
832 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
833
834 return rc;
835}
836
837
838/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
839static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
840{
841 PDMDEV_ASSERT_DEVINS(pDevIns);
842 PVM pVM = pDevIns->Internal.s.pVMR3;
843 VM_ASSERT_EMT(pVM);
844 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
845 pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
846
847 PVMCPU pVCpu = VMMGetCpu(pVM);
848 if (!pVCpu)
849 return VERR_ACCESS_DENIED;
850#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
851 /** @todo SMP. */
852#endif
853
854 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
855
856 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pGCPhys));
857
858 return rc;
859}
860
861
862/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
863static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
864{
865 PDMDEV_ASSERT_DEVINS(pDevIns);
866 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
867
868 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
869
870 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
871 return pv;
872}
873
874
875/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
876static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
877{
878 PDMDEV_ASSERT_DEVINS(pDevIns);
879 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
880
881 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
882
883 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
884 return pv;
885}
886
887
888/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
889static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
890{
891 PDMDEV_ASSERT_DEVINS(pDevIns);
892 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
893
894 MMR3HeapFree(pv);
895
896 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
897}
898
899
900/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
901static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
902{
903 PDMDEV_ASSERT_DEVINS(pDevIns);
904
905 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
906
907 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
908 enmVMState, VMR3GetStateName(enmVMState)));
909 return enmVMState;
910}
911
912
913/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
914static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
915{
916 PDMDEV_ASSERT_DEVINS(pDevIns);
917
918 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
919
920 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
921 fRc));
922 return fRc;
923}
924
925
926/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
927static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
928{
929 PDMDEV_ASSERT_DEVINS(pDevIns);
930 va_list args;
931 va_start(args, pszFormat);
932 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
933 va_end(args);
934 return rc;
935}
936
937
938/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
939static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
940{
941 PDMDEV_ASSERT_DEVINS(pDevIns);
942 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
943 return rc;
944}
945
946
947/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
948static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
949{
950 PDMDEV_ASSERT_DEVINS(pDevIns);
951 va_list args;
952 va_start(args, pszFormat);
953 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
954 va_end(args);
955 return rc;
956}
957
958
959/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
960static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
961{
962 PDMDEV_ASSERT_DEVINS(pDevIns);
963 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
964 return rc;
965}
966
967
968/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
969static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
970{
971 PDMDEV_ASSERT_DEVINS(pDevIns);
972#ifdef LOG_ENABLED
973 va_list va2;
974 va_copy(va2, args);
975 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
976 pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
977 va_end(va2);
978#endif
979
980 PVM pVM = pDevIns->Internal.s.pVMR3;
981 VM_ASSERT_EMT(pVM);
982 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
983 if (rc == VERR_DBGF_NOT_ATTACHED)
984 rc = VINF_SUCCESS;
985
986 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
987 return rc;
988}
989
990
991/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
992static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
993{
994 PDMDEV_ASSERT_DEVINS(pDevIns);
995 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
996 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
997
998 PVM pVM = pDevIns->Internal.s.pVMR3;
999 VM_ASSERT_EMT(pVM);
1000 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1001
1002 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1003 return rc;
1004}
1005
1006
1007/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1008static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1009{
1010 PDMDEV_ASSERT_DEVINS(pDevIns);
1011 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1012 LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1013 return hTraceBuf;
1014}
1015
1016
1017/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1018static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1019{
1020 PDMDEV_ASSERT_DEVINS(pDevIns);
1021 PVM pVM = pDevIns->Internal.s.pVMR3;
1022 VM_ASSERT_EMT(pVM);
1023
1024 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1025 NOREF(pVM);
1026}
1027
1028
1029
1030/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1031static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1032 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1033{
1034 PDMDEV_ASSERT_DEVINS(pDevIns);
1035 PVM pVM = pDevIns->Internal.s.pVMR3;
1036 VM_ASSERT_EMT(pVM);
1037
1038 va_list args;
1039 va_start(args, pszName);
1040 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1041 va_end(args);
1042 AssertRC(rc);
1043
1044 NOREF(pVM);
1045}
1046
1047
1048/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1049static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1050 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1051{
1052 PDMDEV_ASSERT_DEVINS(pDevIns);
1053 PVM pVM = pDevIns->Internal.s.pVMR3;
1054 VM_ASSERT_EMT(pVM);
1055
1056 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1057 AssertRC(rc);
1058
1059 NOREF(pVM);
1060}
1061
1062
1063/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
1064static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1065{
1066 PDMDEV_ASSERT_DEVINS(pDevIns);
1067 PVM pVM = pDevIns->Internal.s.pVMR3;
1068 VM_ASSERT_EMT(pVM);
1069 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
1070 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
1071
1072 /*
1073 * Validate input.
1074 */
1075 if (!pPciDev)
1076 {
1077 Assert(pPciDev);
1078 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1079 return VERR_INVALID_PARAMETER;
1080 }
1081 if (!pPciDev->config[0] && !pPciDev->config[1])
1082 {
1083 Assert(pPciDev->config[0] || pPciDev->config[1]);
1084 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1085 return VERR_INVALID_PARAMETER;
1086 }
1087 if (pDevIns->Internal.s.pPciDeviceR3)
1088 {
1089 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1090 * support a PDM device with multiple PCI devices. This might become a problem
1091 * when upgrading the chipset for instance because of multiple functions in some
1092 * devices...
1093 */
1094 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1095 return VERR_PDM_ONE_PCI_FUNCTION_PER_DEVICE;
1096 }
1097
1098 /*
1099 * Choose the PCI bus for the device.
1100 *
1101 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1102 * configuration value will be set. If not the default bus is 0.
1103 */
1104 int rc;
1105 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1106 if (!pBus)
1107 {
1108 uint8_t u8Bus;
1109 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1110 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1111 rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1112 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1113 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1114 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1115 VERR_PDM_NO_PCI_BUS);
1116 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1117 }
1118 if (pBus->pDevInsR3)
1119 {
1120 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1121 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1122 else
1123 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1124
1125 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1126 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1127 else
1128 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1129
1130 /*
1131 * Check the configuration for PCI device and function assignment.
1132 */
1133 int iDev = -1;
1134 uint8_t u8Device;
1135 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1136 if (RT_SUCCESS(rc))
1137 {
1138 AssertMsgReturn(u8Device <= 31,
1139 ("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1140 u8Device, pDevIns->pReg->szName, pDevIns->iInstance),
1141 VERR_PDM_BAD_PCI_CONFIG);
1142
1143 uint8_t u8Function;
1144 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1145 AssertMsgRCReturn(rc, ("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1146 rc, pDevIns->pReg->szName, pDevIns->iInstance),
1147 rc);
1148 AssertMsgReturn(u8Function <= 7,
1149 ("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1150 u8Function, pDevIns->pReg->szName, pDevIns->iInstance),
1151 VERR_PDM_BAD_PCI_CONFIG);
1152
1153 iDev = (u8Device << 3) | u8Function;
1154 }
1155 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1156 {
1157 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1158 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1159 return rc;
1160 }
1161
1162 /*
1163 * Call the pci bus device to do the actual registration.
1164 */
1165 pdmLock(pVM);
1166 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1167 pdmUnlock(pVM);
1168 if (RT_SUCCESS(rc))
1169 {
1170 pPciDev->pDevIns = pDevIns;
1171
1172 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1173 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1174 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1175 else
1176 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1177
1178 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1179 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1180 else
1181 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1182
1183 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1184 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1185 }
1186 }
1187 else
1188 {
1189 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1190 rc = VERR_PDM_NO_PCI_BUS;
1191 }
1192
1193 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1194 return rc;
1195}
1196
1197
1198/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1199static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1200{
1201 PDMDEV_ASSERT_DEVINS(pDevIns);
1202 PVM pVM = pDevIns->Internal.s.pVMR3;
1203 VM_ASSERT_EMT(pVM);
1204 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1205 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1206
1207 /*
1208 * Validate input.
1209 */
1210 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1211 {
1212 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1213 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1214 return VERR_INVALID_PARAMETER;
1215 }
1216 switch ((int)enmType)
1217 {
1218 case PCI_ADDRESS_SPACE_IO:
1219 /*
1220 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1221 */
1222 AssertMsgReturn(cbRegion <= _32K,
1223 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1224 VERR_INVALID_PARAMETER);
1225 break;
1226
1227 case PCI_ADDRESS_SPACE_MEM:
1228 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1229 case PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64:
1230 case PCI_ADDRESS_SPACE_MEM_PREFETCH | PCI_ADDRESS_SPACE_BAR64:
1231 /*
1232 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1233 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1234 */
1235 AssertMsgReturn(cbRegion <= 512 * _1M,
1236 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1237 VERR_INVALID_PARAMETER);
1238 break;
1239 default:
1240 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1241 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1242 return VERR_INVALID_PARAMETER;
1243 }
1244 if (!pfnCallback)
1245 {
1246 Assert(pfnCallback);
1247 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1248 return VERR_INVALID_PARAMETER;
1249 }
1250 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1251
1252 /*
1253 * Must have a PCI device registered!
1254 */
1255 int rc;
1256 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1257 if (pPciDev)
1258 {
1259 /*
1260 * We're currently restricted to page aligned MMIO regions.
1261 */
1262 if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1263 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1264 {
1265 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1266 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1267 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1268 }
1269
1270 /*
1271 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1272 */
1273 int iLastSet = ASMBitLastSetU32(cbRegion);
1274 Assert(iLastSet > 0);
1275 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1276 if (cbRegion > cbRegionAligned)
1277 cbRegion = cbRegionAligned * 2; /* round up */
1278
1279 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1280 Assert(pBus);
1281 pdmLock(pVM);
1282 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1283 pdmUnlock(pVM);
1284 }
1285 else
1286 {
1287 AssertMsgFailed(("No PCI device registered!\n"));
1288 rc = VERR_PDM_NOT_PCI_DEVICE;
1289 }
1290
1291 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1292 return rc;
1293}
1294
1295
1296/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1297static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1298 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1299{
1300 PDMDEV_ASSERT_DEVINS(pDevIns);
1301 PVM pVM = pDevIns->Internal.s.pVMR3;
1302 VM_ASSERT_EMT(pVM);
1303 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1304 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1305
1306 /*
1307 * Validate input and resolve defaults.
1308 */
1309 AssertPtr(pfnRead);
1310 AssertPtr(pfnWrite);
1311 AssertPtrNull(ppfnReadOld);
1312 AssertPtrNull(ppfnWriteOld);
1313 AssertPtrNull(pPciDev);
1314
1315 if (!pPciDev)
1316 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1317 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1318 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1319 AssertRelease(pBus);
1320 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1321
1322 /*
1323 * Do the job.
1324 */
1325 pdmLock(pVM);
1326 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1327 pdmUnlock(pVM);
1328
1329 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1330}
1331
1332
1333/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1334static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1335{
1336 PDMDEV_ASSERT_DEVINS(pDevIns);
1337 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1338
1339 /*
1340 * Validate input.
1341 */
1342 /** @todo iIrq and iLevel checks. */
1343
1344 /*
1345 * Must have a PCI device registered!
1346 */
1347 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1348 if (pPciDev)
1349 {
1350 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1351 Assert(pBus);
1352 PVM pVM = pDevIns->Internal.s.pVMR3;
1353 pdmLock(pVM);
1354 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1355 pdmUnlock(pVM);
1356 }
1357 else
1358 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1359
1360 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1361}
1362
1363
1364/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1365static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1366{
1367 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1368}
1369
1370
1371/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1372static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
1373{
1374 PDMDEV_ASSERT_DEVINS(pDevIns);
1375 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: %d MSI vectors %d MSI-X vectors\n", pDevIns->pReg->szName, pDevIns->iInstance, pMsiReg->cMsiVectors,pMsiReg->cMsixVectors ));
1376 int rc = VINF_SUCCESS;
1377
1378 /*
1379 * Must have a PCI device registered!
1380 */
1381 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1382 if (pPciDev)
1383 {
1384 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1385 Assert(pBus);
1386
1387 PVM pVM = pDevIns->Internal.s.pVMR3;
1388 pdmLock(pVM);
1389 if (!pBus->pfnRegisterMsiR3)
1390 rc = VERR_NOT_IMPLEMENTED;
1391 else
1392 rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1393 pdmUnlock(pVM);
1394 }
1395 else
1396 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1397
1398 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1399 return rc;
1400}
1401
1402/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1403static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1404{
1405 PDMDEV_ASSERT_DEVINS(pDevIns);
1406 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1407
1408 /*
1409 * Validate input.
1410 */
1411 /** @todo iIrq and iLevel checks. */
1412
1413 PVM pVM = pDevIns->Internal.s.pVMR3;
1414 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1415
1416 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1417}
1418
1419
1420/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1421static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1422{
1423 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1424}
1425
1426
1427/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1428static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1429{
1430 PDMDEV_ASSERT_DEVINS(pDevIns);
1431 PVM pVM = pDevIns->Internal.s.pVMR3;
1432 VM_ASSERT_EMT(pVM);
1433 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1434 pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1435
1436 /*
1437 * Lookup the LUN, it might already be registered.
1438 */
1439 PPDMLUN pLunPrev = NULL;
1440 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1441 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1442 if (pLun->iLun == iLun)
1443 break;
1444
1445 /*
1446 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1447 */
1448 if (!pLun)
1449 {
1450 if ( !pBaseInterface
1451 || !pszDesc
1452 || !*pszDesc)
1453 {
1454 Assert(pBaseInterface);
1455 Assert(pszDesc || *pszDesc);
1456 return VERR_INVALID_PARAMETER;
1457 }
1458
1459 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1460 if (!pLun)
1461 return VERR_NO_MEMORY;
1462
1463 pLun->iLun = iLun;
1464 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1465 pLun->pTop = NULL;
1466 pLun->pBottom = NULL;
1467 pLun->pDevIns = pDevIns;
1468 pLun->pUsbIns = NULL;
1469 pLun->pszDesc = pszDesc;
1470 pLun->pBase = pBaseInterface;
1471 if (!pLunPrev)
1472 pDevIns->Internal.s.pLunsR3 = pLun;
1473 else
1474 pLunPrev->pNext = pLun;
1475 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1476 iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1477 }
1478 else if (pLun->pTop)
1479 {
1480 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1481 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1482 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1483 }
1484 Assert(pLun->pBase == pBaseInterface);
1485
1486
1487 /*
1488 * Get the attached driver configuration.
1489 */
1490 int rc;
1491 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1492 if (pNode)
1493 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
1494 else
1495 rc = VERR_PDM_NO_ATTACHED_DRIVER;
1496
1497
1498 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1499 return rc;
1500}
1501
1502
1503/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1504static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
1505 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1506{
1507 PDMDEV_ASSERT_DEVINS(pDevIns);
1508 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1509 pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1510
1511 PVM pVM = pDevIns->Internal.s.pVMR3;
1512 VM_ASSERT_EMT(pVM);
1513
1514 if (pDevIns->iInstance > 0)
1515 {
1516 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1517 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1518 }
1519
1520 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1521
1522 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppQueue));
1523 return rc;
1524}
1525
1526
1527/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1528static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1529 const char *pszNameFmt, va_list va)
1530{
1531 PDMDEV_ASSERT_DEVINS(pDevIns);
1532 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1533 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1534
1535 PVM pVM = pDevIns->Internal.s.pVMR3;
1536 VM_ASSERT_EMT(pVM);
1537 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1538
1539 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1540 return rc;
1541}
1542
1543
1544/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNop} */
1545static DECLCALLBACK(PPDMCRITSECT) pdmR3DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
1546{
1547 PDMDEV_ASSERT_DEVINS(pDevIns);
1548 PVM pVM = pDevIns->Internal.s.pVMR3;
1549 VM_ASSERT_EMT(pVM);
1550
1551 PPDMCRITSECT pCritSect = PDMR3CritSectGetNop(pVM);
1552 LogFlow(("pdmR3DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n",
1553 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1554 return pCritSect;
1555}
1556
1557
1558/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopR0} */
1559static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopR0(PPDMDEVINS pDevIns)
1560{
1561 PDMDEV_ASSERT_DEVINS(pDevIns);
1562 PVM pVM = pDevIns->Internal.s.pVMR3;
1563 VM_ASSERT_EMT(pVM);
1564
1565 R0PTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopR0(pVM);
1566 LogFlow(("pdmR3DevHlp_CritSectGetNopR0: caller='%s'/%d: return %RHv\n",
1567 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1568 return pCritSect;
1569}
1570
1571
1572/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopRC} */
1573static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopRC(PPDMDEVINS pDevIns)
1574{
1575 PDMDEV_ASSERT_DEVINS(pDevIns);
1576 PVM pVM = pDevIns->Internal.s.pVMR3;
1577 VM_ASSERT_EMT(pVM);
1578
1579 RCPTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopRC(pVM);
1580 LogFlow(("pdmR3DevHlp_CritSectGetNopRC: caller='%s'/%d: return %RRv\n",
1581 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1582 return pCritSect;
1583}
1584
1585
1586/** @interface_method_impl{PDMDEVHLPR3,pfnSetDeviceCritSect} */
1587static DECLCALLBACK(int) pdmR3DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
1588{
1589 /*
1590 * Validate input.
1591 *
1592 * Note! We only allow the automatically created default critical section
1593 * to be replaced by this API.
1594 */
1595 PDMDEV_ASSERT_DEVINS(pDevIns);
1596 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
1597 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
1598 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
1599 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
1600 PVM pVM = pDevIns->Internal.s.pVMR3;
1601 AssertReturn(pCritSect->s.pVMR3 == pVM, VERR_INVALID_PARAMETER);
1602
1603 VM_ASSERT_EMT(pVM);
1604 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1605
1606 AssertReturn(pDevIns->pCritSectRoR3, VERR_PDM_DEV_IPE_1);
1607 AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER);
1608 AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER);
1609 AssertReturn(pDevIns->pCritSectRoR3 != pCritSect, VERR_INVALID_PARAMETER);
1610
1611 /*
1612 * Replace the critical section and destroy the automatic default section.
1613 */
1614 PPDMCRITSECT pOldCritSect = pDevIns->pCritSectRoR3;
1615 pDevIns->pCritSectRoR3 = pCritSect;
1616 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1617 pDevIns->pCritSectRoR0 = MMHyperCCToR0(pVM, pDevIns->pCritSectRoR3);
1618 else
1619 Assert(pDevIns->pCritSectRoR0 == NIL_RTRCPTR);
1620
1621 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1622 pDevIns->pCritSectRoRC = MMHyperCCToRC(pVM, pDevIns->pCritSectRoR3);
1623 else
1624 Assert(pDevIns->pCritSectRoRC == NIL_RTRCPTR);
1625
1626 PDMR3CritSectDelete(pOldCritSect);
1627 if (pDevIns->pReg->fFlags & (PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0))
1628 MMHyperFree(pVM, pOldCritSect);
1629 else
1630 MMR3HeapFree(pOldCritSect);
1631
1632 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1633 return VINF_SUCCESS;
1634}
1635
1636
1637/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1638static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1639 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1640{
1641 PDMDEV_ASSERT_DEVINS(pDevIns);
1642 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1643 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1644 pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1645
1646 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1647
1648 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1649 rc, *ppThread));
1650 return rc;
1651}
1652
1653
1654/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1655static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1656{
1657 PDMDEV_ASSERT_DEVINS(pDevIns);
1658 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1659 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1660
1661 int rc = VINF_SUCCESS;
1662 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1663 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1664 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1665 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1666 AssertStmt( enmVMState == VMSTATE_SUSPENDING
1667 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1668 || enmVMState == VMSTATE_SUSPENDING_LS
1669 || enmVMState == VMSTATE_RESETTING
1670 || enmVMState == VMSTATE_RESETTING_LS
1671 || enmVMState == VMSTATE_POWERING_OFF
1672 || enmVMState == VMSTATE_POWERING_OFF_LS,
1673 rc = VERR_INVALID_STATE);
1674
1675 if (RT_SUCCESS(rc))
1676 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1677
1678 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1679 return rc;
1680}
1681
1682
1683/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1684static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1685{
1686 PDMDEV_ASSERT_DEVINS(pDevIns);
1687 PVM pVM = pDevIns->Internal.s.pVMR3;
1688
1689 VMSTATE enmVMState = VMR3GetState(pVM);
1690 if ( enmVMState == VMSTATE_SUSPENDING
1691 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1692 || enmVMState == VMSTATE_SUSPENDING_LS
1693 || enmVMState == VMSTATE_RESETTING
1694 || enmVMState == VMSTATE_RESETTING_LS
1695 || enmVMState == VMSTATE_POWERING_OFF
1696 || enmVMState == VMSTATE_POWERING_OFF_LS)
1697 {
1698 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1699 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1700 }
1701 else
1702 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1703}
1704
1705
1706/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1707static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1708{
1709 PDMDEV_ASSERT_DEVINS(pDevIns);
1710 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1711 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1712 pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1713 pRtcReg->pfnWrite, ppRtcHlp));
1714
1715 /*
1716 * Validate input.
1717 */
1718 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1719 {
1720 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1721 PDM_RTCREG_VERSION));
1722 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1723 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1724 return VERR_INVALID_PARAMETER;
1725 }
1726 if ( !pRtcReg->pfnWrite
1727 || !pRtcReg->pfnRead)
1728 {
1729 Assert(pRtcReg->pfnWrite);
1730 Assert(pRtcReg->pfnRead);
1731 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1732 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1733 return VERR_INVALID_PARAMETER;
1734 }
1735
1736 if (!ppRtcHlp)
1737 {
1738 Assert(ppRtcHlp);
1739 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1740 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1741 return VERR_INVALID_PARAMETER;
1742 }
1743
1744 /*
1745 * Only one DMA device.
1746 */
1747 PVM pVM = pDevIns->Internal.s.pVMR3;
1748 if (pVM->pdm.s.pRtc)
1749 {
1750 AssertMsgFailed(("Only one RTC device is supported!\n"));
1751 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1752 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1753 return VERR_INVALID_PARAMETER;
1754 }
1755
1756 /*
1757 * Allocate and initialize pci bus structure.
1758 */
1759 int rc = VINF_SUCCESS;
1760 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1761 if (pRtc)
1762 {
1763 pRtc->pDevIns = pDevIns;
1764 pRtc->Reg = *pRtcReg;
1765 pVM->pdm.s.pRtc = pRtc;
1766
1767 /* set the helper pointer. */
1768 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1769 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1770 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1771 }
1772 else
1773 rc = VERR_NO_MEMORY;
1774
1775 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1776 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1777 return rc;
1778}
1779
1780
1781/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1782static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1783{
1784 PDMDEV_ASSERT_DEVINS(pDevIns);
1785 PVM pVM = pDevIns->Internal.s.pVMR3;
1786 VM_ASSERT_EMT(pVM);
1787 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1788 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1789 int rc = VINF_SUCCESS;
1790 if (pVM->pdm.s.pDmac)
1791 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1792 else
1793 {
1794 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1795 rc = VERR_PDM_NO_DMAC_INSTANCE;
1796 }
1797 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1798 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1799 return rc;
1800}
1801
1802
1803/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1804static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
1805{
1806 PDMDEV_ASSERT_DEVINS(pDevIns);
1807 PVM pVM = pDevIns->Internal.s.pVMR3;
1808 VM_ASSERT_EMT(pVM);
1809 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1810 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1811 int rc = VINF_SUCCESS;
1812 if (pVM->pdm.s.pDmac)
1813 {
1814 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1815 if (pcbRead)
1816 *pcbRead = cb;
1817 }
1818 else
1819 {
1820 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1821 rc = VERR_PDM_NO_DMAC_INSTANCE;
1822 }
1823 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1824 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1825 return rc;
1826}
1827
1828
1829/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1830static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
1831{
1832 PDMDEV_ASSERT_DEVINS(pDevIns);
1833 PVM pVM = pDevIns->Internal.s.pVMR3;
1834 VM_ASSERT_EMT(pVM);
1835 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1836 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1837 int rc = VINF_SUCCESS;
1838 if (pVM->pdm.s.pDmac)
1839 {
1840 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1841 if (pcbWritten)
1842 *pcbWritten = cb;
1843 }
1844 else
1845 {
1846 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1847 rc = VERR_PDM_NO_DMAC_INSTANCE;
1848 }
1849 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1850 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1851 return rc;
1852}
1853
1854
1855/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1856static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1857{
1858 PDMDEV_ASSERT_DEVINS(pDevIns);
1859 PVM pVM = pDevIns->Internal.s.pVMR3;
1860 VM_ASSERT_EMT(pVM);
1861 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1862 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1863 int rc = VINF_SUCCESS;
1864 if (pVM->pdm.s.pDmac)
1865 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1866 else
1867 {
1868 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1869 rc = VERR_PDM_NO_DMAC_INSTANCE;
1870 }
1871 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1872 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1873 return rc;
1874}
1875
1876/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1877static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1878{
1879 PDMDEV_ASSERT_DEVINS(pDevIns);
1880 PVM pVM = pDevIns->Internal.s.pVMR3;
1881 VM_ASSERT_EMT(pVM);
1882 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1883 pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
1884 uint8_t u8Mode;
1885 if (pVM->pdm.s.pDmac)
1886 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1887 else
1888 {
1889 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1890 u8Mode = 3 << 2 /* illegal mode type */;
1891 }
1892 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1893 pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
1894 return u8Mode;
1895}
1896
1897/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1898static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1899{
1900 PDMDEV_ASSERT_DEVINS(pDevIns);
1901 PVM pVM = pDevIns->Internal.s.pVMR3;
1902 VM_ASSERT_EMT(pVM);
1903 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1904 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1905
1906 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1907 VM_FF_SET(pVM, VM_FF_PDM_DMA);
1908 REMR3NotifyDmaPending(pVM);
1909 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1910}
1911
1912
1913/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1914static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1915{
1916 PDMDEV_ASSERT_DEVINS(pDevIns);
1917 PVM pVM = pDevIns->Internal.s.pVMR3;
1918 VM_ASSERT_EMT(pVM);
1919
1920 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1921 pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
1922 int rc;
1923 if (pVM->pdm.s.pRtc)
1924 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1925 else
1926 rc = VERR_PDM_NO_RTC_INSTANCE;
1927
1928 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1929 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1930 return rc;
1931}
1932
1933
1934/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1935static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1936{
1937 PDMDEV_ASSERT_DEVINS(pDevIns);
1938 PVM pVM = pDevIns->Internal.s.pVMR3;
1939 VM_ASSERT_EMT(pVM);
1940
1941 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1942 pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
1943 int rc;
1944 if (pVM->pdm.s.pRtc)
1945 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1946 else
1947 rc = VERR_PDM_NO_RTC_INSTANCE;
1948
1949 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1950 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1951 return rc;
1952}
1953
1954
1955/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1956static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1957{
1958 PDMDEV_ASSERT_DEVINS(pDevIns);
1959 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1960 return true;
1961
1962 char szMsg[100];
1963 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1964 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1965 AssertBreakpoint();
1966 return false;
1967}
1968
1969
1970/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1971static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1972{
1973 PDMDEV_ASSERT_DEVINS(pDevIns);
1974 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1975 return true;
1976
1977 char szMsg[100];
1978 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1979 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1980 AssertBreakpoint();
1981 return false;
1982}
1983
1984
1985/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
1986static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1987 const char *pszSymPrefix, const char *pszSymList)
1988{
1989 PDMDEV_ASSERT_DEVINS(pDevIns);
1990 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1991 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1992 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1993
1994 int rc;
1995 if ( strncmp(pszSymPrefix, "dev", 3) == 0
1996 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1997 {
1998 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1999 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2000 pvInterface, cbInterface,
2001 pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
2002 pszSymPrefix, pszSymList,
2003 false /*fRing0OrRC*/);
2004 else
2005 {
2006 AssertMsgFailed(("Not a raw-mode enabled driver\n"));
2007 rc = VERR_PERMISSION_DENIED;
2008 }
2009 }
2010 else
2011 {
2012 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2013 pszSymPrefix, pDevIns->pReg->szName));
2014 rc = VERR_INVALID_NAME;
2015 }
2016
2017 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2018 pDevIns->iInstance, rc));
2019 return rc;
2020}
2021
2022
2023/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
2024static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2025 const char *pszSymPrefix, const char *pszSymList)
2026{
2027 PDMDEV_ASSERT_DEVINS(pDevIns);
2028 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2029 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2030 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2031
2032 int rc;
2033 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2034 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2035 {
2036 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2037 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2038 pvInterface, cbInterface,
2039 pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
2040 pszSymPrefix, pszSymList,
2041 true /*fRing0OrRC*/);
2042 else
2043 {
2044 AssertMsgFailed(("Not a ring-0 enabled driver\n"));
2045 rc = VERR_PERMISSION_DENIED;
2046 }
2047 }
2048 else
2049 {
2050 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2051 pszSymPrefix, pDevIns->pReg->szName));
2052 rc = VERR_INVALID_NAME;
2053 }
2054
2055 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2056 pDevIns->iInstance, rc));
2057 return rc;
2058}
2059
2060
2061/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
2062static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
2063{
2064 PDMDEV_ASSERT_DEVINS(pDevIns);
2065 PVM pVM = pDevIns->Internal.s.pVMR3;
2066 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2067 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
2068 pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
2069
2070 /*
2071 * Resolve the ring-0 entry point. There is not need to remember this like
2072 * we do for drivers since this is mainly for construction time hacks and
2073 * other things that aren't performance critical.
2074 */
2075 int rc;
2076 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2077 {
2078 char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
2079 strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
2080 szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
2081
2082 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
2083 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
2084 if (RT_SUCCESS(rc))
2085 {
2086 /*
2087 * Make the ring-0 call.
2088 */
2089 PDMDEVICECALLREQHANDLERREQ Req;
2090 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2091 Req.Hdr.cbReq = sizeof(Req);
2092 Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2093 Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2094 Req.uOperation = uOperation;
2095 Req.u32Alignment = 0;
2096 Req.u64Arg = u64Arg;
2097 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2098 }
2099 else
2100 pfnReqHandlerR0 = NIL_RTR0PTR;
2101 }
2102 else
2103 rc = VERR_ACCESS_DENIED;
2104 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2105 pDevIns->iInstance, rc));
2106 return rc;
2107}
2108
2109
2110/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2111static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2112{
2113 PDMDEV_ASSERT_DEVINS(pDevIns);
2114 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2115 return pDevIns->Internal.s.pVMR3;
2116}
2117
2118
2119/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2120static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2121{
2122 PDMDEV_ASSERT_DEVINS(pDevIns);
2123 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2124 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2125 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2126}
2127
2128
2129/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2130static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2131{
2132 PDMDEV_ASSERT_DEVINS(pDevIns);
2133 PVM pVM = pDevIns->Internal.s.pVMR3;
2134 VM_ASSERT_EMT(pVM);
2135 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
2136 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
2137 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2138 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
2139 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
2140
2141 /*
2142 * Validate the structure.
2143 */
2144 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2145 {
2146 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2147 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2148 return VERR_INVALID_PARAMETER;
2149 }
2150 if ( !pPciBusReg->pfnRegisterR3
2151 || !pPciBusReg->pfnIORegionRegisterR3
2152 || !pPciBusReg->pfnSetIrqR3
2153 || !pPciBusReg->pfnSaveExecR3
2154 || !pPciBusReg->pfnLoadExecR3
2155 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
2156 {
2157 Assert(pPciBusReg->pfnRegisterR3);
2158 Assert(pPciBusReg->pfnIORegionRegisterR3);
2159 Assert(pPciBusReg->pfnSetIrqR3);
2160 Assert(pPciBusReg->pfnSaveExecR3);
2161 Assert(pPciBusReg->pfnLoadExecR3);
2162 Assert(pPciBusReg->pfnFakePCIBIOSR3);
2163 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2164 return VERR_INVALID_PARAMETER;
2165 }
2166 if ( pPciBusReg->pszSetIrqRC
2167 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
2168 {
2169 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2170 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2171 return VERR_INVALID_PARAMETER;
2172 }
2173 if ( pPciBusReg->pszSetIrqR0
2174 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2175 {
2176 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2177 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2178 return VERR_INVALID_PARAMETER;
2179 }
2180 if (!ppPciHlpR3)
2181 {
2182 Assert(ppPciHlpR3);
2183 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2184 return VERR_INVALID_PARAMETER;
2185 }
2186
2187 /*
2188 * Find free PCI bus entry.
2189 */
2190 unsigned iBus = 0;
2191 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2192 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2193 break;
2194 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2195 {
2196 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2197 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2198 return VERR_INVALID_PARAMETER;
2199 }
2200 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2201
2202 /*
2203 * Resolve and init the RC bits.
2204 */
2205 if (pPciBusReg->pszSetIrqRC)
2206 {
2207 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2208 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2209 if (RT_FAILURE(rc))
2210 {
2211 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2212 return rc;
2213 }
2214 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2215 }
2216 else
2217 {
2218 pPciBus->pfnSetIrqRC = 0;
2219 pPciBus->pDevInsRC = 0;
2220 }
2221
2222 /*
2223 * Resolve and init the R0 bits.
2224 */
2225 if (pPciBusReg->pszSetIrqR0)
2226 {
2227 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2228 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2229 if (RT_FAILURE(rc))
2230 {
2231 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2232 return rc;
2233 }
2234 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2235 }
2236 else
2237 {
2238 pPciBus->pfnSetIrqR0 = 0;
2239 pPciBus->pDevInsR0 = 0;
2240 }
2241
2242 /*
2243 * Init the R3 bits.
2244 */
2245 pPciBus->iBus = iBus;
2246 pPciBus->pDevInsR3 = pDevIns;
2247 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2248 pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2249 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2250 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2251 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2252 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
2253 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
2254 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2255
2256 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2257
2258 /* set the helper pointer and return. */
2259 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2260 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2261 return VINF_SUCCESS;
2262}
2263
2264
2265/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2266static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2267{
2268 PDMDEV_ASSERT_DEVINS(pDevIns);
2269 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2270 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2271 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2272 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2273 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2274 ppPicHlpR3));
2275
2276 /*
2277 * Validate input.
2278 */
2279 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2280 {
2281 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2282 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2283 return VERR_INVALID_PARAMETER;
2284 }
2285 if ( !pPicReg->pfnSetIrqR3
2286 || !pPicReg->pfnGetInterruptR3)
2287 {
2288 Assert(pPicReg->pfnSetIrqR3);
2289 Assert(pPicReg->pfnGetInterruptR3);
2290 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2291 return VERR_INVALID_PARAMETER;
2292 }
2293 if ( ( pPicReg->pszSetIrqRC
2294 || pPicReg->pszGetInterruptRC)
2295 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
2296 || !VALID_PTR(pPicReg->pszGetInterruptRC))
2297 )
2298 {
2299 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2300 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2301 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2302 return VERR_INVALID_PARAMETER;
2303 }
2304 if ( pPicReg->pszSetIrqRC
2305 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2306 {
2307 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2308 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2309 return VERR_INVALID_PARAMETER;
2310 }
2311 if ( pPicReg->pszSetIrqR0
2312 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2313 {
2314 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2315 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2316 return VERR_INVALID_PARAMETER;
2317 }
2318 if (!ppPicHlpR3)
2319 {
2320 Assert(ppPicHlpR3);
2321 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2322 return VERR_INVALID_PARAMETER;
2323 }
2324
2325 /*
2326 * Only one PIC device.
2327 */
2328 PVM pVM = pDevIns->Internal.s.pVMR3;
2329 if (pVM->pdm.s.Pic.pDevInsR3)
2330 {
2331 AssertMsgFailed(("Only one pic device is supported!\n"));
2332 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2333 return VERR_INVALID_PARAMETER;
2334 }
2335
2336 /*
2337 * RC stuff.
2338 */
2339 if (pPicReg->pszSetIrqRC)
2340 {
2341 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2342 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2343 if (RT_SUCCESS(rc))
2344 {
2345 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2346 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2347 }
2348 if (RT_FAILURE(rc))
2349 {
2350 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2351 return rc;
2352 }
2353 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2354 }
2355 else
2356 {
2357 pVM->pdm.s.Pic.pDevInsRC = 0;
2358 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2359 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2360 }
2361
2362 /*
2363 * R0 stuff.
2364 */
2365 if (pPicReg->pszSetIrqR0)
2366 {
2367 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2368 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2369 if (RT_SUCCESS(rc))
2370 {
2371 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2372 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2373 }
2374 if (RT_FAILURE(rc))
2375 {
2376 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2377 return rc;
2378 }
2379 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2380 Assert(pVM->pdm.s.Pic.pDevInsR0);
2381 }
2382 else
2383 {
2384 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2385 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2386 pVM->pdm.s.Pic.pDevInsR0 = 0;
2387 }
2388
2389 /*
2390 * R3 stuff.
2391 */
2392 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2393 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2394 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2395 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2396
2397 /* set the helper pointer and return. */
2398 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2399 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2400 return VINF_SUCCESS;
2401}
2402
2403
2404/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2405static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2406{
2407 PDMDEV_ASSERT_DEVINS(pDevIns);
2408 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2409 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2410 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2411 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2412 pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2413 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2414 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2415 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2416 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2417
2418 /*
2419 * Validate input.
2420 */
2421 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2422 {
2423 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2424 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2425 return VERR_INVALID_PARAMETER;
2426 }
2427 if ( !pApicReg->pfnGetInterruptR3
2428 || !pApicReg->pfnHasPendingIrqR3
2429 || !pApicReg->pfnSetBaseR3
2430 || !pApicReg->pfnGetBaseR3
2431 || !pApicReg->pfnSetTPRR3
2432 || !pApicReg->pfnGetTPRR3
2433 || !pApicReg->pfnWriteMSRR3
2434 || !pApicReg->pfnReadMSRR3
2435 || !pApicReg->pfnBusDeliverR3
2436 || !pApicReg->pfnLocalInterruptR3)
2437 {
2438 Assert(pApicReg->pfnGetInterruptR3);
2439 Assert(pApicReg->pfnHasPendingIrqR3);
2440 Assert(pApicReg->pfnSetBaseR3);
2441 Assert(pApicReg->pfnGetBaseR3);
2442 Assert(pApicReg->pfnSetTPRR3);
2443 Assert(pApicReg->pfnGetTPRR3);
2444 Assert(pApicReg->pfnWriteMSRR3);
2445 Assert(pApicReg->pfnReadMSRR3);
2446 Assert(pApicReg->pfnBusDeliverR3);
2447 Assert(pApicReg->pfnLocalInterruptR3);
2448 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2449 return VERR_INVALID_PARAMETER;
2450 }
2451 if ( ( pApicReg->pszGetInterruptRC
2452 || pApicReg->pszHasPendingIrqRC
2453 || pApicReg->pszSetBaseRC
2454 || pApicReg->pszGetBaseRC
2455 || pApicReg->pszSetTPRRC
2456 || pApicReg->pszGetTPRRC
2457 || pApicReg->pszWriteMSRRC
2458 || pApicReg->pszReadMSRRC
2459 || pApicReg->pszBusDeliverRC
2460 || pApicReg->pszLocalInterruptRC)
2461 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2462 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2463 || !VALID_PTR(pApicReg->pszSetBaseRC)
2464 || !VALID_PTR(pApicReg->pszGetBaseRC)
2465 || !VALID_PTR(pApicReg->pszSetTPRRC)
2466 || !VALID_PTR(pApicReg->pszGetTPRRC)
2467 || !VALID_PTR(pApicReg->pszWriteMSRRC)
2468 || !VALID_PTR(pApicReg->pszReadMSRRC)
2469 || !VALID_PTR(pApicReg->pszBusDeliverRC)
2470 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
2471 )
2472 {
2473 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2474 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2475 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2476 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2477 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2478 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2479 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2480 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2481 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2482 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2483 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2484 return VERR_INVALID_PARAMETER;
2485 }
2486 if ( ( pApicReg->pszGetInterruptR0
2487 || pApicReg->pszHasPendingIrqR0
2488 || pApicReg->pszSetBaseR0
2489 || pApicReg->pszGetBaseR0
2490 || pApicReg->pszSetTPRR0
2491 || pApicReg->pszGetTPRR0
2492 || pApicReg->pszWriteMSRR0
2493 || pApicReg->pszReadMSRR0
2494 || pApicReg->pszBusDeliverR0
2495 || pApicReg->pszLocalInterruptR0)
2496 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2497 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2498 || !VALID_PTR(pApicReg->pszSetBaseR0)
2499 || !VALID_PTR(pApicReg->pszGetBaseR0)
2500 || !VALID_PTR(pApicReg->pszSetTPRR0)
2501 || !VALID_PTR(pApicReg->pszGetTPRR0)
2502 || !VALID_PTR(pApicReg->pszReadMSRR0)
2503 || !VALID_PTR(pApicReg->pszWriteMSRR0)
2504 || !VALID_PTR(pApicReg->pszBusDeliverR0)
2505 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
2506 )
2507 {
2508 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2509 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2510 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2511 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2512 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2513 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2514 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2515 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2516 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2517 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2518 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2519 return VERR_INVALID_PARAMETER;
2520 }
2521 if (!ppApicHlpR3)
2522 {
2523 Assert(ppApicHlpR3);
2524 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2525 return VERR_INVALID_PARAMETER;
2526 }
2527
2528 /*
2529 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
2530 * as they need to communicate and share state easily.
2531 */
2532 PVM pVM = pDevIns->Internal.s.pVMR3;
2533 if (pVM->pdm.s.Apic.pDevInsR3)
2534 {
2535 AssertMsgFailed(("Only one apic device is supported!\n"));
2536 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2537 return VERR_INVALID_PARAMETER;
2538 }
2539
2540 /*
2541 * Resolve & initialize the RC bits.
2542 */
2543 if (pApicReg->pszGetInterruptRC)
2544 {
2545 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2546 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2547 if (RT_SUCCESS(rc))
2548 {
2549 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2550 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2551 }
2552 if (RT_SUCCESS(rc))
2553 {
2554 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2555 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2556 }
2557 if (RT_SUCCESS(rc))
2558 {
2559 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2560 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2561 }
2562 if (RT_SUCCESS(rc))
2563 {
2564 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2565 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2566 }
2567 if (RT_SUCCESS(rc))
2568 {
2569 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2570 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2571 }
2572 if (RT_SUCCESS(rc))
2573 {
2574 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2575 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2576 }
2577 if (RT_SUCCESS(rc))
2578 {
2579 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2580 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2581 }
2582 if (RT_SUCCESS(rc))
2583 {
2584 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2585 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2586 }
2587 if (RT_SUCCESS(rc))
2588 {
2589 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2590 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2591 }
2592 if (RT_FAILURE(rc))
2593 {
2594 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2595 return rc;
2596 }
2597 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2598 }
2599 else
2600 {
2601 pVM->pdm.s.Apic.pDevInsRC = 0;
2602 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2603 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2604 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2605 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2606 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2607 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2608 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2609 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2610 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2611 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2612 }
2613
2614 /*
2615 * Resolve & initialize the R0 bits.
2616 */
2617 if (pApicReg->pszGetInterruptR0)
2618 {
2619 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2620 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2621 if (RT_SUCCESS(rc))
2622 {
2623 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2624 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2625 }
2626 if (RT_SUCCESS(rc))
2627 {
2628 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2629 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2630 }
2631 if (RT_SUCCESS(rc))
2632 {
2633 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2634 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2635 }
2636 if (RT_SUCCESS(rc))
2637 {
2638 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2639 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2640 }
2641 if (RT_SUCCESS(rc))
2642 {
2643 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2644 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2645 }
2646 if (RT_SUCCESS(rc))
2647 {
2648 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2649 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2650 }
2651 if (RT_SUCCESS(rc))
2652 {
2653 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2654 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2655 }
2656 if (RT_SUCCESS(rc))
2657 {
2658 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2659 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2660 }
2661 if (RT_SUCCESS(rc))
2662 {
2663 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2664 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2665 }
2666 if (RT_FAILURE(rc))
2667 {
2668 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2669 return rc;
2670 }
2671 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2672 Assert(pVM->pdm.s.Apic.pDevInsR0);
2673 }
2674 else
2675 {
2676 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2677 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2678 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2679 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2680 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2681 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2682 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2683 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2684 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2685 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2686 pVM->pdm.s.Apic.pDevInsR0 = 0;
2687 }
2688
2689 /*
2690 * Initialize the HC bits.
2691 */
2692 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2693 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2694 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2695 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2696 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2697 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2698 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2699 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2700 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2701 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2702 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2703 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2704
2705 /* set the helper pointer and return. */
2706 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2707 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2708 return VINF_SUCCESS;
2709}
2710
2711
2712/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2713static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2714{
2715 PDMDEV_ASSERT_DEVINS(pDevIns);
2716 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2717 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2718 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2719 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2720
2721 /*
2722 * Validate input.
2723 */
2724 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2725 {
2726 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2727 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2728 return VERR_INVALID_PARAMETER;
2729 }
2730 if (!pIoApicReg->pfnSetIrqR3 || !pIoApicReg->pfnSendMsiR3)
2731 {
2732 Assert(pIoApicReg->pfnSetIrqR3);
2733 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2734 return VERR_INVALID_PARAMETER;
2735 }
2736 if ( pIoApicReg->pszSetIrqRC
2737 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
2738 {
2739 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2740 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2741 return VERR_INVALID_PARAMETER;
2742 }
2743 if ( pIoApicReg->pszSendMsiRC
2744 && !VALID_PTR(pIoApicReg->pszSendMsiRC))
2745 {
2746 Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
2747 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2748 return VERR_INVALID_PARAMETER;
2749 }
2750 if ( pIoApicReg->pszSetIrqR0
2751 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2752 {
2753 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2754 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2755 return VERR_INVALID_PARAMETER;
2756 }
2757 if ( pIoApicReg->pszSendMsiR0
2758 && !VALID_PTR(pIoApicReg->pszSendMsiR0))
2759 {
2760 Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
2761 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2762 return VERR_INVALID_PARAMETER;
2763 }
2764 if (!ppIoApicHlpR3)
2765 {
2766 Assert(ppIoApicHlpR3);
2767 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2768 return VERR_INVALID_PARAMETER;
2769 }
2770
2771 /*
2772 * The I/O APIC requires the APIC to be present (hacks++).
2773 * If the I/O APIC does GC stuff so must the APIC.
2774 */
2775 PVM pVM = pDevIns->Internal.s.pVMR3;
2776 if (!pVM->pdm.s.Apic.pDevInsR3)
2777 {
2778 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2779 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2780 return VERR_INVALID_PARAMETER;
2781 }
2782 if ( pIoApicReg->pszSetIrqRC
2783 && !pVM->pdm.s.Apic.pDevInsRC)
2784 {
2785 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2786 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2787 return VERR_INVALID_PARAMETER;
2788 }
2789
2790 /*
2791 * Only one I/O APIC device.
2792 */
2793 if (pVM->pdm.s.IoApic.pDevInsR3)
2794 {
2795 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2796 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2797 return VERR_INVALID_PARAMETER;
2798 }
2799
2800 /*
2801 * Resolve & initialize the GC bits.
2802 */
2803 if (pIoApicReg->pszSetIrqRC)
2804 {
2805 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2806 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2807 if (RT_FAILURE(rc))
2808 {
2809 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2810 return rc;
2811 }
2812 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2813 }
2814 else
2815 {
2816 pVM->pdm.s.IoApic.pDevInsRC = 0;
2817 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2818 }
2819
2820 if (pIoApicReg->pszSendMsiRC)
2821 {
2822 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
2823 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
2824 if (RT_FAILURE(rc))
2825 {
2826 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2827 return rc;
2828 }
2829 }
2830 else
2831 {
2832 pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
2833 }
2834
2835 /*
2836 * Resolve & initialize the R0 bits.
2837 */
2838 if (pIoApicReg->pszSetIrqR0)
2839 {
2840 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2841 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2842 if (RT_FAILURE(rc))
2843 {
2844 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2845 return rc;
2846 }
2847 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2848 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2849 }
2850 else
2851 {
2852 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2853 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2854 }
2855
2856 if (pIoApicReg->pszSendMsiR0)
2857 {
2858 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
2859 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
2860 if (RT_FAILURE(rc))
2861 {
2862 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2863 return rc;
2864 }
2865 }
2866 else
2867 {
2868 pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
2869 }
2870
2871
2872 /*
2873 * Initialize the R3 bits.
2874 */
2875 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2876 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2877 pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
2878 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2879
2880 /* set the helper pointer and return. */
2881 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2882 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2883 return VINF_SUCCESS;
2884}
2885
2886
2887/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2888static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2889{
2890 PDMDEV_ASSERT_DEVINS(pDevIns);
2891 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2892 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2893
2894 /*
2895 * Validate input.
2896 */
2897 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2898 {
2899 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2900 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2901 return VERR_INVALID_PARAMETER;
2902 }
2903
2904 if (!ppHpetHlpR3)
2905 {
2906 Assert(ppHpetHlpR3);
2907 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2908 return VERR_INVALID_PARAMETER;
2909 }
2910
2911 /* set the helper pointer and return. */
2912 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2913 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2914 return VINF_SUCCESS;
2915}
2916
2917
2918/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
2919static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
2920{
2921 PDMDEV_ASSERT_DEVINS(pDevIns);
2922 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2923 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n"));
2924
2925 /*
2926 * Validate input.
2927 */
2928 if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
2929 {
2930 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
2931 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2932 return VERR_INVALID_PARAMETER;
2933 }
2934
2935 if (!ppPciRawHlpR3)
2936 {
2937 Assert(ppPciRawHlpR3);
2938 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2939 return VERR_INVALID_PARAMETER;
2940 }
2941
2942 /* set the helper pointer and return. */
2943 *ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
2944 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2945 return VINF_SUCCESS;
2946}
2947
2948
2949/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2950static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2951{
2952 PDMDEV_ASSERT_DEVINS(pDevIns);
2953 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2954 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2955 pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2956 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2957
2958 /*
2959 * Validate input.
2960 */
2961 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2962 {
2963 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2964 PDM_DMACREG_VERSION));
2965 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2966 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2967 return VERR_INVALID_PARAMETER;
2968 }
2969 if ( !pDmacReg->pfnRun
2970 || !pDmacReg->pfnRegister
2971 || !pDmacReg->pfnReadMemory
2972 || !pDmacReg->pfnWriteMemory
2973 || !pDmacReg->pfnSetDREQ
2974 || !pDmacReg->pfnGetChannelMode)
2975 {
2976 Assert(pDmacReg->pfnRun);
2977 Assert(pDmacReg->pfnRegister);
2978 Assert(pDmacReg->pfnReadMemory);
2979 Assert(pDmacReg->pfnWriteMemory);
2980 Assert(pDmacReg->pfnSetDREQ);
2981 Assert(pDmacReg->pfnGetChannelMode);
2982 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2983 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2984 return VERR_INVALID_PARAMETER;
2985 }
2986
2987 if (!ppDmacHlp)
2988 {
2989 Assert(ppDmacHlp);
2990 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2991 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2992 return VERR_INVALID_PARAMETER;
2993 }
2994
2995 /*
2996 * Only one DMA device.
2997 */
2998 PVM pVM = pDevIns->Internal.s.pVMR3;
2999 if (pVM->pdm.s.pDmac)
3000 {
3001 AssertMsgFailed(("Only one DMA device is supported!\n"));
3002 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3003 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3004 return VERR_INVALID_PARAMETER;
3005 }
3006
3007 /*
3008 * Allocate and initialize pci bus structure.
3009 */
3010 int rc = VINF_SUCCESS;
3011 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3012 if (pDmac)
3013 {
3014 pDmac->pDevIns = pDevIns;
3015 pDmac->Reg = *pDmacReg;
3016 pVM->pdm.s.pDmac = pDmac;
3017
3018 /* set the helper pointer. */
3019 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3020 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3021 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3022 }
3023 else
3024 rc = VERR_NO_MEMORY;
3025
3026 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3027 pDevIns->pReg->szName, pDevIns->iInstance, rc));
3028 return rc;
3029}
3030
3031
3032/**
3033 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3034 */
3035static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3036{
3037 PDMDEV_ASSERT_DEVINS(pDevIns);
3038 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3039
3040 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
3041 return rc;
3042}
3043
3044
3045/**
3046 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3047 */
3048static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3049{
3050 PDMDEV_ASSERT_DEVINS(pDevIns);
3051 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3052
3053 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
3054 return rc;
3055}
3056
3057
3058/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3059static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3060{
3061 PDMDEV_ASSERT_DEVINS(pDevIns);
3062 PVM pVM = pDevIns->Internal.s.pVMR3;
3063 VM_ASSERT_EMT(pVM);
3064 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3065 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
3066
3067 /*
3068 * We postpone this operation because we're likely to be inside a I/O instruction
3069 * and the EIP will be updated when we return.
3070 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3071 */
3072 bool fHaltOnReset;
3073 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3074 if (RT_SUCCESS(rc) && fHaltOnReset)
3075 {
3076 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3077 rc = VINF_EM_HALT;
3078 }
3079 else
3080 {
3081 VM_FF_SET(pVM, VM_FF_RESET);
3082 rc = VINF_EM_RESET;
3083 }
3084
3085 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3086 return rc;
3087}
3088
3089
3090/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3091static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3092{
3093 int rc;
3094 PDMDEV_ASSERT_DEVINS(pDevIns);
3095 PVM pVM = pDevIns->Internal.s.pVMR3;
3096 VM_ASSERT_EMT(pVM);
3097 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3098 pDevIns->pReg->szName, pDevIns->iInstance));
3099
3100 /** @todo Always take the SMP path - fewer code paths. */
3101 if (pVM->cCpus > 1)
3102 {
3103 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3104 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
3105 AssertRC(rc);
3106 rc = VINF_EM_SUSPEND;
3107 }
3108 else
3109 rc = VMR3Suspend(pVM);
3110
3111 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3112 return rc;
3113}
3114
3115
3116/**
3117 * Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3118 * EMT request to avoid deadlocks.
3119 *
3120 * @returns VBox status code fit for scheduling.
3121 * @param pVM The VM handle.
3122 * @param pDevIns The device that triggered this action.
3123 */
3124static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3125{
3126 /*
3127 * Suspend the VM first then do the saving.
3128 */
3129 int rc = VMR3Suspend(pVM);
3130 if (RT_SUCCESS(rc))
3131 {
3132 PUVM pUVM = pVM->pUVM;
3133 rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3134
3135 /*
3136 * On success, power off the VM, on failure we'll leave it suspended.
3137 */
3138 if (RT_SUCCESS(rc))
3139 {
3140 rc = VMR3PowerOff(pVM);
3141 if (RT_FAILURE(rc))
3142 LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3143 }
3144 else
3145 LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3146 }
3147 else
3148 LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3149 return rc;
3150}
3151
3152
3153/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3154static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3155{
3156 PDMDEV_ASSERT_DEVINS(pDevIns);
3157 PVM pVM = pDevIns->Internal.s.pVMR3;
3158 VM_ASSERT_EMT(pVM);
3159 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3160 pDevIns->pReg->szName, pDevIns->iInstance));
3161
3162 int rc;
3163 if ( pVM->pUVM->pVmm2UserMethods
3164 && pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3165 {
3166 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3167 if (RT_SUCCESS(rc))
3168 {
3169 LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3170 rc = VINF_EM_SUSPEND;
3171 }
3172 }
3173 else
3174 rc = VERR_NOT_SUPPORTED;
3175
3176 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3177 return rc;
3178}
3179
3180
3181/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3182static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3183{
3184 int rc;
3185 PDMDEV_ASSERT_DEVINS(pDevIns);
3186 PVM pVM = pDevIns->Internal.s.pVMR3;
3187 VM_ASSERT_EMT(pVM);
3188 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3189 pDevIns->pReg->szName, pDevIns->iInstance));
3190
3191 /** @todo Always take the SMP path - fewer code paths. */
3192 if (pVM->cCpus > 1)
3193 {
3194 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3195 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
3196 AssertRC(rc);
3197 /* Set the VCPU state to stopped here as well to make sure no
3198 * inconsistency with the EM state occurs.
3199 */
3200 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3201 rc = VINF_EM_OFF;
3202 }
3203 else
3204 rc = VMR3PowerOff(pVM);
3205
3206 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3207 return rc;
3208}
3209
3210
3211/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3212static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3213{
3214 PDMDEV_ASSERT_DEVINS(pDevIns);
3215 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3216
3217 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3218
3219 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3220 return fRc;
3221}
3222
3223
3224/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3225static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3226{
3227 PDMDEV_ASSERT_DEVINS(pDevIns);
3228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3229 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3230 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3231}
3232
3233
3234/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3235static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3236 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3237{
3238 PDMDEV_ASSERT_DEVINS(pDevIns);
3239 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3240
3241 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3242 pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3243 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3244
3245 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
3246
3247 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3248 pDevIns->pReg->szName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3249}
3250
3251
3252/**
3253 * The device helper structure for trusted devices.
3254 */
3255const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3256{
3257 PDM_DEVHLPR3_VERSION,
3258 pdmR3DevHlp_IOPortRegister,
3259 pdmR3DevHlp_IOPortRegisterRC,
3260 pdmR3DevHlp_IOPortRegisterR0,
3261 pdmR3DevHlp_IOPortDeregister,
3262 pdmR3DevHlp_MMIORegister,
3263 pdmR3DevHlp_MMIORegisterRC,
3264 pdmR3DevHlp_MMIORegisterR0,
3265 pdmR3DevHlp_MMIODeregister,
3266 pdmR3DevHlp_MMIO2Register,
3267 pdmR3DevHlp_MMIO2Deregister,
3268 pdmR3DevHlp_MMIO2Map,
3269 pdmR3DevHlp_MMIO2Unmap,
3270 pdmR3DevHlp_MMHyperMapMMIO2,
3271 pdmR3DevHlp_MMIO2MapKernel,
3272 pdmR3DevHlp_ROMRegister,
3273 pdmR3DevHlp_ROMProtectShadow,
3274 pdmR3DevHlp_SSMRegister,
3275 pdmR3DevHlp_TMTimerCreate,
3276 pdmR3DevHlp_TMUtcNow,
3277 pdmR3DevHlp_PhysRead,
3278 pdmR3DevHlp_PhysWrite,
3279 pdmR3DevHlp_PhysGCPhys2CCPtr,
3280 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3281 pdmR3DevHlp_PhysReleasePageMappingLock,
3282 pdmR3DevHlp_PhysReadGCVirt,
3283 pdmR3DevHlp_PhysWriteGCVirt,
3284 pdmR3DevHlp_PhysGCPtr2GCPhys,
3285 pdmR3DevHlp_MMHeapAlloc,
3286 pdmR3DevHlp_MMHeapAllocZ,
3287 pdmR3DevHlp_MMHeapFree,
3288 pdmR3DevHlp_VMState,
3289 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3290 pdmR3DevHlp_VMSetError,
3291 pdmR3DevHlp_VMSetErrorV,
3292 pdmR3DevHlp_VMSetRuntimeError,
3293 pdmR3DevHlp_VMSetRuntimeErrorV,
3294 pdmR3DevHlp_DBGFStopV,
3295 pdmR3DevHlp_DBGFInfoRegister,
3296 pdmR3DevHlp_DBGFTraceBuf,
3297 pdmR3DevHlp_STAMRegister,
3298 pdmR3DevHlp_STAMRegisterF,
3299 pdmR3DevHlp_STAMRegisterV,
3300 pdmR3DevHlp_PCIRegister,
3301 pdmR3DevHlp_PCIRegisterMsi,
3302 pdmR3DevHlp_PCIIORegionRegister,
3303 pdmR3DevHlp_PCISetConfigCallbacks,
3304 pdmR3DevHlp_PCISetIrq,
3305 pdmR3DevHlp_PCISetIrqNoWait,
3306 pdmR3DevHlp_ISASetIrq,
3307 pdmR3DevHlp_ISASetIrqNoWait,
3308 pdmR3DevHlp_DriverAttach,
3309 pdmR3DevHlp_QueueCreate,
3310 pdmR3DevHlp_CritSectInit,
3311 pdmR3DevHlp_CritSectGetNop,
3312 pdmR3DevHlp_CritSectGetNopR0,
3313 pdmR3DevHlp_CritSectGetNopRC,
3314 pdmR3DevHlp_SetDeviceCritSect,
3315 pdmR3DevHlp_ThreadCreate,
3316 pdmR3DevHlp_SetAsyncNotification,
3317 pdmR3DevHlp_AsyncNotificationCompleted,
3318 pdmR3DevHlp_RTCRegister,
3319 pdmR3DevHlp_PCIBusRegister,
3320 pdmR3DevHlp_PICRegister,
3321 pdmR3DevHlp_APICRegister,
3322 pdmR3DevHlp_IOAPICRegister,
3323 pdmR3DevHlp_HPETRegister,
3324 pdmR3DevHlp_PciRawRegister,
3325 pdmR3DevHlp_DMACRegister,
3326 pdmR3DevHlp_DMARegister,
3327 pdmR3DevHlp_DMAReadMemory,
3328 pdmR3DevHlp_DMAWriteMemory,
3329 pdmR3DevHlp_DMASetDREQ,
3330 pdmR3DevHlp_DMAGetChannelMode,
3331 pdmR3DevHlp_DMASchedule,
3332 pdmR3DevHlp_CMOSWrite,
3333 pdmR3DevHlp_CMOSRead,
3334 pdmR3DevHlp_AssertEMT,
3335 pdmR3DevHlp_AssertOther,
3336 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3337 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3338 pdmR3DevHlp_CallR0,
3339 0,
3340 0,
3341 0,
3342 0,
3343 0,
3344 0,
3345 0,
3346 0,
3347 0,
3348 0,
3349 pdmR3DevHlp_GetVM,
3350 pdmR3DevHlp_GetVMCPU,
3351 pdmR3DevHlp_RegisterVMMDevHeap,
3352 pdmR3DevHlp_UnregisterVMMDevHeap,
3353 pdmR3DevHlp_VMReset,
3354 pdmR3DevHlp_VMSuspend,
3355 pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3356 pdmR3DevHlp_VMPowerOff,
3357 pdmR3DevHlp_A20IsEnabled,
3358 pdmR3DevHlp_A20Set,
3359 pdmR3DevHlp_GetCpuId,
3360 pdmR3DevHlp_TMTimeVirtGet,
3361 pdmR3DevHlp_TMTimeVirtGetFreq,
3362 pdmR3DevHlp_TMTimeVirtGetNano,
3363 PDM_DEVHLPR3_VERSION /* the end */
3364};
3365
3366
3367
3368
3369/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3370static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3371{
3372 PDMDEV_ASSERT_DEVINS(pDevIns);
3373 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3374 return NULL;
3375}
3376
3377
3378/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3379static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3380{
3381 PDMDEV_ASSERT_DEVINS(pDevIns);
3382 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3383 return NULL;
3384}
3385
3386
3387/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3388static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3389{
3390 PDMDEV_ASSERT_DEVINS(pDevIns);
3391 NOREF(GCPhys); NOREF(pvHeap); NOREF(cbSize);
3392 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3393 return VERR_ACCESS_DENIED;
3394}
3395
3396
3397/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3398static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3399{
3400 PDMDEV_ASSERT_DEVINS(pDevIns);
3401 NOREF(GCPhys);
3402 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3403 return VERR_ACCESS_DENIED;
3404}
3405
3406
3407/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3408static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3409{
3410 PDMDEV_ASSERT_DEVINS(pDevIns);
3411 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3412 return VERR_ACCESS_DENIED;
3413}
3414
3415
3416/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3417static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3418{
3419 PDMDEV_ASSERT_DEVINS(pDevIns);
3420 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3421 return VERR_ACCESS_DENIED;
3422}
3423
3424
3425/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3426static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3427{
3428 PDMDEV_ASSERT_DEVINS(pDevIns);
3429 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3430 return VERR_ACCESS_DENIED;
3431}
3432
3433
3434/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3435static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3436{
3437 PDMDEV_ASSERT_DEVINS(pDevIns);
3438 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3439 return VERR_ACCESS_DENIED;
3440}
3441
3442
3443/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3444static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3445{
3446 PDMDEV_ASSERT_DEVINS(pDevIns);
3447 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3448 return false;
3449}
3450
3451
3452/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3453static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3454{
3455 PDMDEV_ASSERT_DEVINS(pDevIns);
3456 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3457 NOREF(fEnable);
3458}
3459
3460
3461/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3462static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3463 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3464{
3465 PDMDEV_ASSERT_DEVINS(pDevIns);
3466 NOREF(iLeaf); NOREF(pEax); NOREF(pEbx); NOREF(pEcx); NOREF(pEdx);
3467 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3468}
3469
3470
3471/**
3472 * The device helper structure for non-trusted devices.
3473 */
3474const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3475{
3476 PDM_DEVHLPR3_VERSION,
3477 pdmR3DevHlp_IOPortRegister,
3478 pdmR3DevHlp_IOPortRegisterRC,
3479 pdmR3DevHlp_IOPortRegisterR0,
3480 pdmR3DevHlp_IOPortDeregister,
3481 pdmR3DevHlp_MMIORegister,
3482 pdmR3DevHlp_MMIORegisterRC,
3483 pdmR3DevHlp_MMIORegisterR0,
3484 pdmR3DevHlp_MMIODeregister,
3485 pdmR3DevHlp_MMIO2Register,
3486 pdmR3DevHlp_MMIO2Deregister,
3487 pdmR3DevHlp_MMIO2Map,
3488 pdmR3DevHlp_MMIO2Unmap,
3489 pdmR3DevHlp_MMHyperMapMMIO2,
3490 pdmR3DevHlp_MMIO2MapKernel,
3491 pdmR3DevHlp_ROMRegister,
3492 pdmR3DevHlp_ROMProtectShadow,
3493 pdmR3DevHlp_SSMRegister,
3494 pdmR3DevHlp_TMTimerCreate,
3495 pdmR3DevHlp_TMUtcNow,
3496 pdmR3DevHlp_PhysRead,
3497 pdmR3DevHlp_PhysWrite,
3498 pdmR3DevHlp_PhysGCPhys2CCPtr,
3499 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3500 pdmR3DevHlp_PhysReleasePageMappingLock,
3501 pdmR3DevHlp_PhysReadGCVirt,
3502 pdmR3DevHlp_PhysWriteGCVirt,
3503 pdmR3DevHlp_PhysGCPtr2GCPhys,
3504 pdmR3DevHlp_MMHeapAlloc,
3505 pdmR3DevHlp_MMHeapAllocZ,
3506 pdmR3DevHlp_MMHeapFree,
3507 pdmR3DevHlp_VMState,
3508 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3509 pdmR3DevHlp_VMSetError,
3510 pdmR3DevHlp_VMSetErrorV,
3511 pdmR3DevHlp_VMSetRuntimeError,
3512 pdmR3DevHlp_VMSetRuntimeErrorV,
3513 pdmR3DevHlp_DBGFStopV,
3514 pdmR3DevHlp_DBGFInfoRegister,
3515 pdmR3DevHlp_DBGFTraceBuf,
3516 pdmR3DevHlp_STAMRegister,
3517 pdmR3DevHlp_STAMRegisterF,
3518 pdmR3DevHlp_STAMRegisterV,
3519 pdmR3DevHlp_PCIRegister,
3520 pdmR3DevHlp_PCIRegisterMsi,
3521 pdmR3DevHlp_PCIIORegionRegister,
3522 pdmR3DevHlp_PCISetConfigCallbacks,
3523 pdmR3DevHlp_PCISetIrq,
3524 pdmR3DevHlp_PCISetIrqNoWait,
3525 pdmR3DevHlp_ISASetIrq,
3526 pdmR3DevHlp_ISASetIrqNoWait,
3527 pdmR3DevHlp_DriverAttach,
3528 pdmR3DevHlp_QueueCreate,
3529 pdmR3DevHlp_CritSectInit,
3530 pdmR3DevHlp_CritSectGetNop,
3531 pdmR3DevHlp_CritSectGetNopR0,
3532 pdmR3DevHlp_CritSectGetNopRC,
3533 pdmR3DevHlp_SetDeviceCritSect,
3534 pdmR3DevHlp_ThreadCreate,
3535 pdmR3DevHlp_SetAsyncNotification,
3536 pdmR3DevHlp_AsyncNotificationCompleted,
3537 pdmR3DevHlp_RTCRegister,
3538 pdmR3DevHlp_PCIBusRegister,
3539 pdmR3DevHlp_PICRegister,
3540 pdmR3DevHlp_APICRegister,
3541 pdmR3DevHlp_IOAPICRegister,
3542 pdmR3DevHlp_HPETRegister,
3543 pdmR3DevHlp_PciRawRegister,
3544 pdmR3DevHlp_DMACRegister,
3545 pdmR3DevHlp_DMARegister,
3546 pdmR3DevHlp_DMAReadMemory,
3547 pdmR3DevHlp_DMAWriteMemory,
3548 pdmR3DevHlp_DMASetDREQ,
3549 pdmR3DevHlp_DMAGetChannelMode,
3550 pdmR3DevHlp_DMASchedule,
3551 pdmR3DevHlp_CMOSWrite,
3552 pdmR3DevHlp_CMOSRead,
3553 pdmR3DevHlp_AssertEMT,
3554 pdmR3DevHlp_AssertOther,
3555 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3556 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3557 pdmR3DevHlp_CallR0,
3558 0,
3559 0,
3560 0,
3561 0,
3562 0,
3563 0,
3564 0,
3565 0,
3566 0,
3567 0,
3568 pdmR3DevHlp_Untrusted_GetVM,
3569 pdmR3DevHlp_Untrusted_GetVMCPU,
3570 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3571 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3572 pdmR3DevHlp_Untrusted_VMReset,
3573 pdmR3DevHlp_Untrusted_VMSuspend,
3574 pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3575 pdmR3DevHlp_Untrusted_VMPowerOff,
3576 pdmR3DevHlp_Untrusted_A20IsEnabled,
3577 pdmR3DevHlp_Untrusted_A20Set,
3578 pdmR3DevHlp_Untrusted_GetCpuId,
3579 pdmR3DevHlp_TMTimeVirtGet,
3580 pdmR3DevHlp_TMTimeVirtGetFreq,
3581 pdmR3DevHlp_TMTimeVirtGetNano,
3582 PDM_DEVHLPR3_VERSION /* the end */
3583};
3584
3585
3586
3587/**
3588 * Queue consumer callback for internal component.
3589 *
3590 * @returns Success indicator.
3591 * If false the item will not be removed and the flushing will stop.
3592 * @param pVM The VM handle.
3593 * @param pItem The item to consume. Upon return this item will be freed.
3594 */
3595DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3596{
3597 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3598 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3599 switch (pTask->enmOp)
3600 {
3601 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3602 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3603 break;
3604
3605 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3606 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3607 break;
3608
3609 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3610 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3611 break;
3612
3613 default:
3614 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3615 break;
3616 }
3617 return true;
3618}
3619
3620/** @} */
3621
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