VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 37410

Last change on this file since 37410 was 37410, checked in by vboxsync, 13 years ago

VMM,SUPDrv: Created DBGFTrace.
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1/* $Id: PDMDevHlp.cpp 37410 2011-06-10 15:11:40Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2011 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/mm.h>
26#include <VBox/vmm/pgm.h>
27#include <VBox/vmm/iom.h>
28#include <VBox/vmm/rem.h>
29#include <VBox/vmm/dbgf.h>
30#include <VBox/vmm/vmapi.h>
31#include <VBox/vmm/vm.h>
32#include <VBox/vmm/uvm.h>
33#include <VBox/vmm/vmm.h>
34
35#include <VBox/version.h>
36#include <VBox/log.h>
37#include <VBox/err.h>
38#include <iprt/asm.h>
39#include <iprt/assert.h>
40#include <iprt/ctype.h>
41#include <iprt/string.h>
42#include <iprt/thread.h>
43
44
45/*******************************************************************************
46* Defined Constants And Macros *
47*******************************************************************************/
48/** @def PDM_DEVHLP_DEADLOCK_DETECTION
49 * Define this to enable the deadlock detection when accessing physical memory.
50 */
51#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
52# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
53#endif
54
55
56
57/**
58 * Wrapper around PDMR3LdrGetSymbolRCLazy.
59 */
60DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
61{
62 return PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3,
63 pDevIns->Internal.s.pDevR3->pReg->szRCMod,
64 pDevIns->Internal.s.pDevR3->pszRCSearchPath,
65 pszSymbol, ppvValue);
66}
67
68
69/**
70 * Wrapper around PDMR3LdrGetSymbolR0Lazy.
71 */
72DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
73{
74 return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
75 pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
76 pDevIns->Internal.s.pDevR3->pszR0SearchPath,
77 pszSymbol, ppvValue);
78}
79
80
81/** @name R3 DevHlp
82 * @{
83 */
84
85
86/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
87static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
88 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
89{
90 PDMDEV_ASSERT_DEVINS(pDevIns);
91 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
92 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
93 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
94
95#if 0 /** @todo needs a real string cache for this */
96 if (pDevIns->iInstance > 0)
97 {
98 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
99 if (pszDesc2)
100 pszDesc = pszDesc2;
101 }
102#endif
103
104 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
105
106 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
107 return rc;
108}
109
110
111/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
112static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
113 const char *pszOut, const char *pszIn,
114 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
115{
116 PDMDEV_ASSERT_DEVINS(pDevIns);
117 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
118 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
119 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
120
121 /*
122 * Resolve the functions (one of the can be NULL).
123 */
124 int rc = VINF_SUCCESS;
125 if ( pDevIns->pReg->szRCMod[0]
126 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
127 {
128 RTRCPTR RCPtrIn = NIL_RTRCPTR;
129 if (pszIn)
130 {
131 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
132 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
133 }
134 RTRCPTR RCPtrOut = NIL_RTRCPTR;
135 if (pszOut && RT_SUCCESS(rc))
136 {
137 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
138 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
139 }
140 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
141 if (pszInStr && RT_SUCCESS(rc))
142 {
143 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
144 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
145 }
146 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
147 if (pszOutStr && RT_SUCCESS(rc))
148 {
149 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
150 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
151 }
152
153 if (RT_SUCCESS(rc))
154 {
155#if 0 /** @todo needs a real string cache for this */
156 if (pDevIns->iInstance > 0)
157 {
158 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
159 if (pszDesc2)
160 pszDesc = pszDesc2;
161 }
162#endif
163
164 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
165 }
166 }
167 else
168 {
169 AssertMsgFailed(("No GC module for this driver!\n"));
170 rc = VERR_INVALID_PARAMETER;
171 }
172
173 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
174 return rc;
175}
176
177
178/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
179static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
180 const char *pszOut, const char *pszIn,
181 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
182{
183 PDMDEV_ASSERT_DEVINS(pDevIns);
184 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
185 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
186 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
187
188 /*
189 * Resolve the functions (one of the can be NULL).
190 */
191 int rc = VINF_SUCCESS;
192 if ( pDevIns->pReg->szR0Mod[0]
193 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
194 {
195 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
196 if (pszIn)
197 {
198 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
199 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
200 }
201 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
202 if (pszOut && RT_SUCCESS(rc))
203 {
204 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
205 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
206 }
207 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
208 if (pszInStr && RT_SUCCESS(rc))
209 {
210 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
211 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
212 }
213 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
214 if (pszOutStr && RT_SUCCESS(rc))
215 {
216 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
217 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
218 }
219
220 if (RT_SUCCESS(rc))
221 {
222#if 0 /** @todo needs a real string cache for this */
223 if (pDevIns->iInstance > 0)
224 {
225 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
226 if (pszDesc2)
227 pszDesc = pszDesc2;
228 }
229#endif
230
231 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
232 }
233 }
234 else
235 {
236 AssertMsgFailed(("No R0 module for this driver!\n"));
237 rc = VERR_INVALID_PARAMETER;
238 }
239
240 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
241 return rc;
242}
243
244
245/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
246static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
247{
248 PDMDEV_ASSERT_DEVINS(pDevIns);
249 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
250 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
251 Port, cPorts));
252
253 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
254
255 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
256 return rc;
257}
258
259
260/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
261static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
262 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
263 const char *pszDesc)
264{
265 PDMDEV_ASSERT_DEVINS(pDevIns);
266 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
267 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
268 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
269
270/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
271 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
272
273 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
274 return rc;
275}
276
277
278/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
279static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
280 const char *pszWrite, const char *pszRead, const char *pszFill,
281 const char *pszDesc)
282{
283 PDMDEV_ASSERT_DEVINS(pDevIns);
284 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
285 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
286 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
287
288/** @todo pszDesc is unused here, drop it. */
289
290 /*
291 * Resolve the functions.
292 * Not all function have to present, leave it to IOM to enforce this.
293 */
294 int rc = VINF_SUCCESS;
295 if ( pDevIns->pReg->szRCMod[0]
296 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
297 {
298 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
299 if (pszWrite)
300 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
301
302 RTRCPTR RCPtrRead = NIL_RTRCPTR;
303 int rc2 = VINF_SUCCESS;
304 if (pszRead)
305 rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
306
307 RTRCPTR RCPtrFill = NIL_RTRCPTR;
308 int rc3 = VINF_SUCCESS;
309 if (pszFill)
310 rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
311
312 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
313 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
314 else
315 {
316 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
317 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
318 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
319 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
320 rc = rc2;
321 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
322 rc = rc3;
323 }
324 }
325 else
326 {
327 AssertMsgFailed(("No GC module for this driver!\n"));
328 rc = VERR_INVALID_PARAMETER;
329 }
330
331 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
332 return rc;
333}
334
335/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
336static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
337 const char *pszWrite, const char *pszRead, const char *pszFill,
338 const char *pszDesc)
339{
340 PDMDEV_ASSERT_DEVINS(pDevIns);
341 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
342 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
343 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
344
345/** @todo pszDesc is unused here, remove it. */
346
347 /*
348 * Resolve the functions.
349 * Not all function have to present, leave it to IOM to enforce this.
350 */
351 int rc = VINF_SUCCESS;
352 if ( pDevIns->pReg->szR0Mod[0]
353 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
354 {
355 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
356 if (pszWrite)
357 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
358 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
359 int rc2 = VINF_SUCCESS;
360 if (pszRead)
361 rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
362 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
363 int rc3 = VINF_SUCCESS;
364 if (pszFill)
365 rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
366 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
367 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
368 else
369 {
370 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
371 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
372 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
373 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
374 rc = rc2;
375 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
376 rc = rc3;
377 }
378 }
379 else
380 {
381 AssertMsgFailed(("No R0 module for this driver!\n"));
382 rc = VERR_INVALID_PARAMETER;
383 }
384
385 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
386 return rc;
387}
388
389
390/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
391static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
392{
393 PDMDEV_ASSERT_DEVINS(pDevIns);
394 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
395 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
396 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
397
398 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
399
400 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
401 return rc;
402}
403
404
405/**
406 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
407 */
408static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
409{
410 PDMDEV_ASSERT_DEVINS(pDevIns);
411 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
412 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
413 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
414
415/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
416 * use a real string cache. */
417 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
418
419 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
420 return rc;
421}
422
423
424/**
425 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
426 */
427static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
428{
429 PDMDEV_ASSERT_DEVINS(pDevIns);
430 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
431 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
432 pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
433
434 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
435
436 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
437
438 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
439 return rc;
440}
441
442
443/**
444 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
445 */
446static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
447{
448 PDMDEV_ASSERT_DEVINS(pDevIns);
449 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
450 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
451 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
452
453 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
454
455 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
456 return rc;
457}
458
459
460/**
461 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
462 */
463static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
464{
465 PDMDEV_ASSERT_DEVINS(pDevIns);
466 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
467 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
468 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
469
470 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
471
472 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
473 return rc;
474}
475
476
477/**
478 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
479 */
480static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
481 const char *pszDesc, PRTRCPTR pRCPtr)
482{
483 PDMDEV_ASSERT_DEVINS(pDevIns);
484 PVM pVM = pDevIns->Internal.s.pVMR3;
485 VM_ASSERT_EMT(pVM);
486 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
487 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
488
489 if (pDevIns->iInstance > 0)
490 {
491 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
492 if (pszDesc2)
493 pszDesc = pszDesc2;
494 }
495
496 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
497
498 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pRCPtr));
499 return rc;
500}
501
502
503/**
504 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
505 */
506static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
507 const char *pszDesc, PRTR0PTR pR0Ptr)
508{
509 PDMDEV_ASSERT_DEVINS(pDevIns);
510 PVM pVM = pDevIns->Internal.s.pVMR3;
511 VM_ASSERT_EMT(pVM);
512 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
513 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
514
515 if (pDevIns->iInstance > 0)
516 {
517 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
518 if (pszDesc2)
519 pszDesc = pszDesc2;
520 }
521
522 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
523
524 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pR0Ptr));
525 return rc;
526}
527
528
529/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
530static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
531 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
532{
533 PDMDEV_ASSERT_DEVINS(pDevIns);
534 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
535 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
536 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
537
538/** @todo can we mangle pszDesc? */
539 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
540
541 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
542 return rc;
543}
544
545
546/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
547static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
548{
549 PDMDEV_ASSERT_DEVINS(pDevIns);
550 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
551 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
552
553 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
554
555 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
556 return rc;
557}
558
559
560/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
561static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
562 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
563 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
564 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
565{
566 PDMDEV_ASSERT_DEVINS(pDevIns);
567 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
568 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
569 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
570 pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
571 pfnLivePrep, pfnLiveExec, pfnLiveVote,
572 pfnSavePrep, pfnSaveExec, pfnSaveDone,
573 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
574
575 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
576 uVersion, cbGuess, pszBefore,
577 pfnLivePrep, pfnLiveExec, pfnLiveVote,
578 pfnSavePrep, pfnSaveExec, pfnSaveDone,
579 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
580
581 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
582 return rc;
583}
584
585
586/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
587static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
588{
589 PDMDEV_ASSERT_DEVINS(pDevIns);
590 PVM pVM = pDevIns->Internal.s.pVMR3;
591 VM_ASSERT_EMT(pVM);
592 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
593 pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
594
595 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
596 {
597 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
598 if (pszDesc2)
599 pszDesc = pszDesc2;
600 }
601
602 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
603
604 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
605 return rc;
606}
607
608
609/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
610static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
611{
612 PDMDEV_ASSERT_DEVINS(pDevIns);
613 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
614 pDevIns->pReg->szName, pDevIns->iInstance, pTime));
615
616 pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
617
618 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
619 return pTime;
620}
621
622
623/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
624static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
625{
626 PDMDEV_ASSERT_DEVINS(pDevIns);
627 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'\n",
628 pDevIns->pReg->szName, pDevIns->iInstance));
629
630 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
631
632 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
633 return u64Time;
634}
635
636
637/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
638static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
639{
640 PDMDEV_ASSERT_DEVINS(pDevIns);
641 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'\n",
642 pDevIns->pReg->szName, pDevIns->iInstance));
643
644 uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
645
646 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
647 return u64Freq;
648}
649
650
651/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
652static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
653{
654 PDMDEV_ASSERT_DEVINS(pDevIns);
655 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'\n",
656 pDevIns->pReg->szName, pDevIns->iInstance));
657
658 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
659 uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
660
661 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
662 return u64Nano;
663}
664
665
666/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
667static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
668{
669 PDMDEV_ASSERT_DEVINS(pDevIns);
670 PVM pVM = pDevIns->Internal.s.pVMR3;
671 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
672 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
673
674#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
675 if (!VM_IS_EMT(pVM))
676 {
677 char szNames[128];
678 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
679 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
680 }
681#endif
682
683 int rc;
684 if (VM_IS_EMT(pVM))
685 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
686 else
687 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
688
689 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
690 return rc;
691}
692
693
694/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
695static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
696{
697 PDMDEV_ASSERT_DEVINS(pDevIns);
698 PVM pVM = pDevIns->Internal.s.pVMR3;
699 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
700 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
701
702#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
703 if (!VM_IS_EMT(pVM))
704 {
705 char szNames[128];
706 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
707 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
708 }
709#endif
710
711 int rc;
712 if (VM_IS_EMT(pVM))
713 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
714 else
715 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
716
717 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
718 return rc;
719}
720
721
722/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
723static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
724{
725 PDMDEV_ASSERT_DEVINS(pDevIns);
726 PVM pVM = pDevIns->Internal.s.pVMR3;
727 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
728 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
729 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
730
731#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
732 if (!VM_IS_EMT(pVM))
733 {
734 char szNames[128];
735 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
736 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
737 }
738#endif
739
740 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
741
742 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
743 return rc;
744}
745
746
747/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
748static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
749{
750 PDMDEV_ASSERT_DEVINS(pDevIns);
751 PVM pVM = pDevIns->Internal.s.pVMR3;
752 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
753 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
754 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
755
756#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
757 if (!VM_IS_EMT(pVM))
758 {
759 char szNames[128];
760 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
761 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
762 }
763#endif
764
765 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
766
767 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
768 return rc;
769}
770
771
772/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
773static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
774{
775 PDMDEV_ASSERT_DEVINS(pDevIns);
776 PVM pVM = pDevIns->Internal.s.pVMR3;
777 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
778 pDevIns->pReg->szName, pDevIns->iInstance, pLock));
779
780 PGMPhysReleasePageMappingLock(pVM, pLock);
781
782 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
783}
784
785
786/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
787static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
788{
789 PDMDEV_ASSERT_DEVINS(pDevIns);
790 PVM pVM = pDevIns->Internal.s.pVMR3;
791 VM_ASSERT_EMT(pVM);
792 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
793 pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
794
795 PVMCPU pVCpu = VMMGetCpu(pVM);
796 if (!pVCpu)
797 return VERR_ACCESS_DENIED;
798#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
799 /** @todo SMP. */
800#endif
801
802 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
803
804 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
805
806 return rc;
807}
808
809
810/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
811static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
812{
813 PDMDEV_ASSERT_DEVINS(pDevIns);
814 PVM pVM = pDevIns->Internal.s.pVMR3;
815 VM_ASSERT_EMT(pVM);
816 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
817 pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
818
819 PVMCPU pVCpu = VMMGetCpu(pVM);
820 if (!pVCpu)
821 return VERR_ACCESS_DENIED;
822#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
823 /** @todo SMP. */
824#endif
825
826 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
827
828 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
829
830 return rc;
831}
832
833
834/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
835static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
836{
837 PDMDEV_ASSERT_DEVINS(pDevIns);
838 PVM pVM = pDevIns->Internal.s.pVMR3;
839 VM_ASSERT_EMT(pVM);
840 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
841 pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
842
843 PVMCPU pVCpu = VMMGetCpu(pVM);
844 if (!pVCpu)
845 return VERR_ACCESS_DENIED;
846#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
847 /** @todo SMP. */
848#endif
849
850 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
851
852 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pGCPhys));
853
854 return rc;
855}
856
857
858/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
859static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
860{
861 PDMDEV_ASSERT_DEVINS(pDevIns);
862 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
863
864 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
865
866 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
867 return pv;
868}
869
870
871/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
872static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
873{
874 PDMDEV_ASSERT_DEVINS(pDevIns);
875 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
876
877 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
878
879 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
880 return pv;
881}
882
883
884/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
885static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
886{
887 PDMDEV_ASSERT_DEVINS(pDevIns);
888 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
889
890 MMR3HeapFree(pv);
891
892 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
893}
894
895
896/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
897static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
898{
899 PDMDEV_ASSERT_DEVINS(pDevIns);
900
901 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
902
903 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
904 enmVMState, VMR3GetStateName(enmVMState)));
905 return enmVMState;
906}
907
908
909/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
910static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
911{
912 PDMDEV_ASSERT_DEVINS(pDevIns);
913
914 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
915
916 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
917 fRc));
918 return fRc;
919}
920
921
922/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
923static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
924{
925 PDMDEV_ASSERT_DEVINS(pDevIns);
926 va_list args;
927 va_start(args, pszFormat);
928 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
929 va_end(args);
930 return rc;
931}
932
933
934/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
935static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
936{
937 PDMDEV_ASSERT_DEVINS(pDevIns);
938 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
939 return rc;
940}
941
942
943/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
944static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
945{
946 PDMDEV_ASSERT_DEVINS(pDevIns);
947 va_list args;
948 va_start(args, pszFormat);
949 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
950 va_end(args);
951 return rc;
952}
953
954
955/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
956static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
957{
958 PDMDEV_ASSERT_DEVINS(pDevIns);
959 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
960 return rc;
961}
962
963
964/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
965static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
966{
967 PDMDEV_ASSERT_DEVINS(pDevIns);
968#ifdef LOG_ENABLED
969 va_list va2;
970 va_copy(va2, args);
971 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
972 pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
973 va_end(va2);
974#endif
975
976 PVM pVM = pDevIns->Internal.s.pVMR3;
977 VM_ASSERT_EMT(pVM);
978 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
979 if (rc == VERR_DBGF_NOT_ATTACHED)
980 rc = VINF_SUCCESS;
981
982 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
983 return rc;
984}
985
986
987/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
988static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
989{
990 PDMDEV_ASSERT_DEVINS(pDevIns);
991 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
992 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
993
994 PVM pVM = pDevIns->Internal.s.pVMR3;
995 VM_ASSERT_EMT(pVM);
996 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
997
998 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
999 return rc;
1000}
1001
1002
1003/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1004static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1005{
1006 PDMDEV_ASSERT_DEVINS(pDevIns);
1007 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1008 LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1009 return hTraceBuf;
1010}
1011
1012
1013/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1014static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1015{
1016 PDMDEV_ASSERT_DEVINS(pDevIns);
1017 PVM pVM = pDevIns->Internal.s.pVMR3;
1018 VM_ASSERT_EMT(pVM);
1019
1020 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1021 NOREF(pVM);
1022}
1023
1024
1025
1026/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1027static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1028 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1029{
1030 PDMDEV_ASSERT_DEVINS(pDevIns);
1031 PVM pVM = pDevIns->Internal.s.pVMR3;
1032 VM_ASSERT_EMT(pVM);
1033
1034 va_list args;
1035 va_start(args, pszName);
1036 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1037 va_end(args);
1038 AssertRC(rc);
1039
1040 NOREF(pVM);
1041}
1042
1043
1044/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1045static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1046 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1047{
1048 PDMDEV_ASSERT_DEVINS(pDevIns);
1049 PVM pVM = pDevIns->Internal.s.pVMR3;
1050 VM_ASSERT_EMT(pVM);
1051
1052 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1053 AssertRC(rc);
1054
1055 NOREF(pVM);
1056}
1057
1058
1059/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
1060static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1061{
1062 PDMDEV_ASSERT_DEVINS(pDevIns);
1063 PVM pVM = pDevIns->Internal.s.pVMR3;
1064 VM_ASSERT_EMT(pVM);
1065 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
1066 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
1067
1068 /*
1069 * Validate input.
1070 */
1071 if (!pPciDev)
1072 {
1073 Assert(pPciDev);
1074 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1075 return VERR_INVALID_PARAMETER;
1076 }
1077 if (!pPciDev->config[0] && !pPciDev->config[1])
1078 {
1079 Assert(pPciDev->config[0] || pPciDev->config[1]);
1080 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1081 return VERR_INVALID_PARAMETER;
1082 }
1083 if (pDevIns->Internal.s.pPciDeviceR3)
1084 {
1085 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1086 * support a PDM device with multiple PCI devices. This might become a problem
1087 * when upgrading the chipset for instance because of multiple functions in some
1088 * devices...
1089 */
1090 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1091 return VERR_INTERNAL_ERROR;
1092 }
1093
1094 /*
1095 * Choose the PCI bus for the device.
1096 *
1097 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1098 * configuration value will be set. If not the default bus is 0.
1099 */
1100 int rc;
1101 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1102 if (!pBus)
1103 {
1104 uint8_t u8Bus;
1105 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1106 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1107 rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1108 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1109 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1110 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1111 VERR_PDM_NO_PCI_BUS);
1112 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1113 }
1114 if (pBus->pDevInsR3)
1115 {
1116 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1117 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1118 else
1119 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1120
1121 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1122 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1123 else
1124 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1125
1126 /*
1127 * Check the configuration for PCI device and function assignment.
1128 */
1129 int iDev = -1;
1130 uint8_t u8Device;
1131 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1132 if (RT_SUCCESS(rc))
1133 {
1134 if (u8Device > 31)
1135 {
1136 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1137 u8Device, pDevIns->pReg->szName, pDevIns->iInstance));
1138 return VERR_INTERNAL_ERROR;
1139 }
1140
1141 uint8_t u8Function;
1142 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1143 if (RT_FAILURE(rc))
1144 {
1145 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1146 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1147 return rc;
1148 }
1149 if (u8Function > 7)
1150 {
1151 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1152 u8Function, pDevIns->pReg->szName, pDevIns->iInstance));
1153 return VERR_INTERNAL_ERROR;
1154 }
1155 iDev = (u8Device << 3) | u8Function;
1156 }
1157 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1158 {
1159 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1160 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1161 return rc;
1162 }
1163
1164 /*
1165 * Call the pci bus device to do the actual registration.
1166 */
1167 pdmLock(pVM);
1168 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1169 pdmUnlock(pVM);
1170 if (RT_SUCCESS(rc))
1171 {
1172 pPciDev->pDevIns = pDevIns;
1173
1174 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1175 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1176 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1177 else
1178 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1179
1180 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1181 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1182 else
1183 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1184
1185 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1186 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1187 }
1188 }
1189 else
1190 {
1191 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1192 rc = VERR_PDM_NO_PCI_BUS;
1193 }
1194
1195 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1196 return rc;
1197}
1198
1199
1200/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1201static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1202{
1203 PDMDEV_ASSERT_DEVINS(pDevIns);
1204 PVM pVM = pDevIns->Internal.s.pVMR3;
1205 VM_ASSERT_EMT(pVM);
1206 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1207 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1208
1209 /*
1210 * Validate input.
1211 */
1212 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1213 {
1214 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1215 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1216 return VERR_INVALID_PARAMETER;
1217 }
1218 switch ((int)enmType)
1219 {
1220 case PCI_ADDRESS_SPACE_IO:
1221 /*
1222 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1223 */
1224 AssertMsgReturn(cbRegion <= _32K,
1225 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1226 VERR_INVALID_PARAMETER);
1227 break;
1228
1229 case PCI_ADDRESS_SPACE_MEM:
1230 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1231 case PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64:
1232 case PCI_ADDRESS_SPACE_MEM_PREFETCH | PCI_ADDRESS_SPACE_BAR64:
1233 /*
1234 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1235 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1236 */
1237 AssertMsgReturn(cbRegion <= 512 * _1M,
1238 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1239 VERR_INVALID_PARAMETER);
1240 break;
1241 default:
1242 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1243 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1244 return VERR_INVALID_PARAMETER;
1245 }
1246 if (!pfnCallback)
1247 {
1248 Assert(pfnCallback);
1249 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1250 return VERR_INVALID_PARAMETER;
1251 }
1252 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1253
1254 /*
1255 * Must have a PCI device registered!
1256 */
1257 int rc;
1258 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1259 if (pPciDev)
1260 {
1261 /*
1262 * We're currently restricted to page aligned MMIO regions.
1263 */
1264 if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1265 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1266 {
1267 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1268 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1269 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1270 }
1271
1272 /*
1273 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1274 */
1275 int iLastSet = ASMBitLastSetU32(cbRegion);
1276 Assert(iLastSet > 0);
1277 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1278 if (cbRegion > cbRegionAligned)
1279 cbRegion = cbRegionAligned * 2; /* round up */
1280
1281 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1282 Assert(pBus);
1283 pdmLock(pVM);
1284 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1285 pdmUnlock(pVM);
1286 }
1287 else
1288 {
1289 AssertMsgFailed(("No PCI device registered!\n"));
1290 rc = VERR_PDM_NOT_PCI_DEVICE;
1291 }
1292
1293 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1294 return rc;
1295}
1296
1297
1298/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1299static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1300 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1301{
1302 PDMDEV_ASSERT_DEVINS(pDevIns);
1303 PVM pVM = pDevIns->Internal.s.pVMR3;
1304 VM_ASSERT_EMT(pVM);
1305 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1306 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1307
1308 /*
1309 * Validate input and resolve defaults.
1310 */
1311 AssertPtr(pfnRead);
1312 AssertPtr(pfnWrite);
1313 AssertPtrNull(ppfnReadOld);
1314 AssertPtrNull(ppfnWriteOld);
1315 AssertPtrNull(pPciDev);
1316
1317 if (!pPciDev)
1318 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1319 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1320 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1321 AssertRelease(pBus);
1322 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1323
1324 /*
1325 * Do the job.
1326 */
1327 pdmLock(pVM);
1328 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1329 pdmUnlock(pVM);
1330
1331 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1332}
1333
1334
1335/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1336static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1337{
1338 PDMDEV_ASSERT_DEVINS(pDevIns);
1339 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1340
1341 /*
1342 * Validate input.
1343 */
1344 /** @todo iIrq and iLevel checks. */
1345
1346 /*
1347 * Must have a PCI device registered!
1348 */
1349 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1350 if (pPciDev)
1351 {
1352 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1353 Assert(pBus);
1354 PVM pVM = pDevIns->Internal.s.pVMR3;
1355 pdmLock(pVM);
1356 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1357 pdmUnlock(pVM);
1358 }
1359 else
1360 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1361
1362 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1363}
1364
1365
1366/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1367static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1368{
1369 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1370}
1371
1372
1373/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1374static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
1375{
1376 PDMDEV_ASSERT_DEVINS(pDevIns);
1377 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: %d MSI vectors %d MSI-X vectors\n", pDevIns->pReg->szName, pDevIns->iInstance, pMsiReg->cMsiVectors,pMsiReg->cMsixVectors ));
1378 int rc = VINF_SUCCESS;
1379
1380 /*
1381 * Must have a PCI device registered!
1382 */
1383 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1384 if (pPciDev)
1385 {
1386 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1387 Assert(pBus);
1388
1389 PVM pVM = pDevIns->Internal.s.pVMR3;
1390 pdmLock(pVM);
1391 if (!pBus->pfnRegisterMsiR3)
1392 rc = VERR_NOT_IMPLEMENTED;
1393 else
1394 rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1395 pdmUnlock(pVM);
1396 }
1397 else
1398 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1399
1400 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1401 return rc;
1402}
1403
1404/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1405static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1406{
1407 PDMDEV_ASSERT_DEVINS(pDevIns);
1408 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1409
1410 /*
1411 * Validate input.
1412 */
1413 /** @todo iIrq and iLevel checks. */
1414
1415 PVM pVM = pDevIns->Internal.s.pVMR3;
1416 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1417
1418 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1419}
1420
1421
1422/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1423static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1424{
1425 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1426}
1427
1428
1429/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1430static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1431{
1432 PDMDEV_ASSERT_DEVINS(pDevIns);
1433 PVM pVM = pDevIns->Internal.s.pVMR3;
1434 VM_ASSERT_EMT(pVM);
1435 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1436 pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1437
1438 /*
1439 * Lookup the LUN, it might already be registered.
1440 */
1441 PPDMLUN pLunPrev = NULL;
1442 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1443 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1444 if (pLun->iLun == iLun)
1445 break;
1446
1447 /*
1448 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1449 */
1450 if (!pLun)
1451 {
1452 if ( !pBaseInterface
1453 || !pszDesc
1454 || !*pszDesc)
1455 {
1456 Assert(pBaseInterface);
1457 Assert(pszDesc || *pszDesc);
1458 return VERR_INVALID_PARAMETER;
1459 }
1460
1461 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1462 if (!pLun)
1463 return VERR_NO_MEMORY;
1464
1465 pLun->iLun = iLun;
1466 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1467 pLun->pTop = NULL;
1468 pLun->pBottom = NULL;
1469 pLun->pDevIns = pDevIns;
1470 pLun->pUsbIns = NULL;
1471 pLun->pszDesc = pszDesc;
1472 pLun->pBase = pBaseInterface;
1473 if (!pLunPrev)
1474 pDevIns->Internal.s.pLunsR3 = pLun;
1475 else
1476 pLunPrev->pNext = pLun;
1477 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1478 iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1479 }
1480 else if (pLun->pTop)
1481 {
1482 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1483 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1484 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1485 }
1486 Assert(pLun->pBase == pBaseInterface);
1487
1488
1489 /*
1490 * Get the attached driver configuration.
1491 */
1492 int rc;
1493 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1494 if (pNode)
1495 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
1496 else
1497 rc = VERR_PDM_NO_ATTACHED_DRIVER;
1498
1499
1500 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1501 return rc;
1502}
1503
1504
1505/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1506static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1507 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1508{
1509 PDMDEV_ASSERT_DEVINS(pDevIns);
1510 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1511 pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1512
1513 PVM pVM = pDevIns->Internal.s.pVMR3;
1514 VM_ASSERT_EMT(pVM);
1515
1516 if (pDevIns->iInstance > 0)
1517 {
1518 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1519 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1520 }
1521
1522 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1523
1524 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppQueue));
1525 return rc;
1526}
1527
1528
1529/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1530static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1531 const char *pszNameFmt, va_list va)
1532{
1533 PDMDEV_ASSERT_DEVINS(pDevIns);
1534 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1535 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1536
1537 PVM pVM = pDevIns->Internal.s.pVMR3;
1538 VM_ASSERT_EMT(pVM);
1539 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1540
1541 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1542 return rc;
1543}
1544
1545
1546/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1547static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1548 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1549{
1550 PDMDEV_ASSERT_DEVINS(pDevIns);
1551 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1552 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1553 pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1554
1555 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1556
1557 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1558 rc, *ppThread));
1559 return rc;
1560}
1561
1562
1563/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1564static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1565{
1566 PDMDEV_ASSERT_DEVINS(pDevIns);
1567 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1568 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1569
1570 int rc = VINF_SUCCESS;
1571 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1572 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1573 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1574 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1575 AssertStmt( enmVMState == VMSTATE_SUSPENDING
1576 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1577 || enmVMState == VMSTATE_SUSPENDING_LS
1578 || enmVMState == VMSTATE_RESETTING
1579 || enmVMState == VMSTATE_RESETTING_LS
1580 || enmVMState == VMSTATE_POWERING_OFF
1581 || enmVMState == VMSTATE_POWERING_OFF_LS,
1582 rc = VERR_INVALID_STATE);
1583
1584 if (RT_SUCCESS(rc))
1585 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1586
1587 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1588 return rc;
1589}
1590
1591
1592/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1593static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1594{
1595 PDMDEV_ASSERT_DEVINS(pDevIns);
1596 PVM pVM = pDevIns->Internal.s.pVMR3;
1597
1598 VMSTATE enmVMState = VMR3GetState(pVM);
1599 if ( enmVMState == VMSTATE_SUSPENDING
1600 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1601 || enmVMState == VMSTATE_SUSPENDING_LS
1602 || enmVMState == VMSTATE_RESETTING
1603 || enmVMState == VMSTATE_RESETTING_LS
1604 || enmVMState == VMSTATE_POWERING_OFF
1605 || enmVMState == VMSTATE_POWERING_OFF_LS)
1606 {
1607 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1608 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1609 }
1610 else
1611 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1612}
1613
1614
1615/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1616static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1617{
1618 PDMDEV_ASSERT_DEVINS(pDevIns);
1619 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1620 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1621 pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1622 pRtcReg->pfnWrite, ppRtcHlp));
1623
1624 /*
1625 * Validate input.
1626 */
1627 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1628 {
1629 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1630 PDM_RTCREG_VERSION));
1631 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1632 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1633 return VERR_INVALID_PARAMETER;
1634 }
1635 if ( !pRtcReg->pfnWrite
1636 || !pRtcReg->pfnRead)
1637 {
1638 Assert(pRtcReg->pfnWrite);
1639 Assert(pRtcReg->pfnRead);
1640 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1641 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1642 return VERR_INVALID_PARAMETER;
1643 }
1644
1645 if (!ppRtcHlp)
1646 {
1647 Assert(ppRtcHlp);
1648 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1649 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1650 return VERR_INVALID_PARAMETER;
1651 }
1652
1653 /*
1654 * Only one DMA device.
1655 */
1656 PVM pVM = pDevIns->Internal.s.pVMR3;
1657 if (pVM->pdm.s.pRtc)
1658 {
1659 AssertMsgFailed(("Only one RTC device is supported!\n"));
1660 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1661 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1662 return VERR_INVALID_PARAMETER;
1663 }
1664
1665 /*
1666 * Allocate and initialize pci bus structure.
1667 */
1668 int rc = VINF_SUCCESS;
1669 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1670 if (pRtc)
1671 {
1672 pRtc->pDevIns = pDevIns;
1673 pRtc->Reg = *pRtcReg;
1674 pVM->pdm.s.pRtc = pRtc;
1675
1676 /* set the helper pointer. */
1677 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1678 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1679 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1680 }
1681 else
1682 rc = VERR_NO_MEMORY;
1683
1684 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1685 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1686 return rc;
1687}
1688
1689
1690/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1691static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1692{
1693 PDMDEV_ASSERT_DEVINS(pDevIns);
1694 PVM pVM = pDevIns->Internal.s.pVMR3;
1695 VM_ASSERT_EMT(pVM);
1696 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1697 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1698 int rc = VINF_SUCCESS;
1699 if (pVM->pdm.s.pDmac)
1700 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1701 else
1702 {
1703 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1704 rc = VERR_PDM_NO_DMAC_INSTANCE;
1705 }
1706 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1707 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1708 return rc;
1709}
1710
1711
1712/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1713static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
1714{
1715 PDMDEV_ASSERT_DEVINS(pDevIns);
1716 PVM pVM = pDevIns->Internal.s.pVMR3;
1717 VM_ASSERT_EMT(pVM);
1718 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1719 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1720 int rc = VINF_SUCCESS;
1721 if (pVM->pdm.s.pDmac)
1722 {
1723 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1724 if (pcbRead)
1725 *pcbRead = cb;
1726 }
1727 else
1728 {
1729 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1730 rc = VERR_PDM_NO_DMAC_INSTANCE;
1731 }
1732 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1733 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1734 return rc;
1735}
1736
1737
1738/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1739static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
1740{
1741 PDMDEV_ASSERT_DEVINS(pDevIns);
1742 PVM pVM = pDevIns->Internal.s.pVMR3;
1743 VM_ASSERT_EMT(pVM);
1744 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1745 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1746 int rc = VINF_SUCCESS;
1747 if (pVM->pdm.s.pDmac)
1748 {
1749 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1750 if (pcbWritten)
1751 *pcbWritten = cb;
1752 }
1753 else
1754 {
1755 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1756 rc = VERR_PDM_NO_DMAC_INSTANCE;
1757 }
1758 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1759 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1760 return rc;
1761}
1762
1763
1764/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1765static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1766{
1767 PDMDEV_ASSERT_DEVINS(pDevIns);
1768 PVM pVM = pDevIns->Internal.s.pVMR3;
1769 VM_ASSERT_EMT(pVM);
1770 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1771 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1772 int rc = VINF_SUCCESS;
1773 if (pVM->pdm.s.pDmac)
1774 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1775 else
1776 {
1777 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1778 rc = VERR_PDM_NO_DMAC_INSTANCE;
1779 }
1780 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1781 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1782 return rc;
1783}
1784
1785/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1786static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1787{
1788 PDMDEV_ASSERT_DEVINS(pDevIns);
1789 PVM pVM = pDevIns->Internal.s.pVMR3;
1790 VM_ASSERT_EMT(pVM);
1791 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1792 pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
1793 uint8_t u8Mode;
1794 if (pVM->pdm.s.pDmac)
1795 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1796 else
1797 {
1798 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1799 u8Mode = 3 << 2 /* illegal mode type */;
1800 }
1801 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1802 pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
1803 return u8Mode;
1804}
1805
1806/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1807static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1808{
1809 PDMDEV_ASSERT_DEVINS(pDevIns);
1810 PVM pVM = pDevIns->Internal.s.pVMR3;
1811 VM_ASSERT_EMT(pVM);
1812 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1813 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1814
1815 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1816 VM_FF_SET(pVM, VM_FF_PDM_DMA);
1817 REMR3NotifyDmaPending(pVM);
1818 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1819}
1820
1821
1822/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1823static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1824{
1825 PDMDEV_ASSERT_DEVINS(pDevIns);
1826 PVM pVM = pDevIns->Internal.s.pVMR3;
1827 VM_ASSERT_EMT(pVM);
1828
1829 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1830 pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
1831 int rc;
1832 if (pVM->pdm.s.pRtc)
1833 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1834 else
1835 rc = VERR_PDM_NO_RTC_INSTANCE;
1836
1837 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1838 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1839 return rc;
1840}
1841
1842
1843/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1844static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1845{
1846 PDMDEV_ASSERT_DEVINS(pDevIns);
1847 PVM pVM = pDevIns->Internal.s.pVMR3;
1848 VM_ASSERT_EMT(pVM);
1849
1850 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1851 pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
1852 int rc;
1853 if (pVM->pdm.s.pRtc)
1854 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1855 else
1856 rc = VERR_PDM_NO_RTC_INSTANCE;
1857
1858 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1859 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1860 return rc;
1861}
1862
1863
1864/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1865static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1866{
1867 PDMDEV_ASSERT_DEVINS(pDevIns);
1868 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1869 return true;
1870
1871 char szMsg[100];
1872 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1873 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1874 AssertBreakpoint();
1875 return false;
1876}
1877
1878
1879/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1880static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1881{
1882 PDMDEV_ASSERT_DEVINS(pDevIns);
1883 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1884 return true;
1885
1886 char szMsg[100];
1887 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1888 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1889 AssertBreakpoint();
1890 return false;
1891}
1892
1893
1894/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
1895static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1896 const char *pszSymPrefix, const char *pszSymList)
1897{
1898 PDMDEV_ASSERT_DEVINS(pDevIns);
1899 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1900 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1901 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1902
1903 int rc;
1904 if ( strncmp(pszSymPrefix, "dev", 3) == 0
1905 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1906 {
1907 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1908 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
1909 pvInterface, cbInterface,
1910 pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
1911 pszSymPrefix, pszSymList,
1912 false /*fRing0OrRC*/);
1913 else
1914 {
1915 AssertMsgFailed(("Not a raw-mode enabled driver\n"));
1916 rc = VERR_PERMISSION_DENIED;
1917 }
1918 }
1919 else
1920 {
1921 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1922 pszSymPrefix, pDevIns->pReg->szName));
1923 rc = VERR_INVALID_NAME;
1924 }
1925
1926 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1927 pDevIns->iInstance, rc));
1928 return rc;
1929}
1930
1931
1932/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
1933static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1934 const char *pszSymPrefix, const char *pszSymList)
1935{
1936 PDMDEV_ASSERT_DEVINS(pDevIns);
1937 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1938 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1939 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1940
1941 int rc;
1942 if ( strncmp(pszSymPrefix, "dev", 3) == 0
1943 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1944 {
1945 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1946 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
1947 pvInterface, cbInterface,
1948 pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
1949 pszSymPrefix, pszSymList,
1950 true /*fRing0OrRC*/);
1951 else
1952 {
1953 AssertMsgFailed(("Not a ring-0 enabled driver\n"));
1954 rc = VERR_PERMISSION_DENIED;
1955 }
1956 }
1957 else
1958 {
1959 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1960 pszSymPrefix, pDevIns->pReg->szName));
1961 rc = VERR_INVALID_NAME;
1962 }
1963
1964 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1965 pDevIns->iInstance, rc));
1966 return rc;
1967}
1968
1969
1970/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
1971static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
1972{
1973 PDMDEV_ASSERT_DEVINS(pDevIns);
1974 PVM pVM = pDevIns->Internal.s.pVMR3;
1975 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1976 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
1977 pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
1978
1979 /*
1980 * Resolve the ring-0 entry point. There is not need to remember this like
1981 * we do for drivers since this is mainly for construction time hacks and
1982 * other things that aren't performance critical.
1983 */
1984 int rc;
1985 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1986 {
1987 char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
1988 strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
1989 szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
1990
1991 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
1992 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
1993 if (RT_SUCCESS(rc))
1994 {
1995 /*
1996 * Make the ring-0 call.
1997 */
1998 PDMDEVICECALLREQHANDLERREQ Req;
1999 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2000 Req.Hdr.cbReq = sizeof(Req);
2001 Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2002 Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2003 Req.uOperation = uOperation;
2004 Req.u32Alignment = 0;
2005 Req.u64Arg = u64Arg;
2006 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2007 }
2008 else
2009 pfnReqHandlerR0 = NIL_RTR0PTR;
2010 }
2011 else
2012 rc = VERR_ACCESS_DENIED;
2013 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2014 pDevIns->iInstance, rc));
2015 return rc;
2016}
2017
2018
2019/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2020static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2021{
2022 PDMDEV_ASSERT_DEVINS(pDevIns);
2023 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2024 return pDevIns->Internal.s.pVMR3;
2025}
2026
2027
2028/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2029static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2030{
2031 PDMDEV_ASSERT_DEVINS(pDevIns);
2032 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2033 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2034 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2035}
2036
2037
2038/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2039static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2040{
2041 PDMDEV_ASSERT_DEVINS(pDevIns);
2042 PVM pVM = pDevIns->Internal.s.pVMR3;
2043 VM_ASSERT_EMT(pVM);
2044 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
2045 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
2046 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2047 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
2048 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
2049
2050 /*
2051 * Validate the structure.
2052 */
2053 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2054 {
2055 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2056 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2057 return VERR_INVALID_PARAMETER;
2058 }
2059 if ( !pPciBusReg->pfnRegisterR3
2060 || !pPciBusReg->pfnIORegionRegisterR3
2061 || !pPciBusReg->pfnSetIrqR3
2062 || !pPciBusReg->pfnSaveExecR3
2063 || !pPciBusReg->pfnLoadExecR3
2064 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
2065 {
2066 Assert(pPciBusReg->pfnRegisterR3);
2067 Assert(pPciBusReg->pfnIORegionRegisterR3);
2068 Assert(pPciBusReg->pfnSetIrqR3);
2069 Assert(pPciBusReg->pfnSaveExecR3);
2070 Assert(pPciBusReg->pfnLoadExecR3);
2071 Assert(pPciBusReg->pfnFakePCIBIOSR3);
2072 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2073 return VERR_INVALID_PARAMETER;
2074 }
2075 if ( pPciBusReg->pszSetIrqRC
2076 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
2077 {
2078 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2079 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2080 return VERR_INVALID_PARAMETER;
2081 }
2082 if ( pPciBusReg->pszSetIrqR0
2083 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2084 {
2085 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2086 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2087 return VERR_INVALID_PARAMETER;
2088 }
2089 if (!ppPciHlpR3)
2090 {
2091 Assert(ppPciHlpR3);
2092 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2093 return VERR_INVALID_PARAMETER;
2094 }
2095
2096 /*
2097 * Find free PCI bus entry.
2098 */
2099 unsigned iBus = 0;
2100 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2101 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2102 break;
2103 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2104 {
2105 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2106 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2107 return VERR_INVALID_PARAMETER;
2108 }
2109 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2110
2111 /*
2112 * Resolve and init the RC bits.
2113 */
2114 if (pPciBusReg->pszSetIrqRC)
2115 {
2116 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2117 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2118 if (RT_FAILURE(rc))
2119 {
2120 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2121 return rc;
2122 }
2123 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2124 }
2125 else
2126 {
2127 pPciBus->pfnSetIrqRC = 0;
2128 pPciBus->pDevInsRC = 0;
2129 }
2130
2131 /*
2132 * Resolve and init the R0 bits.
2133 */
2134 if (pPciBusReg->pszSetIrqR0)
2135 {
2136 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2137 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2138 if (RT_FAILURE(rc))
2139 {
2140 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2141 return rc;
2142 }
2143 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2144 }
2145 else
2146 {
2147 pPciBus->pfnSetIrqR0 = 0;
2148 pPciBus->pDevInsR0 = 0;
2149 }
2150
2151 /*
2152 * Init the R3 bits.
2153 */
2154 pPciBus->iBus = iBus;
2155 pPciBus->pDevInsR3 = pDevIns;
2156 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2157 pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2158 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2159 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2160 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2161 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
2162 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
2163 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2164
2165 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2166
2167 /* set the helper pointer and return. */
2168 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2169 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2170 return VINF_SUCCESS;
2171}
2172
2173
2174/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2175static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2176{
2177 PDMDEV_ASSERT_DEVINS(pDevIns);
2178 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2179 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2180 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2181 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2182 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2183 ppPicHlpR3));
2184
2185 /*
2186 * Validate input.
2187 */
2188 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2189 {
2190 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2191 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2192 return VERR_INVALID_PARAMETER;
2193 }
2194 if ( !pPicReg->pfnSetIrqR3
2195 || !pPicReg->pfnGetInterruptR3)
2196 {
2197 Assert(pPicReg->pfnSetIrqR3);
2198 Assert(pPicReg->pfnGetInterruptR3);
2199 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2200 return VERR_INVALID_PARAMETER;
2201 }
2202 if ( ( pPicReg->pszSetIrqRC
2203 || pPicReg->pszGetInterruptRC)
2204 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
2205 || !VALID_PTR(pPicReg->pszGetInterruptRC))
2206 )
2207 {
2208 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2209 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2210 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2211 return VERR_INVALID_PARAMETER;
2212 }
2213 if ( pPicReg->pszSetIrqRC
2214 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2215 {
2216 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2217 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2218 return VERR_INVALID_PARAMETER;
2219 }
2220 if ( pPicReg->pszSetIrqR0
2221 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2222 {
2223 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2224 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2225 return VERR_INVALID_PARAMETER;
2226 }
2227 if (!ppPicHlpR3)
2228 {
2229 Assert(ppPicHlpR3);
2230 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2231 return VERR_INVALID_PARAMETER;
2232 }
2233
2234 /*
2235 * Only one PIC device.
2236 */
2237 PVM pVM = pDevIns->Internal.s.pVMR3;
2238 if (pVM->pdm.s.Pic.pDevInsR3)
2239 {
2240 AssertMsgFailed(("Only one pic device is supported!\n"));
2241 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2242 return VERR_INVALID_PARAMETER;
2243 }
2244
2245 /*
2246 * RC stuff.
2247 */
2248 if (pPicReg->pszSetIrqRC)
2249 {
2250 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2251 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2252 if (RT_SUCCESS(rc))
2253 {
2254 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2255 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2256 }
2257 if (RT_FAILURE(rc))
2258 {
2259 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2260 return rc;
2261 }
2262 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2263 }
2264 else
2265 {
2266 pVM->pdm.s.Pic.pDevInsRC = 0;
2267 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2268 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2269 }
2270
2271 /*
2272 * R0 stuff.
2273 */
2274 if (pPicReg->pszSetIrqR0)
2275 {
2276 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2277 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2278 if (RT_SUCCESS(rc))
2279 {
2280 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2281 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2282 }
2283 if (RT_FAILURE(rc))
2284 {
2285 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2286 return rc;
2287 }
2288 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2289 Assert(pVM->pdm.s.Pic.pDevInsR0);
2290 }
2291 else
2292 {
2293 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2294 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2295 pVM->pdm.s.Pic.pDevInsR0 = 0;
2296 }
2297
2298 /*
2299 * R3 stuff.
2300 */
2301 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2302 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2303 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2304 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2305
2306 /* set the helper pointer and return. */
2307 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2308 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2309 return VINF_SUCCESS;
2310}
2311
2312
2313/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2314static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2315{
2316 PDMDEV_ASSERT_DEVINS(pDevIns);
2317 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2318 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2319 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2320 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2321 pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2322 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2323 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2324 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2325 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2326
2327 /*
2328 * Validate input.
2329 */
2330 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2331 {
2332 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2333 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2334 return VERR_INVALID_PARAMETER;
2335 }
2336 if ( !pApicReg->pfnGetInterruptR3
2337 || !pApicReg->pfnHasPendingIrqR3
2338 || !pApicReg->pfnSetBaseR3
2339 || !pApicReg->pfnGetBaseR3
2340 || !pApicReg->pfnSetTPRR3
2341 || !pApicReg->pfnGetTPRR3
2342 || !pApicReg->pfnWriteMSRR3
2343 || !pApicReg->pfnReadMSRR3
2344 || !pApicReg->pfnBusDeliverR3
2345 || !pApicReg->pfnLocalInterruptR3)
2346 {
2347 Assert(pApicReg->pfnGetInterruptR3);
2348 Assert(pApicReg->pfnHasPendingIrqR3);
2349 Assert(pApicReg->pfnSetBaseR3);
2350 Assert(pApicReg->pfnGetBaseR3);
2351 Assert(pApicReg->pfnSetTPRR3);
2352 Assert(pApicReg->pfnGetTPRR3);
2353 Assert(pApicReg->pfnWriteMSRR3);
2354 Assert(pApicReg->pfnReadMSRR3);
2355 Assert(pApicReg->pfnBusDeliverR3);
2356 Assert(pApicReg->pfnLocalInterruptR3);
2357 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2358 return VERR_INVALID_PARAMETER;
2359 }
2360 if ( ( pApicReg->pszGetInterruptRC
2361 || pApicReg->pszHasPendingIrqRC
2362 || pApicReg->pszSetBaseRC
2363 || pApicReg->pszGetBaseRC
2364 || pApicReg->pszSetTPRRC
2365 || pApicReg->pszGetTPRRC
2366 || pApicReg->pszWriteMSRRC
2367 || pApicReg->pszReadMSRRC
2368 || pApicReg->pszBusDeliverRC
2369 || pApicReg->pszLocalInterruptRC)
2370 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2371 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2372 || !VALID_PTR(pApicReg->pszSetBaseRC)
2373 || !VALID_PTR(pApicReg->pszGetBaseRC)
2374 || !VALID_PTR(pApicReg->pszSetTPRRC)
2375 || !VALID_PTR(pApicReg->pszGetTPRRC)
2376 || !VALID_PTR(pApicReg->pszWriteMSRRC)
2377 || !VALID_PTR(pApicReg->pszReadMSRRC)
2378 || !VALID_PTR(pApicReg->pszBusDeliverRC)
2379 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
2380 )
2381 {
2382 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2383 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2384 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2385 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2386 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2387 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2388 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2389 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2390 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2391 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2392 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2393 return VERR_INVALID_PARAMETER;
2394 }
2395 if ( ( pApicReg->pszGetInterruptR0
2396 || pApicReg->pszHasPendingIrqR0
2397 || pApicReg->pszSetBaseR0
2398 || pApicReg->pszGetBaseR0
2399 || pApicReg->pszSetTPRR0
2400 || pApicReg->pszGetTPRR0
2401 || pApicReg->pszWriteMSRR0
2402 || pApicReg->pszReadMSRR0
2403 || pApicReg->pszBusDeliverR0
2404 || pApicReg->pszLocalInterruptR0)
2405 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2406 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2407 || !VALID_PTR(pApicReg->pszSetBaseR0)
2408 || !VALID_PTR(pApicReg->pszGetBaseR0)
2409 || !VALID_PTR(pApicReg->pszSetTPRR0)
2410 || !VALID_PTR(pApicReg->pszGetTPRR0)
2411 || !VALID_PTR(pApicReg->pszReadMSRR0)
2412 || !VALID_PTR(pApicReg->pszWriteMSRR0)
2413 || !VALID_PTR(pApicReg->pszBusDeliverR0)
2414 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
2415 )
2416 {
2417 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2418 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2419 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2420 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2421 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2422 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2423 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2424 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2425 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2426 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2427 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2428 return VERR_INVALID_PARAMETER;
2429 }
2430 if (!ppApicHlpR3)
2431 {
2432 Assert(ppApicHlpR3);
2433 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2434 return VERR_INVALID_PARAMETER;
2435 }
2436
2437 /*
2438 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
2439 * as they need to communicate and share state easily.
2440 */
2441 PVM pVM = pDevIns->Internal.s.pVMR3;
2442 if (pVM->pdm.s.Apic.pDevInsR3)
2443 {
2444 AssertMsgFailed(("Only one apic device is supported!\n"));
2445 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2446 return VERR_INVALID_PARAMETER;
2447 }
2448
2449 /*
2450 * Resolve & initialize the RC bits.
2451 */
2452 if (pApicReg->pszGetInterruptRC)
2453 {
2454 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2455 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2456 if (RT_SUCCESS(rc))
2457 {
2458 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2459 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2460 }
2461 if (RT_SUCCESS(rc))
2462 {
2463 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2464 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2465 }
2466 if (RT_SUCCESS(rc))
2467 {
2468 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2469 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2470 }
2471 if (RT_SUCCESS(rc))
2472 {
2473 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2474 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2475 }
2476 if (RT_SUCCESS(rc))
2477 {
2478 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2479 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2480 }
2481 if (RT_SUCCESS(rc))
2482 {
2483 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2484 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2485 }
2486 if (RT_SUCCESS(rc))
2487 {
2488 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2489 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2490 }
2491 if (RT_SUCCESS(rc))
2492 {
2493 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2494 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2495 }
2496 if (RT_SUCCESS(rc))
2497 {
2498 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2499 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2500 }
2501 if (RT_FAILURE(rc))
2502 {
2503 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2504 return rc;
2505 }
2506 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2507 }
2508 else
2509 {
2510 pVM->pdm.s.Apic.pDevInsRC = 0;
2511 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2512 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2513 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2514 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2515 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2516 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2517 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2518 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2519 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2520 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2521 }
2522
2523 /*
2524 * Resolve & initialize the R0 bits.
2525 */
2526 if (pApicReg->pszGetInterruptR0)
2527 {
2528 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2529 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2530 if (RT_SUCCESS(rc))
2531 {
2532 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2533 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2534 }
2535 if (RT_SUCCESS(rc))
2536 {
2537 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2538 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2539 }
2540 if (RT_SUCCESS(rc))
2541 {
2542 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2543 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2544 }
2545 if (RT_SUCCESS(rc))
2546 {
2547 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2548 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2549 }
2550 if (RT_SUCCESS(rc))
2551 {
2552 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2553 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2554 }
2555 if (RT_SUCCESS(rc))
2556 {
2557 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2558 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2559 }
2560 if (RT_SUCCESS(rc))
2561 {
2562 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2563 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2564 }
2565 if (RT_SUCCESS(rc))
2566 {
2567 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2568 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2569 }
2570 if (RT_SUCCESS(rc))
2571 {
2572 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2573 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2574 }
2575 if (RT_FAILURE(rc))
2576 {
2577 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2578 return rc;
2579 }
2580 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2581 Assert(pVM->pdm.s.Apic.pDevInsR0);
2582 }
2583 else
2584 {
2585 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2586 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2587 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2588 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2589 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2590 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2591 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2592 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2593 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2594 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2595 pVM->pdm.s.Apic.pDevInsR0 = 0;
2596 }
2597
2598 /*
2599 * Initialize the HC bits.
2600 */
2601 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2602 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2603 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2604 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2605 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2606 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2607 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2608 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2609 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2610 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2611 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2612 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2613
2614 /* set the helper pointer and return. */
2615 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2616 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2617 return VINF_SUCCESS;
2618}
2619
2620
2621/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2622static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2623{
2624 PDMDEV_ASSERT_DEVINS(pDevIns);
2625 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2626 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2627 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2628 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2629
2630 /*
2631 * Validate input.
2632 */
2633 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2634 {
2635 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2636 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2637 return VERR_INVALID_PARAMETER;
2638 }
2639 if (!pIoApicReg->pfnSetIrqR3 || !pIoApicReg->pfnSendMsiR3)
2640 {
2641 Assert(pIoApicReg->pfnSetIrqR3);
2642 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2643 return VERR_INVALID_PARAMETER;
2644 }
2645 if ( pIoApicReg->pszSetIrqRC
2646 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
2647 {
2648 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2649 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2650 return VERR_INVALID_PARAMETER;
2651 }
2652 if ( pIoApicReg->pszSendMsiRC
2653 && !VALID_PTR(pIoApicReg->pszSendMsiRC))
2654 {
2655 Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
2656 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2657 return VERR_INVALID_PARAMETER;
2658 }
2659 if ( pIoApicReg->pszSetIrqR0
2660 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2661 {
2662 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2663 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2664 return VERR_INVALID_PARAMETER;
2665 }
2666 if ( pIoApicReg->pszSendMsiR0
2667 && !VALID_PTR(pIoApicReg->pszSendMsiR0))
2668 {
2669 Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
2670 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2671 return VERR_INVALID_PARAMETER;
2672 }
2673 if (!ppIoApicHlpR3)
2674 {
2675 Assert(ppIoApicHlpR3);
2676 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2677 return VERR_INVALID_PARAMETER;
2678 }
2679
2680 /*
2681 * The I/O APIC requires the APIC to be present (hacks++).
2682 * If the I/O APIC does GC stuff so must the APIC.
2683 */
2684 PVM pVM = pDevIns->Internal.s.pVMR3;
2685 if (!pVM->pdm.s.Apic.pDevInsR3)
2686 {
2687 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2688 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2689 return VERR_INVALID_PARAMETER;
2690 }
2691 if ( pIoApicReg->pszSetIrqRC
2692 && !pVM->pdm.s.Apic.pDevInsRC)
2693 {
2694 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2695 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2696 return VERR_INVALID_PARAMETER;
2697 }
2698
2699 /*
2700 * Only one I/O APIC device.
2701 */
2702 if (pVM->pdm.s.IoApic.pDevInsR3)
2703 {
2704 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2705 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2706 return VERR_INVALID_PARAMETER;
2707 }
2708
2709 /*
2710 * Resolve & initialize the GC bits.
2711 */
2712 if (pIoApicReg->pszSetIrqRC)
2713 {
2714 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2715 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2716 if (RT_FAILURE(rc))
2717 {
2718 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2719 return rc;
2720 }
2721 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2722 }
2723 else
2724 {
2725 pVM->pdm.s.IoApic.pDevInsRC = 0;
2726 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2727 }
2728
2729 if (pIoApicReg->pszSendMsiRC)
2730 {
2731 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
2732 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
2733 if (RT_FAILURE(rc))
2734 {
2735 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2736 return rc;
2737 }
2738 }
2739 else
2740 {
2741 pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
2742 }
2743
2744 /*
2745 * Resolve & initialize the R0 bits.
2746 */
2747 if (pIoApicReg->pszSetIrqR0)
2748 {
2749 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2750 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2751 if (RT_FAILURE(rc))
2752 {
2753 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2754 return rc;
2755 }
2756 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2757 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2758 }
2759 else
2760 {
2761 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2762 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2763 }
2764
2765 if (pIoApicReg->pszSendMsiR0)
2766 {
2767 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
2768 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
2769 if (RT_FAILURE(rc))
2770 {
2771 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2772 return rc;
2773 }
2774 }
2775 else
2776 {
2777 pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
2778 }
2779
2780
2781 /*
2782 * Initialize the R3 bits.
2783 */
2784 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2785 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2786 pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
2787 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2788
2789 /* set the helper pointer and return. */
2790 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2791 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2792 return VINF_SUCCESS;
2793}
2794
2795
2796/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2797static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2798{
2799 PDMDEV_ASSERT_DEVINS(pDevIns);
2800 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2801 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2802
2803 /*
2804 * Validate input.
2805 */
2806 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2807 {
2808 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2809 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2810 return VERR_INVALID_PARAMETER;
2811 }
2812
2813 if (!ppHpetHlpR3)
2814 {
2815 Assert(ppHpetHlpR3);
2816 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2817 return VERR_INVALID_PARAMETER;
2818 }
2819
2820 /* set the helper pointer and return. */
2821 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2822 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2823 return VINF_SUCCESS;
2824}
2825
2826
2827/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
2828static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
2829{
2830 PDMDEV_ASSERT_DEVINS(pDevIns);
2831 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2832 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n"));
2833
2834 /*
2835 * Validate input.
2836 */
2837 if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
2838 {
2839 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
2840 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2841 return VERR_INVALID_PARAMETER;
2842 }
2843
2844 if (!ppPciRawHlpR3)
2845 {
2846 Assert(ppPciRawHlpR3);
2847 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2848 return VERR_INVALID_PARAMETER;
2849 }
2850
2851 /* set the helper pointer and return. */
2852 *ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
2853 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2854 return VINF_SUCCESS;
2855}
2856
2857
2858/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2859static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2860{
2861 PDMDEV_ASSERT_DEVINS(pDevIns);
2862 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2863 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2864 pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2865 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2866
2867 /*
2868 * Validate input.
2869 */
2870 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2871 {
2872 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2873 PDM_DMACREG_VERSION));
2874 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2875 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2876 return VERR_INVALID_PARAMETER;
2877 }
2878 if ( !pDmacReg->pfnRun
2879 || !pDmacReg->pfnRegister
2880 || !pDmacReg->pfnReadMemory
2881 || !pDmacReg->pfnWriteMemory
2882 || !pDmacReg->pfnSetDREQ
2883 || !pDmacReg->pfnGetChannelMode)
2884 {
2885 Assert(pDmacReg->pfnRun);
2886 Assert(pDmacReg->pfnRegister);
2887 Assert(pDmacReg->pfnReadMemory);
2888 Assert(pDmacReg->pfnWriteMemory);
2889 Assert(pDmacReg->pfnSetDREQ);
2890 Assert(pDmacReg->pfnGetChannelMode);
2891 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2892 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2893 return VERR_INVALID_PARAMETER;
2894 }
2895
2896 if (!ppDmacHlp)
2897 {
2898 Assert(ppDmacHlp);
2899 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2900 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2901 return VERR_INVALID_PARAMETER;
2902 }
2903
2904 /*
2905 * Only one DMA device.
2906 */
2907 PVM pVM = pDevIns->Internal.s.pVMR3;
2908 if (pVM->pdm.s.pDmac)
2909 {
2910 AssertMsgFailed(("Only one DMA device is supported!\n"));
2911 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2912 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2913 return VERR_INVALID_PARAMETER;
2914 }
2915
2916 /*
2917 * Allocate and initialize pci bus structure.
2918 */
2919 int rc = VINF_SUCCESS;
2920 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2921 if (pDmac)
2922 {
2923 pDmac->pDevIns = pDevIns;
2924 pDmac->Reg = *pDmacReg;
2925 pVM->pdm.s.pDmac = pDmac;
2926
2927 /* set the helper pointer. */
2928 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2929 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2930 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2931 }
2932 else
2933 rc = VERR_NO_MEMORY;
2934
2935 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2936 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2937 return rc;
2938}
2939
2940
2941/**
2942 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2943 */
2944static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2945{
2946 PDMDEV_ASSERT_DEVINS(pDevIns);
2947 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2948
2949 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2950 return rc;
2951}
2952
2953
2954/**
2955 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2956 */
2957static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2958{
2959 PDMDEV_ASSERT_DEVINS(pDevIns);
2960 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2961
2962 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2963 return rc;
2964}
2965
2966
2967/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2968static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2969{
2970 PDMDEV_ASSERT_DEVINS(pDevIns);
2971 PVM pVM = pDevIns->Internal.s.pVMR3;
2972 VM_ASSERT_EMT(pVM);
2973 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2974 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2975
2976 /*
2977 * We postpone this operation because we're likely to be inside a I/O instruction
2978 * and the EIP will be updated when we return.
2979 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2980 */
2981 bool fHaltOnReset;
2982 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2983 if (RT_SUCCESS(rc) && fHaltOnReset)
2984 {
2985 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2986 rc = VINF_EM_HALT;
2987 }
2988 else
2989 {
2990 VM_FF_SET(pVM, VM_FF_RESET);
2991 rc = VINF_EM_RESET;
2992 }
2993
2994 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2995 return rc;
2996}
2997
2998
2999/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3000static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3001{
3002 int rc;
3003 PDMDEV_ASSERT_DEVINS(pDevIns);
3004 PVM pVM = pDevIns->Internal.s.pVMR3;
3005 VM_ASSERT_EMT(pVM);
3006 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3007 pDevIns->pReg->szName, pDevIns->iInstance));
3008
3009 /** @todo Always take the SMP path - fewer code paths. */
3010 if (pVM->cCpus > 1)
3011 {
3012 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3013 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
3014 AssertRC(rc);
3015 rc = VINF_EM_SUSPEND;
3016 }
3017 else
3018 rc = VMR3Suspend(pVM);
3019
3020 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3021 return rc;
3022}
3023
3024
3025/**
3026 * Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3027 * EMT request to avoid deadlocks.
3028 *
3029 * @returns VBox status code fit for scheduling.
3030 * @param pVM The VM handle.
3031 * @param pDevIns The device that triggered this action.
3032 */
3033static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3034{
3035 /*
3036 * Suspend the VM first then do the saving.
3037 */
3038 int rc = VMR3Suspend(pVM);
3039 if (RT_SUCCESS(rc))
3040 {
3041 PUVM pUVM = pVM->pUVM;
3042 rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3043
3044 /*
3045 * On success, power off the VM, on failure we'll leave it suspended.
3046 */
3047 if (RT_SUCCESS(rc))
3048 {
3049 rc = VMR3PowerOff(pVM);
3050 if (RT_FAILURE(rc))
3051 LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3052 }
3053 else
3054 LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3055 }
3056 else
3057 LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3058 return rc;
3059}
3060
3061
3062/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3063static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3064{
3065 PDMDEV_ASSERT_DEVINS(pDevIns);
3066 PVM pVM = pDevIns->Internal.s.pVMR3;
3067 VM_ASSERT_EMT(pVM);
3068 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3069 pDevIns->pReg->szName, pDevIns->iInstance));
3070
3071 int rc;
3072 if ( pVM->pUVM->pVmm2UserMethods
3073 && pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3074 {
3075 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3076 if (RT_SUCCESS(rc))
3077 {
3078 LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3079 rc = VINF_EM_SUSPEND;
3080 }
3081 }
3082 else
3083 rc = VERR_NOT_SUPPORTED;
3084
3085 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3086 return rc;
3087}
3088
3089
3090/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3091static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3092{
3093 int rc;
3094 PDMDEV_ASSERT_DEVINS(pDevIns);
3095 PVM pVM = pDevIns->Internal.s.pVMR3;
3096 VM_ASSERT_EMT(pVM);
3097 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3098 pDevIns->pReg->szName, pDevIns->iInstance));
3099
3100 /** @todo Always take the SMP path - fewer code paths. */
3101 if (pVM->cCpus > 1)
3102 {
3103 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3104 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
3105 AssertRC(rc);
3106 /* Set the VCPU state to stopped here as well to make sure no
3107 * inconsistency with the EM state occurs.
3108 */
3109 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3110 rc = VINF_EM_OFF;
3111 }
3112 else
3113 rc = VMR3PowerOff(pVM);
3114
3115 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3116 return rc;
3117}
3118
3119
3120/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3121static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3122{
3123 PDMDEV_ASSERT_DEVINS(pDevIns);
3124 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3125
3126 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3127
3128 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3129 return fRc;
3130}
3131
3132
3133/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3134static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3135{
3136 PDMDEV_ASSERT_DEVINS(pDevIns);
3137 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3138 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3139 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3140}
3141
3142
3143/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3144static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3145 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3146{
3147 PDMDEV_ASSERT_DEVINS(pDevIns);
3148 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3149
3150 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3151 pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3152 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3153
3154 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
3155
3156 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3157 pDevIns->pReg->szName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3158}
3159
3160
3161/**
3162 * The device helper structure for trusted devices.
3163 */
3164const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3165{
3166 PDM_DEVHLPR3_VERSION,
3167 pdmR3DevHlp_IOPortRegister,
3168 pdmR3DevHlp_IOPortRegisterRC,
3169 pdmR3DevHlp_IOPortRegisterR0,
3170 pdmR3DevHlp_IOPortDeregister,
3171 pdmR3DevHlp_MMIORegister,
3172 pdmR3DevHlp_MMIORegisterRC,
3173 pdmR3DevHlp_MMIORegisterR0,
3174 pdmR3DevHlp_MMIODeregister,
3175 pdmR3DevHlp_MMIO2Register,
3176 pdmR3DevHlp_MMIO2Deregister,
3177 pdmR3DevHlp_MMIO2Map,
3178 pdmR3DevHlp_MMIO2Unmap,
3179 pdmR3DevHlp_MMHyperMapMMIO2,
3180 pdmR3DevHlp_MMIO2MapKernel,
3181 pdmR3DevHlp_ROMRegister,
3182 pdmR3DevHlp_ROMProtectShadow,
3183 pdmR3DevHlp_SSMRegister,
3184 pdmR3DevHlp_TMTimerCreate,
3185 pdmR3DevHlp_TMUtcNow,
3186 pdmR3DevHlp_PhysRead,
3187 pdmR3DevHlp_PhysWrite,
3188 pdmR3DevHlp_PhysGCPhys2CCPtr,
3189 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3190 pdmR3DevHlp_PhysReleasePageMappingLock,
3191 pdmR3DevHlp_PhysReadGCVirt,
3192 pdmR3DevHlp_PhysWriteGCVirt,
3193 pdmR3DevHlp_PhysGCPtr2GCPhys,
3194 pdmR3DevHlp_MMHeapAlloc,
3195 pdmR3DevHlp_MMHeapAllocZ,
3196 pdmR3DevHlp_MMHeapFree,
3197 pdmR3DevHlp_VMState,
3198 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3199 pdmR3DevHlp_VMSetError,
3200 pdmR3DevHlp_VMSetErrorV,
3201 pdmR3DevHlp_VMSetRuntimeError,
3202 pdmR3DevHlp_VMSetRuntimeErrorV,
3203 pdmR3DevHlp_DBGFStopV,
3204 pdmR3DevHlp_DBGFInfoRegister,
3205 pdmR3DevHlp_DBGFTraceBuf,
3206 pdmR3DevHlp_STAMRegister,
3207 pdmR3DevHlp_STAMRegisterF,
3208 pdmR3DevHlp_STAMRegisterV,
3209 pdmR3DevHlp_PCIRegister,
3210 pdmR3DevHlp_PCIRegisterMsi,
3211 pdmR3DevHlp_PCIIORegionRegister,
3212 pdmR3DevHlp_PCISetConfigCallbacks,
3213 pdmR3DevHlp_PCISetIrq,
3214 pdmR3DevHlp_PCISetIrqNoWait,
3215 pdmR3DevHlp_ISASetIrq,
3216 pdmR3DevHlp_ISASetIrqNoWait,
3217 pdmR3DevHlp_DriverAttach,
3218 pdmR3DevHlp_QueueCreate,
3219 pdmR3DevHlp_CritSectInit,
3220 pdmR3DevHlp_ThreadCreate,
3221 pdmR3DevHlp_SetAsyncNotification,
3222 pdmR3DevHlp_AsyncNotificationCompleted,
3223 pdmR3DevHlp_RTCRegister,
3224 pdmR3DevHlp_PCIBusRegister,
3225 pdmR3DevHlp_PICRegister,
3226 pdmR3DevHlp_APICRegister,
3227 pdmR3DevHlp_IOAPICRegister,
3228 pdmR3DevHlp_HPETRegister,
3229 pdmR3DevHlp_PciRawRegister,
3230 pdmR3DevHlp_DMACRegister,
3231 pdmR3DevHlp_DMARegister,
3232 pdmR3DevHlp_DMAReadMemory,
3233 pdmR3DevHlp_DMAWriteMemory,
3234 pdmR3DevHlp_DMASetDREQ,
3235 pdmR3DevHlp_DMAGetChannelMode,
3236 pdmR3DevHlp_DMASchedule,
3237 pdmR3DevHlp_CMOSWrite,
3238 pdmR3DevHlp_CMOSRead,
3239 pdmR3DevHlp_AssertEMT,
3240 pdmR3DevHlp_AssertOther,
3241 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3242 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3243 pdmR3DevHlp_CallR0,
3244 0,
3245 0,
3246 0,
3247 0,
3248 0,
3249 0,
3250 0,
3251 0,
3252 0,
3253 0,
3254 pdmR3DevHlp_GetVM,
3255 pdmR3DevHlp_GetVMCPU,
3256 pdmR3DevHlp_RegisterVMMDevHeap,
3257 pdmR3DevHlp_UnregisterVMMDevHeap,
3258 pdmR3DevHlp_VMReset,
3259 pdmR3DevHlp_VMSuspend,
3260 pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3261 pdmR3DevHlp_VMPowerOff,
3262 pdmR3DevHlp_A20IsEnabled,
3263 pdmR3DevHlp_A20Set,
3264 pdmR3DevHlp_GetCpuId,
3265 pdmR3DevHlp_TMTimeVirtGet,
3266 pdmR3DevHlp_TMTimeVirtGetFreq,
3267 pdmR3DevHlp_TMTimeVirtGetNano,
3268 PDM_DEVHLPR3_VERSION /* the end */
3269};
3270
3271
3272
3273
3274/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3275static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3276{
3277 PDMDEV_ASSERT_DEVINS(pDevIns);
3278 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3279 return NULL;
3280}
3281
3282
3283/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3284static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3285{
3286 PDMDEV_ASSERT_DEVINS(pDevIns);
3287 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3288 return NULL;
3289}
3290
3291
3292/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3293static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3294{
3295 PDMDEV_ASSERT_DEVINS(pDevIns);
3296 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3297 return VERR_ACCESS_DENIED;
3298}
3299
3300
3301/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3302static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3303{
3304 PDMDEV_ASSERT_DEVINS(pDevIns);
3305 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3306 return VERR_ACCESS_DENIED;
3307}
3308
3309
3310/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3311static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3312{
3313 PDMDEV_ASSERT_DEVINS(pDevIns);
3314 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3315 return VERR_ACCESS_DENIED;
3316}
3317
3318
3319/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3320static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3321{
3322 PDMDEV_ASSERT_DEVINS(pDevIns);
3323 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3324 return VERR_ACCESS_DENIED;
3325}
3326
3327
3328/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3329static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3330{
3331 PDMDEV_ASSERT_DEVINS(pDevIns);
3332 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3333 return VERR_ACCESS_DENIED;
3334}
3335
3336
3337/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3338static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3339{
3340 PDMDEV_ASSERT_DEVINS(pDevIns);
3341 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3342 return VERR_ACCESS_DENIED;
3343}
3344
3345
3346/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3347static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3348{
3349 PDMDEV_ASSERT_DEVINS(pDevIns);
3350 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3351 return false;
3352}
3353
3354
3355/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3356static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3357{
3358 PDMDEV_ASSERT_DEVINS(pDevIns);
3359 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3360 NOREF(fEnable);
3361}
3362
3363
3364/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3365static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3366 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3367{
3368 PDMDEV_ASSERT_DEVINS(pDevIns);
3369 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3370}
3371
3372
3373/**
3374 * The device helper structure for non-trusted devices.
3375 */
3376const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3377{
3378 PDM_DEVHLPR3_VERSION,
3379 pdmR3DevHlp_IOPortRegister,
3380 pdmR3DevHlp_IOPortRegisterRC,
3381 pdmR3DevHlp_IOPortRegisterR0,
3382 pdmR3DevHlp_IOPortDeregister,
3383 pdmR3DevHlp_MMIORegister,
3384 pdmR3DevHlp_MMIORegisterRC,
3385 pdmR3DevHlp_MMIORegisterR0,
3386 pdmR3DevHlp_MMIODeregister,
3387 pdmR3DevHlp_MMIO2Register,
3388 pdmR3DevHlp_MMIO2Deregister,
3389 pdmR3DevHlp_MMIO2Map,
3390 pdmR3DevHlp_MMIO2Unmap,
3391 pdmR3DevHlp_MMHyperMapMMIO2,
3392 pdmR3DevHlp_MMIO2MapKernel,
3393 pdmR3DevHlp_ROMRegister,
3394 pdmR3DevHlp_ROMProtectShadow,
3395 pdmR3DevHlp_SSMRegister,
3396 pdmR3DevHlp_TMTimerCreate,
3397 pdmR3DevHlp_TMUtcNow,
3398 pdmR3DevHlp_PhysRead,
3399 pdmR3DevHlp_PhysWrite,
3400 pdmR3DevHlp_PhysGCPhys2CCPtr,
3401 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3402 pdmR3DevHlp_PhysReleasePageMappingLock,
3403 pdmR3DevHlp_PhysReadGCVirt,
3404 pdmR3DevHlp_PhysWriteGCVirt,
3405 pdmR3DevHlp_PhysGCPtr2GCPhys,
3406 pdmR3DevHlp_MMHeapAlloc,
3407 pdmR3DevHlp_MMHeapAllocZ,
3408 pdmR3DevHlp_MMHeapFree,
3409 pdmR3DevHlp_VMState,
3410 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3411 pdmR3DevHlp_VMSetError,
3412 pdmR3DevHlp_VMSetErrorV,
3413 pdmR3DevHlp_VMSetRuntimeError,
3414 pdmR3DevHlp_VMSetRuntimeErrorV,
3415 pdmR3DevHlp_DBGFStopV,
3416 pdmR3DevHlp_DBGFInfoRegister,
3417 pdmR3DevHlp_DBGFTraceBuf,
3418 pdmR3DevHlp_STAMRegister,
3419 pdmR3DevHlp_STAMRegisterF,
3420 pdmR3DevHlp_STAMRegisterV,
3421 pdmR3DevHlp_PCIRegister,
3422 pdmR3DevHlp_PCIRegisterMsi,
3423 pdmR3DevHlp_PCIIORegionRegister,
3424 pdmR3DevHlp_PCISetConfigCallbacks,
3425 pdmR3DevHlp_PCISetIrq,
3426 pdmR3DevHlp_PCISetIrqNoWait,
3427 pdmR3DevHlp_ISASetIrq,
3428 pdmR3DevHlp_ISASetIrqNoWait,
3429 pdmR3DevHlp_DriverAttach,
3430 pdmR3DevHlp_QueueCreate,
3431 pdmR3DevHlp_CritSectInit,
3432 pdmR3DevHlp_ThreadCreate,
3433 pdmR3DevHlp_SetAsyncNotification,
3434 pdmR3DevHlp_AsyncNotificationCompleted,
3435 pdmR3DevHlp_RTCRegister,
3436 pdmR3DevHlp_PCIBusRegister,
3437 pdmR3DevHlp_PICRegister,
3438 pdmR3DevHlp_APICRegister,
3439 pdmR3DevHlp_IOAPICRegister,
3440 pdmR3DevHlp_HPETRegister,
3441 pdmR3DevHlp_PciRawRegister,
3442 pdmR3DevHlp_DMACRegister,
3443 pdmR3DevHlp_DMARegister,
3444 pdmR3DevHlp_DMAReadMemory,
3445 pdmR3DevHlp_DMAWriteMemory,
3446 pdmR3DevHlp_DMASetDREQ,
3447 pdmR3DevHlp_DMAGetChannelMode,
3448 pdmR3DevHlp_DMASchedule,
3449 pdmR3DevHlp_CMOSWrite,
3450 pdmR3DevHlp_CMOSRead,
3451 pdmR3DevHlp_AssertEMT,
3452 pdmR3DevHlp_AssertOther,
3453 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3454 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3455 pdmR3DevHlp_CallR0,
3456 0,
3457 0,
3458 0,
3459 0,
3460 0,
3461 0,
3462 0,
3463 0,
3464 0,
3465 0,
3466 pdmR3DevHlp_Untrusted_GetVM,
3467 pdmR3DevHlp_Untrusted_GetVMCPU,
3468 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3469 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3470 pdmR3DevHlp_Untrusted_VMReset,
3471 pdmR3DevHlp_Untrusted_VMSuspend,
3472 pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3473 pdmR3DevHlp_Untrusted_VMPowerOff,
3474 pdmR3DevHlp_Untrusted_A20IsEnabled,
3475 pdmR3DevHlp_Untrusted_A20Set,
3476 pdmR3DevHlp_Untrusted_GetCpuId,
3477 pdmR3DevHlp_TMTimeVirtGet,
3478 pdmR3DevHlp_TMTimeVirtGetFreq,
3479 pdmR3DevHlp_TMTimeVirtGetNano,
3480 PDM_DEVHLPR3_VERSION /* the end */
3481};
3482
3483
3484
3485/**
3486 * Queue consumer callback for internal component.
3487 *
3488 * @returns Success indicator.
3489 * If false the item will not be removed and the flushing will stop.
3490 * @param pVM The VM handle.
3491 * @param pItem The item to consume. Upon return this item will be freed.
3492 */
3493DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3494{
3495 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3496 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3497 switch (pTask->enmOp)
3498 {
3499 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3500 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3501 break;
3502
3503 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3504 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3505 break;
3506
3507 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3508 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3509 break;
3510
3511 default:
3512 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3513 break;
3514 }
3515 return true;
3516}
3517
3518/** @} */
3519
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