VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 39347

Last change on this file since 39347 was 39136, checked in by vboxsync, 14 years ago

More MMIO refactoring and some other cleanups.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 144.6 KB
Line 
1/* $Id: PDMDevHlp.cpp 39136 2011-10-28 10:13:34Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2011 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/mm.h>
26#include <VBox/vmm/pgm.h>
27#include <VBox/vmm/iom.h>
28#include <VBox/vmm/rem.h>
29#include <VBox/vmm/dbgf.h>
30#include <VBox/vmm/vmapi.h>
31#include <VBox/vmm/vm.h>
32#include <VBox/vmm/uvm.h>
33#include <VBox/vmm/vmm.h>
34
35#include <VBox/version.h>
36#include <VBox/log.h>
37#include <VBox/err.h>
38#include <iprt/asm.h>
39#include <iprt/assert.h>
40#include <iprt/ctype.h>
41#include <iprt/string.h>
42#include <iprt/thread.h>
43
44
45/*******************************************************************************
46* Defined Constants And Macros *
47*******************************************************************************/
48/** @def PDM_DEVHLP_DEADLOCK_DETECTION
49 * Define this to enable the deadlock detection when accessing physical memory.
50 */
51#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
52# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
53#endif
54
55
56
57/**
58 * Wrapper around PDMR3LdrGetSymbolRCLazy.
59 */
60DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
61{
62 return PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3,
63 pDevIns->Internal.s.pDevR3->pReg->szRCMod,
64 pDevIns->Internal.s.pDevR3->pszRCSearchPath,
65 pszSymbol, ppvValue);
66}
67
68
69/**
70 * Wrapper around PDMR3LdrGetSymbolR0Lazy.
71 */
72DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
73{
74 return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
75 pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
76 pDevIns->Internal.s.pDevR3->pszR0SearchPath,
77 pszSymbol, ppvValue);
78}
79
80
81/** @name R3 DevHlp
82 * @{
83 */
84
85
86/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
87static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
88 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
89{
90 PDMDEV_ASSERT_DEVINS(pDevIns);
91 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
92 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
93 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
94
95#if 0 /** @todo needs a real string cache for this */
96 if (pDevIns->iInstance > 0)
97 {
98 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
99 if (pszDesc2)
100 pszDesc = pszDesc2;
101 }
102#endif
103
104 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser,
105 pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
106
107 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
108 return rc;
109}
110
111
112/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
113static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
114 const char *pszOut, const char *pszIn,
115 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
116{
117 PDMDEV_ASSERT_DEVINS(pDevIns);
118 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
119 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
120 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
121
122 /*
123 * Resolve the functions (one of the can be NULL).
124 */
125 int rc = VINF_SUCCESS;
126 if ( pDevIns->pReg->szRCMod[0]
127 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
128 {
129 RTRCPTR RCPtrIn = NIL_RTRCPTR;
130 if (pszIn)
131 {
132 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
133 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
134 }
135 RTRCPTR RCPtrOut = NIL_RTRCPTR;
136 if (pszOut && RT_SUCCESS(rc))
137 {
138 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
139 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
140 }
141 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
142 if (pszInStr && RT_SUCCESS(rc))
143 {
144 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
145 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
146 }
147 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
148 if (pszOutStr && RT_SUCCESS(rc))
149 {
150 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
151 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
152 }
153
154 if (RT_SUCCESS(rc))
155 {
156#if 0 /** @todo needs a real string cache for this */
157 if (pDevIns->iInstance > 0)
158 {
159 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
160 if (pszDesc2)
161 pszDesc = pszDesc2;
162 }
163#endif
164
165 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
166 }
167 }
168 else
169 {
170 AssertMsgFailed(("No GC module for this driver!\n"));
171 rc = VERR_INVALID_PARAMETER;
172 }
173
174 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
175 return rc;
176}
177
178
179/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
180static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
181 const char *pszOut, const char *pszIn,
182 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
186 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
187 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
188
189 /*
190 * Resolve the functions (one of the can be NULL).
191 */
192 int rc = VINF_SUCCESS;
193 if ( pDevIns->pReg->szR0Mod[0]
194 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
195 {
196 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
197 if (pszIn)
198 {
199 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
200 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
201 }
202 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
203 if (pszOut && RT_SUCCESS(rc))
204 {
205 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
206 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
207 }
208 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
209 if (pszInStr && RT_SUCCESS(rc))
210 {
211 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
212 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
213 }
214 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
215 if (pszOutStr && RT_SUCCESS(rc))
216 {
217 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
218 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
219 }
220
221 if (RT_SUCCESS(rc))
222 {
223#if 0 /** @todo needs a real string cache for this */
224 if (pDevIns->iInstance > 0)
225 {
226 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
227 if (pszDesc2)
228 pszDesc = pszDesc2;
229 }
230#endif
231
232 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
233 }
234 }
235 else
236 {
237 AssertMsgFailed(("No R0 module for this driver!\n"));
238 rc = VERR_INVALID_PARAMETER;
239 }
240
241 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
242 return rc;
243}
244
245
246/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
247static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
248{
249 PDMDEV_ASSERT_DEVINS(pDevIns);
250 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
251 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
252 Port, cPorts));
253
254 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
255
256 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
257 return rc;
258}
259
260
261/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
262static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
263 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
264 uint32_t fFlags, const char *pszDesc)
265{
266 PDMDEV_ASSERT_DEVINS(pDevIns);
267 PVM pVM = pDevIns->Internal.s.pVMR3;
268 VM_ASSERT_EMT(pVM);
269 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p fFlags=%#x pszDesc=%p:{%s}\n",
270 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, fFlags, pszDesc));
271
272 if (pDevIns->iInstance > 0)
273 {
274 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
275 if (pszDesc2)
276 pszDesc = pszDesc2;
277 }
278
279 int rc = IOMR3MmioRegisterR3(pVM, pDevIns, GCPhysStart, cbRange, pvUser,
280 pfnWrite, pfnRead, pfnFill, fFlags, pszDesc);
281
282 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
283 return rc;
284}
285
286
287/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
288static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
289 const char *pszWrite, const char *pszRead, const char *pszFill)
290{
291 PDMDEV_ASSERT_DEVINS(pDevIns);
292 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
293 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
294 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
295
296
297 /*
298 * Resolve the functions.
299 * Not all function have to present, leave it to IOM to enforce this.
300 */
301 int rc = VINF_SUCCESS;
302 if ( pDevIns->pReg->szRCMod[0]
303 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
304 {
305 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
306 if (pszWrite)
307 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
308
309 RTRCPTR RCPtrRead = NIL_RTRCPTR;
310 int rc2 = VINF_SUCCESS;
311 if (pszRead)
312 rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
313
314 RTRCPTR RCPtrFill = NIL_RTRCPTR;
315 int rc3 = VINF_SUCCESS;
316 if (pszFill)
317 rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
318
319 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
320 rc = IOMR3MmioRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
321 else
322 {
323 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
324 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
325 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
326 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
327 rc = rc2;
328 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
329 rc = rc3;
330 }
331 }
332 else
333 {
334 AssertMsgFailed(("No GC module for this driver!\n"));
335 rc = VERR_INVALID_PARAMETER;
336 }
337
338 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
339 return rc;
340}
341
342/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
343static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
344 const char *pszWrite, const char *pszRead, const char *pszFill)
345{
346 PDMDEV_ASSERT_DEVINS(pDevIns);
347 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
348 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
349 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
350
351 /*
352 * Resolve the functions.
353 * Not all function have to present, leave it to IOM to enforce this.
354 */
355 int rc = VINF_SUCCESS;
356 if ( pDevIns->pReg->szR0Mod[0]
357 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
358 {
359 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
360 if (pszWrite)
361 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
362 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
363 int rc2 = VINF_SUCCESS;
364 if (pszRead)
365 rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
366 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
367 int rc3 = VINF_SUCCESS;
368 if (pszFill)
369 rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
370 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
371 rc = IOMR3MmioRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
372 else
373 {
374 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
375 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
376 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
377 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
378 rc = rc2;
379 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
380 rc = rc3;
381 }
382 }
383 else
384 {
385 AssertMsgFailed(("No R0 module for this driver!\n"));
386 rc = VERR_INVALID_PARAMETER;
387 }
388
389 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
390 return rc;
391}
392
393
394/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
395static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
396{
397 PDMDEV_ASSERT_DEVINS(pDevIns);
398 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
399 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
400 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
401
402 int rc = IOMR3MmioDeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
403
404 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
405 return rc;
406}
407
408
409/**
410 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
411 */
412static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
413{
414 PDMDEV_ASSERT_DEVINS(pDevIns);
415 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
416 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
417 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
418
419/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
420 * use a real string cache. */
421 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
422
423 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
424 return rc;
425}
426
427
428/**
429 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
430 */
431static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
432{
433 PDMDEV_ASSERT_DEVINS(pDevIns);
434 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
435 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
436 pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
437
438 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
439
440 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
441
442 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
443 return rc;
444}
445
446
447/**
448 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
449 */
450static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
451{
452 PDMDEV_ASSERT_DEVINS(pDevIns);
453 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
454 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
455 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
456
457 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
458
459 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
460 return rc;
461}
462
463
464/**
465 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
466 */
467static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
468{
469 PDMDEV_ASSERT_DEVINS(pDevIns);
470 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
471 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
472 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
473
474 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
475
476 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
477 return rc;
478}
479
480
481/**
482 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
483 */
484static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
485 const char *pszDesc, PRTRCPTR pRCPtr)
486{
487 PDMDEV_ASSERT_DEVINS(pDevIns);
488 PVM pVM = pDevIns->Internal.s.pVMR3;
489 VM_ASSERT_EMT(pVM);
490 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
491 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
492
493 if (pDevIns->iInstance > 0)
494 {
495 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
496 if (pszDesc2)
497 pszDesc = pszDesc2;
498 }
499
500 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
501
502 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pRCPtr));
503 return rc;
504}
505
506
507/**
508 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
509 */
510static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
511 const char *pszDesc, PRTR0PTR pR0Ptr)
512{
513 PDMDEV_ASSERT_DEVINS(pDevIns);
514 PVM pVM = pDevIns->Internal.s.pVMR3;
515 VM_ASSERT_EMT(pVM);
516 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
517 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
518
519 if (pDevIns->iInstance > 0)
520 {
521 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
522 if (pszDesc2)
523 pszDesc = pszDesc2;
524 }
525
526 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
527
528 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pR0Ptr));
529 return rc;
530}
531
532
533/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
534static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
535 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
536{
537 PDMDEV_ASSERT_DEVINS(pDevIns);
538 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
539 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
540 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
541
542/** @todo can we mangle pszDesc? */
543 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
544
545 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
546 return rc;
547}
548
549
550/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
551static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
552{
553 PDMDEV_ASSERT_DEVINS(pDevIns);
554 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
555 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
556
557 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
558
559 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
560 return rc;
561}
562
563
564/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
565static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
566 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
567 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
568 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
569{
570 PDMDEV_ASSERT_DEVINS(pDevIns);
571 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
572 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
573 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
574 pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
575 pfnLivePrep, pfnLiveExec, pfnLiveVote,
576 pfnSavePrep, pfnSaveExec, pfnSaveDone,
577 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
578
579 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
580 uVersion, cbGuess, pszBefore,
581 pfnLivePrep, pfnLiveExec, pfnLiveVote,
582 pfnSavePrep, pfnSaveExec, pfnSaveDone,
583 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
584
585 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
586 return rc;
587}
588
589
590/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
591static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
592{
593 PDMDEV_ASSERT_DEVINS(pDevIns);
594 PVM pVM = pDevIns->Internal.s.pVMR3;
595 VM_ASSERT_EMT(pVM);
596 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
597 pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
598
599 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
600 {
601 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
602 if (pszDesc2)
603 pszDesc = pszDesc2;
604 }
605
606 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
607
608 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
609 return rc;
610}
611
612
613/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
614static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
615{
616 PDMDEV_ASSERT_DEVINS(pDevIns);
617 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
618 pDevIns->pReg->szName, pDevIns->iInstance, pTime));
619
620 pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
621
622 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
623 return pTime;
624}
625
626
627/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
628static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
629{
630 PDMDEV_ASSERT_DEVINS(pDevIns);
631 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'\n",
632 pDevIns->pReg->szName, pDevIns->iInstance));
633
634 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
635
636 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
637 return u64Time;
638}
639
640
641/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
642static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
643{
644 PDMDEV_ASSERT_DEVINS(pDevIns);
645 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'\n",
646 pDevIns->pReg->szName, pDevIns->iInstance));
647
648 uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
649
650 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
651 return u64Freq;
652}
653
654
655/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
656static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
657{
658 PDMDEV_ASSERT_DEVINS(pDevIns);
659 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'\n",
660 pDevIns->pReg->szName, pDevIns->iInstance));
661
662 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
663 uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
664
665 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
666 return u64Nano;
667}
668
669
670/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
671static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
672{
673 PDMDEV_ASSERT_DEVINS(pDevIns);
674 PVM pVM = pDevIns->Internal.s.pVMR3;
675 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
676 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
677
678#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
679 if (!VM_IS_EMT(pVM))
680 {
681 char szNames[128];
682 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
683 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
684 }
685#endif
686
687 int rc;
688 if (VM_IS_EMT(pVM))
689 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
690 else
691 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
692
693 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
694 return rc;
695}
696
697
698/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
699static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
700{
701 PDMDEV_ASSERT_DEVINS(pDevIns);
702 PVM pVM = pDevIns->Internal.s.pVMR3;
703 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
704 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
705
706#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
707 if (!VM_IS_EMT(pVM))
708 {
709 char szNames[128];
710 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
711 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
712 }
713#endif
714
715 int rc;
716 if (VM_IS_EMT(pVM))
717 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
718 else
719 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
720
721 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
722 return rc;
723}
724
725
726/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
727static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
728{
729 PDMDEV_ASSERT_DEVINS(pDevIns);
730 PVM pVM = pDevIns->Internal.s.pVMR3;
731 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
732 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
733 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
734
735#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
736 if (!VM_IS_EMT(pVM))
737 {
738 char szNames[128];
739 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
740 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
741 }
742#endif
743
744 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
745
746 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
747 return rc;
748}
749
750
751/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
752static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
753{
754 PDMDEV_ASSERT_DEVINS(pDevIns);
755 PVM pVM = pDevIns->Internal.s.pVMR3;
756 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
757 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
758 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
759
760#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
761 if (!VM_IS_EMT(pVM))
762 {
763 char szNames[128];
764 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
765 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
766 }
767#endif
768
769 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
770
771 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
772 return rc;
773}
774
775
776/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
777static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
778{
779 PDMDEV_ASSERT_DEVINS(pDevIns);
780 PVM pVM = pDevIns->Internal.s.pVMR3;
781 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
782 pDevIns->pReg->szName, pDevIns->iInstance, pLock));
783
784 PGMPhysReleasePageMappingLock(pVM, pLock);
785
786 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
787}
788
789
790/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
791static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
792{
793 PDMDEV_ASSERT_DEVINS(pDevIns);
794 PVM pVM = pDevIns->Internal.s.pVMR3;
795 VM_ASSERT_EMT(pVM);
796 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
797 pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
798
799 PVMCPU pVCpu = VMMGetCpu(pVM);
800 if (!pVCpu)
801 return VERR_ACCESS_DENIED;
802#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
803 /** @todo SMP. */
804#endif
805
806 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
807
808 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
809
810 return rc;
811}
812
813
814/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
815static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
816{
817 PDMDEV_ASSERT_DEVINS(pDevIns);
818 PVM pVM = pDevIns->Internal.s.pVMR3;
819 VM_ASSERT_EMT(pVM);
820 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
821 pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
822
823 PVMCPU pVCpu = VMMGetCpu(pVM);
824 if (!pVCpu)
825 return VERR_ACCESS_DENIED;
826#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
827 /** @todo SMP. */
828#endif
829
830 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
831
832 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
833
834 return rc;
835}
836
837
838/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
839static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
840{
841 PDMDEV_ASSERT_DEVINS(pDevIns);
842 PVM pVM = pDevIns->Internal.s.pVMR3;
843 VM_ASSERT_EMT(pVM);
844 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
845 pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
846
847 PVMCPU pVCpu = VMMGetCpu(pVM);
848 if (!pVCpu)
849 return VERR_ACCESS_DENIED;
850#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
851 /** @todo SMP. */
852#endif
853
854 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
855
856 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pGCPhys));
857
858 return rc;
859}
860
861
862/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
863static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
864{
865 PDMDEV_ASSERT_DEVINS(pDevIns);
866 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
867
868 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
869
870 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
871 return pv;
872}
873
874
875/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
876static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
877{
878 PDMDEV_ASSERT_DEVINS(pDevIns);
879 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
880
881 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
882
883 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
884 return pv;
885}
886
887
888/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
889static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
890{
891 PDMDEV_ASSERT_DEVINS(pDevIns);
892 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
893
894 MMR3HeapFree(pv);
895
896 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
897}
898
899
900/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
901static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
902{
903 PDMDEV_ASSERT_DEVINS(pDevIns);
904
905 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
906
907 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
908 enmVMState, VMR3GetStateName(enmVMState)));
909 return enmVMState;
910}
911
912
913/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
914static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
915{
916 PDMDEV_ASSERT_DEVINS(pDevIns);
917
918 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
919
920 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
921 fRc));
922 return fRc;
923}
924
925
926/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
927static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
928{
929 PDMDEV_ASSERT_DEVINS(pDevIns);
930 va_list args;
931 va_start(args, pszFormat);
932 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
933 va_end(args);
934 return rc;
935}
936
937
938/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
939static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
940{
941 PDMDEV_ASSERT_DEVINS(pDevIns);
942 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
943 return rc;
944}
945
946
947/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
948static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
949{
950 PDMDEV_ASSERT_DEVINS(pDevIns);
951 va_list args;
952 va_start(args, pszFormat);
953 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
954 va_end(args);
955 return rc;
956}
957
958
959/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
960static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
961{
962 PDMDEV_ASSERT_DEVINS(pDevIns);
963 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
964 return rc;
965}
966
967
968/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
969static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
970{
971 PDMDEV_ASSERT_DEVINS(pDevIns);
972#ifdef LOG_ENABLED
973 va_list va2;
974 va_copy(va2, args);
975 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
976 pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
977 va_end(va2);
978#endif
979
980 PVM pVM = pDevIns->Internal.s.pVMR3;
981 VM_ASSERT_EMT(pVM);
982 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
983 if (rc == VERR_DBGF_NOT_ATTACHED)
984 rc = VINF_SUCCESS;
985
986 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
987 return rc;
988}
989
990
991/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
992static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
993{
994 PDMDEV_ASSERT_DEVINS(pDevIns);
995 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
996 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
997
998 PVM pVM = pDevIns->Internal.s.pVMR3;
999 VM_ASSERT_EMT(pVM);
1000 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1001
1002 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1003 return rc;
1004}
1005
1006
1007/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1008static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1009{
1010 PDMDEV_ASSERT_DEVINS(pDevIns);
1011 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1012 LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1013 return hTraceBuf;
1014}
1015
1016
1017/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1018static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1019{
1020 PDMDEV_ASSERT_DEVINS(pDevIns);
1021 PVM pVM = pDevIns->Internal.s.pVMR3;
1022 VM_ASSERT_EMT(pVM);
1023
1024 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1025 NOREF(pVM);
1026}
1027
1028
1029
1030/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1031static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1032 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1033{
1034 PDMDEV_ASSERT_DEVINS(pDevIns);
1035 PVM pVM = pDevIns->Internal.s.pVMR3;
1036 VM_ASSERT_EMT(pVM);
1037
1038 va_list args;
1039 va_start(args, pszName);
1040 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1041 va_end(args);
1042 AssertRC(rc);
1043
1044 NOREF(pVM);
1045}
1046
1047
1048/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1049static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1050 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1051{
1052 PDMDEV_ASSERT_DEVINS(pDevIns);
1053 PVM pVM = pDevIns->Internal.s.pVMR3;
1054 VM_ASSERT_EMT(pVM);
1055
1056 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1057 AssertRC(rc);
1058
1059 NOREF(pVM);
1060}
1061
1062
1063/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
1064static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1065{
1066 PDMDEV_ASSERT_DEVINS(pDevIns);
1067 PVM pVM = pDevIns->Internal.s.pVMR3;
1068 VM_ASSERT_EMT(pVM);
1069 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
1070 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
1071
1072 /*
1073 * Validate input.
1074 */
1075 if (!pPciDev)
1076 {
1077 Assert(pPciDev);
1078 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1079 return VERR_INVALID_PARAMETER;
1080 }
1081 if (!pPciDev->config[0] && !pPciDev->config[1])
1082 {
1083 Assert(pPciDev->config[0] || pPciDev->config[1]);
1084 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1085 return VERR_INVALID_PARAMETER;
1086 }
1087 if (pDevIns->Internal.s.pPciDeviceR3)
1088 {
1089 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1090 * support a PDM device with multiple PCI devices. This might become a problem
1091 * when upgrading the chipset for instance because of multiple functions in some
1092 * devices...
1093 */
1094 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1095 return VERR_INTERNAL_ERROR;
1096 }
1097
1098 /*
1099 * Choose the PCI bus for the device.
1100 *
1101 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1102 * configuration value will be set. If not the default bus is 0.
1103 */
1104 int rc;
1105 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1106 if (!pBus)
1107 {
1108 uint8_t u8Bus;
1109 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1110 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1111 rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1112 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1113 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1114 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1115 VERR_PDM_NO_PCI_BUS);
1116 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1117 }
1118 if (pBus->pDevInsR3)
1119 {
1120 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1121 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1122 else
1123 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1124
1125 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1126 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1127 else
1128 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1129
1130 /*
1131 * Check the configuration for PCI device and function assignment.
1132 */
1133 int iDev = -1;
1134 uint8_t u8Device;
1135 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1136 if (RT_SUCCESS(rc))
1137 {
1138 if (u8Device > 31)
1139 {
1140 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1141 u8Device, pDevIns->pReg->szName, pDevIns->iInstance));
1142 return VERR_INTERNAL_ERROR;
1143 }
1144
1145 uint8_t u8Function;
1146 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1147 if (RT_FAILURE(rc))
1148 {
1149 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1150 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1151 return rc;
1152 }
1153 if (u8Function > 7)
1154 {
1155 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1156 u8Function, pDevIns->pReg->szName, pDevIns->iInstance));
1157 return VERR_INTERNAL_ERROR;
1158 }
1159 iDev = (u8Device << 3) | u8Function;
1160 }
1161 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1162 {
1163 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1164 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1165 return rc;
1166 }
1167
1168 /*
1169 * Call the pci bus device to do the actual registration.
1170 */
1171 pdmLock(pVM);
1172 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1173 pdmUnlock(pVM);
1174 if (RT_SUCCESS(rc))
1175 {
1176 pPciDev->pDevIns = pDevIns;
1177
1178 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1179 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1180 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1181 else
1182 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1183
1184 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1185 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1186 else
1187 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1188
1189 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1190 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1191 }
1192 }
1193 else
1194 {
1195 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1196 rc = VERR_PDM_NO_PCI_BUS;
1197 }
1198
1199 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1200 return rc;
1201}
1202
1203
1204/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1205static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1206{
1207 PDMDEV_ASSERT_DEVINS(pDevIns);
1208 PVM pVM = pDevIns->Internal.s.pVMR3;
1209 VM_ASSERT_EMT(pVM);
1210 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1211 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1212
1213 /*
1214 * Validate input.
1215 */
1216 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1217 {
1218 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1219 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1220 return VERR_INVALID_PARAMETER;
1221 }
1222 switch ((int)enmType)
1223 {
1224 case PCI_ADDRESS_SPACE_IO:
1225 /*
1226 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1227 */
1228 AssertMsgReturn(cbRegion <= _32K,
1229 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1230 VERR_INVALID_PARAMETER);
1231 break;
1232
1233 case PCI_ADDRESS_SPACE_MEM:
1234 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1235 case PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64:
1236 case PCI_ADDRESS_SPACE_MEM_PREFETCH | PCI_ADDRESS_SPACE_BAR64:
1237 /*
1238 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1239 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1240 */
1241 AssertMsgReturn(cbRegion <= 512 * _1M,
1242 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1243 VERR_INVALID_PARAMETER);
1244 break;
1245 default:
1246 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1247 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1248 return VERR_INVALID_PARAMETER;
1249 }
1250 if (!pfnCallback)
1251 {
1252 Assert(pfnCallback);
1253 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1254 return VERR_INVALID_PARAMETER;
1255 }
1256 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1257
1258 /*
1259 * Must have a PCI device registered!
1260 */
1261 int rc;
1262 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1263 if (pPciDev)
1264 {
1265 /*
1266 * We're currently restricted to page aligned MMIO regions.
1267 */
1268 if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1269 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1270 {
1271 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1272 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1273 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1274 }
1275
1276 /*
1277 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1278 */
1279 int iLastSet = ASMBitLastSetU32(cbRegion);
1280 Assert(iLastSet > 0);
1281 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1282 if (cbRegion > cbRegionAligned)
1283 cbRegion = cbRegionAligned * 2; /* round up */
1284
1285 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1286 Assert(pBus);
1287 pdmLock(pVM);
1288 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1289 pdmUnlock(pVM);
1290 }
1291 else
1292 {
1293 AssertMsgFailed(("No PCI device registered!\n"));
1294 rc = VERR_PDM_NOT_PCI_DEVICE;
1295 }
1296
1297 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1298 return rc;
1299}
1300
1301
1302/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1303static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1304 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1305{
1306 PDMDEV_ASSERT_DEVINS(pDevIns);
1307 PVM pVM = pDevIns->Internal.s.pVMR3;
1308 VM_ASSERT_EMT(pVM);
1309 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1310 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1311
1312 /*
1313 * Validate input and resolve defaults.
1314 */
1315 AssertPtr(pfnRead);
1316 AssertPtr(pfnWrite);
1317 AssertPtrNull(ppfnReadOld);
1318 AssertPtrNull(ppfnWriteOld);
1319 AssertPtrNull(pPciDev);
1320
1321 if (!pPciDev)
1322 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1323 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1324 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1325 AssertRelease(pBus);
1326 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1327
1328 /*
1329 * Do the job.
1330 */
1331 pdmLock(pVM);
1332 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1333 pdmUnlock(pVM);
1334
1335 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1336}
1337
1338
1339/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1340static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1341{
1342 PDMDEV_ASSERT_DEVINS(pDevIns);
1343 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1344
1345 /*
1346 * Validate input.
1347 */
1348 /** @todo iIrq and iLevel checks. */
1349
1350 /*
1351 * Must have a PCI device registered!
1352 */
1353 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1354 if (pPciDev)
1355 {
1356 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1357 Assert(pBus);
1358 PVM pVM = pDevIns->Internal.s.pVMR3;
1359 pdmLock(pVM);
1360 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1361 pdmUnlock(pVM);
1362 }
1363 else
1364 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1365
1366 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1367}
1368
1369
1370/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1371static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1372{
1373 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1374}
1375
1376
1377/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1378static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
1379{
1380 PDMDEV_ASSERT_DEVINS(pDevIns);
1381 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: %d MSI vectors %d MSI-X vectors\n", pDevIns->pReg->szName, pDevIns->iInstance, pMsiReg->cMsiVectors,pMsiReg->cMsixVectors ));
1382 int rc = VINF_SUCCESS;
1383
1384 /*
1385 * Must have a PCI device registered!
1386 */
1387 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1388 if (pPciDev)
1389 {
1390 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1391 Assert(pBus);
1392
1393 PVM pVM = pDevIns->Internal.s.pVMR3;
1394 pdmLock(pVM);
1395 if (!pBus->pfnRegisterMsiR3)
1396 rc = VERR_NOT_IMPLEMENTED;
1397 else
1398 rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1399 pdmUnlock(pVM);
1400 }
1401 else
1402 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1403
1404 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1405 return rc;
1406}
1407
1408/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1409static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1410{
1411 PDMDEV_ASSERT_DEVINS(pDevIns);
1412 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1413
1414 /*
1415 * Validate input.
1416 */
1417 /** @todo iIrq and iLevel checks. */
1418
1419 PVM pVM = pDevIns->Internal.s.pVMR3;
1420 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1421
1422 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1423}
1424
1425
1426/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1427static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1428{
1429 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1430}
1431
1432
1433/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1434static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1435{
1436 PDMDEV_ASSERT_DEVINS(pDevIns);
1437 PVM pVM = pDevIns->Internal.s.pVMR3;
1438 VM_ASSERT_EMT(pVM);
1439 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1440 pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1441
1442 /*
1443 * Lookup the LUN, it might already be registered.
1444 */
1445 PPDMLUN pLunPrev = NULL;
1446 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1447 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1448 if (pLun->iLun == iLun)
1449 break;
1450
1451 /*
1452 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1453 */
1454 if (!pLun)
1455 {
1456 if ( !pBaseInterface
1457 || !pszDesc
1458 || !*pszDesc)
1459 {
1460 Assert(pBaseInterface);
1461 Assert(pszDesc || *pszDesc);
1462 return VERR_INVALID_PARAMETER;
1463 }
1464
1465 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1466 if (!pLun)
1467 return VERR_NO_MEMORY;
1468
1469 pLun->iLun = iLun;
1470 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1471 pLun->pTop = NULL;
1472 pLun->pBottom = NULL;
1473 pLun->pDevIns = pDevIns;
1474 pLun->pUsbIns = NULL;
1475 pLun->pszDesc = pszDesc;
1476 pLun->pBase = pBaseInterface;
1477 if (!pLunPrev)
1478 pDevIns->Internal.s.pLunsR3 = pLun;
1479 else
1480 pLunPrev->pNext = pLun;
1481 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1482 iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1483 }
1484 else if (pLun->pTop)
1485 {
1486 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1487 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1488 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1489 }
1490 Assert(pLun->pBase == pBaseInterface);
1491
1492
1493 /*
1494 * Get the attached driver configuration.
1495 */
1496 int rc;
1497 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1498 if (pNode)
1499 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
1500 else
1501 rc = VERR_PDM_NO_ATTACHED_DRIVER;
1502
1503
1504 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1505 return rc;
1506}
1507
1508
1509/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1510static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
1511 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1512{
1513 PDMDEV_ASSERT_DEVINS(pDevIns);
1514 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1515 pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1516
1517 PVM pVM = pDevIns->Internal.s.pVMR3;
1518 VM_ASSERT_EMT(pVM);
1519
1520 if (pDevIns->iInstance > 0)
1521 {
1522 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1523 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1524 }
1525
1526 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1527
1528 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppQueue));
1529 return rc;
1530}
1531
1532
1533/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1534static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1535 const char *pszNameFmt, va_list va)
1536{
1537 PDMDEV_ASSERT_DEVINS(pDevIns);
1538 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1539 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1540
1541 PVM pVM = pDevIns->Internal.s.pVMR3;
1542 VM_ASSERT_EMT(pVM);
1543 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1544
1545 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1546 return rc;
1547}
1548
1549
1550/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNop} */
1551static DECLCALLBACK(PPDMCRITSECT) pdmR3DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
1552{
1553 PDMDEV_ASSERT_DEVINS(pDevIns);
1554 PVM pVM = pDevIns->Internal.s.pVMR3;
1555 VM_ASSERT_EMT(pVM);
1556
1557 PPDMCRITSECT pCritSect = PDMR3CritSectGetNop(pVM);
1558 LogFlow(("pdmR3DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n",
1559 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1560 return pCritSect;
1561}
1562
1563
1564/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopR0} */
1565static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopR0(PPDMDEVINS pDevIns)
1566{
1567 PDMDEV_ASSERT_DEVINS(pDevIns);
1568 PVM pVM = pDevIns->Internal.s.pVMR3;
1569 VM_ASSERT_EMT(pVM);
1570
1571 R0PTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopR0(pVM);
1572 LogFlow(("pdmR3DevHlp_CritSectGetNopR0: caller='%s'/%d: return %RHv\n",
1573 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1574 return pCritSect;
1575}
1576
1577
1578/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopRC} */
1579static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopRC(PPDMDEVINS pDevIns)
1580{
1581 PDMDEV_ASSERT_DEVINS(pDevIns);
1582 PVM pVM = pDevIns->Internal.s.pVMR3;
1583 VM_ASSERT_EMT(pVM);
1584
1585 RCPTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopRC(pVM);
1586 LogFlow(("pdmR3DevHlp_CritSectGetNopRC: caller='%s'/%d: return %RRv\n",
1587 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1588 return pCritSect;
1589}
1590
1591
1592/** @interface_method_impl{PDMDEVHLPR3,pfnSetDeviceCritSect} */
1593static DECLCALLBACK(int) pdmR3DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
1594{
1595 /*
1596 * Validate input.
1597 *
1598 * Note! We only allow the automatically created default critical section
1599 * to be replaced by this API.
1600 */
1601 PDMDEV_ASSERT_DEVINS(pDevIns);
1602 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
1603 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
1604 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
1605 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
1606 PVM pVM = pDevIns->Internal.s.pVMR3;
1607 AssertReturn(pCritSect->s.pVMR3 == pVM, VERR_INVALID_PARAMETER);
1608
1609 VM_ASSERT_EMT(pVM);
1610 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1611
1612 AssertReturn(pDevIns->pCritSectRoR3, VERR_INTERNAL_ERROR_4);
1613 AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER);
1614 AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER);
1615 AssertReturn(pDevIns->pCritSectRoR3 != pCritSect, VERR_INVALID_PARAMETER);
1616
1617 /*
1618 * Replace the critical section and destroy the automatic default section.
1619 */
1620 PPDMCRITSECT pOldCritSect = pDevIns->pCritSectRoR3;
1621 pDevIns->pCritSectRoR3 = pCritSect;
1622 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1623 pDevIns->pCritSectRoR0 = MMHyperCCToR0(pVM, pDevIns->pCritSectRoR3);
1624 else
1625 Assert(pDevIns->pCritSectRoR0 == NIL_RTRCPTR);
1626
1627 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1628 pDevIns->pCritSectRoRC = MMHyperCCToRC(pVM, pDevIns->pCritSectRoR3);
1629 else
1630 Assert(pDevIns->pCritSectRoRC == NIL_RTRCPTR);
1631
1632 PDMR3CritSectDelete(pOldCritSect);
1633 if (pDevIns->pReg->fFlags & (PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0))
1634 MMHyperFree(pVM, pOldCritSect);
1635 else
1636 MMR3HeapFree(pOldCritSect);
1637
1638 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1639 return VINF_SUCCESS;
1640}
1641
1642
1643/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1644static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1645 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1646{
1647 PDMDEV_ASSERT_DEVINS(pDevIns);
1648 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1649 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1650 pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1651
1652 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1653
1654 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1655 rc, *ppThread));
1656 return rc;
1657}
1658
1659
1660/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1661static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1662{
1663 PDMDEV_ASSERT_DEVINS(pDevIns);
1664 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1665 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1666
1667 int rc = VINF_SUCCESS;
1668 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1669 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1670 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1671 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1672 AssertStmt( enmVMState == VMSTATE_SUSPENDING
1673 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1674 || enmVMState == VMSTATE_SUSPENDING_LS
1675 || enmVMState == VMSTATE_RESETTING
1676 || enmVMState == VMSTATE_RESETTING_LS
1677 || enmVMState == VMSTATE_POWERING_OFF
1678 || enmVMState == VMSTATE_POWERING_OFF_LS,
1679 rc = VERR_INVALID_STATE);
1680
1681 if (RT_SUCCESS(rc))
1682 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1683
1684 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1685 return rc;
1686}
1687
1688
1689/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1690static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1691{
1692 PDMDEV_ASSERT_DEVINS(pDevIns);
1693 PVM pVM = pDevIns->Internal.s.pVMR3;
1694
1695 VMSTATE enmVMState = VMR3GetState(pVM);
1696 if ( enmVMState == VMSTATE_SUSPENDING
1697 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1698 || enmVMState == VMSTATE_SUSPENDING_LS
1699 || enmVMState == VMSTATE_RESETTING
1700 || enmVMState == VMSTATE_RESETTING_LS
1701 || enmVMState == VMSTATE_POWERING_OFF
1702 || enmVMState == VMSTATE_POWERING_OFF_LS)
1703 {
1704 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1705 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1706 }
1707 else
1708 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1709}
1710
1711
1712/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1713static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1714{
1715 PDMDEV_ASSERT_DEVINS(pDevIns);
1716 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1717 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1718 pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1719 pRtcReg->pfnWrite, ppRtcHlp));
1720
1721 /*
1722 * Validate input.
1723 */
1724 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1725 {
1726 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1727 PDM_RTCREG_VERSION));
1728 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1729 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1730 return VERR_INVALID_PARAMETER;
1731 }
1732 if ( !pRtcReg->pfnWrite
1733 || !pRtcReg->pfnRead)
1734 {
1735 Assert(pRtcReg->pfnWrite);
1736 Assert(pRtcReg->pfnRead);
1737 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1738 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1739 return VERR_INVALID_PARAMETER;
1740 }
1741
1742 if (!ppRtcHlp)
1743 {
1744 Assert(ppRtcHlp);
1745 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1746 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1747 return VERR_INVALID_PARAMETER;
1748 }
1749
1750 /*
1751 * Only one DMA device.
1752 */
1753 PVM pVM = pDevIns->Internal.s.pVMR3;
1754 if (pVM->pdm.s.pRtc)
1755 {
1756 AssertMsgFailed(("Only one RTC device is supported!\n"));
1757 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1758 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1759 return VERR_INVALID_PARAMETER;
1760 }
1761
1762 /*
1763 * Allocate and initialize pci bus structure.
1764 */
1765 int rc = VINF_SUCCESS;
1766 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1767 if (pRtc)
1768 {
1769 pRtc->pDevIns = pDevIns;
1770 pRtc->Reg = *pRtcReg;
1771 pVM->pdm.s.pRtc = pRtc;
1772
1773 /* set the helper pointer. */
1774 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1775 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1776 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1777 }
1778 else
1779 rc = VERR_NO_MEMORY;
1780
1781 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1782 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1783 return rc;
1784}
1785
1786
1787/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1788static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1789{
1790 PDMDEV_ASSERT_DEVINS(pDevIns);
1791 PVM pVM = pDevIns->Internal.s.pVMR3;
1792 VM_ASSERT_EMT(pVM);
1793 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1794 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1795 int rc = VINF_SUCCESS;
1796 if (pVM->pdm.s.pDmac)
1797 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1798 else
1799 {
1800 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1801 rc = VERR_PDM_NO_DMAC_INSTANCE;
1802 }
1803 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1804 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1805 return rc;
1806}
1807
1808
1809/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1810static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
1811{
1812 PDMDEV_ASSERT_DEVINS(pDevIns);
1813 PVM pVM = pDevIns->Internal.s.pVMR3;
1814 VM_ASSERT_EMT(pVM);
1815 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1816 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1817 int rc = VINF_SUCCESS;
1818 if (pVM->pdm.s.pDmac)
1819 {
1820 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1821 if (pcbRead)
1822 *pcbRead = cb;
1823 }
1824 else
1825 {
1826 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1827 rc = VERR_PDM_NO_DMAC_INSTANCE;
1828 }
1829 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1830 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1831 return rc;
1832}
1833
1834
1835/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1836static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
1837{
1838 PDMDEV_ASSERT_DEVINS(pDevIns);
1839 PVM pVM = pDevIns->Internal.s.pVMR3;
1840 VM_ASSERT_EMT(pVM);
1841 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1842 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1843 int rc = VINF_SUCCESS;
1844 if (pVM->pdm.s.pDmac)
1845 {
1846 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1847 if (pcbWritten)
1848 *pcbWritten = cb;
1849 }
1850 else
1851 {
1852 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1853 rc = VERR_PDM_NO_DMAC_INSTANCE;
1854 }
1855 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1856 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1857 return rc;
1858}
1859
1860
1861/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1862static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1863{
1864 PDMDEV_ASSERT_DEVINS(pDevIns);
1865 PVM pVM = pDevIns->Internal.s.pVMR3;
1866 VM_ASSERT_EMT(pVM);
1867 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1868 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1869 int rc = VINF_SUCCESS;
1870 if (pVM->pdm.s.pDmac)
1871 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1872 else
1873 {
1874 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1875 rc = VERR_PDM_NO_DMAC_INSTANCE;
1876 }
1877 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1878 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1879 return rc;
1880}
1881
1882/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1883static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1884{
1885 PDMDEV_ASSERT_DEVINS(pDevIns);
1886 PVM pVM = pDevIns->Internal.s.pVMR3;
1887 VM_ASSERT_EMT(pVM);
1888 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1889 pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
1890 uint8_t u8Mode;
1891 if (pVM->pdm.s.pDmac)
1892 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1893 else
1894 {
1895 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1896 u8Mode = 3 << 2 /* illegal mode type */;
1897 }
1898 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1899 pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
1900 return u8Mode;
1901}
1902
1903/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1904static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1905{
1906 PDMDEV_ASSERT_DEVINS(pDevIns);
1907 PVM pVM = pDevIns->Internal.s.pVMR3;
1908 VM_ASSERT_EMT(pVM);
1909 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1910 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1911
1912 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1913 VM_FF_SET(pVM, VM_FF_PDM_DMA);
1914 REMR3NotifyDmaPending(pVM);
1915 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1916}
1917
1918
1919/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1920static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1921{
1922 PDMDEV_ASSERT_DEVINS(pDevIns);
1923 PVM pVM = pDevIns->Internal.s.pVMR3;
1924 VM_ASSERT_EMT(pVM);
1925
1926 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1927 pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
1928 int rc;
1929 if (pVM->pdm.s.pRtc)
1930 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1931 else
1932 rc = VERR_PDM_NO_RTC_INSTANCE;
1933
1934 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1935 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1936 return rc;
1937}
1938
1939
1940/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1941static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1942{
1943 PDMDEV_ASSERT_DEVINS(pDevIns);
1944 PVM pVM = pDevIns->Internal.s.pVMR3;
1945 VM_ASSERT_EMT(pVM);
1946
1947 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1948 pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
1949 int rc;
1950 if (pVM->pdm.s.pRtc)
1951 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1952 else
1953 rc = VERR_PDM_NO_RTC_INSTANCE;
1954
1955 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1956 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1957 return rc;
1958}
1959
1960
1961/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1962static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1963{
1964 PDMDEV_ASSERT_DEVINS(pDevIns);
1965 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1966 return true;
1967
1968 char szMsg[100];
1969 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1970 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1971 AssertBreakpoint();
1972 return false;
1973}
1974
1975
1976/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1977static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1978{
1979 PDMDEV_ASSERT_DEVINS(pDevIns);
1980 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1981 return true;
1982
1983 char szMsg[100];
1984 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1985 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1986 AssertBreakpoint();
1987 return false;
1988}
1989
1990
1991/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
1992static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1993 const char *pszSymPrefix, const char *pszSymList)
1994{
1995 PDMDEV_ASSERT_DEVINS(pDevIns);
1996 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1997 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1998 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1999
2000 int rc;
2001 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2002 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2003 {
2004 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2005 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2006 pvInterface, cbInterface,
2007 pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
2008 pszSymPrefix, pszSymList,
2009 false /*fRing0OrRC*/);
2010 else
2011 {
2012 AssertMsgFailed(("Not a raw-mode enabled driver\n"));
2013 rc = VERR_PERMISSION_DENIED;
2014 }
2015 }
2016 else
2017 {
2018 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2019 pszSymPrefix, pDevIns->pReg->szName));
2020 rc = VERR_INVALID_NAME;
2021 }
2022
2023 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2024 pDevIns->iInstance, rc));
2025 return rc;
2026}
2027
2028
2029/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
2030static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2031 const char *pszSymPrefix, const char *pszSymList)
2032{
2033 PDMDEV_ASSERT_DEVINS(pDevIns);
2034 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2035 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2036 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2037
2038 int rc;
2039 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2040 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2041 {
2042 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2043 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2044 pvInterface, cbInterface,
2045 pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
2046 pszSymPrefix, pszSymList,
2047 true /*fRing0OrRC*/);
2048 else
2049 {
2050 AssertMsgFailed(("Not a ring-0 enabled driver\n"));
2051 rc = VERR_PERMISSION_DENIED;
2052 }
2053 }
2054 else
2055 {
2056 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2057 pszSymPrefix, pDevIns->pReg->szName));
2058 rc = VERR_INVALID_NAME;
2059 }
2060
2061 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2062 pDevIns->iInstance, rc));
2063 return rc;
2064}
2065
2066
2067/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
2068static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
2069{
2070 PDMDEV_ASSERT_DEVINS(pDevIns);
2071 PVM pVM = pDevIns->Internal.s.pVMR3;
2072 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2073 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
2074 pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
2075
2076 /*
2077 * Resolve the ring-0 entry point. There is not need to remember this like
2078 * we do for drivers since this is mainly for construction time hacks and
2079 * other things that aren't performance critical.
2080 */
2081 int rc;
2082 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2083 {
2084 char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
2085 strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
2086 szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
2087
2088 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
2089 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
2090 if (RT_SUCCESS(rc))
2091 {
2092 /*
2093 * Make the ring-0 call.
2094 */
2095 PDMDEVICECALLREQHANDLERREQ Req;
2096 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2097 Req.Hdr.cbReq = sizeof(Req);
2098 Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2099 Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2100 Req.uOperation = uOperation;
2101 Req.u32Alignment = 0;
2102 Req.u64Arg = u64Arg;
2103 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2104 }
2105 else
2106 pfnReqHandlerR0 = NIL_RTR0PTR;
2107 }
2108 else
2109 rc = VERR_ACCESS_DENIED;
2110 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2111 pDevIns->iInstance, rc));
2112 return rc;
2113}
2114
2115
2116/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2117static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2118{
2119 PDMDEV_ASSERT_DEVINS(pDevIns);
2120 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2121 return pDevIns->Internal.s.pVMR3;
2122}
2123
2124
2125/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2126static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2127{
2128 PDMDEV_ASSERT_DEVINS(pDevIns);
2129 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2130 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2131 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2132}
2133
2134
2135/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2136static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2137{
2138 PDMDEV_ASSERT_DEVINS(pDevIns);
2139 PVM pVM = pDevIns->Internal.s.pVMR3;
2140 VM_ASSERT_EMT(pVM);
2141 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
2142 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
2143 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2144 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
2145 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
2146
2147 /*
2148 * Validate the structure.
2149 */
2150 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2151 {
2152 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2153 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2154 return VERR_INVALID_PARAMETER;
2155 }
2156 if ( !pPciBusReg->pfnRegisterR3
2157 || !pPciBusReg->pfnIORegionRegisterR3
2158 || !pPciBusReg->pfnSetIrqR3
2159 || !pPciBusReg->pfnSaveExecR3
2160 || !pPciBusReg->pfnLoadExecR3
2161 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
2162 {
2163 Assert(pPciBusReg->pfnRegisterR3);
2164 Assert(pPciBusReg->pfnIORegionRegisterR3);
2165 Assert(pPciBusReg->pfnSetIrqR3);
2166 Assert(pPciBusReg->pfnSaveExecR3);
2167 Assert(pPciBusReg->pfnLoadExecR3);
2168 Assert(pPciBusReg->pfnFakePCIBIOSR3);
2169 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2170 return VERR_INVALID_PARAMETER;
2171 }
2172 if ( pPciBusReg->pszSetIrqRC
2173 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
2174 {
2175 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2176 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2177 return VERR_INVALID_PARAMETER;
2178 }
2179 if ( pPciBusReg->pszSetIrqR0
2180 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2181 {
2182 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2183 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2184 return VERR_INVALID_PARAMETER;
2185 }
2186 if (!ppPciHlpR3)
2187 {
2188 Assert(ppPciHlpR3);
2189 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2190 return VERR_INVALID_PARAMETER;
2191 }
2192
2193 /*
2194 * Find free PCI bus entry.
2195 */
2196 unsigned iBus = 0;
2197 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2198 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2199 break;
2200 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2201 {
2202 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2203 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2204 return VERR_INVALID_PARAMETER;
2205 }
2206 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2207
2208 /*
2209 * Resolve and init the RC bits.
2210 */
2211 if (pPciBusReg->pszSetIrqRC)
2212 {
2213 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2214 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2215 if (RT_FAILURE(rc))
2216 {
2217 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2218 return rc;
2219 }
2220 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2221 }
2222 else
2223 {
2224 pPciBus->pfnSetIrqRC = 0;
2225 pPciBus->pDevInsRC = 0;
2226 }
2227
2228 /*
2229 * Resolve and init the R0 bits.
2230 */
2231 if (pPciBusReg->pszSetIrqR0)
2232 {
2233 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2234 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2235 if (RT_FAILURE(rc))
2236 {
2237 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2238 return rc;
2239 }
2240 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2241 }
2242 else
2243 {
2244 pPciBus->pfnSetIrqR0 = 0;
2245 pPciBus->pDevInsR0 = 0;
2246 }
2247
2248 /*
2249 * Init the R3 bits.
2250 */
2251 pPciBus->iBus = iBus;
2252 pPciBus->pDevInsR3 = pDevIns;
2253 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2254 pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2255 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2256 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2257 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2258 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
2259 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
2260 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2261
2262 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2263
2264 /* set the helper pointer and return. */
2265 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2266 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2267 return VINF_SUCCESS;
2268}
2269
2270
2271/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2272static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2273{
2274 PDMDEV_ASSERT_DEVINS(pDevIns);
2275 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2276 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2277 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2278 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2279 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2280 ppPicHlpR3));
2281
2282 /*
2283 * Validate input.
2284 */
2285 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2286 {
2287 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2288 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2289 return VERR_INVALID_PARAMETER;
2290 }
2291 if ( !pPicReg->pfnSetIrqR3
2292 || !pPicReg->pfnGetInterruptR3)
2293 {
2294 Assert(pPicReg->pfnSetIrqR3);
2295 Assert(pPicReg->pfnGetInterruptR3);
2296 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2297 return VERR_INVALID_PARAMETER;
2298 }
2299 if ( ( pPicReg->pszSetIrqRC
2300 || pPicReg->pszGetInterruptRC)
2301 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
2302 || !VALID_PTR(pPicReg->pszGetInterruptRC))
2303 )
2304 {
2305 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2306 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2307 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2308 return VERR_INVALID_PARAMETER;
2309 }
2310 if ( pPicReg->pszSetIrqRC
2311 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2312 {
2313 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2314 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2315 return VERR_INVALID_PARAMETER;
2316 }
2317 if ( pPicReg->pszSetIrqR0
2318 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2319 {
2320 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2321 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2322 return VERR_INVALID_PARAMETER;
2323 }
2324 if (!ppPicHlpR3)
2325 {
2326 Assert(ppPicHlpR3);
2327 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2328 return VERR_INVALID_PARAMETER;
2329 }
2330
2331 /*
2332 * Only one PIC device.
2333 */
2334 PVM pVM = pDevIns->Internal.s.pVMR3;
2335 if (pVM->pdm.s.Pic.pDevInsR3)
2336 {
2337 AssertMsgFailed(("Only one pic device is supported!\n"));
2338 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2339 return VERR_INVALID_PARAMETER;
2340 }
2341
2342 /*
2343 * RC stuff.
2344 */
2345 if (pPicReg->pszSetIrqRC)
2346 {
2347 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2348 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2349 if (RT_SUCCESS(rc))
2350 {
2351 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2352 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2353 }
2354 if (RT_FAILURE(rc))
2355 {
2356 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2357 return rc;
2358 }
2359 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2360 }
2361 else
2362 {
2363 pVM->pdm.s.Pic.pDevInsRC = 0;
2364 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2365 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2366 }
2367
2368 /*
2369 * R0 stuff.
2370 */
2371 if (pPicReg->pszSetIrqR0)
2372 {
2373 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2374 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2375 if (RT_SUCCESS(rc))
2376 {
2377 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2378 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2379 }
2380 if (RT_FAILURE(rc))
2381 {
2382 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2383 return rc;
2384 }
2385 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2386 Assert(pVM->pdm.s.Pic.pDevInsR0);
2387 }
2388 else
2389 {
2390 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2391 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2392 pVM->pdm.s.Pic.pDevInsR0 = 0;
2393 }
2394
2395 /*
2396 * R3 stuff.
2397 */
2398 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2399 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2400 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2401 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2402
2403 /* set the helper pointer and return. */
2404 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2405 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2406 return VINF_SUCCESS;
2407}
2408
2409
2410/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2411static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2412{
2413 PDMDEV_ASSERT_DEVINS(pDevIns);
2414 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2415 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2416 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2417 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2418 pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2419 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2420 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2421 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2422 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2423
2424 /*
2425 * Validate input.
2426 */
2427 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2428 {
2429 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2430 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2431 return VERR_INVALID_PARAMETER;
2432 }
2433 if ( !pApicReg->pfnGetInterruptR3
2434 || !pApicReg->pfnHasPendingIrqR3
2435 || !pApicReg->pfnSetBaseR3
2436 || !pApicReg->pfnGetBaseR3
2437 || !pApicReg->pfnSetTPRR3
2438 || !pApicReg->pfnGetTPRR3
2439 || !pApicReg->pfnWriteMSRR3
2440 || !pApicReg->pfnReadMSRR3
2441 || !pApicReg->pfnBusDeliverR3
2442 || !pApicReg->pfnLocalInterruptR3)
2443 {
2444 Assert(pApicReg->pfnGetInterruptR3);
2445 Assert(pApicReg->pfnHasPendingIrqR3);
2446 Assert(pApicReg->pfnSetBaseR3);
2447 Assert(pApicReg->pfnGetBaseR3);
2448 Assert(pApicReg->pfnSetTPRR3);
2449 Assert(pApicReg->pfnGetTPRR3);
2450 Assert(pApicReg->pfnWriteMSRR3);
2451 Assert(pApicReg->pfnReadMSRR3);
2452 Assert(pApicReg->pfnBusDeliverR3);
2453 Assert(pApicReg->pfnLocalInterruptR3);
2454 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2455 return VERR_INVALID_PARAMETER;
2456 }
2457 if ( ( pApicReg->pszGetInterruptRC
2458 || pApicReg->pszHasPendingIrqRC
2459 || pApicReg->pszSetBaseRC
2460 || pApicReg->pszGetBaseRC
2461 || pApicReg->pszSetTPRRC
2462 || pApicReg->pszGetTPRRC
2463 || pApicReg->pszWriteMSRRC
2464 || pApicReg->pszReadMSRRC
2465 || pApicReg->pszBusDeliverRC
2466 || pApicReg->pszLocalInterruptRC)
2467 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2468 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2469 || !VALID_PTR(pApicReg->pszSetBaseRC)
2470 || !VALID_PTR(pApicReg->pszGetBaseRC)
2471 || !VALID_PTR(pApicReg->pszSetTPRRC)
2472 || !VALID_PTR(pApicReg->pszGetTPRRC)
2473 || !VALID_PTR(pApicReg->pszWriteMSRRC)
2474 || !VALID_PTR(pApicReg->pszReadMSRRC)
2475 || !VALID_PTR(pApicReg->pszBusDeliverRC)
2476 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
2477 )
2478 {
2479 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2480 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2481 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2482 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2483 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2484 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2485 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2486 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2487 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2488 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2489 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2490 return VERR_INVALID_PARAMETER;
2491 }
2492 if ( ( pApicReg->pszGetInterruptR0
2493 || pApicReg->pszHasPendingIrqR0
2494 || pApicReg->pszSetBaseR0
2495 || pApicReg->pszGetBaseR0
2496 || pApicReg->pszSetTPRR0
2497 || pApicReg->pszGetTPRR0
2498 || pApicReg->pszWriteMSRR0
2499 || pApicReg->pszReadMSRR0
2500 || pApicReg->pszBusDeliverR0
2501 || pApicReg->pszLocalInterruptR0)
2502 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2503 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2504 || !VALID_PTR(pApicReg->pszSetBaseR0)
2505 || !VALID_PTR(pApicReg->pszGetBaseR0)
2506 || !VALID_PTR(pApicReg->pszSetTPRR0)
2507 || !VALID_PTR(pApicReg->pszGetTPRR0)
2508 || !VALID_PTR(pApicReg->pszReadMSRR0)
2509 || !VALID_PTR(pApicReg->pszWriteMSRR0)
2510 || !VALID_PTR(pApicReg->pszBusDeliverR0)
2511 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
2512 )
2513 {
2514 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2515 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2516 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2517 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2518 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2519 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2520 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2521 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2522 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2523 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2524 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2525 return VERR_INVALID_PARAMETER;
2526 }
2527 if (!ppApicHlpR3)
2528 {
2529 Assert(ppApicHlpR3);
2530 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2531 return VERR_INVALID_PARAMETER;
2532 }
2533
2534 /*
2535 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
2536 * as they need to communicate and share state easily.
2537 */
2538 PVM pVM = pDevIns->Internal.s.pVMR3;
2539 if (pVM->pdm.s.Apic.pDevInsR3)
2540 {
2541 AssertMsgFailed(("Only one apic device is supported!\n"));
2542 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2543 return VERR_INVALID_PARAMETER;
2544 }
2545
2546 /*
2547 * Resolve & initialize the RC bits.
2548 */
2549 if (pApicReg->pszGetInterruptRC)
2550 {
2551 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2552 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2553 if (RT_SUCCESS(rc))
2554 {
2555 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2556 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2557 }
2558 if (RT_SUCCESS(rc))
2559 {
2560 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2561 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2562 }
2563 if (RT_SUCCESS(rc))
2564 {
2565 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2566 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2567 }
2568 if (RT_SUCCESS(rc))
2569 {
2570 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2571 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2572 }
2573 if (RT_SUCCESS(rc))
2574 {
2575 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2576 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2577 }
2578 if (RT_SUCCESS(rc))
2579 {
2580 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2581 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2582 }
2583 if (RT_SUCCESS(rc))
2584 {
2585 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2586 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2587 }
2588 if (RT_SUCCESS(rc))
2589 {
2590 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2591 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2592 }
2593 if (RT_SUCCESS(rc))
2594 {
2595 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2596 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2597 }
2598 if (RT_FAILURE(rc))
2599 {
2600 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2601 return rc;
2602 }
2603 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2604 }
2605 else
2606 {
2607 pVM->pdm.s.Apic.pDevInsRC = 0;
2608 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2609 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2610 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2611 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2612 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2613 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2614 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2615 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2616 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2617 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2618 }
2619
2620 /*
2621 * Resolve & initialize the R0 bits.
2622 */
2623 if (pApicReg->pszGetInterruptR0)
2624 {
2625 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2626 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2627 if (RT_SUCCESS(rc))
2628 {
2629 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2630 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2631 }
2632 if (RT_SUCCESS(rc))
2633 {
2634 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2635 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2636 }
2637 if (RT_SUCCESS(rc))
2638 {
2639 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2640 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2641 }
2642 if (RT_SUCCESS(rc))
2643 {
2644 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2645 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2646 }
2647 if (RT_SUCCESS(rc))
2648 {
2649 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2650 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2651 }
2652 if (RT_SUCCESS(rc))
2653 {
2654 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2655 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2656 }
2657 if (RT_SUCCESS(rc))
2658 {
2659 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2660 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2661 }
2662 if (RT_SUCCESS(rc))
2663 {
2664 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2665 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2666 }
2667 if (RT_SUCCESS(rc))
2668 {
2669 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2670 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2671 }
2672 if (RT_FAILURE(rc))
2673 {
2674 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2675 return rc;
2676 }
2677 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2678 Assert(pVM->pdm.s.Apic.pDevInsR0);
2679 }
2680 else
2681 {
2682 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2683 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2684 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2685 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2686 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2687 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2688 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2689 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2690 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2691 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2692 pVM->pdm.s.Apic.pDevInsR0 = 0;
2693 }
2694
2695 /*
2696 * Initialize the HC bits.
2697 */
2698 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2699 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2700 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2701 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2702 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2703 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2704 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2705 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2706 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2707 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2708 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2709 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2710
2711 /* set the helper pointer and return. */
2712 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2713 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2714 return VINF_SUCCESS;
2715}
2716
2717
2718/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2719static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2720{
2721 PDMDEV_ASSERT_DEVINS(pDevIns);
2722 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2723 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2724 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2725 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2726
2727 /*
2728 * Validate input.
2729 */
2730 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2731 {
2732 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2733 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2734 return VERR_INVALID_PARAMETER;
2735 }
2736 if (!pIoApicReg->pfnSetIrqR3 || !pIoApicReg->pfnSendMsiR3)
2737 {
2738 Assert(pIoApicReg->pfnSetIrqR3);
2739 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2740 return VERR_INVALID_PARAMETER;
2741 }
2742 if ( pIoApicReg->pszSetIrqRC
2743 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
2744 {
2745 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2746 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2747 return VERR_INVALID_PARAMETER;
2748 }
2749 if ( pIoApicReg->pszSendMsiRC
2750 && !VALID_PTR(pIoApicReg->pszSendMsiRC))
2751 {
2752 Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
2753 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2754 return VERR_INVALID_PARAMETER;
2755 }
2756 if ( pIoApicReg->pszSetIrqR0
2757 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2758 {
2759 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2760 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2761 return VERR_INVALID_PARAMETER;
2762 }
2763 if ( pIoApicReg->pszSendMsiR0
2764 && !VALID_PTR(pIoApicReg->pszSendMsiR0))
2765 {
2766 Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
2767 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2768 return VERR_INVALID_PARAMETER;
2769 }
2770 if (!ppIoApicHlpR3)
2771 {
2772 Assert(ppIoApicHlpR3);
2773 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2774 return VERR_INVALID_PARAMETER;
2775 }
2776
2777 /*
2778 * The I/O APIC requires the APIC to be present (hacks++).
2779 * If the I/O APIC does GC stuff so must the APIC.
2780 */
2781 PVM pVM = pDevIns->Internal.s.pVMR3;
2782 if (!pVM->pdm.s.Apic.pDevInsR3)
2783 {
2784 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2785 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2786 return VERR_INVALID_PARAMETER;
2787 }
2788 if ( pIoApicReg->pszSetIrqRC
2789 && !pVM->pdm.s.Apic.pDevInsRC)
2790 {
2791 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2792 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2793 return VERR_INVALID_PARAMETER;
2794 }
2795
2796 /*
2797 * Only one I/O APIC device.
2798 */
2799 if (pVM->pdm.s.IoApic.pDevInsR3)
2800 {
2801 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2802 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2803 return VERR_INVALID_PARAMETER;
2804 }
2805
2806 /*
2807 * Resolve & initialize the GC bits.
2808 */
2809 if (pIoApicReg->pszSetIrqRC)
2810 {
2811 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2812 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2813 if (RT_FAILURE(rc))
2814 {
2815 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2816 return rc;
2817 }
2818 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2819 }
2820 else
2821 {
2822 pVM->pdm.s.IoApic.pDevInsRC = 0;
2823 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2824 }
2825
2826 if (pIoApicReg->pszSendMsiRC)
2827 {
2828 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
2829 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
2830 if (RT_FAILURE(rc))
2831 {
2832 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2833 return rc;
2834 }
2835 }
2836 else
2837 {
2838 pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
2839 }
2840
2841 /*
2842 * Resolve & initialize the R0 bits.
2843 */
2844 if (pIoApicReg->pszSetIrqR0)
2845 {
2846 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2847 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2848 if (RT_FAILURE(rc))
2849 {
2850 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2851 return rc;
2852 }
2853 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2854 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2855 }
2856 else
2857 {
2858 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2859 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2860 }
2861
2862 if (pIoApicReg->pszSendMsiR0)
2863 {
2864 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
2865 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
2866 if (RT_FAILURE(rc))
2867 {
2868 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2869 return rc;
2870 }
2871 }
2872 else
2873 {
2874 pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
2875 }
2876
2877
2878 /*
2879 * Initialize the R3 bits.
2880 */
2881 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2882 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2883 pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
2884 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2885
2886 /* set the helper pointer and return. */
2887 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2888 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2889 return VINF_SUCCESS;
2890}
2891
2892
2893/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2894static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2895{
2896 PDMDEV_ASSERT_DEVINS(pDevIns);
2897 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2898 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2899
2900 /*
2901 * Validate input.
2902 */
2903 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2904 {
2905 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2906 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2907 return VERR_INVALID_PARAMETER;
2908 }
2909
2910 if (!ppHpetHlpR3)
2911 {
2912 Assert(ppHpetHlpR3);
2913 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2914 return VERR_INVALID_PARAMETER;
2915 }
2916
2917 /* set the helper pointer and return. */
2918 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2919 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2920 return VINF_SUCCESS;
2921}
2922
2923
2924/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
2925static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
2926{
2927 PDMDEV_ASSERT_DEVINS(pDevIns);
2928 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2929 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n"));
2930
2931 /*
2932 * Validate input.
2933 */
2934 if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
2935 {
2936 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
2937 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2938 return VERR_INVALID_PARAMETER;
2939 }
2940
2941 if (!ppPciRawHlpR3)
2942 {
2943 Assert(ppPciRawHlpR3);
2944 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2945 return VERR_INVALID_PARAMETER;
2946 }
2947
2948 /* set the helper pointer and return. */
2949 *ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
2950 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2951 return VINF_SUCCESS;
2952}
2953
2954
2955/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2956static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2957{
2958 PDMDEV_ASSERT_DEVINS(pDevIns);
2959 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2960 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2961 pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2962 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2963
2964 /*
2965 * Validate input.
2966 */
2967 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2968 {
2969 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2970 PDM_DMACREG_VERSION));
2971 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2972 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2973 return VERR_INVALID_PARAMETER;
2974 }
2975 if ( !pDmacReg->pfnRun
2976 || !pDmacReg->pfnRegister
2977 || !pDmacReg->pfnReadMemory
2978 || !pDmacReg->pfnWriteMemory
2979 || !pDmacReg->pfnSetDREQ
2980 || !pDmacReg->pfnGetChannelMode)
2981 {
2982 Assert(pDmacReg->pfnRun);
2983 Assert(pDmacReg->pfnRegister);
2984 Assert(pDmacReg->pfnReadMemory);
2985 Assert(pDmacReg->pfnWriteMemory);
2986 Assert(pDmacReg->pfnSetDREQ);
2987 Assert(pDmacReg->pfnGetChannelMode);
2988 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2989 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2990 return VERR_INVALID_PARAMETER;
2991 }
2992
2993 if (!ppDmacHlp)
2994 {
2995 Assert(ppDmacHlp);
2996 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2997 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2998 return VERR_INVALID_PARAMETER;
2999 }
3000
3001 /*
3002 * Only one DMA device.
3003 */
3004 PVM pVM = pDevIns->Internal.s.pVMR3;
3005 if (pVM->pdm.s.pDmac)
3006 {
3007 AssertMsgFailed(("Only one DMA device is supported!\n"));
3008 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3009 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3010 return VERR_INVALID_PARAMETER;
3011 }
3012
3013 /*
3014 * Allocate and initialize pci bus structure.
3015 */
3016 int rc = VINF_SUCCESS;
3017 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3018 if (pDmac)
3019 {
3020 pDmac->pDevIns = pDevIns;
3021 pDmac->Reg = *pDmacReg;
3022 pVM->pdm.s.pDmac = pDmac;
3023
3024 /* set the helper pointer. */
3025 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3026 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3027 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3028 }
3029 else
3030 rc = VERR_NO_MEMORY;
3031
3032 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3033 pDevIns->pReg->szName, pDevIns->iInstance, rc));
3034 return rc;
3035}
3036
3037
3038/**
3039 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3040 */
3041static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3042{
3043 PDMDEV_ASSERT_DEVINS(pDevIns);
3044 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3045
3046 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
3047 return rc;
3048}
3049
3050
3051/**
3052 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3053 */
3054static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3055{
3056 PDMDEV_ASSERT_DEVINS(pDevIns);
3057 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3058
3059 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
3060 return rc;
3061}
3062
3063
3064/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3065static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3066{
3067 PDMDEV_ASSERT_DEVINS(pDevIns);
3068 PVM pVM = pDevIns->Internal.s.pVMR3;
3069 VM_ASSERT_EMT(pVM);
3070 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3071 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
3072
3073 /*
3074 * We postpone this operation because we're likely to be inside a I/O instruction
3075 * and the EIP will be updated when we return.
3076 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3077 */
3078 bool fHaltOnReset;
3079 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3080 if (RT_SUCCESS(rc) && fHaltOnReset)
3081 {
3082 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3083 rc = VINF_EM_HALT;
3084 }
3085 else
3086 {
3087 VM_FF_SET(pVM, VM_FF_RESET);
3088 rc = VINF_EM_RESET;
3089 }
3090
3091 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3092 return rc;
3093}
3094
3095
3096/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3097static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3098{
3099 int rc;
3100 PDMDEV_ASSERT_DEVINS(pDevIns);
3101 PVM pVM = pDevIns->Internal.s.pVMR3;
3102 VM_ASSERT_EMT(pVM);
3103 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3104 pDevIns->pReg->szName, pDevIns->iInstance));
3105
3106 /** @todo Always take the SMP path - fewer code paths. */
3107 if (pVM->cCpus > 1)
3108 {
3109 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3110 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
3111 AssertRC(rc);
3112 rc = VINF_EM_SUSPEND;
3113 }
3114 else
3115 rc = VMR3Suspend(pVM);
3116
3117 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3118 return rc;
3119}
3120
3121
3122/**
3123 * Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3124 * EMT request to avoid deadlocks.
3125 *
3126 * @returns VBox status code fit for scheduling.
3127 * @param pVM The VM handle.
3128 * @param pDevIns The device that triggered this action.
3129 */
3130static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3131{
3132 /*
3133 * Suspend the VM first then do the saving.
3134 */
3135 int rc = VMR3Suspend(pVM);
3136 if (RT_SUCCESS(rc))
3137 {
3138 PUVM pUVM = pVM->pUVM;
3139 rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3140
3141 /*
3142 * On success, power off the VM, on failure we'll leave it suspended.
3143 */
3144 if (RT_SUCCESS(rc))
3145 {
3146 rc = VMR3PowerOff(pVM);
3147 if (RT_FAILURE(rc))
3148 LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3149 }
3150 else
3151 LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3152 }
3153 else
3154 LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3155 return rc;
3156}
3157
3158
3159/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3160static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3161{
3162 PDMDEV_ASSERT_DEVINS(pDevIns);
3163 PVM pVM = pDevIns->Internal.s.pVMR3;
3164 VM_ASSERT_EMT(pVM);
3165 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3166 pDevIns->pReg->szName, pDevIns->iInstance));
3167
3168 int rc;
3169 if ( pVM->pUVM->pVmm2UserMethods
3170 && pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3171 {
3172 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3173 if (RT_SUCCESS(rc))
3174 {
3175 LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3176 rc = VINF_EM_SUSPEND;
3177 }
3178 }
3179 else
3180 rc = VERR_NOT_SUPPORTED;
3181
3182 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3183 return rc;
3184}
3185
3186
3187/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3188static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3189{
3190 int rc;
3191 PDMDEV_ASSERT_DEVINS(pDevIns);
3192 PVM pVM = pDevIns->Internal.s.pVMR3;
3193 VM_ASSERT_EMT(pVM);
3194 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3195 pDevIns->pReg->szName, pDevIns->iInstance));
3196
3197 /** @todo Always take the SMP path - fewer code paths. */
3198 if (pVM->cCpus > 1)
3199 {
3200 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3201 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
3202 AssertRC(rc);
3203 /* Set the VCPU state to stopped here as well to make sure no
3204 * inconsistency with the EM state occurs.
3205 */
3206 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3207 rc = VINF_EM_OFF;
3208 }
3209 else
3210 rc = VMR3PowerOff(pVM);
3211
3212 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3213 return rc;
3214}
3215
3216
3217/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3218static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3219{
3220 PDMDEV_ASSERT_DEVINS(pDevIns);
3221 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3222
3223 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3224
3225 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3226 return fRc;
3227}
3228
3229
3230/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3231static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3232{
3233 PDMDEV_ASSERT_DEVINS(pDevIns);
3234 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3235 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3236 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3237}
3238
3239
3240/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3241static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3242 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3243{
3244 PDMDEV_ASSERT_DEVINS(pDevIns);
3245 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3246
3247 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3248 pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3249 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3250
3251 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
3252
3253 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3254 pDevIns->pReg->szName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3255}
3256
3257
3258/**
3259 * The device helper structure for trusted devices.
3260 */
3261const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3262{
3263 PDM_DEVHLPR3_VERSION,
3264 pdmR3DevHlp_IOPortRegister,
3265 pdmR3DevHlp_IOPortRegisterRC,
3266 pdmR3DevHlp_IOPortRegisterR0,
3267 pdmR3DevHlp_IOPortDeregister,
3268 pdmR3DevHlp_MMIORegister,
3269 pdmR3DevHlp_MMIORegisterRC,
3270 pdmR3DevHlp_MMIORegisterR0,
3271 pdmR3DevHlp_MMIODeregister,
3272 pdmR3DevHlp_MMIO2Register,
3273 pdmR3DevHlp_MMIO2Deregister,
3274 pdmR3DevHlp_MMIO2Map,
3275 pdmR3DevHlp_MMIO2Unmap,
3276 pdmR3DevHlp_MMHyperMapMMIO2,
3277 pdmR3DevHlp_MMIO2MapKernel,
3278 pdmR3DevHlp_ROMRegister,
3279 pdmR3DevHlp_ROMProtectShadow,
3280 pdmR3DevHlp_SSMRegister,
3281 pdmR3DevHlp_TMTimerCreate,
3282 pdmR3DevHlp_TMUtcNow,
3283 pdmR3DevHlp_PhysRead,
3284 pdmR3DevHlp_PhysWrite,
3285 pdmR3DevHlp_PhysGCPhys2CCPtr,
3286 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3287 pdmR3DevHlp_PhysReleasePageMappingLock,
3288 pdmR3DevHlp_PhysReadGCVirt,
3289 pdmR3DevHlp_PhysWriteGCVirt,
3290 pdmR3DevHlp_PhysGCPtr2GCPhys,
3291 pdmR3DevHlp_MMHeapAlloc,
3292 pdmR3DevHlp_MMHeapAllocZ,
3293 pdmR3DevHlp_MMHeapFree,
3294 pdmR3DevHlp_VMState,
3295 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3296 pdmR3DevHlp_VMSetError,
3297 pdmR3DevHlp_VMSetErrorV,
3298 pdmR3DevHlp_VMSetRuntimeError,
3299 pdmR3DevHlp_VMSetRuntimeErrorV,
3300 pdmR3DevHlp_DBGFStopV,
3301 pdmR3DevHlp_DBGFInfoRegister,
3302 pdmR3DevHlp_DBGFTraceBuf,
3303 pdmR3DevHlp_STAMRegister,
3304 pdmR3DevHlp_STAMRegisterF,
3305 pdmR3DevHlp_STAMRegisterV,
3306 pdmR3DevHlp_PCIRegister,
3307 pdmR3DevHlp_PCIRegisterMsi,
3308 pdmR3DevHlp_PCIIORegionRegister,
3309 pdmR3DevHlp_PCISetConfigCallbacks,
3310 pdmR3DevHlp_PCISetIrq,
3311 pdmR3DevHlp_PCISetIrqNoWait,
3312 pdmR3DevHlp_ISASetIrq,
3313 pdmR3DevHlp_ISASetIrqNoWait,
3314 pdmR3DevHlp_DriverAttach,
3315 pdmR3DevHlp_QueueCreate,
3316 pdmR3DevHlp_CritSectInit,
3317 pdmR3DevHlp_CritSectGetNop,
3318 pdmR3DevHlp_CritSectGetNopR0,
3319 pdmR3DevHlp_CritSectGetNopRC,
3320 pdmR3DevHlp_SetDeviceCritSect,
3321 pdmR3DevHlp_ThreadCreate,
3322 pdmR3DevHlp_SetAsyncNotification,
3323 pdmR3DevHlp_AsyncNotificationCompleted,
3324 pdmR3DevHlp_RTCRegister,
3325 pdmR3DevHlp_PCIBusRegister,
3326 pdmR3DevHlp_PICRegister,
3327 pdmR3DevHlp_APICRegister,
3328 pdmR3DevHlp_IOAPICRegister,
3329 pdmR3DevHlp_HPETRegister,
3330 pdmR3DevHlp_PciRawRegister,
3331 pdmR3DevHlp_DMACRegister,
3332 pdmR3DevHlp_DMARegister,
3333 pdmR3DevHlp_DMAReadMemory,
3334 pdmR3DevHlp_DMAWriteMemory,
3335 pdmR3DevHlp_DMASetDREQ,
3336 pdmR3DevHlp_DMAGetChannelMode,
3337 pdmR3DevHlp_DMASchedule,
3338 pdmR3DevHlp_CMOSWrite,
3339 pdmR3DevHlp_CMOSRead,
3340 pdmR3DevHlp_AssertEMT,
3341 pdmR3DevHlp_AssertOther,
3342 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3343 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3344 pdmR3DevHlp_CallR0,
3345 0,
3346 0,
3347 0,
3348 0,
3349 0,
3350 0,
3351 0,
3352 0,
3353 0,
3354 0,
3355 pdmR3DevHlp_GetVM,
3356 pdmR3DevHlp_GetVMCPU,
3357 pdmR3DevHlp_RegisterVMMDevHeap,
3358 pdmR3DevHlp_UnregisterVMMDevHeap,
3359 pdmR3DevHlp_VMReset,
3360 pdmR3DevHlp_VMSuspend,
3361 pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3362 pdmR3DevHlp_VMPowerOff,
3363 pdmR3DevHlp_A20IsEnabled,
3364 pdmR3DevHlp_A20Set,
3365 pdmR3DevHlp_GetCpuId,
3366 pdmR3DevHlp_TMTimeVirtGet,
3367 pdmR3DevHlp_TMTimeVirtGetFreq,
3368 pdmR3DevHlp_TMTimeVirtGetNano,
3369 PDM_DEVHLPR3_VERSION /* the end */
3370};
3371
3372
3373
3374
3375/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3376static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3377{
3378 PDMDEV_ASSERT_DEVINS(pDevIns);
3379 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3380 return NULL;
3381}
3382
3383
3384/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3385static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3386{
3387 PDMDEV_ASSERT_DEVINS(pDevIns);
3388 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3389 return NULL;
3390}
3391
3392
3393/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3394static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3395{
3396 PDMDEV_ASSERT_DEVINS(pDevIns);
3397 NOREF(GCPhys); NOREF(pvHeap); NOREF(cbSize);
3398 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3399 return VERR_ACCESS_DENIED;
3400}
3401
3402
3403/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3404static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3405{
3406 PDMDEV_ASSERT_DEVINS(pDevIns);
3407 NOREF(GCPhys);
3408 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3409 return VERR_ACCESS_DENIED;
3410}
3411
3412
3413/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3414static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3415{
3416 PDMDEV_ASSERT_DEVINS(pDevIns);
3417 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3418 return VERR_ACCESS_DENIED;
3419}
3420
3421
3422/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3423static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3424{
3425 PDMDEV_ASSERT_DEVINS(pDevIns);
3426 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3427 return VERR_ACCESS_DENIED;
3428}
3429
3430
3431/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3432static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3433{
3434 PDMDEV_ASSERT_DEVINS(pDevIns);
3435 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3436 return VERR_ACCESS_DENIED;
3437}
3438
3439
3440/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3441static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3442{
3443 PDMDEV_ASSERT_DEVINS(pDevIns);
3444 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3445 return VERR_ACCESS_DENIED;
3446}
3447
3448
3449/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3450static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3451{
3452 PDMDEV_ASSERT_DEVINS(pDevIns);
3453 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3454 return false;
3455}
3456
3457
3458/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3459static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3460{
3461 PDMDEV_ASSERT_DEVINS(pDevIns);
3462 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3463 NOREF(fEnable);
3464}
3465
3466
3467/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3468static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3469 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3470{
3471 PDMDEV_ASSERT_DEVINS(pDevIns);
3472 NOREF(iLeaf); NOREF(pEax); NOREF(pEbx); NOREF(pEcx); NOREF(pEdx);
3473 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3474}
3475
3476
3477/**
3478 * The device helper structure for non-trusted devices.
3479 */
3480const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3481{
3482 PDM_DEVHLPR3_VERSION,
3483 pdmR3DevHlp_IOPortRegister,
3484 pdmR3DevHlp_IOPortRegisterRC,
3485 pdmR3DevHlp_IOPortRegisterR0,
3486 pdmR3DevHlp_IOPortDeregister,
3487 pdmR3DevHlp_MMIORegister,
3488 pdmR3DevHlp_MMIORegisterRC,
3489 pdmR3DevHlp_MMIORegisterR0,
3490 pdmR3DevHlp_MMIODeregister,
3491 pdmR3DevHlp_MMIO2Register,
3492 pdmR3DevHlp_MMIO2Deregister,
3493 pdmR3DevHlp_MMIO2Map,
3494 pdmR3DevHlp_MMIO2Unmap,
3495 pdmR3DevHlp_MMHyperMapMMIO2,
3496 pdmR3DevHlp_MMIO2MapKernel,
3497 pdmR3DevHlp_ROMRegister,
3498 pdmR3DevHlp_ROMProtectShadow,
3499 pdmR3DevHlp_SSMRegister,
3500 pdmR3DevHlp_TMTimerCreate,
3501 pdmR3DevHlp_TMUtcNow,
3502 pdmR3DevHlp_PhysRead,
3503 pdmR3DevHlp_PhysWrite,
3504 pdmR3DevHlp_PhysGCPhys2CCPtr,
3505 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3506 pdmR3DevHlp_PhysReleasePageMappingLock,
3507 pdmR3DevHlp_PhysReadGCVirt,
3508 pdmR3DevHlp_PhysWriteGCVirt,
3509 pdmR3DevHlp_PhysGCPtr2GCPhys,
3510 pdmR3DevHlp_MMHeapAlloc,
3511 pdmR3DevHlp_MMHeapAllocZ,
3512 pdmR3DevHlp_MMHeapFree,
3513 pdmR3DevHlp_VMState,
3514 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3515 pdmR3DevHlp_VMSetError,
3516 pdmR3DevHlp_VMSetErrorV,
3517 pdmR3DevHlp_VMSetRuntimeError,
3518 pdmR3DevHlp_VMSetRuntimeErrorV,
3519 pdmR3DevHlp_DBGFStopV,
3520 pdmR3DevHlp_DBGFInfoRegister,
3521 pdmR3DevHlp_DBGFTraceBuf,
3522 pdmR3DevHlp_STAMRegister,
3523 pdmR3DevHlp_STAMRegisterF,
3524 pdmR3DevHlp_STAMRegisterV,
3525 pdmR3DevHlp_PCIRegister,
3526 pdmR3DevHlp_PCIRegisterMsi,
3527 pdmR3DevHlp_PCIIORegionRegister,
3528 pdmR3DevHlp_PCISetConfigCallbacks,
3529 pdmR3DevHlp_PCISetIrq,
3530 pdmR3DevHlp_PCISetIrqNoWait,
3531 pdmR3DevHlp_ISASetIrq,
3532 pdmR3DevHlp_ISASetIrqNoWait,
3533 pdmR3DevHlp_DriverAttach,
3534 pdmR3DevHlp_QueueCreate,
3535 pdmR3DevHlp_CritSectInit,
3536 pdmR3DevHlp_CritSectGetNop,
3537 pdmR3DevHlp_CritSectGetNopR0,
3538 pdmR3DevHlp_CritSectGetNopRC,
3539 pdmR3DevHlp_SetDeviceCritSect,
3540 pdmR3DevHlp_ThreadCreate,
3541 pdmR3DevHlp_SetAsyncNotification,
3542 pdmR3DevHlp_AsyncNotificationCompleted,
3543 pdmR3DevHlp_RTCRegister,
3544 pdmR3DevHlp_PCIBusRegister,
3545 pdmR3DevHlp_PICRegister,
3546 pdmR3DevHlp_APICRegister,
3547 pdmR3DevHlp_IOAPICRegister,
3548 pdmR3DevHlp_HPETRegister,
3549 pdmR3DevHlp_PciRawRegister,
3550 pdmR3DevHlp_DMACRegister,
3551 pdmR3DevHlp_DMARegister,
3552 pdmR3DevHlp_DMAReadMemory,
3553 pdmR3DevHlp_DMAWriteMemory,
3554 pdmR3DevHlp_DMASetDREQ,
3555 pdmR3DevHlp_DMAGetChannelMode,
3556 pdmR3DevHlp_DMASchedule,
3557 pdmR3DevHlp_CMOSWrite,
3558 pdmR3DevHlp_CMOSRead,
3559 pdmR3DevHlp_AssertEMT,
3560 pdmR3DevHlp_AssertOther,
3561 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3562 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3563 pdmR3DevHlp_CallR0,
3564 0,
3565 0,
3566 0,
3567 0,
3568 0,
3569 0,
3570 0,
3571 0,
3572 0,
3573 0,
3574 pdmR3DevHlp_Untrusted_GetVM,
3575 pdmR3DevHlp_Untrusted_GetVMCPU,
3576 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3577 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3578 pdmR3DevHlp_Untrusted_VMReset,
3579 pdmR3DevHlp_Untrusted_VMSuspend,
3580 pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3581 pdmR3DevHlp_Untrusted_VMPowerOff,
3582 pdmR3DevHlp_Untrusted_A20IsEnabled,
3583 pdmR3DevHlp_Untrusted_A20Set,
3584 pdmR3DevHlp_Untrusted_GetCpuId,
3585 pdmR3DevHlp_TMTimeVirtGet,
3586 pdmR3DevHlp_TMTimeVirtGetFreq,
3587 pdmR3DevHlp_TMTimeVirtGetNano,
3588 PDM_DEVHLPR3_VERSION /* the end */
3589};
3590
3591
3592
3593/**
3594 * Queue consumer callback for internal component.
3595 *
3596 * @returns Success indicator.
3597 * If false the item will not be removed and the flushing will stop.
3598 * @param pVM The VM handle.
3599 * @param pItem The item to consume. Upon return this item will be freed.
3600 */
3601DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3602{
3603 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3604 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3605 switch (pTask->enmOp)
3606 {
3607 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3608 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3609 break;
3610
3611 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3612 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3613 break;
3614
3615 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3616 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3617 break;
3618
3619 default:
3620 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3621 break;
3622 }
3623 return true;
3624}
3625
3626/** @} */
3627
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