VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 45665

Last change on this file since 45665 was 45645, checked in by vboxsync, 12 years ago

VMM/PDMDevHlp: Add helper to get the SUPDrv session handle (intended for the semaphore API)

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1/* $Id: PDMDevHlp.cpp 45645 2013-04-19 13:46:48Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/mm.h>
26#include <VBox/vmm/pgm.h>
27#include <VBox/vmm/iom.h>
28#ifdef VBOX_WITH_REM
29# include <VBox/vmm/rem.h>
30#endif
31#include <VBox/vmm/dbgf.h>
32#include <VBox/vmm/vmapi.h>
33#include <VBox/vmm/vm.h>
34#include <VBox/vmm/uvm.h>
35#include <VBox/vmm/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/ctype.h>
43#include <iprt/string.h>
44#include <iprt/thread.h>
45
46#include "dtrace/VBoxVMM.h"
47#include "PDMInline.h"
48
49
50/*******************************************************************************
51* Defined Constants And Macros *
52*******************************************************************************/
53/** @def PDM_DEVHLP_DEADLOCK_DETECTION
54 * Define this to enable the deadlock detection when accessing physical memory.
55 */
56#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
57# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
58#endif
59
60
61
62/**
63 * Wrapper around PDMR3LdrGetSymbolRCLazy.
64 */
65DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
66{
67 return PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3,
68 pDevIns->Internal.s.pDevR3->pReg->szRCMod,
69 pDevIns->Internal.s.pDevR3->pszRCSearchPath,
70 pszSymbol, ppvValue);
71}
72
73
74/**
75 * Wrapper around PDMR3LdrGetSymbolR0Lazy.
76 */
77DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
78{
79 return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
80 pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
81 pDevIns->Internal.s.pDevR3->pszR0SearchPath,
82 pszSymbol, ppvValue);
83}
84
85
86/** @name R3 DevHlp
87 * @{
88 */
89
90
91/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
92static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
93 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
97 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
98 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
99
100#if 0 /** @todo needs a real string cache for this */
101 if (pDevIns->iInstance > 0)
102 {
103 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
104 if (pszDesc2)
105 pszDesc = pszDesc2;
106 }
107#endif
108
109 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser,
110 pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
111
112 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
113 return rc;
114}
115
116
117/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
118static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
119 const char *pszOut, const char *pszIn,
120 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
121{
122 PDMDEV_ASSERT_DEVINS(pDevIns);
123 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
124 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
125 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
126
127 /*
128 * Resolve the functions (one of the can be NULL).
129 */
130 int rc = VINF_SUCCESS;
131 if ( pDevIns->pReg->szRCMod[0]
132 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
133 {
134 RTRCPTR RCPtrIn = NIL_RTRCPTR;
135 if (pszIn)
136 {
137 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
138 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
139 }
140 RTRCPTR RCPtrOut = NIL_RTRCPTR;
141 if (pszOut && RT_SUCCESS(rc))
142 {
143 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
144 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
145 }
146 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
147 if (pszInStr && RT_SUCCESS(rc))
148 {
149 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
150 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
151 }
152 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
153 if (pszOutStr && RT_SUCCESS(rc))
154 {
155 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
156 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
157 }
158
159 if (RT_SUCCESS(rc))
160 {
161#if 0 /** @todo needs a real string cache for this */
162 if (pDevIns->iInstance > 0)
163 {
164 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
165 if (pszDesc2)
166 pszDesc = pszDesc2;
167 }
168#endif
169
170 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
171 }
172 }
173 else
174 {
175 AssertMsgFailed(("No GC module for this driver!\n"));
176 rc = VERR_INVALID_PARAMETER;
177 }
178
179 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
180 return rc;
181}
182
183
184/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
185static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
186 const char *pszOut, const char *pszIn,
187 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
188{
189 PDMDEV_ASSERT_DEVINS(pDevIns);
190 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
191 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
192 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
193
194 /*
195 * Resolve the functions (one of the can be NULL).
196 */
197 int rc = VINF_SUCCESS;
198 if ( pDevIns->pReg->szR0Mod[0]
199 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
200 {
201 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
202 if (pszIn)
203 {
204 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
205 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
206 }
207 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
208 if (pszOut && RT_SUCCESS(rc))
209 {
210 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
211 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
212 }
213 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
214 if (pszInStr && RT_SUCCESS(rc))
215 {
216 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
217 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
218 }
219 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
220 if (pszOutStr && RT_SUCCESS(rc))
221 {
222 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
223 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
224 }
225
226 if (RT_SUCCESS(rc))
227 {
228#if 0 /** @todo needs a real string cache for this */
229 if (pDevIns->iInstance > 0)
230 {
231 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
232 if (pszDesc2)
233 pszDesc = pszDesc2;
234 }
235#endif
236
237 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
238 }
239 }
240 else
241 {
242 AssertMsgFailed(("No R0 module for this driver!\n"));
243 rc = VERR_INVALID_PARAMETER;
244 }
245
246 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
247 return rc;
248}
249
250
251/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
252static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
253{
254 PDMDEV_ASSERT_DEVINS(pDevIns);
255 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
256 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
257 Port, cPorts));
258
259 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
260
261 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
262 return rc;
263}
264
265
266/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
267static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
268 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
269 uint32_t fFlags, const char *pszDesc)
270{
271 PDMDEV_ASSERT_DEVINS(pDevIns);
272 PVM pVM = pDevIns->Internal.s.pVMR3;
273 VM_ASSERT_EMT(pVM);
274 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p fFlags=%#x pszDesc=%p:{%s}\n",
275 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, fFlags, pszDesc));
276
277 if (pDevIns->iInstance > 0)
278 {
279 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
280 if (pszDesc2)
281 pszDesc = pszDesc2;
282 }
283
284 int rc = IOMR3MmioRegisterR3(pVM, pDevIns, GCPhysStart, cbRange, pvUser,
285 pfnWrite, pfnRead, pfnFill, fFlags, pszDesc);
286
287 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
288 return rc;
289}
290
291
292/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
293static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
294 const char *pszWrite, const char *pszRead, const char *pszFill)
295{
296 PDMDEV_ASSERT_DEVINS(pDevIns);
297 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
298 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
299 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
300
301
302 /*
303 * Resolve the functions.
304 * Not all function have to present, leave it to IOM to enforce this.
305 */
306 int rc = VINF_SUCCESS;
307 if ( pDevIns->pReg->szRCMod[0]
308 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
309 {
310 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
311 if (pszWrite)
312 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
313
314 RTRCPTR RCPtrRead = NIL_RTRCPTR;
315 int rc2 = VINF_SUCCESS;
316 if (pszRead)
317 rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
318
319 RTRCPTR RCPtrFill = NIL_RTRCPTR;
320 int rc3 = VINF_SUCCESS;
321 if (pszFill)
322 rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
323
324 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
325 rc = IOMR3MmioRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
326 else
327 {
328 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
329 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
330 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
331 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
332 rc = rc2;
333 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
334 rc = rc3;
335 }
336 }
337 else
338 {
339 AssertMsgFailed(("No GC module for this driver!\n"));
340 rc = VERR_INVALID_PARAMETER;
341 }
342
343 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
344 return rc;
345}
346
347/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
348static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
349 const char *pszWrite, const char *pszRead, const char *pszFill)
350{
351 PDMDEV_ASSERT_DEVINS(pDevIns);
352 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
353 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
354 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
355
356 /*
357 * Resolve the functions.
358 * Not all function have to present, leave it to IOM to enforce this.
359 */
360 int rc = VINF_SUCCESS;
361 if ( pDevIns->pReg->szR0Mod[0]
362 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
363 {
364 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
365 if (pszWrite)
366 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
367 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
368 int rc2 = VINF_SUCCESS;
369 if (pszRead)
370 rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
371 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
372 int rc3 = VINF_SUCCESS;
373 if (pszFill)
374 rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
375 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
376 rc = IOMR3MmioRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
377 else
378 {
379 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
380 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
381 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
382 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
383 rc = rc2;
384 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
385 rc = rc3;
386 }
387 }
388 else
389 {
390 AssertMsgFailed(("No R0 module for this driver!\n"));
391 rc = VERR_INVALID_PARAMETER;
392 }
393
394 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
395 return rc;
396}
397
398
399/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
400static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
401{
402 PDMDEV_ASSERT_DEVINS(pDevIns);
403 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
404 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
405 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
406
407 int rc = IOMR3MmioDeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
408
409 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
410 return rc;
411}
412
413
414/**
415 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
416 */
417static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
418{
419 PDMDEV_ASSERT_DEVINS(pDevIns);
420 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
421 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
422 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
423
424/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
425 * use a real string cache. */
426 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
427
428 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
429 return rc;
430}
431
432
433/**
434 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
435 */
436static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
437{
438 PDMDEV_ASSERT_DEVINS(pDevIns);
439 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
440 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
441 pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
442
443 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
444
445 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
446
447 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
448 return rc;
449}
450
451
452/**
453 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
454 */
455static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
456{
457 PDMDEV_ASSERT_DEVINS(pDevIns);
458 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
459 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
460 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
461
462 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
463
464 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
465 return rc;
466}
467
468
469/**
470 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
471 */
472static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
473{
474 PDMDEV_ASSERT_DEVINS(pDevIns);
475 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
476 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
477 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
478
479 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
480
481 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
482 return rc;
483}
484
485
486/**
487 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
488 */
489static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
490 const char *pszDesc, PRTRCPTR pRCPtr)
491{
492 PDMDEV_ASSERT_DEVINS(pDevIns);
493 PVM pVM = pDevIns->Internal.s.pVMR3;
494 VM_ASSERT_EMT(pVM);
495 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
496 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
497
498 if (pDevIns->iInstance > 0)
499 {
500 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
501 if (pszDesc2)
502 pszDesc = pszDesc2;
503 }
504
505 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
506
507 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pRCPtr));
508 return rc;
509}
510
511
512/**
513 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
514 */
515static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
516 const char *pszDesc, PRTR0PTR pR0Ptr)
517{
518 PDMDEV_ASSERT_DEVINS(pDevIns);
519 PVM pVM = pDevIns->Internal.s.pVMR3;
520 VM_ASSERT_EMT(pVM);
521 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
522 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
523
524 if (pDevIns->iInstance > 0)
525 {
526 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
527 if (pszDesc2)
528 pszDesc = pszDesc2;
529 }
530
531 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
532
533 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pR0Ptr));
534 return rc;
535}
536
537
538/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
539static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
540 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
541{
542 PDMDEV_ASSERT_DEVINS(pDevIns);
543 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
544 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
545 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
546
547/** @todo can we mangle pszDesc? */
548 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
549
550 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
551 return rc;
552}
553
554
555/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
556static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
557{
558 PDMDEV_ASSERT_DEVINS(pDevIns);
559 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
560 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
561
562 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
563
564 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
565 return rc;
566}
567
568
569/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
570static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
571 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
572 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
573 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
574{
575 PDMDEV_ASSERT_DEVINS(pDevIns);
576 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
577 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
578 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
579 pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
580 pfnLivePrep, pfnLiveExec, pfnLiveVote,
581 pfnSavePrep, pfnSaveExec, pfnSaveDone,
582 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
583
584 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
585 uVersion, cbGuess, pszBefore,
586 pfnLivePrep, pfnLiveExec, pfnLiveVote,
587 pfnSavePrep, pfnSaveExec, pfnSaveDone,
588 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
589
590 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
591 return rc;
592}
593
594
595/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
596static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
597{
598 PDMDEV_ASSERT_DEVINS(pDevIns);
599 PVM pVM = pDevIns->Internal.s.pVMR3;
600 VM_ASSERT_EMT(pVM);
601 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
602 pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
603
604 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
605 {
606 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
607 if (pszDesc2)
608 pszDesc = pszDesc2;
609 }
610
611 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
612
613 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
614 return rc;
615}
616
617
618/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
619static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
620{
621 PDMDEV_ASSERT_DEVINS(pDevIns);
622 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
623 pDevIns->pReg->szName, pDevIns->iInstance, pTime));
624
625 pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
626
627 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
628 return pTime;
629}
630
631
632/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
633static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
634{
635 PDMDEV_ASSERT_DEVINS(pDevIns);
636 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'\n",
637 pDevIns->pReg->szName, pDevIns->iInstance));
638
639 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
640
641 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
642 return u64Time;
643}
644
645
646/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
647static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
648{
649 PDMDEV_ASSERT_DEVINS(pDevIns);
650 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'\n",
651 pDevIns->pReg->szName, pDevIns->iInstance));
652
653 uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
654
655 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
656 return u64Freq;
657}
658
659
660/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
661static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
662{
663 PDMDEV_ASSERT_DEVINS(pDevIns);
664 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'\n",
665 pDevIns->pReg->szName, pDevIns->iInstance));
666
667 uint64_t u64Time = TMVirtualGet(pDevIns->Internal.s.pVMR3);
668 uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
669
670 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
671 return u64Nano;
672}
673
674
675/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
676static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_GetSupDrvSession(PPDMDEVINS pDevIns)
677{
678 PDMDEV_ASSERT_DEVINS(pDevIns);
679 LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'\n",
680 pDevIns->pReg->szName, pDevIns->iInstance));
681
682 PSUPDRVSESSION pSession = pDevIns->Internal.s.pVMR3->pSession;
683
684 LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'/%d: returns %#p\n", pDevIns->pReg->szName, pDevIns->iInstance, pSession));
685 return pSession;
686}
687
688
689/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
690static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
691{
692 PDMDEV_ASSERT_DEVINS(pDevIns);
693 PVM pVM = pDevIns->Internal.s.pVMR3;
694 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
695 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
696
697#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
698 if (!VM_IS_EMT(pVM))
699 {
700 char szNames[128];
701 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
702 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
703 }
704#endif
705
706 int rc;
707 if (VM_IS_EMT(pVM))
708 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
709 else
710 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
711
712 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
713 return rc;
714}
715
716
717/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
718static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
719{
720 PDMDEV_ASSERT_DEVINS(pDevIns);
721 PVM pVM = pDevIns->Internal.s.pVMR3;
722 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
723 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
724
725#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
726 if (!VM_IS_EMT(pVM))
727 {
728 char szNames[128];
729 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
730 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
731 }
732#endif
733
734 int rc;
735 if (VM_IS_EMT(pVM))
736 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
737 else
738 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
739
740 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
741 return rc;
742}
743
744
745/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
746static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
747{
748 PDMDEV_ASSERT_DEVINS(pDevIns);
749 PVM pVM = pDevIns->Internal.s.pVMR3;
750 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
751 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
752 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
753
754#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
755 if (!VM_IS_EMT(pVM))
756 {
757 char szNames[128];
758 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
759 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
760 }
761#endif
762
763 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
764
765 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
766 return rc;
767}
768
769
770/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
771static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
772{
773 PDMDEV_ASSERT_DEVINS(pDevIns);
774 PVM pVM = pDevIns->Internal.s.pVMR3;
775 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
776 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
777 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
778
779#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
780 if (!VM_IS_EMT(pVM))
781 {
782 char szNames[128];
783 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
784 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
785 }
786#endif
787
788 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
789
790 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
791 return rc;
792}
793
794
795/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
796static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
797{
798 PDMDEV_ASSERT_DEVINS(pDevIns);
799 PVM pVM = pDevIns->Internal.s.pVMR3;
800 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
801 pDevIns->pReg->szName, pDevIns->iInstance, pLock));
802
803 PGMPhysReleasePageMappingLock(pVM, pLock);
804
805 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
806}
807
808
809/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
810static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
811{
812 PDMDEV_ASSERT_DEVINS(pDevIns);
813 PVM pVM = pDevIns->Internal.s.pVMR3;
814 VM_ASSERT_EMT(pVM);
815 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
816 pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
817
818 PVMCPU pVCpu = VMMGetCpu(pVM);
819 if (!pVCpu)
820 return VERR_ACCESS_DENIED;
821#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
822 /** @todo SMP. */
823#endif
824
825 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
826
827 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
828
829 return rc;
830}
831
832
833/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
834static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
835{
836 PDMDEV_ASSERT_DEVINS(pDevIns);
837 PVM pVM = pDevIns->Internal.s.pVMR3;
838 VM_ASSERT_EMT(pVM);
839 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
840 pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
841
842 PVMCPU pVCpu = VMMGetCpu(pVM);
843 if (!pVCpu)
844 return VERR_ACCESS_DENIED;
845#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
846 /** @todo SMP. */
847#endif
848
849 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
850
851 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
852
853 return rc;
854}
855
856
857/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
858static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
859{
860 PDMDEV_ASSERT_DEVINS(pDevIns);
861 PVM pVM = pDevIns->Internal.s.pVMR3;
862 VM_ASSERT_EMT(pVM);
863 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
864 pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
865
866 PVMCPU pVCpu = VMMGetCpu(pVM);
867 if (!pVCpu)
868 return VERR_ACCESS_DENIED;
869#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
870 /** @todo SMP. */
871#endif
872
873 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
874
875 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pGCPhys));
876
877 return rc;
878}
879
880
881/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
882static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
883{
884 PDMDEV_ASSERT_DEVINS(pDevIns);
885 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
886
887 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
888
889 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
890 return pv;
891}
892
893
894/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
895static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
896{
897 PDMDEV_ASSERT_DEVINS(pDevIns);
898 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
899
900 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
901
902 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
903 return pv;
904}
905
906
907/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
908static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
909{
910 PDMDEV_ASSERT_DEVINS(pDevIns);
911 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
912
913 MMR3HeapFree(pv);
914
915 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
916}
917
918
919/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
920static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
921{
922 PDMDEV_ASSERT_DEVINS(pDevIns);
923
924 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
925
926 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
927 enmVMState, VMR3GetStateName(enmVMState)));
928 return enmVMState;
929}
930
931
932/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
933static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
934{
935 PDMDEV_ASSERT_DEVINS(pDevIns);
936
937 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
938
939 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
940 fRc));
941 return fRc;
942}
943
944
945/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
946static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
947{
948 PDMDEV_ASSERT_DEVINS(pDevIns);
949 va_list args;
950 va_start(args, pszFormat);
951 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
952 va_end(args);
953 return rc;
954}
955
956
957/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
958static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
959{
960 PDMDEV_ASSERT_DEVINS(pDevIns);
961 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
962 return rc;
963}
964
965
966/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
967static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
968{
969 PDMDEV_ASSERT_DEVINS(pDevIns);
970 va_list args;
971 va_start(args, pszFormat);
972 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
973 va_end(args);
974 return rc;
975}
976
977
978/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
979static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
980{
981 PDMDEV_ASSERT_DEVINS(pDevIns);
982 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
983 return rc;
984}
985
986
987/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
988static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
989{
990 PDMDEV_ASSERT_DEVINS(pDevIns);
991#ifdef LOG_ENABLED
992 va_list va2;
993 va_copy(va2, args);
994 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
995 pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
996 va_end(va2);
997#endif
998
999 PVM pVM = pDevIns->Internal.s.pVMR3;
1000 VM_ASSERT_EMT(pVM);
1001 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1002 if (rc == VERR_DBGF_NOT_ATTACHED)
1003 rc = VINF_SUCCESS;
1004
1005 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1006 return rc;
1007}
1008
1009
1010/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
1011static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1012{
1013 PDMDEV_ASSERT_DEVINS(pDevIns);
1014 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1015 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1016
1017 PVM pVM = pDevIns->Internal.s.pVMR3;
1018 VM_ASSERT_EMT(pVM);
1019 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1020
1021 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1022 return rc;
1023}
1024
1025
1026/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFRegRegister} */
1027static DECLCALLBACK(int) pdmR3DevHlp_DBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
1028{
1029 PDMDEV_ASSERT_DEVINS(pDevIns);
1030 LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: paRegisters=%p\n",
1031 pDevIns->pReg->szName, pDevIns->iInstance, paRegisters));
1032
1033 PVM pVM = pDevIns->Internal.s.pVMR3;
1034 VM_ASSERT_EMT(pVM);
1035 int rc = DBGFR3RegRegisterDevice(pVM, paRegisters, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance);
1036
1037 LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1038 return rc;
1039}
1040
1041
1042/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1043static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1044{
1045 PDMDEV_ASSERT_DEVINS(pDevIns);
1046 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1047 LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1048 return hTraceBuf;
1049}
1050
1051
1052/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1053static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1054{
1055 PDMDEV_ASSERT_DEVINS(pDevIns);
1056 PVM pVM = pDevIns->Internal.s.pVMR3;
1057 VM_ASSERT_EMT(pVM);
1058
1059 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1060 NOREF(pVM);
1061}
1062
1063
1064
1065/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1066static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1067 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1068{
1069 PDMDEV_ASSERT_DEVINS(pDevIns);
1070 PVM pVM = pDevIns->Internal.s.pVMR3;
1071 VM_ASSERT_EMT(pVM);
1072
1073 va_list args;
1074 va_start(args, pszName);
1075 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1076 va_end(args);
1077 AssertRC(rc);
1078
1079 NOREF(pVM);
1080}
1081
1082
1083/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1084static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1085 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1086{
1087 PDMDEV_ASSERT_DEVINS(pDevIns);
1088 PVM pVM = pDevIns->Internal.s.pVMR3;
1089 VM_ASSERT_EMT(pVM);
1090
1091 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1092 AssertRC(rc);
1093
1094 NOREF(pVM);
1095}
1096
1097
1098/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
1099static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1100{
1101 PDMDEV_ASSERT_DEVINS(pDevIns);
1102 PVM pVM = pDevIns->Internal.s.pVMR3;
1103 VM_ASSERT_EMT(pVM);
1104 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
1105 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
1106
1107 /*
1108 * Validate input.
1109 */
1110 if (!pPciDev)
1111 {
1112 Assert(pPciDev);
1113 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1114 return VERR_INVALID_PARAMETER;
1115 }
1116 if (!pPciDev->config[0] && !pPciDev->config[1])
1117 {
1118 Assert(pPciDev->config[0] || pPciDev->config[1]);
1119 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1120 return VERR_INVALID_PARAMETER;
1121 }
1122 if (pDevIns->Internal.s.pPciDeviceR3)
1123 {
1124 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1125 * support a PDM device with multiple PCI devices. This might become a problem
1126 * when upgrading the chipset for instance because of multiple functions in some
1127 * devices...
1128 */
1129 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1130 return VERR_PDM_ONE_PCI_FUNCTION_PER_DEVICE;
1131 }
1132
1133 /*
1134 * Choose the PCI bus for the device.
1135 *
1136 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1137 * configuration value will be set. If not the default bus is 0.
1138 */
1139 int rc;
1140 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1141 if (!pBus)
1142 {
1143 uint8_t u8Bus;
1144 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1145 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1146 rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1147 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1148 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1149 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1150 VERR_PDM_NO_PCI_BUS);
1151 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1152 }
1153 if (pBus->pDevInsR3)
1154 {
1155 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1156 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1157 else
1158 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1159
1160 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1161 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1162 else
1163 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1164
1165 /*
1166 * Check the configuration for PCI device and function assignment.
1167 */
1168 int iDev = -1;
1169 uint8_t u8Device;
1170 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1171 if (RT_SUCCESS(rc))
1172 {
1173 AssertMsgReturn(u8Device <= 31,
1174 ("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1175 u8Device, pDevIns->pReg->szName, pDevIns->iInstance),
1176 VERR_PDM_BAD_PCI_CONFIG);
1177
1178 uint8_t u8Function;
1179 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1180 AssertMsgRCReturn(rc, ("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1181 rc, pDevIns->pReg->szName, pDevIns->iInstance),
1182 rc);
1183 AssertMsgReturn(u8Function <= 7,
1184 ("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1185 u8Function, pDevIns->pReg->szName, pDevIns->iInstance),
1186 VERR_PDM_BAD_PCI_CONFIG);
1187
1188 iDev = (u8Device << 3) | u8Function;
1189 }
1190 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1191 {
1192 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1193 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1194 return rc;
1195 }
1196
1197 /*
1198 * Call the pci bus device to do the actual registration.
1199 */
1200 pdmLock(pVM);
1201 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1202 pdmUnlock(pVM);
1203 if (RT_SUCCESS(rc))
1204 {
1205 pPciDev->pDevIns = pDevIns;
1206
1207 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1208 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1209 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1210 else
1211 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1212
1213 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1214 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1215 else
1216 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1217
1218 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1219 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1220 }
1221 }
1222 else
1223 {
1224 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1225 rc = VERR_PDM_NO_PCI_BUS;
1226 }
1227
1228 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1229 return rc;
1230}
1231
1232
1233/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1234static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1235{
1236 PDMDEV_ASSERT_DEVINS(pDevIns);
1237 PVM pVM = pDevIns->Internal.s.pVMR3;
1238 VM_ASSERT_EMT(pVM);
1239 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1240 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1241
1242 /*
1243 * Validate input.
1244 */
1245 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1246 {
1247 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1248 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1249 return VERR_INVALID_PARAMETER;
1250 }
1251 switch ((int)enmType)
1252 {
1253 case PCI_ADDRESS_SPACE_IO:
1254 /*
1255 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1256 */
1257 AssertMsgReturn(cbRegion <= _32K,
1258 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1259 VERR_INVALID_PARAMETER);
1260 break;
1261
1262 case PCI_ADDRESS_SPACE_MEM:
1263 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1264 case PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64:
1265 case PCI_ADDRESS_SPACE_MEM_PREFETCH | PCI_ADDRESS_SPACE_BAR64:
1266 /*
1267 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1268 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1269 */
1270 AssertMsgReturn(cbRegion <= 512 * _1M,
1271 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1272 VERR_INVALID_PARAMETER);
1273 break;
1274 default:
1275 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1276 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1277 return VERR_INVALID_PARAMETER;
1278 }
1279 if (!pfnCallback)
1280 {
1281 Assert(pfnCallback);
1282 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1283 return VERR_INVALID_PARAMETER;
1284 }
1285 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1286
1287 /*
1288 * Must have a PCI device registered!
1289 */
1290 int rc;
1291 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1292 if (pPciDev)
1293 {
1294 /*
1295 * We're currently restricted to page aligned MMIO regions.
1296 */
1297 if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1298 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1299 {
1300 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1301 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1302 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1303 }
1304
1305 /*
1306 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1307 */
1308 int iLastSet = ASMBitLastSetU32(cbRegion);
1309 Assert(iLastSet > 0);
1310 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1311 if (cbRegion > cbRegionAligned)
1312 cbRegion = cbRegionAligned * 2; /* round up */
1313
1314 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1315 Assert(pBus);
1316 pdmLock(pVM);
1317 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1318 pdmUnlock(pVM);
1319 }
1320 else
1321 {
1322 AssertMsgFailed(("No PCI device registered!\n"));
1323 rc = VERR_PDM_NOT_PCI_DEVICE;
1324 }
1325
1326 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1327 return rc;
1328}
1329
1330
1331/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1332static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1333 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1334{
1335 PDMDEV_ASSERT_DEVINS(pDevIns);
1336 PVM pVM = pDevIns->Internal.s.pVMR3;
1337 VM_ASSERT_EMT(pVM);
1338 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1339 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1340
1341 /*
1342 * Validate input and resolve defaults.
1343 */
1344 AssertPtr(pfnRead);
1345 AssertPtr(pfnWrite);
1346 AssertPtrNull(ppfnReadOld);
1347 AssertPtrNull(ppfnWriteOld);
1348 AssertPtrNull(pPciDev);
1349
1350 if (!pPciDev)
1351 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1352 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1353 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1354 AssertRelease(pBus);
1355 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1356
1357 /*
1358 * Do the job.
1359 */
1360 pdmLock(pVM);
1361 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1362 pdmUnlock(pVM);
1363
1364 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1365}
1366
1367
1368/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
1369static DECLCALLBACK(int) pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1370{
1371 PDMDEV_ASSERT_DEVINS(pDevIns);
1372
1373#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1374 /*
1375 * Just check the busmaster setting here and forward the request to the generic read helper.
1376 */
1377 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1378 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
1379
1380 if (!PCIDevIsBusmaster(pPciDev))
1381 {
1382 Log(("pdmR3DevHlp_PCIPhysRead: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
1383 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
1384 return VERR_PDM_NOT_PCI_BUS_MASTER;
1385 }
1386#endif
1387
1388 return pDevIns->pHlpR3->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
1389}
1390
1391
1392/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
1393static DECLCALLBACK(int) pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1394{
1395 PDMDEV_ASSERT_DEVINS(pDevIns);
1396
1397#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1398 /*
1399 * Just check the busmaster setting here and forward the request to the generic read helper.
1400 */
1401 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1402 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
1403
1404 if (!PCIDevIsBusmaster(pPciDev))
1405 {
1406 Log(("pdmR3DevHlp_PCIPhysWrite: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
1407 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
1408 return VERR_PDM_NOT_PCI_BUS_MASTER;
1409 }
1410#endif
1411
1412 return pDevIns->pHlpR3->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
1413}
1414
1415
1416/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1417static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1418{
1419 PDMDEV_ASSERT_DEVINS(pDevIns);
1420 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1421
1422 /*
1423 * Validate input.
1424 */
1425 Assert(iIrq == 0);
1426 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1427
1428 /*
1429 * Must have a PCI device registered!
1430 */
1431 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1432 if (pPciDev)
1433 {
1434 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1435 Assert(pBus);
1436 PVM pVM = pDevIns->Internal.s.pVMR3;
1437
1438 pdmLock(pVM);
1439 uint32_t uTagSrc;
1440 if (iLevel & PDM_IRQ_LEVEL_HIGH)
1441 {
1442 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1443 if (iLevel == PDM_IRQ_LEVEL_HIGH)
1444 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1445 else
1446 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1447 }
1448 else
1449 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1450
1451 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel, uTagSrc);
1452
1453 if (iLevel == PDM_IRQ_LEVEL_LOW)
1454 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1455 pdmUnlock(pVM);
1456 }
1457 else
1458 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1459
1460 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1461}
1462
1463
1464/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1465static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1466{
1467 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1468}
1469
1470
1471/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1472static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
1473{
1474 PDMDEV_ASSERT_DEVINS(pDevIns);
1475 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: %d MSI vectors %d MSI-X vectors\n", pDevIns->pReg->szName, pDevIns->iInstance, pMsiReg->cMsiVectors,pMsiReg->cMsixVectors ));
1476 int rc = VINF_SUCCESS;
1477
1478 /*
1479 * Must have a PCI device registered!
1480 */
1481 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1482 if (pPciDev)
1483 {
1484 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1485 Assert(pBus);
1486
1487 PVM pVM = pDevIns->Internal.s.pVMR3;
1488 pdmLock(pVM);
1489 if (pBus->pfnRegisterMsiR3)
1490 rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1491 else
1492 rc = VERR_NOT_IMPLEMENTED;
1493 pdmUnlock(pVM);
1494 }
1495 else
1496 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1497
1498 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1499 return rc;
1500}
1501
1502/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1503static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1504{
1505 PDMDEV_ASSERT_DEVINS(pDevIns);
1506 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1507
1508 /*
1509 * Validate input.
1510 */
1511 Assert(iIrq < 16);
1512 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1513
1514 PVM pVM = pDevIns->Internal.s.pVMR3;
1515
1516 /*
1517 * Do the job.
1518 */
1519 pdmLock(pVM);
1520 uint32_t uTagSrc;
1521 if (iLevel & PDM_IRQ_LEVEL_HIGH)
1522 {
1523 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1524 if (iLevel == PDM_IRQ_LEVEL_HIGH)
1525 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1526 else
1527 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1528 }
1529 else
1530 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1531
1532 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
1533
1534 if (iLevel == PDM_IRQ_LEVEL_LOW)
1535 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1536 pdmUnlock(pVM);
1537
1538 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1539}
1540
1541
1542/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1543static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1544{
1545 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1546}
1547
1548
1549/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1550static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1551{
1552 PDMDEV_ASSERT_DEVINS(pDevIns);
1553 PVM pVM = pDevIns->Internal.s.pVMR3;
1554 VM_ASSERT_EMT(pVM);
1555 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1556 pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1557
1558 /*
1559 * Lookup the LUN, it might already be registered.
1560 */
1561 PPDMLUN pLunPrev = NULL;
1562 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1563 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1564 if (pLun->iLun == iLun)
1565 break;
1566
1567 /*
1568 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1569 */
1570 if (!pLun)
1571 {
1572 if ( !pBaseInterface
1573 || !pszDesc
1574 || !*pszDesc)
1575 {
1576 Assert(pBaseInterface);
1577 Assert(pszDesc || *pszDesc);
1578 return VERR_INVALID_PARAMETER;
1579 }
1580
1581 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1582 if (!pLun)
1583 return VERR_NO_MEMORY;
1584
1585 pLun->iLun = iLun;
1586 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1587 pLun->pTop = NULL;
1588 pLun->pBottom = NULL;
1589 pLun->pDevIns = pDevIns;
1590 pLun->pUsbIns = NULL;
1591 pLun->pszDesc = pszDesc;
1592 pLun->pBase = pBaseInterface;
1593 if (!pLunPrev)
1594 pDevIns->Internal.s.pLunsR3 = pLun;
1595 else
1596 pLunPrev->pNext = pLun;
1597 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1598 iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1599 }
1600 else if (pLun->pTop)
1601 {
1602 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1603 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1604 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1605 }
1606 Assert(pLun->pBase == pBaseInterface);
1607
1608
1609 /*
1610 * Get the attached driver configuration.
1611 */
1612 int rc;
1613 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1614 if (pNode)
1615 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
1616 else
1617 rc = VERR_PDM_NO_ATTACHED_DRIVER;
1618
1619
1620 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1621 return rc;
1622}
1623
1624
1625/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1626static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
1627 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1628{
1629 PDMDEV_ASSERT_DEVINS(pDevIns);
1630 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1631 pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1632
1633 PVM pVM = pDevIns->Internal.s.pVMR3;
1634 VM_ASSERT_EMT(pVM);
1635
1636 if (pDevIns->iInstance > 0)
1637 {
1638 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1639 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1640 }
1641
1642 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1643
1644 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppQueue));
1645 return rc;
1646}
1647
1648
1649/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1650static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1651 const char *pszNameFmt, va_list va)
1652{
1653 PDMDEV_ASSERT_DEVINS(pDevIns);
1654 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1655 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1656
1657 PVM pVM = pDevIns->Internal.s.pVMR3;
1658 VM_ASSERT_EMT(pVM);
1659 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1660
1661 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1662 return rc;
1663}
1664
1665
1666/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNop} */
1667static DECLCALLBACK(PPDMCRITSECT) pdmR3DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
1668{
1669 PDMDEV_ASSERT_DEVINS(pDevIns);
1670 PVM pVM = pDevIns->Internal.s.pVMR3;
1671 VM_ASSERT_EMT(pVM);
1672
1673 PPDMCRITSECT pCritSect = PDMR3CritSectGetNop(pVM);
1674 LogFlow(("pdmR3DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n",
1675 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1676 return pCritSect;
1677}
1678
1679
1680/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopR0} */
1681static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopR0(PPDMDEVINS pDevIns)
1682{
1683 PDMDEV_ASSERT_DEVINS(pDevIns);
1684 PVM pVM = pDevIns->Internal.s.pVMR3;
1685 VM_ASSERT_EMT(pVM);
1686
1687 R0PTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopR0(pVM);
1688 LogFlow(("pdmR3DevHlp_CritSectGetNopR0: caller='%s'/%d: return %RHv\n",
1689 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1690 return pCritSect;
1691}
1692
1693
1694/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopRC} */
1695static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopRC(PPDMDEVINS pDevIns)
1696{
1697 PDMDEV_ASSERT_DEVINS(pDevIns);
1698 PVM pVM = pDevIns->Internal.s.pVMR3;
1699 VM_ASSERT_EMT(pVM);
1700
1701 RCPTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopRC(pVM);
1702 LogFlow(("pdmR3DevHlp_CritSectGetNopRC: caller='%s'/%d: return %RRv\n",
1703 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1704 return pCritSect;
1705}
1706
1707
1708/** @interface_method_impl{PDMDEVHLPR3,pfnSetDeviceCritSect} */
1709static DECLCALLBACK(int) pdmR3DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
1710{
1711 /*
1712 * Validate input.
1713 *
1714 * Note! We only allow the automatically created default critical section
1715 * to be replaced by this API.
1716 */
1717 PDMDEV_ASSERT_DEVINS(pDevIns);
1718 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
1719 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
1720 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
1721 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
1722 PVM pVM = pDevIns->Internal.s.pVMR3;
1723 AssertReturn(pCritSect->s.pVMR3 == pVM, VERR_INVALID_PARAMETER);
1724
1725 VM_ASSERT_EMT(pVM);
1726 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1727
1728 AssertReturn(pDevIns->pCritSectRoR3, VERR_PDM_DEV_IPE_1);
1729 AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER);
1730 AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER);
1731 AssertReturn(pDevIns->pCritSectRoR3 != pCritSect, VERR_INVALID_PARAMETER);
1732
1733 /*
1734 * Replace the critical section and destroy the automatic default section.
1735 */
1736 PPDMCRITSECT pOldCritSect = pDevIns->pCritSectRoR3;
1737 pDevIns->pCritSectRoR3 = pCritSect;
1738 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1739 pDevIns->pCritSectRoR0 = MMHyperCCToR0(pVM, pDevIns->pCritSectRoR3);
1740 else
1741 Assert(pDevIns->pCritSectRoR0 == NIL_RTRCPTR);
1742
1743 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1744 pDevIns->pCritSectRoRC = MMHyperCCToRC(pVM, pDevIns->pCritSectRoR3);
1745 else
1746 Assert(pDevIns->pCritSectRoRC == NIL_RTRCPTR);
1747
1748 PDMR3CritSectDelete(pOldCritSect);
1749 if (pDevIns->pReg->fFlags & (PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0))
1750 MMHyperFree(pVM, pOldCritSect);
1751 else
1752 MMR3HeapFree(pOldCritSect);
1753
1754 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1755 return VINF_SUCCESS;
1756}
1757
1758
1759/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1760static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1761 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1762{
1763 PDMDEV_ASSERT_DEVINS(pDevIns);
1764 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1765 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1766 pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1767
1768 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1769
1770 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1771 rc, *ppThread));
1772 return rc;
1773}
1774
1775
1776/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1777static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1778{
1779 PDMDEV_ASSERT_DEVINS(pDevIns);
1780 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1781 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1782
1783 int rc = VINF_SUCCESS;
1784 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1785 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1786 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1787 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1788 AssertStmt( enmVMState == VMSTATE_SUSPENDING
1789 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1790 || enmVMState == VMSTATE_SUSPENDING_LS
1791 || enmVMState == VMSTATE_RESETTING
1792 || enmVMState == VMSTATE_RESETTING_LS
1793 || enmVMState == VMSTATE_POWERING_OFF
1794 || enmVMState == VMSTATE_POWERING_OFF_LS,
1795 rc = VERR_INVALID_STATE);
1796
1797 if (RT_SUCCESS(rc))
1798 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1799
1800 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1801 return rc;
1802}
1803
1804
1805/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1806static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1807{
1808 PDMDEV_ASSERT_DEVINS(pDevIns);
1809 PVM pVM = pDevIns->Internal.s.pVMR3;
1810
1811 VMSTATE enmVMState = VMR3GetState(pVM);
1812 if ( enmVMState == VMSTATE_SUSPENDING
1813 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1814 || enmVMState == VMSTATE_SUSPENDING_LS
1815 || enmVMState == VMSTATE_RESETTING
1816 || enmVMState == VMSTATE_RESETTING_LS
1817 || enmVMState == VMSTATE_POWERING_OFF
1818 || enmVMState == VMSTATE_POWERING_OFF_LS)
1819 {
1820 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1821 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1822 }
1823 else
1824 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1825}
1826
1827
1828/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1829static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1830{
1831 PDMDEV_ASSERT_DEVINS(pDevIns);
1832 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1833 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1834 pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1835 pRtcReg->pfnWrite, ppRtcHlp));
1836
1837 /*
1838 * Validate input.
1839 */
1840 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1841 {
1842 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1843 PDM_RTCREG_VERSION));
1844 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1845 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1846 return VERR_INVALID_PARAMETER;
1847 }
1848 if ( !pRtcReg->pfnWrite
1849 || !pRtcReg->pfnRead)
1850 {
1851 Assert(pRtcReg->pfnWrite);
1852 Assert(pRtcReg->pfnRead);
1853 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1854 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1855 return VERR_INVALID_PARAMETER;
1856 }
1857
1858 if (!ppRtcHlp)
1859 {
1860 Assert(ppRtcHlp);
1861 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1862 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1863 return VERR_INVALID_PARAMETER;
1864 }
1865
1866 /*
1867 * Only one DMA device.
1868 */
1869 PVM pVM = pDevIns->Internal.s.pVMR3;
1870 if (pVM->pdm.s.pRtc)
1871 {
1872 AssertMsgFailed(("Only one RTC device is supported!\n"));
1873 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1874 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1875 return VERR_INVALID_PARAMETER;
1876 }
1877
1878 /*
1879 * Allocate and initialize pci bus structure.
1880 */
1881 int rc = VINF_SUCCESS;
1882 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1883 if (pRtc)
1884 {
1885 pRtc->pDevIns = pDevIns;
1886 pRtc->Reg = *pRtcReg;
1887 pVM->pdm.s.pRtc = pRtc;
1888
1889 /* set the helper pointer. */
1890 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1891 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1892 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1893 }
1894 else
1895 rc = VERR_NO_MEMORY;
1896
1897 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1898 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1899 return rc;
1900}
1901
1902
1903/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1904static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1905{
1906 PDMDEV_ASSERT_DEVINS(pDevIns);
1907 PVM pVM = pDevIns->Internal.s.pVMR3;
1908 VM_ASSERT_EMT(pVM);
1909 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1910 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1911 int rc = VINF_SUCCESS;
1912 if (pVM->pdm.s.pDmac)
1913 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1914 else
1915 {
1916 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1917 rc = VERR_PDM_NO_DMAC_INSTANCE;
1918 }
1919 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1920 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1921 return rc;
1922}
1923
1924
1925/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1926static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
1927{
1928 PDMDEV_ASSERT_DEVINS(pDevIns);
1929 PVM pVM = pDevIns->Internal.s.pVMR3;
1930 VM_ASSERT_EMT(pVM);
1931 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1932 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1933 int rc = VINF_SUCCESS;
1934 if (pVM->pdm.s.pDmac)
1935 {
1936 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1937 if (pcbRead)
1938 *pcbRead = cb;
1939 }
1940 else
1941 {
1942 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1943 rc = VERR_PDM_NO_DMAC_INSTANCE;
1944 }
1945 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1946 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1947 return rc;
1948}
1949
1950
1951/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1952static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
1953{
1954 PDMDEV_ASSERT_DEVINS(pDevIns);
1955 PVM pVM = pDevIns->Internal.s.pVMR3;
1956 VM_ASSERT_EMT(pVM);
1957 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1958 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1959 int rc = VINF_SUCCESS;
1960 if (pVM->pdm.s.pDmac)
1961 {
1962 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1963 if (pcbWritten)
1964 *pcbWritten = cb;
1965 }
1966 else
1967 {
1968 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1969 rc = VERR_PDM_NO_DMAC_INSTANCE;
1970 }
1971 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1972 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1973 return rc;
1974}
1975
1976
1977/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1978static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1979{
1980 PDMDEV_ASSERT_DEVINS(pDevIns);
1981 PVM pVM = pDevIns->Internal.s.pVMR3;
1982 VM_ASSERT_EMT(pVM);
1983 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1984 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1985 int rc = VINF_SUCCESS;
1986 if (pVM->pdm.s.pDmac)
1987 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1988 else
1989 {
1990 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1991 rc = VERR_PDM_NO_DMAC_INSTANCE;
1992 }
1993 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1994 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1995 return rc;
1996}
1997
1998/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1999static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2000{
2001 PDMDEV_ASSERT_DEVINS(pDevIns);
2002 PVM pVM = pDevIns->Internal.s.pVMR3;
2003 VM_ASSERT_EMT(pVM);
2004 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2005 pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
2006 uint8_t u8Mode;
2007 if (pVM->pdm.s.pDmac)
2008 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2009 else
2010 {
2011 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2012 u8Mode = 3 << 2 /* illegal mode type */;
2013 }
2014 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2015 pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
2016 return u8Mode;
2017}
2018
2019/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
2020static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2021{
2022 PDMDEV_ASSERT_DEVINS(pDevIns);
2023 PVM pVM = pDevIns->Internal.s.pVMR3;
2024 VM_ASSERT_EMT(pVM);
2025 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2026 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2027
2028 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2029 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2030#ifdef VBOX_WITH_REM
2031 REMR3NotifyDmaPending(pVM);
2032#endif
2033 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2034}
2035
2036
2037/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
2038static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2039{
2040 PDMDEV_ASSERT_DEVINS(pDevIns);
2041 PVM pVM = pDevIns->Internal.s.pVMR3;
2042 VM_ASSERT_EMT(pVM);
2043
2044 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2045 pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
2046 int rc;
2047 if (pVM->pdm.s.pRtc)
2048 {
2049 PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2050 rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2051 if (RT_SUCCESS(rc))
2052 {
2053 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pDevInsRtc, iReg, u8Value);
2054 PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2055 }
2056 }
2057 else
2058 rc = VERR_PDM_NO_RTC_INSTANCE;
2059
2060 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2061 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2062 return rc;
2063}
2064
2065
2066/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
2067static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2068{
2069 PDMDEV_ASSERT_DEVINS(pDevIns);
2070 PVM pVM = pDevIns->Internal.s.pVMR3;
2071 VM_ASSERT_EMT(pVM);
2072
2073 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2074 pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
2075 int rc;
2076 if (pVM->pdm.s.pRtc)
2077 {
2078 PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2079 rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2080 if (RT_SUCCESS(rc))
2081 {
2082 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pDevInsRtc, iReg, pu8Value);
2083 PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2084 }
2085 }
2086 else
2087 rc = VERR_PDM_NO_RTC_INSTANCE;
2088
2089 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2090 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2091 return rc;
2092}
2093
2094
2095/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
2096static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2097{
2098 PDMDEV_ASSERT_DEVINS(pDevIns);
2099 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2100 return true;
2101
2102 char szMsg[100];
2103 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2104 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2105 AssertBreakpoint();
2106 return false;
2107}
2108
2109
2110/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
2111static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2112{
2113 PDMDEV_ASSERT_DEVINS(pDevIns);
2114 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2115 return true;
2116
2117 char szMsg[100];
2118 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2119 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2120 AssertBreakpoint();
2121 return false;
2122}
2123
2124
2125/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
2126static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2127 const char *pszSymPrefix, const char *pszSymList)
2128{
2129 PDMDEV_ASSERT_DEVINS(pDevIns);
2130 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2131 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2132 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2133
2134 int rc;
2135 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2136 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2137 {
2138 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2139 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2140 pvInterface, cbInterface,
2141 pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
2142 pszSymPrefix, pszSymList,
2143 false /*fRing0OrRC*/);
2144 else
2145 {
2146 AssertMsgFailed(("Not a raw-mode enabled driver\n"));
2147 rc = VERR_PERMISSION_DENIED;
2148 }
2149 }
2150 else
2151 {
2152 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2153 pszSymPrefix, pDevIns->pReg->szName));
2154 rc = VERR_INVALID_NAME;
2155 }
2156
2157 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2158 pDevIns->iInstance, rc));
2159 return rc;
2160}
2161
2162
2163/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
2164static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2165 const char *pszSymPrefix, const char *pszSymList)
2166{
2167 PDMDEV_ASSERT_DEVINS(pDevIns);
2168 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2169 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2170 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2171
2172 int rc;
2173 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2174 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2175 {
2176 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2177 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2178 pvInterface, cbInterface,
2179 pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
2180 pszSymPrefix, pszSymList,
2181 true /*fRing0OrRC*/);
2182 else
2183 {
2184 AssertMsgFailed(("Not a ring-0 enabled driver\n"));
2185 rc = VERR_PERMISSION_DENIED;
2186 }
2187 }
2188 else
2189 {
2190 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2191 pszSymPrefix, pDevIns->pReg->szName));
2192 rc = VERR_INVALID_NAME;
2193 }
2194
2195 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2196 pDevIns->iInstance, rc));
2197 return rc;
2198}
2199
2200
2201/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
2202static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
2203{
2204 PDMDEV_ASSERT_DEVINS(pDevIns);
2205 PVM pVM = pDevIns->Internal.s.pVMR3;
2206 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2207 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
2208 pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
2209
2210 /*
2211 * Resolve the ring-0 entry point. There is not need to remember this like
2212 * we do for drivers since this is mainly for construction time hacks and
2213 * other things that aren't performance critical.
2214 */
2215 int rc;
2216 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2217 {
2218 char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
2219 strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
2220 szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
2221
2222 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
2223 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
2224 if (RT_SUCCESS(rc))
2225 {
2226 /*
2227 * Make the ring-0 call.
2228 */
2229 PDMDEVICECALLREQHANDLERREQ Req;
2230 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2231 Req.Hdr.cbReq = sizeof(Req);
2232 Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2233 Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2234 Req.uOperation = uOperation;
2235 Req.u32Alignment = 0;
2236 Req.u64Arg = u64Arg;
2237 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2238 }
2239 else
2240 pfnReqHandlerR0 = NIL_RTR0PTR;
2241 }
2242 else
2243 rc = VERR_ACCESS_DENIED;
2244 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2245 pDevIns->iInstance, rc));
2246 return rc;
2247}
2248
2249
2250/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
2251static DECLCALLBACK(PUVM) pdmR3DevHlp_GetUVM(PPDMDEVINS pDevIns)
2252{
2253 PDMDEV_ASSERT_DEVINS(pDevIns);
2254 LogFlow(("pdmR3DevHlp_GetUVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2255 return pDevIns->Internal.s.pVMR3->pUVM;
2256}
2257
2258
2259/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2260static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2261{
2262 PDMDEV_ASSERT_DEVINS(pDevIns);
2263 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2264 return pDevIns->Internal.s.pVMR3;
2265}
2266
2267
2268/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2269static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2270{
2271 PDMDEV_ASSERT_DEVINS(pDevIns);
2272 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2273 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2274 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2275}
2276
2277
2278/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2279static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2280{
2281 PDMDEV_ASSERT_DEVINS(pDevIns);
2282 PVM pVM = pDevIns->Internal.s.pVMR3;
2283 VM_ASSERT_EMT(pVM);
2284 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, "
2285 ".pfnSetIrqR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
2286 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2287 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnFakePCIBIOSR3,
2288 pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
2289
2290 /*
2291 * Validate the structure.
2292 */
2293 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2294 {
2295 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2296 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2297 return VERR_INVALID_PARAMETER;
2298 }
2299 if ( !pPciBusReg->pfnRegisterR3
2300 || !pPciBusReg->pfnIORegionRegisterR3
2301 || !pPciBusReg->pfnSetIrqR3
2302 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
2303 {
2304 Assert(pPciBusReg->pfnRegisterR3);
2305 Assert(pPciBusReg->pfnIORegionRegisterR3);
2306 Assert(pPciBusReg->pfnSetIrqR3);
2307 Assert(pPciBusReg->pfnFakePCIBIOSR3);
2308 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2309 return VERR_INVALID_PARAMETER;
2310 }
2311 if ( pPciBusReg->pszSetIrqRC
2312 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
2313 {
2314 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2315 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2316 return VERR_INVALID_PARAMETER;
2317 }
2318 if ( pPciBusReg->pszSetIrqR0
2319 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2320 {
2321 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2322 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2323 return VERR_INVALID_PARAMETER;
2324 }
2325 if (!ppPciHlpR3)
2326 {
2327 Assert(ppPciHlpR3);
2328 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2329 return VERR_INVALID_PARAMETER;
2330 }
2331
2332 /*
2333 * Find free PCI bus entry.
2334 */
2335 unsigned iBus = 0;
2336 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2337 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2338 break;
2339 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2340 {
2341 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2342 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2343 return VERR_INVALID_PARAMETER;
2344 }
2345 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2346
2347 /*
2348 * Resolve and init the RC bits.
2349 */
2350 if (pPciBusReg->pszSetIrqRC)
2351 {
2352 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2353 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2354 if (RT_FAILURE(rc))
2355 {
2356 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2357 return rc;
2358 }
2359 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2360 }
2361 else
2362 {
2363 pPciBus->pfnSetIrqRC = 0;
2364 pPciBus->pDevInsRC = 0;
2365 }
2366
2367 /*
2368 * Resolve and init the R0 bits.
2369 */
2370 if (pPciBusReg->pszSetIrqR0)
2371 {
2372 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2373 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2374 if (RT_FAILURE(rc))
2375 {
2376 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2377 return rc;
2378 }
2379 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2380 }
2381 else
2382 {
2383 pPciBus->pfnSetIrqR0 = 0;
2384 pPciBus->pDevInsR0 = 0;
2385 }
2386
2387 /*
2388 * Init the R3 bits.
2389 */
2390 pPciBus->iBus = iBus;
2391 pPciBus->pDevInsR3 = pDevIns;
2392 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2393 pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2394 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2395 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2396 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2397 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2398
2399 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2400
2401 /* set the helper pointer and return. */
2402 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2403 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2404 return VINF_SUCCESS;
2405}
2406
2407
2408/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2409static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2410{
2411 PDMDEV_ASSERT_DEVINS(pDevIns);
2412 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2413 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2414 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2415 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2416 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2417 ppPicHlpR3));
2418
2419 /*
2420 * Validate input.
2421 */
2422 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2423 {
2424 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2425 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2426 return VERR_INVALID_PARAMETER;
2427 }
2428 if ( !pPicReg->pfnSetIrqR3
2429 || !pPicReg->pfnGetInterruptR3)
2430 {
2431 Assert(pPicReg->pfnSetIrqR3);
2432 Assert(pPicReg->pfnGetInterruptR3);
2433 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2434 return VERR_INVALID_PARAMETER;
2435 }
2436 if ( ( pPicReg->pszSetIrqRC
2437 || pPicReg->pszGetInterruptRC)
2438 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
2439 || !VALID_PTR(pPicReg->pszGetInterruptRC))
2440 )
2441 {
2442 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2443 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2444 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2445 return VERR_INVALID_PARAMETER;
2446 }
2447 if ( pPicReg->pszSetIrqRC
2448 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2449 {
2450 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2451 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2452 return VERR_INVALID_PARAMETER;
2453 }
2454 if ( pPicReg->pszSetIrqR0
2455 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2456 {
2457 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2458 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2459 return VERR_INVALID_PARAMETER;
2460 }
2461 if (!ppPicHlpR3)
2462 {
2463 Assert(ppPicHlpR3);
2464 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2465 return VERR_INVALID_PARAMETER;
2466 }
2467
2468 /*
2469 * Only one PIC device.
2470 */
2471 PVM pVM = pDevIns->Internal.s.pVMR3;
2472 if (pVM->pdm.s.Pic.pDevInsR3)
2473 {
2474 AssertMsgFailed(("Only one pic device is supported!\n"));
2475 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2476 return VERR_INVALID_PARAMETER;
2477 }
2478
2479 /*
2480 * RC stuff.
2481 */
2482 if (pPicReg->pszSetIrqRC)
2483 {
2484 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2485 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2486 if (RT_SUCCESS(rc))
2487 {
2488 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2489 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2490 }
2491 if (RT_FAILURE(rc))
2492 {
2493 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2494 return rc;
2495 }
2496 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2497 }
2498 else
2499 {
2500 pVM->pdm.s.Pic.pDevInsRC = 0;
2501 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2502 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2503 }
2504
2505 /*
2506 * R0 stuff.
2507 */
2508 if (pPicReg->pszSetIrqR0)
2509 {
2510 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2511 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2512 if (RT_SUCCESS(rc))
2513 {
2514 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2515 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2516 }
2517 if (RT_FAILURE(rc))
2518 {
2519 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2520 return rc;
2521 }
2522 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2523 Assert(pVM->pdm.s.Pic.pDevInsR0);
2524 }
2525 else
2526 {
2527 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2528 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2529 pVM->pdm.s.Pic.pDevInsR0 = 0;
2530 }
2531
2532 /*
2533 * R3 stuff.
2534 */
2535 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2536 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2537 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2538 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2539
2540 /* set the helper pointer and return. */
2541 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2542 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2543 return VINF_SUCCESS;
2544}
2545
2546
2547/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2548static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2549{
2550 PDMDEV_ASSERT_DEVINS(pDevIns);
2551 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2552 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2553 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2554 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2555 pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2556 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2557 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2558 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2559 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2560
2561 /*
2562 * Validate input.
2563 */
2564 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2565 {
2566 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2567 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2568 return VERR_INVALID_PARAMETER;
2569 }
2570 if ( !pApicReg->pfnGetInterruptR3
2571 || !pApicReg->pfnHasPendingIrqR3
2572 || !pApicReg->pfnSetBaseR3
2573 || !pApicReg->pfnGetBaseR3
2574 || !pApicReg->pfnSetTPRR3
2575 || !pApicReg->pfnGetTPRR3
2576 || !pApicReg->pfnWriteMSRR3
2577 || !pApicReg->pfnReadMSRR3
2578 || !pApicReg->pfnBusDeliverR3
2579 || !pApicReg->pfnLocalInterruptR3)
2580 {
2581 Assert(pApicReg->pfnGetInterruptR3);
2582 Assert(pApicReg->pfnHasPendingIrqR3);
2583 Assert(pApicReg->pfnSetBaseR3);
2584 Assert(pApicReg->pfnGetBaseR3);
2585 Assert(pApicReg->pfnSetTPRR3);
2586 Assert(pApicReg->pfnGetTPRR3);
2587 Assert(pApicReg->pfnWriteMSRR3);
2588 Assert(pApicReg->pfnReadMSRR3);
2589 Assert(pApicReg->pfnBusDeliverR3);
2590 Assert(pApicReg->pfnLocalInterruptR3);
2591 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2592 return VERR_INVALID_PARAMETER;
2593 }
2594 if ( ( pApicReg->pszGetInterruptRC
2595 || pApicReg->pszHasPendingIrqRC
2596 || pApicReg->pszSetBaseRC
2597 || pApicReg->pszGetBaseRC
2598 || pApicReg->pszSetTPRRC
2599 || pApicReg->pszGetTPRRC
2600 || pApicReg->pszWriteMSRRC
2601 || pApicReg->pszReadMSRRC
2602 || pApicReg->pszBusDeliverRC
2603 || pApicReg->pszLocalInterruptRC)
2604 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2605 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2606 || !VALID_PTR(pApicReg->pszSetBaseRC)
2607 || !VALID_PTR(pApicReg->pszGetBaseRC)
2608 || !VALID_PTR(pApicReg->pszSetTPRRC)
2609 || !VALID_PTR(pApicReg->pszGetTPRRC)
2610 || !VALID_PTR(pApicReg->pszWriteMSRRC)
2611 || !VALID_PTR(pApicReg->pszReadMSRRC)
2612 || !VALID_PTR(pApicReg->pszBusDeliverRC)
2613 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
2614 )
2615 {
2616 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2617 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2618 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2619 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2620 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2621 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2622 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2623 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2624 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2625 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2626 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2627 return VERR_INVALID_PARAMETER;
2628 }
2629 if ( ( pApicReg->pszGetInterruptR0
2630 || pApicReg->pszHasPendingIrqR0
2631 || pApicReg->pszSetBaseR0
2632 || pApicReg->pszGetBaseR0
2633 || pApicReg->pszSetTPRR0
2634 || pApicReg->pszGetTPRR0
2635 || pApicReg->pszWriteMSRR0
2636 || pApicReg->pszReadMSRR0
2637 || pApicReg->pszBusDeliverR0
2638 || pApicReg->pszLocalInterruptR0)
2639 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2640 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2641 || !VALID_PTR(pApicReg->pszSetBaseR0)
2642 || !VALID_PTR(pApicReg->pszGetBaseR0)
2643 || !VALID_PTR(pApicReg->pszSetTPRR0)
2644 || !VALID_PTR(pApicReg->pszGetTPRR0)
2645 || !VALID_PTR(pApicReg->pszReadMSRR0)
2646 || !VALID_PTR(pApicReg->pszWriteMSRR0)
2647 || !VALID_PTR(pApicReg->pszBusDeliverR0)
2648 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
2649 )
2650 {
2651 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2652 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2653 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2654 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2655 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2656 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2657 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2658 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2659 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2660 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2661 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2662 return VERR_INVALID_PARAMETER;
2663 }
2664 if (!ppApicHlpR3)
2665 {
2666 Assert(ppApicHlpR3);
2667 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2668 return VERR_INVALID_PARAMETER;
2669 }
2670
2671 /*
2672 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
2673 * as they need to communicate and share state easily.
2674 */
2675 PVM pVM = pDevIns->Internal.s.pVMR3;
2676 if (pVM->pdm.s.Apic.pDevInsR3)
2677 {
2678 AssertMsgFailed(("Only one apic device is supported!\n"));
2679 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2680 return VERR_INVALID_PARAMETER;
2681 }
2682
2683 /*
2684 * Resolve & initialize the RC bits.
2685 */
2686 if (pApicReg->pszGetInterruptRC)
2687 {
2688 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2689 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2690 if (RT_SUCCESS(rc))
2691 {
2692 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2693 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2694 }
2695 if (RT_SUCCESS(rc))
2696 {
2697 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2698 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2699 }
2700 if (RT_SUCCESS(rc))
2701 {
2702 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2703 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2704 }
2705 if (RT_SUCCESS(rc))
2706 {
2707 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2708 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2709 }
2710 if (RT_SUCCESS(rc))
2711 {
2712 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2713 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2714 }
2715 if (RT_SUCCESS(rc))
2716 {
2717 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2718 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2719 }
2720 if (RT_SUCCESS(rc))
2721 {
2722 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2723 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2724 }
2725 if (RT_SUCCESS(rc))
2726 {
2727 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2728 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2729 }
2730 if (RT_SUCCESS(rc))
2731 {
2732 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2733 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2734 }
2735 if (RT_FAILURE(rc))
2736 {
2737 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2738 return rc;
2739 }
2740 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2741 }
2742 else
2743 {
2744 pVM->pdm.s.Apic.pDevInsRC = 0;
2745 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2746 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2747 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2748 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2749 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2750 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2751 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2752 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2753 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2754 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2755 }
2756
2757 /*
2758 * Resolve & initialize the R0 bits.
2759 */
2760 if (pApicReg->pszGetInterruptR0)
2761 {
2762 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2763 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2764 if (RT_SUCCESS(rc))
2765 {
2766 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2767 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2768 }
2769 if (RT_SUCCESS(rc))
2770 {
2771 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2772 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2773 }
2774 if (RT_SUCCESS(rc))
2775 {
2776 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2777 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2778 }
2779 if (RT_SUCCESS(rc))
2780 {
2781 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2782 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2783 }
2784 if (RT_SUCCESS(rc))
2785 {
2786 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2787 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2788 }
2789 if (RT_SUCCESS(rc))
2790 {
2791 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2792 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2793 }
2794 if (RT_SUCCESS(rc))
2795 {
2796 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2797 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2798 }
2799 if (RT_SUCCESS(rc))
2800 {
2801 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2802 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2803 }
2804 if (RT_SUCCESS(rc))
2805 {
2806 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2807 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2808 }
2809 if (RT_FAILURE(rc))
2810 {
2811 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2812 return rc;
2813 }
2814 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2815 Assert(pVM->pdm.s.Apic.pDevInsR0);
2816 }
2817 else
2818 {
2819 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2820 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2821 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2822 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2823 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2824 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2825 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2826 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2827 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2828 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2829 pVM->pdm.s.Apic.pDevInsR0 = 0;
2830 }
2831
2832 /*
2833 * Initialize the HC bits.
2834 */
2835 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2836 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2837 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2838 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2839 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2840 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2841 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2842 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2843 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2844 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2845 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2846 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2847
2848 /* set the helper pointer and return. */
2849 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2850 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2851 return VINF_SUCCESS;
2852}
2853
2854
2855/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2856static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2857{
2858 PDMDEV_ASSERT_DEVINS(pDevIns);
2859 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2860 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2861 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2862 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2863
2864 /*
2865 * Validate input.
2866 */
2867 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2868 {
2869 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2870 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2871 return VERR_INVALID_PARAMETER;
2872 }
2873 if (!pIoApicReg->pfnSetIrqR3 || !pIoApicReg->pfnSendMsiR3)
2874 {
2875 Assert(pIoApicReg->pfnSetIrqR3);
2876 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2877 return VERR_INVALID_PARAMETER;
2878 }
2879 if ( pIoApicReg->pszSetIrqRC
2880 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
2881 {
2882 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2883 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2884 return VERR_INVALID_PARAMETER;
2885 }
2886 if ( pIoApicReg->pszSendMsiRC
2887 && !VALID_PTR(pIoApicReg->pszSendMsiRC))
2888 {
2889 Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
2890 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2891 return VERR_INVALID_PARAMETER;
2892 }
2893 if ( pIoApicReg->pszSetIrqR0
2894 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2895 {
2896 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2897 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2898 return VERR_INVALID_PARAMETER;
2899 }
2900 if ( pIoApicReg->pszSendMsiR0
2901 && !VALID_PTR(pIoApicReg->pszSendMsiR0))
2902 {
2903 Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
2904 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2905 return VERR_INVALID_PARAMETER;
2906 }
2907 if (!ppIoApicHlpR3)
2908 {
2909 Assert(ppIoApicHlpR3);
2910 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2911 return VERR_INVALID_PARAMETER;
2912 }
2913
2914 /*
2915 * The I/O APIC requires the APIC to be present (hacks++).
2916 * If the I/O APIC does GC stuff so must the APIC.
2917 */
2918 PVM pVM = pDevIns->Internal.s.pVMR3;
2919 if (!pVM->pdm.s.Apic.pDevInsR3)
2920 {
2921 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2922 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2923 return VERR_INVALID_PARAMETER;
2924 }
2925 if ( pIoApicReg->pszSetIrqRC
2926 && !pVM->pdm.s.Apic.pDevInsRC)
2927 {
2928 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2929 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2930 return VERR_INVALID_PARAMETER;
2931 }
2932
2933 /*
2934 * Only one I/O APIC device.
2935 */
2936 if (pVM->pdm.s.IoApic.pDevInsR3)
2937 {
2938 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2939 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2940 return VERR_INVALID_PARAMETER;
2941 }
2942
2943 /*
2944 * Resolve & initialize the GC bits.
2945 */
2946 if (pIoApicReg->pszSetIrqRC)
2947 {
2948 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2949 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2950 if (RT_FAILURE(rc))
2951 {
2952 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2953 return rc;
2954 }
2955 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2956 }
2957 else
2958 {
2959 pVM->pdm.s.IoApic.pDevInsRC = 0;
2960 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2961 }
2962
2963 if (pIoApicReg->pszSendMsiRC)
2964 {
2965 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
2966 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
2967 if (RT_FAILURE(rc))
2968 {
2969 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2970 return rc;
2971 }
2972 }
2973 else
2974 {
2975 pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
2976 }
2977
2978 /*
2979 * Resolve & initialize the R0 bits.
2980 */
2981 if (pIoApicReg->pszSetIrqR0)
2982 {
2983 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2984 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2985 if (RT_FAILURE(rc))
2986 {
2987 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2988 return rc;
2989 }
2990 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2991 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2992 }
2993 else
2994 {
2995 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2996 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2997 }
2998
2999 if (pIoApicReg->pszSendMsiR0)
3000 {
3001 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
3002 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
3003 if (RT_FAILURE(rc))
3004 {
3005 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3006 return rc;
3007 }
3008 }
3009 else
3010 {
3011 pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
3012 }
3013
3014
3015 /*
3016 * Initialize the R3 bits.
3017 */
3018 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3019 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
3020 pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
3021 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3022
3023 /* set the helper pointer and return. */
3024 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3025 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3026 return VINF_SUCCESS;
3027}
3028
3029
3030/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
3031static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
3032{
3033 PDMDEV_ASSERT_DEVINS(pDevIns);
3034 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3035 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
3036
3037 /*
3038 * Validate input.
3039 */
3040 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
3041 {
3042 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
3043 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3044 return VERR_INVALID_PARAMETER;
3045 }
3046
3047 if (!ppHpetHlpR3)
3048 {
3049 Assert(ppHpetHlpR3);
3050 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3051 return VERR_INVALID_PARAMETER;
3052 }
3053
3054 /* set the helper pointer and return. */
3055 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
3056 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3057 return VINF_SUCCESS;
3058}
3059
3060
3061/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
3062static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
3063{
3064 PDMDEV_ASSERT_DEVINS(pDevIns);
3065 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3066 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n"));
3067
3068 /*
3069 * Validate input.
3070 */
3071 if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
3072 {
3073 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
3074 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3075 return VERR_INVALID_PARAMETER;
3076 }
3077
3078 if (!ppPciRawHlpR3)
3079 {
3080 Assert(ppPciRawHlpR3);
3081 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3082 return VERR_INVALID_PARAMETER;
3083 }
3084
3085 /* set the helper pointer and return. */
3086 *ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
3087 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3088 return VINF_SUCCESS;
3089}
3090
3091
3092/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
3093static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3094{
3095 PDMDEV_ASSERT_DEVINS(pDevIns);
3096 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3097 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3098 pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3099 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3100
3101 /*
3102 * Validate input.
3103 */
3104 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3105 {
3106 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3107 PDM_DMACREG_VERSION));
3108 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
3109 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3110 return VERR_INVALID_PARAMETER;
3111 }
3112 if ( !pDmacReg->pfnRun
3113 || !pDmacReg->pfnRegister
3114 || !pDmacReg->pfnReadMemory
3115 || !pDmacReg->pfnWriteMemory
3116 || !pDmacReg->pfnSetDREQ
3117 || !pDmacReg->pfnGetChannelMode)
3118 {
3119 Assert(pDmacReg->pfnRun);
3120 Assert(pDmacReg->pfnRegister);
3121 Assert(pDmacReg->pfnReadMemory);
3122 Assert(pDmacReg->pfnWriteMemory);
3123 Assert(pDmacReg->pfnSetDREQ);
3124 Assert(pDmacReg->pfnGetChannelMode);
3125 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
3126 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3127 return VERR_INVALID_PARAMETER;
3128 }
3129
3130 if (!ppDmacHlp)
3131 {
3132 Assert(ppDmacHlp);
3133 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
3134 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3135 return VERR_INVALID_PARAMETER;
3136 }
3137
3138 /*
3139 * Only one DMA device.
3140 */
3141 PVM pVM = pDevIns->Internal.s.pVMR3;
3142 if (pVM->pdm.s.pDmac)
3143 {
3144 AssertMsgFailed(("Only one DMA device is supported!\n"));
3145 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3146 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3147 return VERR_INVALID_PARAMETER;
3148 }
3149
3150 /*
3151 * Allocate and initialize pci bus structure.
3152 */
3153 int rc = VINF_SUCCESS;
3154 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3155 if (pDmac)
3156 {
3157 pDmac->pDevIns = pDevIns;
3158 pDmac->Reg = *pDmacReg;
3159 pVM->pdm.s.pDmac = pDmac;
3160
3161 /* set the helper pointer. */
3162 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3163 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3164 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3165 }
3166 else
3167 rc = VERR_NO_MEMORY;
3168
3169 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3170 pDevIns->pReg->szName, pDevIns->iInstance, rc));
3171 return rc;
3172}
3173
3174
3175/**
3176 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3177 */
3178static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3179{
3180 PDMDEV_ASSERT_DEVINS(pDevIns);
3181 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3182
3183 int rc = PDMR3VmmDevHeapRegister(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
3184 return rc;
3185}
3186
3187
3188/**
3189 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3190 */
3191static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3192{
3193 PDMDEV_ASSERT_DEVINS(pDevIns);
3194 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3195
3196 int rc = PDMR3VmmDevHeapUnregister(pDevIns->Internal.s.pVMR3, GCPhys);
3197 return rc;
3198}
3199
3200
3201/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3202static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3203{
3204 PDMDEV_ASSERT_DEVINS(pDevIns);
3205 PVM pVM = pDevIns->Internal.s.pVMR3;
3206 VM_ASSERT_EMT(pVM);
3207 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3208 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
3209
3210 /*
3211 * We postpone this operation because we're likely to be inside a I/O instruction
3212 * and the EIP will be updated when we return.
3213 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3214 */
3215 bool fHaltOnReset;
3216 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3217 if (RT_SUCCESS(rc) && fHaltOnReset)
3218 {
3219 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3220 rc = VINF_EM_HALT;
3221 }
3222 else
3223 {
3224 VM_FF_SET(pVM, VM_FF_RESET);
3225 rc = VINF_EM_RESET;
3226 }
3227
3228 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3229 return rc;
3230}
3231
3232
3233/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3234static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3235{
3236 int rc;
3237 PDMDEV_ASSERT_DEVINS(pDevIns);
3238 PVM pVM = pDevIns->Internal.s.pVMR3;
3239 VM_ASSERT_EMT(pVM);
3240 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3241 pDevIns->pReg->szName, pDevIns->iInstance));
3242
3243 /** @todo Always take the SMP path - fewer code paths. */
3244 if (pVM->cCpus > 1)
3245 {
3246 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3247 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM->pUVM);
3248 AssertRC(rc);
3249 rc = VINF_EM_SUSPEND;
3250 }
3251 else
3252 rc = VMR3Suspend(pVM->pUVM);
3253
3254 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3255 return rc;
3256}
3257
3258
3259/**
3260 * Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3261 * EMT request to avoid deadlocks.
3262 *
3263 * @returns VBox status code fit for scheduling.
3264 * @param pVM Pointer to the VM.
3265 * @param pDevIns The device that triggered this action.
3266 */
3267static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3268{
3269 /*
3270 * Suspend the VM first then do the saving.
3271 */
3272 int rc = VMR3Suspend(pVM->pUVM);
3273 if (RT_SUCCESS(rc))
3274 {
3275 PUVM pUVM = pVM->pUVM;
3276 rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3277
3278 /*
3279 * On success, power off the VM, on failure we'll leave it suspended.
3280 */
3281 if (RT_SUCCESS(rc))
3282 {
3283 rc = VMR3PowerOff(pVM->pUVM);
3284 if (RT_FAILURE(rc))
3285 LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3286 }
3287 else
3288 LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3289 }
3290 else
3291 LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3292 return rc;
3293}
3294
3295
3296/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3297static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3298{
3299 PDMDEV_ASSERT_DEVINS(pDevIns);
3300 PVM pVM = pDevIns->Internal.s.pVMR3;
3301 VM_ASSERT_EMT(pVM);
3302 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3303 pDevIns->pReg->szName, pDevIns->iInstance));
3304
3305 int rc;
3306 if ( pVM->pUVM->pVmm2UserMethods
3307 && pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3308 {
3309 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3310 if (RT_SUCCESS(rc))
3311 {
3312 LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3313 rc = VINF_EM_SUSPEND;
3314 }
3315 }
3316 else
3317 rc = VERR_NOT_SUPPORTED;
3318
3319 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3320 return rc;
3321}
3322
3323
3324/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3325static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3326{
3327 int rc;
3328 PDMDEV_ASSERT_DEVINS(pDevIns);
3329 PVM pVM = pDevIns->Internal.s.pVMR3;
3330 VM_ASSERT_EMT(pVM);
3331 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3332 pDevIns->pReg->szName, pDevIns->iInstance));
3333
3334 /** @todo Always take the SMP path - fewer code paths. */
3335 if (pVM->cCpus > 1)
3336 {
3337 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3338 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM->pUVM);
3339 AssertRC(rc);
3340 /* Set the VCPU state to stopped here as well to make sure no
3341 * inconsistency with the EM state occurs.
3342 */
3343 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3344 rc = VINF_EM_OFF;
3345 }
3346 else
3347 rc = VMR3PowerOff(pVM->pUVM);
3348
3349 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3350 return rc;
3351}
3352
3353
3354/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3355static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3356{
3357 PDMDEV_ASSERT_DEVINS(pDevIns);
3358 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3359
3360 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3361
3362 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3363 return fRc;
3364}
3365
3366
3367/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3368static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3369{
3370 PDMDEV_ASSERT_DEVINS(pDevIns);
3371 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3372 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3373 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3374}
3375
3376
3377/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3378static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3379 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3380{
3381 PDMDEV_ASSERT_DEVINS(pDevIns);
3382 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3383
3384 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3385 pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3386 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3387
3388 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
3389
3390 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3391 pDevIns->pReg->szName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3392}
3393
3394
3395/**
3396 * The device helper structure for trusted devices.
3397 */
3398const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3399{
3400 PDM_DEVHLPR3_VERSION,
3401 pdmR3DevHlp_IOPortRegister,
3402 pdmR3DevHlp_IOPortRegisterRC,
3403 pdmR3DevHlp_IOPortRegisterR0,
3404 pdmR3DevHlp_IOPortDeregister,
3405 pdmR3DevHlp_MMIORegister,
3406 pdmR3DevHlp_MMIORegisterRC,
3407 pdmR3DevHlp_MMIORegisterR0,
3408 pdmR3DevHlp_MMIODeregister,
3409 pdmR3DevHlp_MMIO2Register,
3410 pdmR3DevHlp_MMIO2Deregister,
3411 pdmR3DevHlp_MMIO2Map,
3412 pdmR3DevHlp_MMIO2Unmap,
3413 pdmR3DevHlp_MMHyperMapMMIO2,
3414 pdmR3DevHlp_MMIO2MapKernel,
3415 pdmR3DevHlp_ROMRegister,
3416 pdmR3DevHlp_ROMProtectShadow,
3417 pdmR3DevHlp_SSMRegister,
3418 pdmR3DevHlp_TMTimerCreate,
3419 pdmR3DevHlp_TMUtcNow,
3420 pdmR3DevHlp_PhysRead,
3421 pdmR3DevHlp_PhysWrite,
3422 pdmR3DevHlp_PhysGCPhys2CCPtr,
3423 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3424 pdmR3DevHlp_PhysReleasePageMappingLock,
3425 pdmR3DevHlp_PhysReadGCVirt,
3426 pdmR3DevHlp_PhysWriteGCVirt,
3427 pdmR3DevHlp_PhysGCPtr2GCPhys,
3428 pdmR3DevHlp_MMHeapAlloc,
3429 pdmR3DevHlp_MMHeapAllocZ,
3430 pdmR3DevHlp_MMHeapFree,
3431 pdmR3DevHlp_VMState,
3432 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3433 pdmR3DevHlp_VMSetError,
3434 pdmR3DevHlp_VMSetErrorV,
3435 pdmR3DevHlp_VMSetRuntimeError,
3436 pdmR3DevHlp_VMSetRuntimeErrorV,
3437 pdmR3DevHlp_DBGFStopV,
3438 pdmR3DevHlp_DBGFInfoRegister,
3439 pdmR3DevHlp_DBGFRegRegister,
3440 pdmR3DevHlp_DBGFTraceBuf,
3441 pdmR3DevHlp_STAMRegister,
3442 pdmR3DevHlp_STAMRegisterF,
3443 pdmR3DevHlp_STAMRegisterV,
3444 pdmR3DevHlp_PCIRegister,
3445 pdmR3DevHlp_PCIRegisterMsi,
3446 pdmR3DevHlp_PCIIORegionRegister,
3447 pdmR3DevHlp_PCISetConfigCallbacks,
3448 pdmR3DevHlp_PCIPhysRead,
3449 pdmR3DevHlp_PCIPhysWrite,
3450 pdmR3DevHlp_PCISetIrq,
3451 pdmR3DevHlp_PCISetIrqNoWait,
3452 pdmR3DevHlp_ISASetIrq,
3453 pdmR3DevHlp_ISASetIrqNoWait,
3454 pdmR3DevHlp_DriverAttach,
3455 pdmR3DevHlp_QueueCreate,
3456 pdmR3DevHlp_CritSectInit,
3457 pdmR3DevHlp_CritSectGetNop,
3458 pdmR3DevHlp_CritSectGetNopR0,
3459 pdmR3DevHlp_CritSectGetNopRC,
3460 pdmR3DevHlp_SetDeviceCritSect,
3461 pdmR3DevHlp_ThreadCreate,
3462 pdmR3DevHlp_SetAsyncNotification,
3463 pdmR3DevHlp_AsyncNotificationCompleted,
3464 pdmR3DevHlp_RTCRegister,
3465 pdmR3DevHlp_PCIBusRegister,
3466 pdmR3DevHlp_PICRegister,
3467 pdmR3DevHlp_APICRegister,
3468 pdmR3DevHlp_IOAPICRegister,
3469 pdmR3DevHlp_HPETRegister,
3470 pdmR3DevHlp_PciRawRegister,
3471 pdmR3DevHlp_DMACRegister,
3472 pdmR3DevHlp_DMARegister,
3473 pdmR3DevHlp_DMAReadMemory,
3474 pdmR3DevHlp_DMAWriteMemory,
3475 pdmR3DevHlp_DMASetDREQ,
3476 pdmR3DevHlp_DMAGetChannelMode,
3477 pdmR3DevHlp_DMASchedule,
3478 pdmR3DevHlp_CMOSWrite,
3479 pdmR3DevHlp_CMOSRead,
3480 pdmR3DevHlp_AssertEMT,
3481 pdmR3DevHlp_AssertOther,
3482 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3483 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3484 pdmR3DevHlp_CallR0,
3485 0,
3486 0,
3487 0,
3488 0,
3489 0,
3490 0,
3491 0,
3492 0,
3493 0,
3494 pdmR3DevHlp_GetUVM,
3495 pdmR3DevHlp_GetVM,
3496 pdmR3DevHlp_GetVMCPU,
3497 pdmR3DevHlp_RegisterVMMDevHeap,
3498 pdmR3DevHlp_UnregisterVMMDevHeap,
3499 pdmR3DevHlp_VMReset,
3500 pdmR3DevHlp_VMSuspend,
3501 pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3502 pdmR3DevHlp_VMPowerOff,
3503 pdmR3DevHlp_A20IsEnabled,
3504 pdmR3DevHlp_A20Set,
3505 pdmR3DevHlp_GetCpuId,
3506 pdmR3DevHlp_TMTimeVirtGet,
3507 pdmR3DevHlp_TMTimeVirtGetFreq,
3508 pdmR3DevHlp_TMTimeVirtGetNano,
3509 pdmR3DevHlp_GetSupDrvSession,
3510 PDM_DEVHLPR3_VERSION /* the end */
3511};
3512
3513
3514
3515
3516/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
3517static DECLCALLBACK(PUVM) pdmR3DevHlp_Untrusted_GetUVM(PPDMDEVINS pDevIns)
3518{
3519 PDMDEV_ASSERT_DEVINS(pDevIns);
3520 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3521 return NULL;
3522}
3523
3524
3525/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3526static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3527{
3528 PDMDEV_ASSERT_DEVINS(pDevIns);
3529 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3530 return NULL;
3531}
3532
3533
3534/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3535static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3536{
3537 PDMDEV_ASSERT_DEVINS(pDevIns);
3538 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3539 return NULL;
3540}
3541
3542
3543/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3544static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3545{
3546 PDMDEV_ASSERT_DEVINS(pDevIns);
3547 NOREF(GCPhys); NOREF(pvHeap); NOREF(cbSize);
3548 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3549 return VERR_ACCESS_DENIED;
3550}
3551
3552
3553/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3554static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3555{
3556 PDMDEV_ASSERT_DEVINS(pDevIns);
3557 NOREF(GCPhys);
3558 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3559 return VERR_ACCESS_DENIED;
3560}
3561
3562
3563/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3564static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3565{
3566 PDMDEV_ASSERT_DEVINS(pDevIns);
3567 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3568 return VERR_ACCESS_DENIED;
3569}
3570
3571
3572/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3573static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3574{
3575 PDMDEV_ASSERT_DEVINS(pDevIns);
3576 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3577 return VERR_ACCESS_DENIED;
3578}
3579
3580
3581/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3582static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3583{
3584 PDMDEV_ASSERT_DEVINS(pDevIns);
3585 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3586 return VERR_ACCESS_DENIED;
3587}
3588
3589
3590/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3591static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3592{
3593 PDMDEV_ASSERT_DEVINS(pDevIns);
3594 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3595 return VERR_ACCESS_DENIED;
3596}
3597
3598
3599/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3600static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3601{
3602 PDMDEV_ASSERT_DEVINS(pDevIns);
3603 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3604 return false;
3605}
3606
3607
3608/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3609static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3610{
3611 PDMDEV_ASSERT_DEVINS(pDevIns);
3612 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3613 NOREF(fEnable);
3614}
3615
3616
3617/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3618static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3619 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3620{
3621 PDMDEV_ASSERT_DEVINS(pDevIns);
3622 NOREF(iLeaf); NOREF(pEax); NOREF(pEbx); NOREF(pEcx); NOREF(pEdx);
3623 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3624}
3625
3626
3627/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
3628static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_Untrusted_GetSupDrvSession(PPDMDEVINS pDevIns)
3629{
3630 PDMDEV_ASSERT_DEVINS(pDevIns);
3631 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3632 return (PSUPDRVSESSION)0;
3633}
3634
3635
3636/**
3637 * The device helper structure for non-trusted devices.
3638 */
3639const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3640{
3641 PDM_DEVHLPR3_VERSION,
3642 pdmR3DevHlp_IOPortRegister,
3643 pdmR3DevHlp_IOPortRegisterRC,
3644 pdmR3DevHlp_IOPortRegisterR0,
3645 pdmR3DevHlp_IOPortDeregister,
3646 pdmR3DevHlp_MMIORegister,
3647 pdmR3DevHlp_MMIORegisterRC,
3648 pdmR3DevHlp_MMIORegisterR0,
3649 pdmR3DevHlp_MMIODeregister,
3650 pdmR3DevHlp_MMIO2Register,
3651 pdmR3DevHlp_MMIO2Deregister,
3652 pdmR3DevHlp_MMIO2Map,
3653 pdmR3DevHlp_MMIO2Unmap,
3654 pdmR3DevHlp_MMHyperMapMMIO2,
3655 pdmR3DevHlp_MMIO2MapKernel,
3656 pdmR3DevHlp_ROMRegister,
3657 pdmR3DevHlp_ROMProtectShadow,
3658 pdmR3DevHlp_SSMRegister,
3659 pdmR3DevHlp_TMTimerCreate,
3660 pdmR3DevHlp_TMUtcNow,
3661 pdmR3DevHlp_PhysRead,
3662 pdmR3DevHlp_PhysWrite,
3663 pdmR3DevHlp_PhysGCPhys2CCPtr,
3664 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3665 pdmR3DevHlp_PhysReleasePageMappingLock,
3666 pdmR3DevHlp_PhysReadGCVirt,
3667 pdmR3DevHlp_PhysWriteGCVirt,
3668 pdmR3DevHlp_PhysGCPtr2GCPhys,
3669 pdmR3DevHlp_MMHeapAlloc,
3670 pdmR3DevHlp_MMHeapAllocZ,
3671 pdmR3DevHlp_MMHeapFree,
3672 pdmR3DevHlp_VMState,
3673 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3674 pdmR3DevHlp_VMSetError,
3675 pdmR3DevHlp_VMSetErrorV,
3676 pdmR3DevHlp_VMSetRuntimeError,
3677 pdmR3DevHlp_VMSetRuntimeErrorV,
3678 pdmR3DevHlp_DBGFStopV,
3679 pdmR3DevHlp_DBGFInfoRegister,
3680 pdmR3DevHlp_DBGFRegRegister,
3681 pdmR3DevHlp_DBGFTraceBuf,
3682 pdmR3DevHlp_STAMRegister,
3683 pdmR3DevHlp_STAMRegisterF,
3684 pdmR3DevHlp_STAMRegisterV,
3685 pdmR3DevHlp_PCIRegister,
3686 pdmR3DevHlp_PCIRegisterMsi,
3687 pdmR3DevHlp_PCIIORegionRegister,
3688 pdmR3DevHlp_PCISetConfigCallbacks,
3689 pdmR3DevHlp_PCIPhysRead,
3690 pdmR3DevHlp_PCIPhysWrite,
3691 pdmR3DevHlp_PCISetIrq,
3692 pdmR3DevHlp_PCISetIrqNoWait,
3693 pdmR3DevHlp_ISASetIrq,
3694 pdmR3DevHlp_ISASetIrqNoWait,
3695 pdmR3DevHlp_DriverAttach,
3696 pdmR3DevHlp_QueueCreate,
3697 pdmR3DevHlp_CritSectInit,
3698 pdmR3DevHlp_CritSectGetNop,
3699 pdmR3DevHlp_CritSectGetNopR0,
3700 pdmR3DevHlp_CritSectGetNopRC,
3701 pdmR3DevHlp_SetDeviceCritSect,
3702 pdmR3DevHlp_ThreadCreate,
3703 pdmR3DevHlp_SetAsyncNotification,
3704 pdmR3DevHlp_AsyncNotificationCompleted,
3705 pdmR3DevHlp_RTCRegister,
3706 pdmR3DevHlp_PCIBusRegister,
3707 pdmR3DevHlp_PICRegister,
3708 pdmR3DevHlp_APICRegister,
3709 pdmR3DevHlp_IOAPICRegister,
3710 pdmR3DevHlp_HPETRegister,
3711 pdmR3DevHlp_PciRawRegister,
3712 pdmR3DevHlp_DMACRegister,
3713 pdmR3DevHlp_DMARegister,
3714 pdmR3DevHlp_DMAReadMemory,
3715 pdmR3DevHlp_DMAWriteMemory,
3716 pdmR3DevHlp_DMASetDREQ,
3717 pdmR3DevHlp_DMAGetChannelMode,
3718 pdmR3DevHlp_DMASchedule,
3719 pdmR3DevHlp_CMOSWrite,
3720 pdmR3DevHlp_CMOSRead,
3721 pdmR3DevHlp_AssertEMT,
3722 pdmR3DevHlp_AssertOther,
3723 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3724 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3725 pdmR3DevHlp_CallR0,
3726 0,
3727 0,
3728 0,
3729 0,
3730 0,
3731 0,
3732 0,
3733 0,
3734 0,
3735 pdmR3DevHlp_Untrusted_GetUVM,
3736 pdmR3DevHlp_Untrusted_GetVM,
3737 pdmR3DevHlp_Untrusted_GetVMCPU,
3738 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3739 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3740 pdmR3DevHlp_Untrusted_VMReset,
3741 pdmR3DevHlp_Untrusted_VMSuspend,
3742 pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3743 pdmR3DevHlp_Untrusted_VMPowerOff,
3744 pdmR3DevHlp_Untrusted_A20IsEnabled,
3745 pdmR3DevHlp_Untrusted_A20Set,
3746 pdmR3DevHlp_Untrusted_GetCpuId,
3747 pdmR3DevHlp_TMTimeVirtGet,
3748 pdmR3DevHlp_TMTimeVirtGetFreq,
3749 pdmR3DevHlp_TMTimeVirtGetNano,
3750 pdmR3DevHlp_Untrusted_GetSupDrvSession,
3751 PDM_DEVHLPR3_VERSION /* the end */
3752};
3753
3754
3755
3756/**
3757 * Queue consumer callback for internal component.
3758 *
3759 * @returns Success indicator.
3760 * If false the item will not be removed and the flushing will stop.
3761 * @param pVM Pointer to the VM.
3762 * @param pItem The item to consume. Upon return this item will be freed.
3763 */
3764DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3765{
3766 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3767 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3768 switch (pTask->enmOp)
3769 {
3770 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3771 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel, pTask->u.SetIRQ.uTagSrc);
3772 break;
3773
3774 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3775 {
3776 /* Same as pdmR3DevHlp_PCISetIrq, except we've got a tag already. */
3777 PPDMDEVINS pDevIns = pTask->pDevInsR3;
3778 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
3779 if (pPciDev)
3780 {
3781 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
3782 Assert(pBus);
3783
3784 pdmLock(pVM);
3785 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, pTask->u.SetIRQ.iIrq,
3786 pTask->u.SetIRQ.iLevel, pTask->u.SetIRQ.uTagSrc);
3787 pdmUnlock(pVM);
3788 }
3789 else
3790 AssertReleaseMsgFailed(("No PCI device registered!\n"));
3791 break;
3792 }
3793
3794 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3795 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel, pTask->u.SetIRQ.uTagSrc);
3796 break;
3797
3798 default:
3799 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3800 break;
3801 }
3802 return true;
3803}
3804
3805/** @} */
3806
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