VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 48568

Last change on this file since 48568 was 46788, checked in by vboxsync, 11 years ago

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1/* $Id: PDMDevHlp.cpp 46788 2013-06-25 17:39:02Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/mm.h>
26#include <VBox/vmm/hm.h>
27#include <VBox/vmm/pgm.h>
28#include <VBox/vmm/iom.h>
29#ifdef VBOX_WITH_REM
30# include <VBox/vmm/rem.h>
31#endif
32#include <VBox/vmm/dbgf.h>
33#include <VBox/vmm/vmapi.h>
34#include <VBox/vmm/vm.h>
35#include <VBox/vmm/uvm.h>
36#include <VBox/vmm/vmm.h>
37
38#include <VBox/version.h>
39#include <VBox/log.h>
40#include <VBox/err.h>
41#include <iprt/asm.h>
42#include <iprt/assert.h>
43#include <iprt/ctype.h>
44#include <iprt/string.h>
45#include <iprt/thread.h>
46
47#include "dtrace/VBoxVMM.h"
48#include "PDMInline.h"
49
50
51/*******************************************************************************
52* Defined Constants And Macros *
53*******************************************************************************/
54/** @def PDM_DEVHLP_DEADLOCK_DETECTION
55 * Define this to enable the deadlock detection when accessing physical memory.
56 */
57#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
58# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
59#endif
60
61
62
63/**
64 * Wrapper around PDMR3LdrGetSymbolRCLazy.
65 */
66DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
67{
68 PVM pVM = pDevIns->Internal.s.pVMR3;
69 if (HMIsEnabled(pVM))
70 {
71 *ppvValue = NIL_RTRCPTR;
72 return VINF_SUCCESS;
73 }
74 return PDMR3LdrGetSymbolRCLazy(pVM,
75 pDevIns->Internal.s.pDevR3->pReg->szRCMod,
76 pDevIns->Internal.s.pDevR3->pszRCSearchPath,
77 pszSymbol, ppvValue);
78}
79
80
81/**
82 * Wrapper around PDMR3LdrGetSymbolR0Lazy.
83 */
84DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
85{
86 return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
87 pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
88 pDevIns->Internal.s.pDevR3->pszR0SearchPath,
89 pszSymbol, ppvValue);
90}
91
92
93/** @name R3 DevHlp
94 * @{
95 */
96
97
98/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
99static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
100 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
101{
102 PDMDEV_ASSERT_DEVINS(pDevIns);
103 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
104 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
105 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
106
107#if 0 /** @todo needs a real string cache for this */
108 if (pDevIns->iInstance > 0)
109 {
110 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
111 if (pszDesc2)
112 pszDesc = pszDesc2;
113 }
114#endif
115
116 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser,
117 pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
118
119 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
120 return rc;
121}
122
123
124/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
125static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
126 const char *pszOut, const char *pszIn,
127 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
128{
129 PDMDEV_ASSERT_DEVINS(pDevIns);
130 PVM pVM = pDevIns->Internal.s.pVMR3;
131 VM_ASSERT_EMT(pVM);
132 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
133 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
134
135 /*
136 * Resolve the functions (one of the can be NULL).
137 */
138 int rc = VINF_SUCCESS;
139 if ( pDevIns->pReg->szRCMod[0]
140 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
141 && !HMIsEnabled(pVM))
142 {
143 RTRCPTR RCPtrIn = NIL_RTRCPTR;
144 if (pszIn)
145 {
146 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
147 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
148 }
149 RTRCPTR RCPtrOut = NIL_RTRCPTR;
150 if (pszOut && RT_SUCCESS(rc))
151 {
152 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
153 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
154 }
155 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
156 if (pszInStr && RT_SUCCESS(rc))
157 {
158 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
159 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
160 }
161 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
162 if (pszOutStr && RT_SUCCESS(rc))
163 {
164 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
165 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
166 }
167
168 if (RT_SUCCESS(rc))
169 {
170#if 0 /** @todo needs a real string cache for this */
171 if (pDevIns->iInstance > 0)
172 {
173 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
174 if (pszDesc2)
175 pszDesc = pszDesc2;
176 }
177#endif
178
179 rc = IOMR3IOPortRegisterRC(pVM, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
180 }
181 }
182 else if (!HMIsEnabled(pVM))
183 {
184 AssertMsgFailed(("No RC module for this driver!\n"));
185 rc = VERR_INVALID_PARAMETER;
186 }
187
188 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
189 return rc;
190}
191
192
193/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
194static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
195 const char *pszOut, const char *pszIn,
196 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
197{
198 PDMDEV_ASSERT_DEVINS(pDevIns);
199 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
200 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
201 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
202
203 /*
204 * Resolve the functions (one of the can be NULL).
205 */
206 int rc = VINF_SUCCESS;
207 if ( pDevIns->pReg->szR0Mod[0]
208 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
209 {
210 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
211 if (pszIn)
212 {
213 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
214 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
215 }
216 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
217 if (pszOut && RT_SUCCESS(rc))
218 {
219 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
220 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
221 }
222 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
223 if (pszInStr && RT_SUCCESS(rc))
224 {
225 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
226 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
227 }
228 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
229 if (pszOutStr && RT_SUCCESS(rc))
230 {
231 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
232 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
233 }
234
235 if (RT_SUCCESS(rc))
236 {
237#if 0 /** @todo needs a real string cache for this */
238 if (pDevIns->iInstance > 0)
239 {
240 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
241 if (pszDesc2)
242 pszDesc = pszDesc2;
243 }
244#endif
245
246 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
247 }
248 }
249 else
250 {
251 AssertMsgFailed(("No R0 module for this driver!\n"));
252 rc = VERR_INVALID_PARAMETER;
253 }
254
255 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
256 return rc;
257}
258
259
260/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
261static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
262{
263 PDMDEV_ASSERT_DEVINS(pDevIns);
264 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
265 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
266 Port, cPorts));
267
268 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
269
270 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
271 return rc;
272}
273
274
275/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
276static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
277 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
278 uint32_t fFlags, const char *pszDesc)
279{
280 PDMDEV_ASSERT_DEVINS(pDevIns);
281 PVM pVM = pDevIns->Internal.s.pVMR3;
282 VM_ASSERT_EMT(pVM);
283 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p fFlags=%#x pszDesc=%p:{%s}\n",
284 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, fFlags, pszDesc));
285
286 if (pDevIns->iInstance > 0)
287 {
288 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
289 if (pszDesc2)
290 pszDesc = pszDesc2;
291 }
292
293 int rc = IOMR3MmioRegisterR3(pVM, pDevIns, GCPhysStart, cbRange, pvUser,
294 pfnWrite, pfnRead, pfnFill, fFlags, pszDesc);
295
296 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
297 return rc;
298}
299
300
301/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
302static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
303 const char *pszWrite, const char *pszRead, const char *pszFill)
304{
305 PDMDEV_ASSERT_DEVINS(pDevIns);
306 PVM pVM = pDevIns->Internal.s.pVMR3;
307 VM_ASSERT_EMT(pVM);
308 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
309 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
310
311
312 /*
313 * Resolve the functions.
314 * Not all function have to present, leave it to IOM to enforce this.
315 */
316 int rc = VINF_SUCCESS;
317 if ( pDevIns->pReg->szRCMod[0]
318 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
319 && !HMIsEnabled(pVM))
320 {
321 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
322 if (pszWrite)
323 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
324
325 RTRCPTR RCPtrRead = NIL_RTRCPTR;
326 int rc2 = VINF_SUCCESS;
327 if (pszRead)
328 rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
329
330 RTRCPTR RCPtrFill = NIL_RTRCPTR;
331 int rc3 = VINF_SUCCESS;
332 if (pszFill)
333 rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
334
335 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
336 rc = IOMR3MmioRegisterRC(pVM, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
337 else
338 {
339 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
340 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
341 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
342 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
343 rc = rc2;
344 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
345 rc = rc3;
346 }
347 }
348 else if (!HMIsEnabled(pVM))
349 {
350 AssertMsgFailed(("No RC module for this driver!\n"));
351 rc = VERR_INVALID_PARAMETER;
352 }
353
354 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
355 return rc;
356}
357
358/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
359static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
360 const char *pszWrite, const char *pszRead, const char *pszFill)
361{
362 PDMDEV_ASSERT_DEVINS(pDevIns);
363 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
364 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
365 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
366
367 /*
368 * Resolve the functions.
369 * Not all function have to present, leave it to IOM to enforce this.
370 */
371 int rc = VINF_SUCCESS;
372 if ( pDevIns->pReg->szR0Mod[0]
373 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
374 {
375 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
376 if (pszWrite)
377 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
378 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
379 int rc2 = VINF_SUCCESS;
380 if (pszRead)
381 rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
382 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
383 int rc3 = VINF_SUCCESS;
384 if (pszFill)
385 rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
386 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
387 rc = IOMR3MmioRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
388 else
389 {
390 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
391 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
392 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
393 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
394 rc = rc2;
395 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
396 rc = rc3;
397 }
398 }
399 else
400 {
401 AssertMsgFailed(("No R0 module for this driver!\n"));
402 rc = VERR_INVALID_PARAMETER;
403 }
404
405 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
406 return rc;
407}
408
409
410/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
411static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
412{
413 PDMDEV_ASSERT_DEVINS(pDevIns);
414 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
415 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
416 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
417
418 int rc = IOMR3MmioDeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
419
420 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
421 return rc;
422}
423
424
425/**
426 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
427 */
428static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
429{
430 PDMDEV_ASSERT_DEVINS(pDevIns);
431 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
432 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
433 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
434
435/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
436 * use a real string cache. */
437 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
438
439 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
440 return rc;
441}
442
443
444/**
445 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
446 */
447static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
448{
449 PDMDEV_ASSERT_DEVINS(pDevIns);
450 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
451 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
452 pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
453
454 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
455
456 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
457
458 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
459 return rc;
460}
461
462
463/**
464 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
465 */
466static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
467{
468 PDMDEV_ASSERT_DEVINS(pDevIns);
469 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
470 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
471 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
472
473 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
474
475 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
476 return rc;
477}
478
479
480/**
481 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
482 */
483static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
484{
485 PDMDEV_ASSERT_DEVINS(pDevIns);
486 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
487 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
488 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
489
490 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
491
492 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
493 return rc;
494}
495
496
497/**
498 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
499 */
500static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
501 const char *pszDesc, PRTRCPTR pRCPtr)
502{
503 PDMDEV_ASSERT_DEVINS(pDevIns);
504 PVM pVM = pDevIns->Internal.s.pVMR3;
505 VM_ASSERT_EMT(pVM);
506 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
507 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
508
509 if (pDevIns->iInstance > 0)
510 {
511 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
512 if (pszDesc2)
513 pszDesc = pszDesc2;
514 }
515
516 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
517
518 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pRCPtr));
519 return rc;
520}
521
522
523/**
524 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
525 */
526static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
527 const char *pszDesc, PRTR0PTR pR0Ptr)
528{
529 PDMDEV_ASSERT_DEVINS(pDevIns);
530 PVM pVM = pDevIns->Internal.s.pVMR3;
531 VM_ASSERT_EMT(pVM);
532 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
533 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
534
535 if (pDevIns->iInstance > 0)
536 {
537 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
538 if (pszDesc2)
539 pszDesc = pszDesc2;
540 }
541
542 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
543
544 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pR0Ptr));
545 return rc;
546}
547
548
549/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
550static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
551 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
552{
553 PDMDEV_ASSERT_DEVINS(pDevIns);
554 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
555 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
556 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
557
558/** @todo can we mangle pszDesc? */
559 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
560
561 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
562 return rc;
563}
564
565
566/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
567static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
568{
569 PDMDEV_ASSERT_DEVINS(pDevIns);
570 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
571 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
572
573 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
574
575 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
576 return rc;
577}
578
579
580/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
581static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
582 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
583 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
584 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
585{
586 PDMDEV_ASSERT_DEVINS(pDevIns);
587 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
588 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
589 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
590 pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
591 pfnLivePrep, pfnLiveExec, pfnLiveVote,
592 pfnSavePrep, pfnSaveExec, pfnSaveDone,
593 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
594
595 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
596 uVersion, cbGuess, pszBefore,
597 pfnLivePrep, pfnLiveExec, pfnLiveVote,
598 pfnSavePrep, pfnSaveExec, pfnSaveDone,
599 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
600
601 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
602 return rc;
603}
604
605
606/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
607static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
608{
609 PDMDEV_ASSERT_DEVINS(pDevIns);
610 PVM pVM = pDevIns->Internal.s.pVMR3;
611 VM_ASSERT_EMT(pVM);
612 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
613 pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
614
615 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
616 {
617 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
618 if (pszDesc2)
619 pszDesc = pszDesc2;
620 }
621
622 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
623
624 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
625 return rc;
626}
627
628
629/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
630static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
631{
632 PDMDEV_ASSERT_DEVINS(pDevIns);
633 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
634 pDevIns->pReg->szName, pDevIns->iInstance, pTime));
635
636 pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
637
638 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
639 return pTime;
640}
641
642
643/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
644static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
645{
646 PDMDEV_ASSERT_DEVINS(pDevIns);
647 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'\n",
648 pDevIns->pReg->szName, pDevIns->iInstance));
649
650 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
651
652 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
653 return u64Time;
654}
655
656
657/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
658static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
659{
660 PDMDEV_ASSERT_DEVINS(pDevIns);
661 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'\n",
662 pDevIns->pReg->szName, pDevIns->iInstance));
663
664 uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
665
666 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
667 return u64Freq;
668}
669
670
671/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
672static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
673{
674 PDMDEV_ASSERT_DEVINS(pDevIns);
675 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'\n",
676 pDevIns->pReg->szName, pDevIns->iInstance));
677
678 uint64_t u64Time = TMVirtualGet(pDevIns->Internal.s.pVMR3);
679 uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
680
681 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
682 return u64Nano;
683}
684
685
686/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
687static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_GetSupDrvSession(PPDMDEVINS pDevIns)
688{
689 PDMDEV_ASSERT_DEVINS(pDevIns);
690 LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'\n",
691 pDevIns->pReg->szName, pDevIns->iInstance));
692
693 PSUPDRVSESSION pSession = pDevIns->Internal.s.pVMR3->pSession;
694
695 LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'/%d: returns %#p\n", pDevIns->pReg->szName, pDevIns->iInstance, pSession));
696 return pSession;
697}
698
699
700/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
701static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
702{
703 PDMDEV_ASSERT_DEVINS(pDevIns);
704 PVM pVM = pDevIns->Internal.s.pVMR3;
705 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
706 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
707
708#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
709 if (!VM_IS_EMT(pVM))
710 {
711 char szNames[128];
712 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
713 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
714 }
715#endif
716
717 int rc;
718 if (VM_IS_EMT(pVM))
719 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
720 else
721 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
722
723 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
724 return rc;
725}
726
727
728/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
729static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
730{
731 PDMDEV_ASSERT_DEVINS(pDevIns);
732 PVM pVM = pDevIns->Internal.s.pVMR3;
733 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
734 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
735
736#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
737 if (!VM_IS_EMT(pVM))
738 {
739 char szNames[128];
740 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
741 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
742 }
743#endif
744
745 int rc;
746 if (VM_IS_EMT(pVM))
747 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
748 else
749 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
750
751 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
752 return rc;
753}
754
755
756/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
757static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
758{
759 PDMDEV_ASSERT_DEVINS(pDevIns);
760 PVM pVM = pDevIns->Internal.s.pVMR3;
761 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
762 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
763 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
764
765#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
766 if (!VM_IS_EMT(pVM))
767 {
768 char szNames[128];
769 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
770 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
771 }
772#endif
773
774 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
775
776 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
777 return rc;
778}
779
780
781/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
782static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
783{
784 PDMDEV_ASSERT_DEVINS(pDevIns);
785 PVM pVM = pDevIns->Internal.s.pVMR3;
786 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
787 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
788 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
789
790#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
791 if (!VM_IS_EMT(pVM))
792 {
793 char szNames[128];
794 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
795 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
796 }
797#endif
798
799 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
800
801 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
802 return rc;
803}
804
805
806/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
807static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
808{
809 PDMDEV_ASSERT_DEVINS(pDevIns);
810 PVM pVM = pDevIns->Internal.s.pVMR3;
811 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
812 pDevIns->pReg->szName, pDevIns->iInstance, pLock));
813
814 PGMPhysReleasePageMappingLock(pVM, pLock);
815
816 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
817}
818
819
820/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
821static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
822{
823 PDMDEV_ASSERT_DEVINS(pDevIns);
824 PVM pVM = pDevIns->Internal.s.pVMR3;
825 VM_ASSERT_EMT(pVM);
826 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
827 pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
828
829 PVMCPU pVCpu = VMMGetCpu(pVM);
830 if (!pVCpu)
831 return VERR_ACCESS_DENIED;
832#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
833 /** @todo SMP. */
834#endif
835
836 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
837
838 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
839
840 return rc;
841}
842
843
844/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
845static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
846{
847 PDMDEV_ASSERT_DEVINS(pDevIns);
848 PVM pVM = pDevIns->Internal.s.pVMR3;
849 VM_ASSERT_EMT(pVM);
850 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
851 pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
852
853 PVMCPU pVCpu = VMMGetCpu(pVM);
854 if (!pVCpu)
855 return VERR_ACCESS_DENIED;
856#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
857 /** @todo SMP. */
858#endif
859
860 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
861
862 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
863
864 return rc;
865}
866
867
868/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
869static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
870{
871 PDMDEV_ASSERT_DEVINS(pDevIns);
872 PVM pVM = pDevIns->Internal.s.pVMR3;
873 VM_ASSERT_EMT(pVM);
874 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
875 pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
876
877 PVMCPU pVCpu = VMMGetCpu(pVM);
878 if (!pVCpu)
879 return VERR_ACCESS_DENIED;
880#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
881 /** @todo SMP. */
882#endif
883
884 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
885
886 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pGCPhys));
887
888 return rc;
889}
890
891
892/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
893static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
894{
895 PDMDEV_ASSERT_DEVINS(pDevIns);
896 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
897
898 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
899
900 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
901 return pv;
902}
903
904
905/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
906static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
907{
908 PDMDEV_ASSERT_DEVINS(pDevIns);
909 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
910
911 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
912
913 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
914 return pv;
915}
916
917
918/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
919static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
920{
921 PDMDEV_ASSERT_DEVINS(pDevIns);
922 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
923
924 MMR3HeapFree(pv);
925
926 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
927}
928
929
930/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
931static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
932{
933 PDMDEV_ASSERT_DEVINS(pDevIns);
934
935 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
936
937 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
938 enmVMState, VMR3GetStateName(enmVMState)));
939 return enmVMState;
940}
941
942
943/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
944static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
945{
946 PDMDEV_ASSERT_DEVINS(pDevIns);
947
948 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
949
950 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
951 fRc));
952 return fRc;
953}
954
955
956/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
957static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
958{
959 PDMDEV_ASSERT_DEVINS(pDevIns);
960 va_list args;
961 va_start(args, pszFormat);
962 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
963 va_end(args);
964 return rc;
965}
966
967
968/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
969static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
970{
971 PDMDEV_ASSERT_DEVINS(pDevIns);
972 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
973 return rc;
974}
975
976
977/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
978static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
979{
980 PDMDEV_ASSERT_DEVINS(pDevIns);
981 va_list args;
982 va_start(args, pszFormat);
983 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
984 va_end(args);
985 return rc;
986}
987
988
989/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
990static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
991{
992 PDMDEV_ASSERT_DEVINS(pDevIns);
993 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
994 return rc;
995}
996
997
998/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
999static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1000{
1001 PDMDEV_ASSERT_DEVINS(pDevIns);
1002#ifdef LOG_ENABLED
1003 va_list va2;
1004 va_copy(va2, args);
1005 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1006 pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1007 va_end(va2);
1008#endif
1009
1010 PVM pVM = pDevIns->Internal.s.pVMR3;
1011 VM_ASSERT_EMT(pVM);
1012 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1013 if (rc == VERR_DBGF_NOT_ATTACHED)
1014 rc = VINF_SUCCESS;
1015
1016 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1017 return rc;
1018}
1019
1020
1021/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
1022static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1023{
1024 PDMDEV_ASSERT_DEVINS(pDevIns);
1025 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1026 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1027
1028 PVM pVM = pDevIns->Internal.s.pVMR3;
1029 VM_ASSERT_EMT(pVM);
1030 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1031
1032 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1033 return rc;
1034}
1035
1036
1037/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFRegRegister} */
1038static DECLCALLBACK(int) pdmR3DevHlp_DBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
1039{
1040 PDMDEV_ASSERT_DEVINS(pDevIns);
1041 LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: paRegisters=%p\n",
1042 pDevIns->pReg->szName, pDevIns->iInstance, paRegisters));
1043
1044 PVM pVM = pDevIns->Internal.s.pVMR3;
1045 VM_ASSERT_EMT(pVM);
1046 int rc = DBGFR3RegRegisterDevice(pVM, paRegisters, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance);
1047
1048 LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1049 return rc;
1050}
1051
1052
1053/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1054static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1055{
1056 PDMDEV_ASSERT_DEVINS(pDevIns);
1057 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1058 LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1059 return hTraceBuf;
1060}
1061
1062
1063/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1064static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1065{
1066 PDMDEV_ASSERT_DEVINS(pDevIns);
1067 PVM pVM = pDevIns->Internal.s.pVMR3;
1068 VM_ASSERT_EMT(pVM);
1069
1070 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1071 NOREF(pVM);
1072}
1073
1074
1075
1076/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1077static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1078 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1079{
1080 PDMDEV_ASSERT_DEVINS(pDevIns);
1081 PVM pVM = pDevIns->Internal.s.pVMR3;
1082 VM_ASSERT_EMT(pVM);
1083
1084 va_list args;
1085 va_start(args, pszName);
1086 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1087 va_end(args);
1088 AssertRC(rc);
1089
1090 NOREF(pVM);
1091}
1092
1093
1094/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1095static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1096 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1097{
1098 PDMDEV_ASSERT_DEVINS(pDevIns);
1099 PVM pVM = pDevIns->Internal.s.pVMR3;
1100 VM_ASSERT_EMT(pVM);
1101
1102 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1103 AssertRC(rc);
1104
1105 NOREF(pVM);
1106}
1107
1108
1109/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
1110static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1111{
1112 PDMDEV_ASSERT_DEVINS(pDevIns);
1113 PVM pVM = pDevIns->Internal.s.pVMR3;
1114 VM_ASSERT_EMT(pVM);
1115 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
1116 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
1117
1118 /*
1119 * Validate input.
1120 */
1121 if (!pPciDev)
1122 {
1123 Assert(pPciDev);
1124 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1125 return VERR_INVALID_PARAMETER;
1126 }
1127 if (!pPciDev->config[0] && !pPciDev->config[1])
1128 {
1129 Assert(pPciDev->config[0] || pPciDev->config[1]);
1130 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1131 return VERR_INVALID_PARAMETER;
1132 }
1133 if (pDevIns->Internal.s.pPciDeviceR3)
1134 {
1135 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1136 * support a PDM device with multiple PCI devices. This might become a problem
1137 * when upgrading the chipset for instance because of multiple functions in some
1138 * devices...
1139 */
1140 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1141 return VERR_PDM_ONE_PCI_FUNCTION_PER_DEVICE;
1142 }
1143
1144 /*
1145 * Choose the PCI bus for the device.
1146 *
1147 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1148 * configuration value will be set. If not the default bus is 0.
1149 */
1150 int rc;
1151 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1152 if (!pBus)
1153 {
1154 uint8_t u8Bus;
1155 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1156 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1157 rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1158 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1159 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1160 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1161 VERR_PDM_NO_PCI_BUS);
1162 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1163 }
1164 if (pBus->pDevInsR3)
1165 {
1166 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1167 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1168 else
1169 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1170
1171 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1172 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1173 else
1174 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1175
1176 /*
1177 * Check the configuration for PCI device and function assignment.
1178 */
1179 int iDev = -1;
1180 uint8_t u8Device;
1181 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1182 if (RT_SUCCESS(rc))
1183 {
1184 AssertMsgReturn(u8Device <= 31,
1185 ("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1186 u8Device, pDevIns->pReg->szName, pDevIns->iInstance),
1187 VERR_PDM_BAD_PCI_CONFIG);
1188
1189 uint8_t u8Function;
1190 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1191 AssertMsgRCReturn(rc, ("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1192 rc, pDevIns->pReg->szName, pDevIns->iInstance),
1193 rc);
1194 AssertMsgReturn(u8Function <= 7,
1195 ("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1196 u8Function, pDevIns->pReg->szName, pDevIns->iInstance),
1197 VERR_PDM_BAD_PCI_CONFIG);
1198
1199 iDev = (u8Device << 3) | u8Function;
1200 }
1201 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1202 {
1203 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1204 rc, pDevIns->pReg->szName, pDevIns->iInstance));
1205 return rc;
1206 }
1207
1208 /*
1209 * Call the pci bus device to do the actual registration.
1210 */
1211 pdmLock(pVM);
1212 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1213 pdmUnlock(pVM);
1214 if (RT_SUCCESS(rc))
1215 {
1216 pPciDev->pDevIns = pDevIns;
1217
1218 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1219 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1220 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1221 else
1222 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1223
1224 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1225 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1226 else
1227 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1228
1229 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1230 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1231 }
1232 }
1233 else
1234 {
1235 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1236 rc = VERR_PDM_NO_PCI_BUS;
1237 }
1238
1239 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1240 return rc;
1241}
1242
1243
1244/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1245static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1246{
1247 PDMDEV_ASSERT_DEVINS(pDevIns);
1248 PVM pVM = pDevIns->Internal.s.pVMR3;
1249 VM_ASSERT_EMT(pVM);
1250 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1251 pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1252
1253 /*
1254 * Validate input.
1255 */
1256 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1257 {
1258 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1259 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1260 return VERR_INVALID_PARAMETER;
1261 }
1262 switch ((int)enmType)
1263 {
1264 case PCI_ADDRESS_SPACE_IO:
1265 /*
1266 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1267 */
1268 AssertMsgReturn(cbRegion <= _32K,
1269 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1270 VERR_INVALID_PARAMETER);
1271 break;
1272
1273 case PCI_ADDRESS_SPACE_MEM:
1274 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1275 case PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_BAR64:
1276 case PCI_ADDRESS_SPACE_MEM_PREFETCH | PCI_ADDRESS_SPACE_BAR64:
1277 /*
1278 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1279 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1280 */
1281 AssertMsgReturn(cbRegion <= 512 * _1M,
1282 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1283 VERR_INVALID_PARAMETER);
1284 break;
1285 default:
1286 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1287 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1288 return VERR_INVALID_PARAMETER;
1289 }
1290 if (!pfnCallback)
1291 {
1292 Assert(pfnCallback);
1293 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1294 return VERR_INVALID_PARAMETER;
1295 }
1296 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1297
1298 /*
1299 * Must have a PCI device registered!
1300 */
1301 int rc;
1302 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1303 if (pPciDev)
1304 {
1305 /*
1306 * We're currently restricted to page aligned MMIO regions.
1307 */
1308 if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1309 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1310 {
1311 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1312 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1313 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1314 }
1315
1316 /*
1317 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1318 */
1319 int iLastSet = ASMBitLastSetU32(cbRegion);
1320 Assert(iLastSet > 0);
1321 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1322 if (cbRegion > cbRegionAligned)
1323 cbRegion = cbRegionAligned * 2; /* round up */
1324
1325 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1326 Assert(pBus);
1327 pdmLock(pVM);
1328 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1329 pdmUnlock(pVM);
1330 }
1331 else
1332 {
1333 AssertMsgFailed(("No PCI device registered!\n"));
1334 rc = VERR_PDM_NOT_PCI_DEVICE;
1335 }
1336
1337 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1338 return rc;
1339}
1340
1341
1342/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1343static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1344 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1345{
1346 PDMDEV_ASSERT_DEVINS(pDevIns);
1347 PVM pVM = pDevIns->Internal.s.pVMR3;
1348 VM_ASSERT_EMT(pVM);
1349 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1350 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1351
1352 /*
1353 * Validate input and resolve defaults.
1354 */
1355 AssertPtr(pfnRead);
1356 AssertPtr(pfnWrite);
1357 AssertPtrNull(ppfnReadOld);
1358 AssertPtrNull(ppfnWriteOld);
1359 AssertPtrNull(pPciDev);
1360
1361 if (!pPciDev)
1362 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1363 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1364 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1365 AssertRelease(pBus);
1366 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1367
1368 /*
1369 * Do the job.
1370 */
1371 pdmLock(pVM);
1372 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1373 pdmUnlock(pVM);
1374
1375 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1376}
1377
1378
1379/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
1380static DECLCALLBACK(int) pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1381{
1382 PDMDEV_ASSERT_DEVINS(pDevIns);
1383
1384#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1385 /*
1386 * Just check the busmaster setting here and forward the request to the generic read helper.
1387 */
1388 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1389 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
1390
1391 if (!PCIDevIsBusmaster(pPciDev))
1392 {
1393 Log(("pdmR3DevHlp_PCIPhysRead: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
1394 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
1395 return VERR_PDM_NOT_PCI_BUS_MASTER;
1396 }
1397#endif
1398
1399 return pDevIns->pHlpR3->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
1400}
1401
1402
1403/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
1404static DECLCALLBACK(int) pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1405{
1406 PDMDEV_ASSERT_DEVINS(pDevIns);
1407
1408#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1409 /*
1410 * Just check the busmaster setting here and forward the request to the generic read helper.
1411 */
1412 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1413 AssertReleaseMsg(pPciDev, ("No PCI device registered!\n"));
1414
1415 if (!PCIDevIsBusmaster(pPciDev))
1416 {
1417 Log(("pdmR3DevHlp_PCIPhysWrite: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
1418 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
1419 return VERR_PDM_NOT_PCI_BUS_MASTER;
1420 }
1421#endif
1422
1423 return pDevIns->pHlpR3->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
1424}
1425
1426
1427/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1428static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1429{
1430 PDMDEV_ASSERT_DEVINS(pDevIns);
1431 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1432
1433 /*
1434 * Validate input.
1435 */
1436 Assert(iIrq == 0);
1437 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1438
1439 /*
1440 * Must have a PCI device registered!
1441 */
1442 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1443 if (pPciDev)
1444 {
1445 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1446 Assert(pBus);
1447 PVM pVM = pDevIns->Internal.s.pVMR3;
1448
1449 pdmLock(pVM);
1450 uint32_t uTagSrc;
1451 if (iLevel & PDM_IRQ_LEVEL_HIGH)
1452 {
1453 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1454 if (iLevel == PDM_IRQ_LEVEL_HIGH)
1455 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1456 else
1457 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1458 }
1459 else
1460 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1461
1462 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel, uTagSrc);
1463
1464 if (iLevel == PDM_IRQ_LEVEL_LOW)
1465 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1466 pdmUnlock(pVM);
1467 }
1468 else
1469 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1470
1471 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1472}
1473
1474
1475/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1476static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1477{
1478 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1479}
1480
1481
1482/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1483static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
1484{
1485 PDMDEV_ASSERT_DEVINS(pDevIns);
1486 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: %d MSI vectors %d MSI-X vectors\n", pDevIns->pReg->szName, pDevIns->iInstance, pMsiReg->cMsiVectors,pMsiReg->cMsixVectors ));
1487 int rc = VINF_SUCCESS;
1488
1489 /*
1490 * Must have a PCI device registered!
1491 */
1492 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1493 if (pPciDev)
1494 {
1495 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1496 Assert(pBus);
1497
1498 PVM pVM = pDevIns->Internal.s.pVMR3;
1499 pdmLock(pVM);
1500 if (pBus->pfnRegisterMsiR3)
1501 rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1502 else
1503 rc = VERR_NOT_IMPLEMENTED;
1504 pdmUnlock(pVM);
1505 }
1506 else
1507 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1508
1509 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1510 return rc;
1511}
1512
1513/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1514static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1515{
1516 PDMDEV_ASSERT_DEVINS(pDevIns);
1517 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1518
1519 /*
1520 * Validate input.
1521 */
1522 Assert(iIrq < 16);
1523 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1524
1525 PVM pVM = pDevIns->Internal.s.pVMR3;
1526
1527 /*
1528 * Do the job.
1529 */
1530 pdmLock(pVM);
1531 uint32_t uTagSrc;
1532 if (iLevel & PDM_IRQ_LEVEL_HIGH)
1533 {
1534 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1535 if (iLevel == PDM_IRQ_LEVEL_HIGH)
1536 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1537 else
1538 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1539 }
1540 else
1541 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1542
1543 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
1544
1545 if (iLevel == PDM_IRQ_LEVEL_LOW)
1546 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1547 pdmUnlock(pVM);
1548
1549 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1550}
1551
1552
1553/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1554static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1555{
1556 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1557}
1558
1559
1560/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1561static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1562{
1563 PDMDEV_ASSERT_DEVINS(pDevIns);
1564 PVM pVM = pDevIns->Internal.s.pVMR3;
1565 VM_ASSERT_EMT(pVM);
1566 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1567 pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1568
1569 /*
1570 * Lookup the LUN, it might already be registered.
1571 */
1572 PPDMLUN pLunPrev = NULL;
1573 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1574 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1575 if (pLun->iLun == iLun)
1576 break;
1577
1578 /*
1579 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1580 */
1581 if (!pLun)
1582 {
1583 if ( !pBaseInterface
1584 || !pszDesc
1585 || !*pszDesc)
1586 {
1587 Assert(pBaseInterface);
1588 Assert(pszDesc || *pszDesc);
1589 return VERR_INVALID_PARAMETER;
1590 }
1591
1592 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1593 if (!pLun)
1594 return VERR_NO_MEMORY;
1595
1596 pLun->iLun = iLun;
1597 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1598 pLun->pTop = NULL;
1599 pLun->pBottom = NULL;
1600 pLun->pDevIns = pDevIns;
1601 pLun->pUsbIns = NULL;
1602 pLun->pszDesc = pszDesc;
1603 pLun->pBase = pBaseInterface;
1604 if (!pLunPrev)
1605 pDevIns->Internal.s.pLunsR3 = pLun;
1606 else
1607 pLunPrev->pNext = pLun;
1608 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1609 iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1610 }
1611 else if (pLun->pTop)
1612 {
1613 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1614 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1615 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1616 }
1617 Assert(pLun->pBase == pBaseInterface);
1618
1619
1620 /*
1621 * Get the attached driver configuration.
1622 */
1623 int rc;
1624 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1625 if (pNode)
1626 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
1627 else
1628 rc = VERR_PDM_NO_ATTACHED_DRIVER;
1629
1630
1631 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1632 return rc;
1633}
1634
1635
1636/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1637static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
1638 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1639{
1640 PDMDEV_ASSERT_DEVINS(pDevIns);
1641 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1642 pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1643
1644 PVM pVM = pDevIns->Internal.s.pVMR3;
1645 VM_ASSERT_EMT(pVM);
1646
1647 if (pDevIns->iInstance > 0)
1648 {
1649 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1650 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1651 }
1652
1653 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1654
1655 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppQueue));
1656 return rc;
1657}
1658
1659
1660/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1661static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1662 const char *pszNameFmt, va_list va)
1663{
1664 PDMDEV_ASSERT_DEVINS(pDevIns);
1665 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1666 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1667
1668 PVM pVM = pDevIns->Internal.s.pVMR3;
1669 VM_ASSERT_EMT(pVM);
1670 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1671
1672 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1673 return rc;
1674}
1675
1676
1677/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNop} */
1678static DECLCALLBACK(PPDMCRITSECT) pdmR3DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
1679{
1680 PDMDEV_ASSERT_DEVINS(pDevIns);
1681 PVM pVM = pDevIns->Internal.s.pVMR3;
1682 VM_ASSERT_EMT(pVM);
1683
1684 PPDMCRITSECT pCritSect = PDMR3CritSectGetNop(pVM);
1685 LogFlow(("pdmR3DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n",
1686 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1687 return pCritSect;
1688}
1689
1690
1691/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopR0} */
1692static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopR0(PPDMDEVINS pDevIns)
1693{
1694 PDMDEV_ASSERT_DEVINS(pDevIns);
1695 PVM pVM = pDevIns->Internal.s.pVMR3;
1696 VM_ASSERT_EMT(pVM);
1697
1698 R0PTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopR0(pVM);
1699 LogFlow(("pdmR3DevHlp_CritSectGetNopR0: caller='%s'/%d: return %RHv\n",
1700 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1701 return pCritSect;
1702}
1703
1704
1705/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopRC} */
1706static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopRC(PPDMDEVINS pDevIns)
1707{
1708 PDMDEV_ASSERT_DEVINS(pDevIns);
1709 PVM pVM = pDevIns->Internal.s.pVMR3;
1710 VM_ASSERT_EMT(pVM);
1711
1712 RCPTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopRC(pVM);
1713 LogFlow(("pdmR3DevHlp_CritSectGetNopRC: caller='%s'/%d: return %RRv\n",
1714 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
1715 return pCritSect;
1716}
1717
1718
1719/** @interface_method_impl{PDMDEVHLPR3,pfnSetDeviceCritSect} */
1720static DECLCALLBACK(int) pdmR3DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
1721{
1722 /*
1723 * Validate input.
1724 *
1725 * Note! We only allow the automatically created default critical section
1726 * to be replaced by this API.
1727 */
1728 PDMDEV_ASSERT_DEVINS(pDevIns);
1729 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
1730 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
1731 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
1732 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
1733 PVM pVM = pDevIns->Internal.s.pVMR3;
1734 AssertReturn(pCritSect->s.pVMR3 == pVM, VERR_INVALID_PARAMETER);
1735
1736 VM_ASSERT_EMT(pVM);
1737 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1738
1739 AssertReturn(pDevIns->pCritSectRoR3, VERR_PDM_DEV_IPE_1);
1740 AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER);
1741 AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER);
1742 AssertReturn(pDevIns->pCritSectRoR3 != pCritSect, VERR_INVALID_PARAMETER);
1743
1744 /*
1745 * Replace the critical section and destroy the automatic default section.
1746 */
1747 PPDMCRITSECT pOldCritSect = pDevIns->pCritSectRoR3;
1748 pDevIns->pCritSectRoR3 = pCritSect;
1749 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1750 pDevIns->pCritSectRoR0 = MMHyperCCToR0(pVM, pDevIns->pCritSectRoR3);
1751 else
1752 Assert(pDevIns->pCritSectRoR0 == NIL_RTRCPTR);
1753
1754 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1755 pDevIns->pCritSectRoRC = MMHyperCCToRC(pVM, pDevIns->pCritSectRoR3);
1756 else
1757 Assert(pDevIns->pCritSectRoRC == NIL_RTRCPTR);
1758
1759 PDMR3CritSectDelete(pOldCritSect);
1760 if (pDevIns->pReg->fFlags & (PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0))
1761 MMHyperFree(pVM, pOldCritSect);
1762 else
1763 MMR3HeapFree(pOldCritSect);
1764
1765 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1766 return VINF_SUCCESS;
1767}
1768
1769
1770/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1771static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1772 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1773{
1774 PDMDEV_ASSERT_DEVINS(pDevIns);
1775 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1776 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1777 pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1778
1779 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1780
1781 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1782 rc, *ppThread));
1783 return rc;
1784}
1785
1786
1787/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1788static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1789{
1790 PDMDEV_ASSERT_DEVINS(pDevIns);
1791 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1792 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1793
1794 int rc = VINF_SUCCESS;
1795 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1796 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1797 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1798 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1799 AssertStmt( enmVMState == VMSTATE_SUSPENDING
1800 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1801 || enmVMState == VMSTATE_SUSPENDING_LS
1802 || enmVMState == VMSTATE_RESETTING
1803 || enmVMState == VMSTATE_RESETTING_LS
1804 || enmVMState == VMSTATE_POWERING_OFF
1805 || enmVMState == VMSTATE_POWERING_OFF_LS,
1806 rc = VERR_INVALID_STATE);
1807
1808 if (RT_SUCCESS(rc))
1809 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1810
1811 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1812 return rc;
1813}
1814
1815
1816/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1817static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1818{
1819 PDMDEV_ASSERT_DEVINS(pDevIns);
1820 PVM pVM = pDevIns->Internal.s.pVMR3;
1821
1822 VMSTATE enmVMState = VMR3GetState(pVM);
1823 if ( enmVMState == VMSTATE_SUSPENDING
1824 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1825 || enmVMState == VMSTATE_SUSPENDING_LS
1826 || enmVMState == VMSTATE_RESETTING
1827 || enmVMState == VMSTATE_RESETTING_LS
1828 || enmVMState == VMSTATE_POWERING_OFF
1829 || enmVMState == VMSTATE_POWERING_OFF_LS)
1830 {
1831 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1832 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1833 }
1834 else
1835 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1836}
1837
1838
1839/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1840static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1841{
1842 PDMDEV_ASSERT_DEVINS(pDevIns);
1843 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1844 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1845 pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1846 pRtcReg->pfnWrite, ppRtcHlp));
1847
1848 /*
1849 * Validate input.
1850 */
1851 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1852 {
1853 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1854 PDM_RTCREG_VERSION));
1855 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1856 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1857 return VERR_INVALID_PARAMETER;
1858 }
1859 if ( !pRtcReg->pfnWrite
1860 || !pRtcReg->pfnRead)
1861 {
1862 Assert(pRtcReg->pfnWrite);
1863 Assert(pRtcReg->pfnRead);
1864 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1865 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1866 return VERR_INVALID_PARAMETER;
1867 }
1868
1869 if (!ppRtcHlp)
1870 {
1871 Assert(ppRtcHlp);
1872 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1873 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1874 return VERR_INVALID_PARAMETER;
1875 }
1876
1877 /*
1878 * Only one DMA device.
1879 */
1880 PVM pVM = pDevIns->Internal.s.pVMR3;
1881 if (pVM->pdm.s.pRtc)
1882 {
1883 AssertMsgFailed(("Only one RTC device is supported!\n"));
1884 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1885 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1886 return VERR_INVALID_PARAMETER;
1887 }
1888
1889 /*
1890 * Allocate and initialize pci bus structure.
1891 */
1892 int rc = VINF_SUCCESS;
1893 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1894 if (pRtc)
1895 {
1896 pRtc->pDevIns = pDevIns;
1897 pRtc->Reg = *pRtcReg;
1898 pVM->pdm.s.pRtc = pRtc;
1899
1900 /* set the helper pointer. */
1901 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1902 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1903 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1904 }
1905 else
1906 rc = VERR_NO_MEMORY;
1907
1908 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1909 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1910 return rc;
1911}
1912
1913
1914/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1915static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1916{
1917 PDMDEV_ASSERT_DEVINS(pDevIns);
1918 PVM pVM = pDevIns->Internal.s.pVMR3;
1919 VM_ASSERT_EMT(pVM);
1920 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1921 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1922 int rc = VINF_SUCCESS;
1923 if (pVM->pdm.s.pDmac)
1924 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1925 else
1926 {
1927 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1928 rc = VERR_PDM_NO_DMAC_INSTANCE;
1929 }
1930 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1931 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1932 return rc;
1933}
1934
1935
1936/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1937static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
1938{
1939 PDMDEV_ASSERT_DEVINS(pDevIns);
1940 PVM pVM = pDevIns->Internal.s.pVMR3;
1941 VM_ASSERT_EMT(pVM);
1942 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1943 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1944 int rc = VINF_SUCCESS;
1945 if (pVM->pdm.s.pDmac)
1946 {
1947 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1948 if (pcbRead)
1949 *pcbRead = cb;
1950 }
1951 else
1952 {
1953 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1954 rc = VERR_PDM_NO_DMAC_INSTANCE;
1955 }
1956 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1957 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1958 return rc;
1959}
1960
1961
1962/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1963static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
1964{
1965 PDMDEV_ASSERT_DEVINS(pDevIns);
1966 PVM pVM = pDevIns->Internal.s.pVMR3;
1967 VM_ASSERT_EMT(pVM);
1968 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1969 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1970 int rc = VINF_SUCCESS;
1971 if (pVM->pdm.s.pDmac)
1972 {
1973 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1974 if (pcbWritten)
1975 *pcbWritten = cb;
1976 }
1977 else
1978 {
1979 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1980 rc = VERR_PDM_NO_DMAC_INSTANCE;
1981 }
1982 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1983 pDevIns->pReg->szName, pDevIns->iInstance, rc));
1984 return rc;
1985}
1986
1987
1988/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1989static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1990{
1991 PDMDEV_ASSERT_DEVINS(pDevIns);
1992 PVM pVM = pDevIns->Internal.s.pVMR3;
1993 VM_ASSERT_EMT(pVM);
1994 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1995 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1996 int rc = VINF_SUCCESS;
1997 if (pVM->pdm.s.pDmac)
1998 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1999 else
2000 {
2001 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2002 rc = VERR_PDM_NO_DMAC_INSTANCE;
2003 }
2004 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2005 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2006 return rc;
2007}
2008
2009/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
2010static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2011{
2012 PDMDEV_ASSERT_DEVINS(pDevIns);
2013 PVM pVM = pDevIns->Internal.s.pVMR3;
2014 VM_ASSERT_EMT(pVM);
2015 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2016 pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
2017 uint8_t u8Mode;
2018 if (pVM->pdm.s.pDmac)
2019 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2020 else
2021 {
2022 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2023 u8Mode = 3 << 2 /* illegal mode type */;
2024 }
2025 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2026 pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
2027 return u8Mode;
2028}
2029
2030/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
2031static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2032{
2033 PDMDEV_ASSERT_DEVINS(pDevIns);
2034 PVM pVM = pDevIns->Internal.s.pVMR3;
2035 VM_ASSERT_EMT(pVM);
2036 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2037 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_IS_SET(pVM, VM_FF_PDM_DMA)));
2038
2039 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2040 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2041#ifdef VBOX_WITH_REM
2042 REMR3NotifyDmaPending(pVM);
2043#endif
2044 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2045}
2046
2047
2048/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
2049static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2050{
2051 PDMDEV_ASSERT_DEVINS(pDevIns);
2052 PVM pVM = pDevIns->Internal.s.pVMR3;
2053 VM_ASSERT_EMT(pVM);
2054
2055 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2056 pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
2057 int rc;
2058 if (pVM->pdm.s.pRtc)
2059 {
2060 PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2061 rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2062 if (RT_SUCCESS(rc))
2063 {
2064 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pDevInsRtc, iReg, u8Value);
2065 PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2066 }
2067 }
2068 else
2069 rc = VERR_PDM_NO_RTC_INSTANCE;
2070
2071 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2072 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2073 return rc;
2074}
2075
2076
2077/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
2078static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2079{
2080 PDMDEV_ASSERT_DEVINS(pDevIns);
2081 PVM pVM = pDevIns->Internal.s.pVMR3;
2082 VM_ASSERT_EMT(pVM);
2083
2084 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2085 pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
2086 int rc;
2087 if (pVM->pdm.s.pRtc)
2088 {
2089 PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2090 rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2091 if (RT_SUCCESS(rc))
2092 {
2093 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pDevInsRtc, iReg, pu8Value);
2094 PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2095 }
2096 }
2097 else
2098 rc = VERR_PDM_NO_RTC_INSTANCE;
2099
2100 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2101 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2102 return rc;
2103}
2104
2105
2106/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
2107static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2108{
2109 PDMDEV_ASSERT_DEVINS(pDevIns);
2110 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2111 return true;
2112
2113 char szMsg[100];
2114 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2115 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2116 AssertBreakpoint();
2117 return false;
2118}
2119
2120
2121/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
2122static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2123{
2124 PDMDEV_ASSERT_DEVINS(pDevIns);
2125 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2126 return true;
2127
2128 char szMsg[100];
2129 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2130 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2131 AssertBreakpoint();
2132 return false;
2133}
2134
2135
2136/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
2137static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2138 const char *pszSymPrefix, const char *pszSymList)
2139{
2140 PDMDEV_ASSERT_DEVINS(pDevIns);
2141 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2142 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2143 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2144
2145 int rc;
2146 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2147 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2148 {
2149 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2150 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2151 pvInterface, cbInterface,
2152 pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
2153 pszSymPrefix, pszSymList,
2154 false /*fRing0OrRC*/);
2155 else
2156 {
2157 AssertMsgFailed(("Not a raw-mode enabled driver\n"));
2158 rc = VERR_PERMISSION_DENIED;
2159 }
2160 }
2161 else
2162 {
2163 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2164 pszSymPrefix, pDevIns->pReg->szName));
2165 rc = VERR_INVALID_NAME;
2166 }
2167
2168 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2169 pDevIns->iInstance, rc));
2170 return rc;
2171}
2172
2173
2174/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
2175static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2176 const char *pszSymPrefix, const char *pszSymList)
2177{
2178 PDMDEV_ASSERT_DEVINS(pDevIns);
2179 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2180 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2181 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2182
2183 int rc;
2184 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2185 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2186 {
2187 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2188 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2189 pvInterface, cbInterface,
2190 pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
2191 pszSymPrefix, pszSymList,
2192 true /*fRing0OrRC*/);
2193 else
2194 {
2195 AssertMsgFailed(("Not a ring-0 enabled driver\n"));
2196 rc = VERR_PERMISSION_DENIED;
2197 }
2198 }
2199 else
2200 {
2201 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2202 pszSymPrefix, pDevIns->pReg->szName));
2203 rc = VERR_INVALID_NAME;
2204 }
2205
2206 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2207 pDevIns->iInstance, rc));
2208 return rc;
2209}
2210
2211
2212/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
2213static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
2214{
2215 PDMDEV_ASSERT_DEVINS(pDevIns);
2216 PVM pVM = pDevIns->Internal.s.pVMR3;
2217 VM_ASSERT_EMT(pVM);
2218 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
2219 pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
2220
2221 /*
2222 * Resolve the ring-0 entry point. There is not need to remember this like
2223 * we do for drivers since this is mainly for construction time hacks and
2224 * other things that aren't performance critical.
2225 */
2226 int rc;
2227 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2228 {
2229 char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
2230 strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
2231 szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
2232
2233 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
2234 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
2235 if (RT_SUCCESS(rc))
2236 {
2237 /*
2238 * Make the ring-0 call.
2239 */
2240 PDMDEVICECALLREQHANDLERREQ Req;
2241 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2242 Req.Hdr.cbReq = sizeof(Req);
2243 Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2244 Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2245 Req.uOperation = uOperation;
2246 Req.u32Alignment = 0;
2247 Req.u64Arg = u64Arg;
2248 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2249 }
2250 else
2251 pfnReqHandlerR0 = NIL_RTR0PTR;
2252 }
2253 else
2254 rc = VERR_ACCESS_DENIED;
2255 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2256 pDevIns->iInstance, rc));
2257 return rc;
2258}
2259
2260
2261/** @interface_method_impl{PDMDEVHLP,pfnVMGetSuspendReason} */
2262static DECLCALLBACK(VMSUSPENDREASON) pdmR3DevHlp_VMGetSuspendReason(PPDMDEVINS pDevIns)
2263{
2264 PDMDEV_ASSERT_DEVINS(pDevIns);
2265 PVM pVM = pDevIns->Internal.s.pVMR3;
2266 VM_ASSERT_EMT(pVM);
2267 VMSUSPENDREASON enmReason = VMR3GetSuspendReason(pVM->pUVM);
2268 LogFlow(("pdmR3DevHlp_VMGetSuspendReason: caller='%s'/%d: returns %d\n",
2269 pDevIns->pReg->szName, pDevIns->iInstance, enmReason));
2270 return enmReason;
2271}
2272
2273
2274/** @interface_method_impl{PDMDEVHLP,pfnVMGetResumeReason} */
2275static DECLCALLBACK(VMRESUMEREASON) pdmR3DevHlp_VMGetResumeReason(PPDMDEVINS pDevIns)
2276{
2277 PDMDEV_ASSERT_DEVINS(pDevIns);
2278 PVM pVM = pDevIns->Internal.s.pVMR3;
2279 VM_ASSERT_EMT(pVM);
2280 VMRESUMEREASON enmReason = VMR3GetResumeReason(pVM->pUVM);
2281 LogFlow(("pdmR3DevHlp_VMGetResumeReason: caller='%s'/%d: returns %d\n",
2282 pDevIns->pReg->szName, pDevIns->iInstance, enmReason));
2283 return enmReason;
2284}
2285
2286
2287/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
2288static DECLCALLBACK(PUVM) pdmR3DevHlp_GetUVM(PPDMDEVINS pDevIns)
2289{
2290 PDMDEV_ASSERT_DEVINS(pDevIns);
2291 LogFlow(("pdmR3DevHlp_GetUVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2292 return pDevIns->Internal.s.pVMR3->pUVM;
2293}
2294
2295
2296/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2297static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2298{
2299 PDMDEV_ASSERT_DEVINS(pDevIns);
2300 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2301 return pDevIns->Internal.s.pVMR3;
2302}
2303
2304
2305/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2306static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2307{
2308 PDMDEV_ASSERT_DEVINS(pDevIns);
2309 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2310 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2311 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2312}
2313
2314
2315/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2316static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2317{
2318 PDMDEV_ASSERT_DEVINS(pDevIns);
2319 PVM pVM = pDevIns->Internal.s.pVMR3;
2320 VM_ASSERT_EMT(pVM);
2321 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, "
2322 ".pfnSetIrqR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
2323 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2324 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnFakePCIBIOSR3,
2325 pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
2326
2327 /*
2328 * Validate the structure.
2329 */
2330 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2331 {
2332 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2333 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2334 return VERR_INVALID_PARAMETER;
2335 }
2336 if ( !pPciBusReg->pfnRegisterR3
2337 || !pPciBusReg->pfnIORegionRegisterR3
2338 || !pPciBusReg->pfnSetIrqR3
2339 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
2340 {
2341 Assert(pPciBusReg->pfnRegisterR3);
2342 Assert(pPciBusReg->pfnIORegionRegisterR3);
2343 Assert(pPciBusReg->pfnSetIrqR3);
2344 Assert(pPciBusReg->pfnFakePCIBIOSR3);
2345 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2346 return VERR_INVALID_PARAMETER;
2347 }
2348 if ( pPciBusReg->pszSetIrqRC
2349 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
2350 {
2351 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2352 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2353 return VERR_INVALID_PARAMETER;
2354 }
2355 if ( pPciBusReg->pszSetIrqR0
2356 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2357 {
2358 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2359 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2360 return VERR_INVALID_PARAMETER;
2361 }
2362 if (!ppPciHlpR3)
2363 {
2364 Assert(ppPciHlpR3);
2365 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2366 return VERR_INVALID_PARAMETER;
2367 }
2368
2369 /*
2370 * Find free PCI bus entry.
2371 */
2372 unsigned iBus = 0;
2373 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2374 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2375 break;
2376 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2377 {
2378 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2379 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2380 return VERR_INVALID_PARAMETER;
2381 }
2382 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2383
2384 /*
2385 * Resolve and init the RC bits.
2386 */
2387 if (pPciBusReg->pszSetIrqRC)
2388 {
2389 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2390 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2391 if (RT_FAILURE(rc))
2392 {
2393 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2394 return rc;
2395 }
2396 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2397 }
2398 else
2399 {
2400 pPciBus->pfnSetIrqRC = 0;
2401 pPciBus->pDevInsRC = 0;
2402 }
2403
2404 /*
2405 * Resolve and init the R0 bits.
2406 */
2407 if (pPciBusReg->pszSetIrqR0)
2408 {
2409 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2410 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2411 if (RT_FAILURE(rc))
2412 {
2413 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2414 return rc;
2415 }
2416 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2417 }
2418 else
2419 {
2420 pPciBus->pfnSetIrqR0 = 0;
2421 pPciBus->pDevInsR0 = 0;
2422 }
2423
2424 /*
2425 * Init the R3 bits.
2426 */
2427 pPciBus->iBus = iBus;
2428 pPciBus->pDevInsR3 = pDevIns;
2429 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2430 pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2431 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2432 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2433 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2434 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2435
2436 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2437
2438 /* set the helper pointer and return. */
2439 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2440 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2441 return VINF_SUCCESS;
2442}
2443
2444
2445/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2446static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2447{
2448 PDMDEV_ASSERT_DEVINS(pDevIns);
2449 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2450 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2451 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2452 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2453 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2454 ppPicHlpR3));
2455
2456 /*
2457 * Validate input.
2458 */
2459 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2460 {
2461 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2462 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2463 return VERR_INVALID_PARAMETER;
2464 }
2465 if ( !pPicReg->pfnSetIrqR3
2466 || !pPicReg->pfnGetInterruptR3)
2467 {
2468 Assert(pPicReg->pfnSetIrqR3);
2469 Assert(pPicReg->pfnGetInterruptR3);
2470 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2471 return VERR_INVALID_PARAMETER;
2472 }
2473 if ( ( pPicReg->pszSetIrqRC
2474 || pPicReg->pszGetInterruptRC)
2475 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
2476 || !VALID_PTR(pPicReg->pszGetInterruptRC))
2477 )
2478 {
2479 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2480 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2481 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2482 return VERR_INVALID_PARAMETER;
2483 }
2484 if ( pPicReg->pszSetIrqRC
2485 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2486 {
2487 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2488 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2489 return VERR_INVALID_PARAMETER;
2490 }
2491 if ( pPicReg->pszSetIrqR0
2492 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2493 {
2494 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2495 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2496 return VERR_INVALID_PARAMETER;
2497 }
2498 if (!ppPicHlpR3)
2499 {
2500 Assert(ppPicHlpR3);
2501 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2502 return VERR_INVALID_PARAMETER;
2503 }
2504
2505 /*
2506 * Only one PIC device.
2507 */
2508 PVM pVM = pDevIns->Internal.s.pVMR3;
2509 if (pVM->pdm.s.Pic.pDevInsR3)
2510 {
2511 AssertMsgFailed(("Only one pic device is supported!\n"));
2512 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2513 return VERR_INVALID_PARAMETER;
2514 }
2515
2516 /*
2517 * RC stuff.
2518 */
2519 if (pPicReg->pszSetIrqRC)
2520 {
2521 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2522 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2523 if (RT_SUCCESS(rc))
2524 {
2525 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2526 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2527 }
2528 if (RT_FAILURE(rc))
2529 {
2530 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2531 return rc;
2532 }
2533 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2534 }
2535 else
2536 {
2537 pVM->pdm.s.Pic.pDevInsRC = 0;
2538 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2539 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2540 }
2541
2542 /*
2543 * R0 stuff.
2544 */
2545 if (pPicReg->pszSetIrqR0)
2546 {
2547 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2548 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2549 if (RT_SUCCESS(rc))
2550 {
2551 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2552 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2553 }
2554 if (RT_FAILURE(rc))
2555 {
2556 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2557 return rc;
2558 }
2559 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2560 Assert(pVM->pdm.s.Pic.pDevInsR0);
2561 }
2562 else
2563 {
2564 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2565 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2566 pVM->pdm.s.Pic.pDevInsR0 = 0;
2567 }
2568
2569 /*
2570 * R3 stuff.
2571 */
2572 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2573 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2574 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2575 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2576
2577 /* set the helper pointer and return. */
2578 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2579 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2580 return VINF_SUCCESS;
2581}
2582
2583
2584/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2585static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2586{
2587 PDMDEV_ASSERT_DEVINS(pDevIns);
2588 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2589 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2590 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2591 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2592 pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2593 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2594 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2595 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2596 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2597
2598 /*
2599 * Validate input.
2600 */
2601 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2602 {
2603 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2604 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2605 return VERR_INVALID_PARAMETER;
2606 }
2607 if ( !pApicReg->pfnGetInterruptR3
2608 || !pApicReg->pfnHasPendingIrqR3
2609 || !pApicReg->pfnSetBaseR3
2610 || !pApicReg->pfnGetBaseR3
2611 || !pApicReg->pfnSetTPRR3
2612 || !pApicReg->pfnGetTPRR3
2613 || !pApicReg->pfnWriteMSRR3
2614 || !pApicReg->pfnReadMSRR3
2615 || !pApicReg->pfnBusDeliverR3
2616 || !pApicReg->pfnLocalInterruptR3)
2617 {
2618 Assert(pApicReg->pfnGetInterruptR3);
2619 Assert(pApicReg->pfnHasPendingIrqR3);
2620 Assert(pApicReg->pfnSetBaseR3);
2621 Assert(pApicReg->pfnGetBaseR3);
2622 Assert(pApicReg->pfnSetTPRR3);
2623 Assert(pApicReg->pfnGetTPRR3);
2624 Assert(pApicReg->pfnWriteMSRR3);
2625 Assert(pApicReg->pfnReadMSRR3);
2626 Assert(pApicReg->pfnBusDeliverR3);
2627 Assert(pApicReg->pfnLocalInterruptR3);
2628 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2629 return VERR_INVALID_PARAMETER;
2630 }
2631 if ( ( pApicReg->pszGetInterruptRC
2632 || pApicReg->pszHasPendingIrqRC
2633 || pApicReg->pszSetBaseRC
2634 || pApicReg->pszGetBaseRC
2635 || pApicReg->pszSetTPRRC
2636 || pApicReg->pszGetTPRRC
2637 || pApicReg->pszWriteMSRRC
2638 || pApicReg->pszReadMSRRC
2639 || pApicReg->pszBusDeliverRC
2640 || pApicReg->pszLocalInterruptRC)
2641 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2642 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2643 || !VALID_PTR(pApicReg->pszSetBaseRC)
2644 || !VALID_PTR(pApicReg->pszGetBaseRC)
2645 || !VALID_PTR(pApicReg->pszSetTPRRC)
2646 || !VALID_PTR(pApicReg->pszGetTPRRC)
2647 || !VALID_PTR(pApicReg->pszWriteMSRRC)
2648 || !VALID_PTR(pApicReg->pszReadMSRRC)
2649 || !VALID_PTR(pApicReg->pszBusDeliverRC)
2650 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
2651 )
2652 {
2653 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2654 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2655 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2656 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2657 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2658 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2659 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2660 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2661 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2662 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2663 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2664 return VERR_INVALID_PARAMETER;
2665 }
2666 if ( ( pApicReg->pszGetInterruptR0
2667 || pApicReg->pszHasPendingIrqR0
2668 || pApicReg->pszSetBaseR0
2669 || pApicReg->pszGetBaseR0
2670 || pApicReg->pszSetTPRR0
2671 || pApicReg->pszGetTPRR0
2672 || pApicReg->pszWriteMSRR0
2673 || pApicReg->pszReadMSRR0
2674 || pApicReg->pszBusDeliverR0
2675 || pApicReg->pszLocalInterruptR0)
2676 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2677 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2678 || !VALID_PTR(pApicReg->pszSetBaseR0)
2679 || !VALID_PTR(pApicReg->pszGetBaseR0)
2680 || !VALID_PTR(pApicReg->pszSetTPRR0)
2681 || !VALID_PTR(pApicReg->pszGetTPRR0)
2682 || !VALID_PTR(pApicReg->pszReadMSRR0)
2683 || !VALID_PTR(pApicReg->pszWriteMSRR0)
2684 || !VALID_PTR(pApicReg->pszBusDeliverR0)
2685 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
2686 )
2687 {
2688 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2689 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2690 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2691 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2692 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2693 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2694 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2695 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2696 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2697 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2698 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2699 return VERR_INVALID_PARAMETER;
2700 }
2701 if (!ppApicHlpR3)
2702 {
2703 Assert(ppApicHlpR3);
2704 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2705 return VERR_INVALID_PARAMETER;
2706 }
2707
2708 /*
2709 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
2710 * as they need to communicate and share state easily.
2711 */
2712 PVM pVM = pDevIns->Internal.s.pVMR3;
2713 if (pVM->pdm.s.Apic.pDevInsR3)
2714 {
2715 AssertMsgFailed(("Only one apic device is supported!\n"));
2716 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2717 return VERR_INVALID_PARAMETER;
2718 }
2719
2720 /*
2721 * Resolve & initialize the RC bits.
2722 */
2723 if (pApicReg->pszGetInterruptRC)
2724 {
2725 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2726 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2727 if (RT_SUCCESS(rc))
2728 {
2729 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2730 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2731 }
2732 if (RT_SUCCESS(rc))
2733 {
2734 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2735 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2736 }
2737 if (RT_SUCCESS(rc))
2738 {
2739 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2740 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2741 }
2742 if (RT_SUCCESS(rc))
2743 {
2744 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2745 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2746 }
2747 if (RT_SUCCESS(rc))
2748 {
2749 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2750 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2751 }
2752 if (RT_SUCCESS(rc))
2753 {
2754 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2755 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2756 }
2757 if (RT_SUCCESS(rc))
2758 {
2759 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2760 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2761 }
2762 if (RT_SUCCESS(rc))
2763 {
2764 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2765 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2766 }
2767 if (RT_SUCCESS(rc))
2768 {
2769 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2770 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2771 }
2772 if (RT_FAILURE(rc))
2773 {
2774 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2775 return rc;
2776 }
2777 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2778 }
2779 else
2780 {
2781 pVM->pdm.s.Apic.pDevInsRC = 0;
2782 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2783 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2784 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2785 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2786 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2787 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2788 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2789 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2790 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2791 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2792 }
2793
2794 /*
2795 * Resolve & initialize the R0 bits.
2796 */
2797 if (pApicReg->pszGetInterruptR0)
2798 {
2799 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2800 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2801 if (RT_SUCCESS(rc))
2802 {
2803 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2804 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2805 }
2806 if (RT_SUCCESS(rc))
2807 {
2808 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2809 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2810 }
2811 if (RT_SUCCESS(rc))
2812 {
2813 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2814 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2815 }
2816 if (RT_SUCCESS(rc))
2817 {
2818 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2819 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2820 }
2821 if (RT_SUCCESS(rc))
2822 {
2823 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2824 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2825 }
2826 if (RT_SUCCESS(rc))
2827 {
2828 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2829 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2830 }
2831 if (RT_SUCCESS(rc))
2832 {
2833 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2834 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2835 }
2836 if (RT_SUCCESS(rc))
2837 {
2838 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2839 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2840 }
2841 if (RT_SUCCESS(rc))
2842 {
2843 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2844 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2845 }
2846 if (RT_FAILURE(rc))
2847 {
2848 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2849 return rc;
2850 }
2851 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2852 Assert(pVM->pdm.s.Apic.pDevInsR0);
2853 }
2854 else
2855 {
2856 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2857 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2858 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2859 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2860 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2861 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2862 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2863 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2864 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2865 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2866 pVM->pdm.s.Apic.pDevInsR0 = 0;
2867 }
2868
2869 /*
2870 * Initialize the HC bits.
2871 */
2872 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2873 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2874 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2875 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2876 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2877 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2878 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2879 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2880 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2881 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2882 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2883 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2884
2885 /* set the helper pointer and return. */
2886 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2887 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2888 return VINF_SUCCESS;
2889}
2890
2891
2892/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2893static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2894{
2895 PDMDEV_ASSERT_DEVINS(pDevIns);
2896 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2897 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2898 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2899 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2900
2901 /*
2902 * Validate input.
2903 */
2904 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2905 {
2906 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2907 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2908 return VERR_INVALID_PARAMETER;
2909 }
2910 if (!pIoApicReg->pfnSetIrqR3 || !pIoApicReg->pfnSendMsiR3)
2911 {
2912 Assert(pIoApicReg->pfnSetIrqR3);
2913 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2914 return VERR_INVALID_PARAMETER;
2915 }
2916 if ( pIoApicReg->pszSetIrqRC
2917 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
2918 {
2919 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2920 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2921 return VERR_INVALID_PARAMETER;
2922 }
2923 if ( pIoApicReg->pszSendMsiRC
2924 && !VALID_PTR(pIoApicReg->pszSendMsiRC))
2925 {
2926 Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
2927 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2928 return VERR_INVALID_PARAMETER;
2929 }
2930 if ( pIoApicReg->pszSetIrqR0
2931 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2932 {
2933 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2934 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2935 return VERR_INVALID_PARAMETER;
2936 }
2937 if ( pIoApicReg->pszSendMsiR0
2938 && !VALID_PTR(pIoApicReg->pszSendMsiR0))
2939 {
2940 Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
2941 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2942 return VERR_INVALID_PARAMETER;
2943 }
2944 if (!ppIoApicHlpR3)
2945 {
2946 Assert(ppIoApicHlpR3);
2947 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2948 return VERR_INVALID_PARAMETER;
2949 }
2950
2951 /*
2952 * The I/O APIC requires the APIC to be present (hacks++).
2953 * If the I/O APIC does GC stuff so must the APIC.
2954 */
2955 PVM pVM = pDevIns->Internal.s.pVMR3;
2956 if (!pVM->pdm.s.Apic.pDevInsR3)
2957 {
2958 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2959 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2960 return VERR_INVALID_PARAMETER;
2961 }
2962 if ( pIoApicReg->pszSetIrqRC
2963 && !pVM->pdm.s.Apic.pDevInsRC)
2964 {
2965 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2966 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2967 return VERR_INVALID_PARAMETER;
2968 }
2969
2970 /*
2971 * Only one I/O APIC device.
2972 */
2973 if (pVM->pdm.s.IoApic.pDevInsR3)
2974 {
2975 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2976 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2977 return VERR_INVALID_PARAMETER;
2978 }
2979
2980 /*
2981 * Resolve & initialize the GC bits.
2982 */
2983 if (pIoApicReg->pszSetIrqRC)
2984 {
2985 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2986 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2987 if (RT_FAILURE(rc))
2988 {
2989 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2990 return rc;
2991 }
2992 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2993 }
2994 else
2995 {
2996 pVM->pdm.s.IoApic.pDevInsRC = 0;
2997 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2998 }
2999
3000 if (pIoApicReg->pszSendMsiRC)
3001 {
3002 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
3003 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
3004 if (RT_FAILURE(rc))
3005 {
3006 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3007 return rc;
3008 }
3009 }
3010 else
3011 {
3012 pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
3013 }
3014
3015 /*
3016 * Resolve & initialize the R0 bits.
3017 */
3018 if (pIoApicReg->pszSetIrqR0)
3019 {
3020 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
3021 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
3022 if (RT_FAILURE(rc))
3023 {
3024 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3025 return rc;
3026 }
3027 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3028 Assert(pVM->pdm.s.IoApic.pDevInsR0);
3029 }
3030 else
3031 {
3032 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
3033 pVM->pdm.s.IoApic.pDevInsR0 = 0;
3034 }
3035
3036 if (pIoApicReg->pszSendMsiR0)
3037 {
3038 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
3039 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
3040 if (RT_FAILURE(rc))
3041 {
3042 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3043 return rc;
3044 }
3045 }
3046 else
3047 {
3048 pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
3049 }
3050
3051
3052 /*
3053 * Initialize the R3 bits.
3054 */
3055 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3056 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
3057 pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
3058 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3059
3060 /* set the helper pointer and return. */
3061 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3062 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3063 return VINF_SUCCESS;
3064}
3065
3066
3067/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
3068static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
3069{
3070 PDMDEV_ASSERT_DEVINS(pDevIns);
3071 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3072 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
3073
3074 /*
3075 * Validate input.
3076 */
3077 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
3078 {
3079 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
3080 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3081 return VERR_INVALID_PARAMETER;
3082 }
3083
3084 if (!ppHpetHlpR3)
3085 {
3086 Assert(ppHpetHlpR3);
3087 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3088 return VERR_INVALID_PARAMETER;
3089 }
3090
3091 /* set the helper pointer and return. */
3092 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
3093 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3094 return VINF_SUCCESS;
3095}
3096
3097
3098/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
3099static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
3100{
3101 PDMDEV_ASSERT_DEVINS(pDevIns);
3102 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3103 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n"));
3104
3105 /*
3106 * Validate input.
3107 */
3108 if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
3109 {
3110 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
3111 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3112 return VERR_INVALID_PARAMETER;
3113 }
3114
3115 if (!ppPciRawHlpR3)
3116 {
3117 Assert(ppPciRawHlpR3);
3118 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3119 return VERR_INVALID_PARAMETER;
3120 }
3121
3122 /* set the helper pointer and return. */
3123 *ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
3124 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3125 return VINF_SUCCESS;
3126}
3127
3128
3129/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
3130static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3131{
3132 PDMDEV_ASSERT_DEVINS(pDevIns);
3133 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3134 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3135 pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3136 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3137
3138 /*
3139 * Validate input.
3140 */
3141 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3142 {
3143 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3144 PDM_DMACREG_VERSION));
3145 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
3146 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3147 return VERR_INVALID_PARAMETER;
3148 }
3149 if ( !pDmacReg->pfnRun
3150 || !pDmacReg->pfnRegister
3151 || !pDmacReg->pfnReadMemory
3152 || !pDmacReg->pfnWriteMemory
3153 || !pDmacReg->pfnSetDREQ
3154 || !pDmacReg->pfnGetChannelMode)
3155 {
3156 Assert(pDmacReg->pfnRun);
3157 Assert(pDmacReg->pfnRegister);
3158 Assert(pDmacReg->pfnReadMemory);
3159 Assert(pDmacReg->pfnWriteMemory);
3160 Assert(pDmacReg->pfnSetDREQ);
3161 Assert(pDmacReg->pfnGetChannelMode);
3162 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
3163 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3164 return VERR_INVALID_PARAMETER;
3165 }
3166
3167 if (!ppDmacHlp)
3168 {
3169 Assert(ppDmacHlp);
3170 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
3171 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3172 return VERR_INVALID_PARAMETER;
3173 }
3174
3175 /*
3176 * Only one DMA device.
3177 */
3178 PVM pVM = pDevIns->Internal.s.pVMR3;
3179 if (pVM->pdm.s.pDmac)
3180 {
3181 AssertMsgFailed(("Only one DMA device is supported!\n"));
3182 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3183 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3184 return VERR_INVALID_PARAMETER;
3185 }
3186
3187 /*
3188 * Allocate and initialize pci bus structure.
3189 */
3190 int rc = VINF_SUCCESS;
3191 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3192 if (pDmac)
3193 {
3194 pDmac->pDevIns = pDevIns;
3195 pDmac->Reg = *pDmacReg;
3196 pVM->pdm.s.pDmac = pDmac;
3197
3198 /* set the helper pointer. */
3199 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3200 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3201 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3202 }
3203 else
3204 rc = VERR_NO_MEMORY;
3205
3206 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3207 pDevIns->pReg->szName, pDevIns->iInstance, rc));
3208 return rc;
3209}
3210
3211
3212/**
3213 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3214 */
3215static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3216{
3217 PDMDEV_ASSERT_DEVINS(pDevIns);
3218 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3219
3220 int rc = PDMR3VmmDevHeapRegister(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
3221 return rc;
3222}
3223
3224
3225/**
3226 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3227 */
3228static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3229{
3230 PDMDEV_ASSERT_DEVINS(pDevIns);
3231 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3232
3233 int rc = PDMR3VmmDevHeapUnregister(pDevIns->Internal.s.pVMR3, GCPhys);
3234 return rc;
3235}
3236
3237
3238/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3239static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3240{
3241 PDMDEV_ASSERT_DEVINS(pDevIns);
3242 PVM pVM = pDevIns->Internal.s.pVMR3;
3243 VM_ASSERT_EMT(pVM);
3244 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3245 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_IS_SET(pVM, VM_FF_RESET)));
3246
3247 /*
3248 * We postpone this operation because we're likely to be inside a I/O instruction
3249 * and the EIP will be updated when we return.
3250 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3251 */
3252 bool fHaltOnReset;
3253 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3254 if (RT_SUCCESS(rc) && fHaltOnReset)
3255 {
3256 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3257 rc = VINF_EM_HALT;
3258 }
3259 else
3260 {
3261 VM_FF_SET(pVM, VM_FF_RESET);
3262 rc = VINF_EM_RESET;
3263 }
3264
3265 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3266 return rc;
3267}
3268
3269
3270/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3271static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3272{
3273 int rc;
3274 PDMDEV_ASSERT_DEVINS(pDevIns);
3275 PVM pVM = pDevIns->Internal.s.pVMR3;
3276 VM_ASSERT_EMT(pVM);
3277 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3278 pDevIns->pReg->szName, pDevIns->iInstance));
3279
3280 /** @todo Always take the SMP path - fewer code paths. */
3281 if (pVM->cCpus > 1)
3282 {
3283 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3284 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 2, pVM->pUVM, VMSUSPENDREASON_VM);
3285 AssertRC(rc);
3286 rc = VINF_EM_SUSPEND;
3287 }
3288 else
3289 rc = VMR3Suspend(pVM->pUVM, VMSUSPENDREASON_VM);
3290
3291 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3292 return rc;
3293}
3294
3295
3296/**
3297 * Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3298 * EMT request to avoid deadlocks.
3299 *
3300 * @returns VBox status code fit for scheduling.
3301 * @param pVM Pointer to the VM.
3302 * @param pDevIns The device that triggered this action.
3303 */
3304static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3305{
3306 /*
3307 * Suspend the VM first then do the saving.
3308 */
3309 int rc = VMR3Suspend(pVM->pUVM, VMSUSPENDREASON_VM);
3310 if (RT_SUCCESS(rc))
3311 {
3312 PUVM pUVM = pVM->pUVM;
3313 rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3314
3315 /*
3316 * On success, power off the VM, on failure we'll leave it suspended.
3317 */
3318 if (RT_SUCCESS(rc))
3319 {
3320 rc = VMR3PowerOff(pVM->pUVM);
3321 if (RT_FAILURE(rc))
3322 LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3323 }
3324 else
3325 LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3326 }
3327 else
3328 LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3329 return rc;
3330}
3331
3332
3333/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3334static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3335{
3336 PDMDEV_ASSERT_DEVINS(pDevIns);
3337 PVM pVM = pDevIns->Internal.s.pVMR3;
3338 VM_ASSERT_EMT(pVM);
3339 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3340 pDevIns->pReg->szName, pDevIns->iInstance));
3341
3342 int rc;
3343 if ( pVM->pUVM->pVmm2UserMethods
3344 && pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3345 {
3346 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3347 if (RT_SUCCESS(rc))
3348 {
3349 LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3350 rc = VINF_EM_SUSPEND;
3351 }
3352 }
3353 else
3354 rc = VERR_NOT_SUPPORTED;
3355
3356 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3357 return rc;
3358}
3359
3360
3361/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3362static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3363{
3364 int rc;
3365 PDMDEV_ASSERT_DEVINS(pDevIns);
3366 PVM pVM = pDevIns->Internal.s.pVMR3;
3367 VM_ASSERT_EMT(pVM);
3368 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3369 pDevIns->pReg->szName, pDevIns->iInstance));
3370
3371 /** @todo Always take the SMP path - fewer code paths. */
3372 if (pVM->cCpus > 1)
3373 {
3374 /* We might be holding locks here and could cause a deadlock since
3375 VMR3PowerOff rendezvous with the other CPUs. */
3376 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM->pUVM);
3377 AssertRC(rc);
3378 /* Set the VCPU state to stopped here as well to make sure no
3379 inconsistency with the EM state occurs. */
3380 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3381 rc = VINF_EM_OFF;
3382 }
3383 else
3384 rc = VMR3PowerOff(pVM->pUVM);
3385
3386 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3387 return rc;
3388}
3389
3390
3391/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3392static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3393{
3394 PDMDEV_ASSERT_DEVINS(pDevIns);
3395 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3396
3397 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3398
3399 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3400 return fRc;
3401}
3402
3403
3404/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3405static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3406{
3407 PDMDEV_ASSERT_DEVINS(pDevIns);
3408 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3409 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3410 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3411}
3412
3413
3414/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3415static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3416 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3417{
3418 PDMDEV_ASSERT_DEVINS(pDevIns);
3419 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3420
3421 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3422 pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3423 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3424
3425 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
3426
3427 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3428 pDevIns->pReg->szName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3429}
3430
3431
3432/**
3433 * The device helper structure for trusted devices.
3434 */
3435const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3436{
3437 PDM_DEVHLPR3_VERSION,
3438 pdmR3DevHlp_IOPortRegister,
3439 pdmR3DevHlp_IOPortRegisterRC,
3440 pdmR3DevHlp_IOPortRegisterR0,
3441 pdmR3DevHlp_IOPortDeregister,
3442 pdmR3DevHlp_MMIORegister,
3443 pdmR3DevHlp_MMIORegisterRC,
3444 pdmR3DevHlp_MMIORegisterR0,
3445 pdmR3DevHlp_MMIODeregister,
3446 pdmR3DevHlp_MMIO2Register,
3447 pdmR3DevHlp_MMIO2Deregister,
3448 pdmR3DevHlp_MMIO2Map,
3449 pdmR3DevHlp_MMIO2Unmap,
3450 pdmR3DevHlp_MMHyperMapMMIO2,
3451 pdmR3DevHlp_MMIO2MapKernel,
3452 pdmR3DevHlp_ROMRegister,
3453 pdmR3DevHlp_ROMProtectShadow,
3454 pdmR3DevHlp_SSMRegister,
3455 pdmR3DevHlp_TMTimerCreate,
3456 pdmR3DevHlp_TMUtcNow,
3457 pdmR3DevHlp_PhysRead,
3458 pdmR3DevHlp_PhysWrite,
3459 pdmR3DevHlp_PhysGCPhys2CCPtr,
3460 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3461 pdmR3DevHlp_PhysReleasePageMappingLock,
3462 pdmR3DevHlp_PhysReadGCVirt,
3463 pdmR3DevHlp_PhysWriteGCVirt,
3464 pdmR3DevHlp_PhysGCPtr2GCPhys,
3465 pdmR3DevHlp_MMHeapAlloc,
3466 pdmR3DevHlp_MMHeapAllocZ,
3467 pdmR3DevHlp_MMHeapFree,
3468 pdmR3DevHlp_VMState,
3469 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3470 pdmR3DevHlp_VMSetError,
3471 pdmR3DevHlp_VMSetErrorV,
3472 pdmR3DevHlp_VMSetRuntimeError,
3473 pdmR3DevHlp_VMSetRuntimeErrorV,
3474 pdmR3DevHlp_DBGFStopV,
3475 pdmR3DevHlp_DBGFInfoRegister,
3476 pdmR3DevHlp_DBGFRegRegister,
3477 pdmR3DevHlp_DBGFTraceBuf,
3478 pdmR3DevHlp_STAMRegister,
3479 pdmR3DevHlp_STAMRegisterF,
3480 pdmR3DevHlp_STAMRegisterV,
3481 pdmR3DevHlp_PCIRegister,
3482 pdmR3DevHlp_PCIRegisterMsi,
3483 pdmR3DevHlp_PCIIORegionRegister,
3484 pdmR3DevHlp_PCISetConfigCallbacks,
3485 pdmR3DevHlp_PCIPhysRead,
3486 pdmR3DevHlp_PCIPhysWrite,
3487 pdmR3DevHlp_PCISetIrq,
3488 pdmR3DevHlp_PCISetIrqNoWait,
3489 pdmR3DevHlp_ISASetIrq,
3490 pdmR3DevHlp_ISASetIrqNoWait,
3491 pdmR3DevHlp_DriverAttach,
3492 pdmR3DevHlp_QueueCreate,
3493 pdmR3DevHlp_CritSectInit,
3494 pdmR3DevHlp_CritSectGetNop,
3495 pdmR3DevHlp_CritSectGetNopR0,
3496 pdmR3DevHlp_CritSectGetNopRC,
3497 pdmR3DevHlp_SetDeviceCritSect,
3498 pdmR3DevHlp_ThreadCreate,
3499 pdmR3DevHlp_SetAsyncNotification,
3500 pdmR3DevHlp_AsyncNotificationCompleted,
3501 pdmR3DevHlp_RTCRegister,
3502 pdmR3DevHlp_PCIBusRegister,
3503 pdmR3DevHlp_PICRegister,
3504 pdmR3DevHlp_APICRegister,
3505 pdmR3DevHlp_IOAPICRegister,
3506 pdmR3DevHlp_HPETRegister,
3507 pdmR3DevHlp_PciRawRegister,
3508 pdmR3DevHlp_DMACRegister,
3509 pdmR3DevHlp_DMARegister,
3510 pdmR3DevHlp_DMAReadMemory,
3511 pdmR3DevHlp_DMAWriteMemory,
3512 pdmR3DevHlp_DMASetDREQ,
3513 pdmR3DevHlp_DMAGetChannelMode,
3514 pdmR3DevHlp_DMASchedule,
3515 pdmR3DevHlp_CMOSWrite,
3516 pdmR3DevHlp_CMOSRead,
3517 pdmR3DevHlp_AssertEMT,
3518 pdmR3DevHlp_AssertOther,
3519 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3520 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3521 pdmR3DevHlp_CallR0,
3522 pdmR3DevHlp_VMGetSuspendReason,
3523 pdmR3DevHlp_VMGetResumeReason,
3524 0,
3525 0,
3526 0,
3527 0,
3528 0,
3529 0,
3530 0,
3531 pdmR3DevHlp_GetUVM,
3532 pdmR3DevHlp_GetVM,
3533 pdmR3DevHlp_GetVMCPU,
3534 pdmR3DevHlp_RegisterVMMDevHeap,
3535 pdmR3DevHlp_UnregisterVMMDevHeap,
3536 pdmR3DevHlp_VMReset,
3537 pdmR3DevHlp_VMSuspend,
3538 pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3539 pdmR3DevHlp_VMPowerOff,
3540 pdmR3DevHlp_A20IsEnabled,
3541 pdmR3DevHlp_A20Set,
3542 pdmR3DevHlp_GetCpuId,
3543 pdmR3DevHlp_TMTimeVirtGet,
3544 pdmR3DevHlp_TMTimeVirtGetFreq,
3545 pdmR3DevHlp_TMTimeVirtGetNano,
3546 pdmR3DevHlp_GetSupDrvSession,
3547 PDM_DEVHLPR3_VERSION /* the end */
3548};
3549
3550
3551
3552
3553/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
3554static DECLCALLBACK(PUVM) pdmR3DevHlp_Untrusted_GetUVM(PPDMDEVINS pDevIns)
3555{
3556 PDMDEV_ASSERT_DEVINS(pDevIns);
3557 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3558 return NULL;
3559}
3560
3561
3562/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3563static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3564{
3565 PDMDEV_ASSERT_DEVINS(pDevIns);
3566 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3567 return NULL;
3568}
3569
3570
3571/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3572static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3573{
3574 PDMDEV_ASSERT_DEVINS(pDevIns);
3575 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3576 return NULL;
3577}
3578
3579
3580/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3581static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3582{
3583 PDMDEV_ASSERT_DEVINS(pDevIns);
3584 NOREF(GCPhys); NOREF(pvHeap); NOREF(cbSize);
3585 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3586 return VERR_ACCESS_DENIED;
3587}
3588
3589
3590/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3591static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3592{
3593 PDMDEV_ASSERT_DEVINS(pDevIns);
3594 NOREF(GCPhys);
3595 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3596 return VERR_ACCESS_DENIED;
3597}
3598
3599
3600/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3601static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3602{
3603 PDMDEV_ASSERT_DEVINS(pDevIns);
3604 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3605 return VERR_ACCESS_DENIED;
3606}
3607
3608
3609/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3610static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3611{
3612 PDMDEV_ASSERT_DEVINS(pDevIns);
3613 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3614 return VERR_ACCESS_DENIED;
3615}
3616
3617
3618/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3619static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3620{
3621 PDMDEV_ASSERT_DEVINS(pDevIns);
3622 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3623 return VERR_ACCESS_DENIED;
3624}
3625
3626
3627/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3628static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3629{
3630 PDMDEV_ASSERT_DEVINS(pDevIns);
3631 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3632 return VERR_ACCESS_DENIED;
3633}
3634
3635
3636/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3637static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3638{
3639 PDMDEV_ASSERT_DEVINS(pDevIns);
3640 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3641 return false;
3642}
3643
3644
3645/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3646static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3647{
3648 PDMDEV_ASSERT_DEVINS(pDevIns);
3649 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3650 NOREF(fEnable);
3651}
3652
3653
3654/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3655static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3656 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3657{
3658 PDMDEV_ASSERT_DEVINS(pDevIns);
3659 NOREF(iLeaf); NOREF(pEax); NOREF(pEbx); NOREF(pEcx); NOREF(pEdx);
3660 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3661}
3662
3663
3664/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
3665static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_Untrusted_GetSupDrvSession(PPDMDEVINS pDevIns)
3666{
3667 PDMDEV_ASSERT_DEVINS(pDevIns);
3668 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3669 return (PSUPDRVSESSION)0;
3670}
3671
3672
3673/**
3674 * The device helper structure for non-trusted devices.
3675 */
3676const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3677{
3678 PDM_DEVHLPR3_VERSION,
3679 pdmR3DevHlp_IOPortRegister,
3680 pdmR3DevHlp_IOPortRegisterRC,
3681 pdmR3DevHlp_IOPortRegisterR0,
3682 pdmR3DevHlp_IOPortDeregister,
3683 pdmR3DevHlp_MMIORegister,
3684 pdmR3DevHlp_MMIORegisterRC,
3685 pdmR3DevHlp_MMIORegisterR0,
3686 pdmR3DevHlp_MMIODeregister,
3687 pdmR3DevHlp_MMIO2Register,
3688 pdmR3DevHlp_MMIO2Deregister,
3689 pdmR3DevHlp_MMIO2Map,
3690 pdmR3DevHlp_MMIO2Unmap,
3691 pdmR3DevHlp_MMHyperMapMMIO2,
3692 pdmR3DevHlp_MMIO2MapKernel,
3693 pdmR3DevHlp_ROMRegister,
3694 pdmR3DevHlp_ROMProtectShadow,
3695 pdmR3DevHlp_SSMRegister,
3696 pdmR3DevHlp_TMTimerCreate,
3697 pdmR3DevHlp_TMUtcNow,
3698 pdmR3DevHlp_PhysRead,
3699 pdmR3DevHlp_PhysWrite,
3700 pdmR3DevHlp_PhysGCPhys2CCPtr,
3701 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3702 pdmR3DevHlp_PhysReleasePageMappingLock,
3703 pdmR3DevHlp_PhysReadGCVirt,
3704 pdmR3DevHlp_PhysWriteGCVirt,
3705 pdmR3DevHlp_PhysGCPtr2GCPhys,
3706 pdmR3DevHlp_MMHeapAlloc,
3707 pdmR3DevHlp_MMHeapAllocZ,
3708 pdmR3DevHlp_MMHeapFree,
3709 pdmR3DevHlp_VMState,
3710 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3711 pdmR3DevHlp_VMSetError,
3712 pdmR3DevHlp_VMSetErrorV,
3713 pdmR3DevHlp_VMSetRuntimeError,
3714 pdmR3DevHlp_VMSetRuntimeErrorV,
3715 pdmR3DevHlp_DBGFStopV,
3716 pdmR3DevHlp_DBGFInfoRegister,
3717 pdmR3DevHlp_DBGFRegRegister,
3718 pdmR3DevHlp_DBGFTraceBuf,
3719 pdmR3DevHlp_STAMRegister,
3720 pdmR3DevHlp_STAMRegisterF,
3721 pdmR3DevHlp_STAMRegisterV,
3722 pdmR3DevHlp_PCIRegister,
3723 pdmR3DevHlp_PCIRegisterMsi,
3724 pdmR3DevHlp_PCIIORegionRegister,
3725 pdmR3DevHlp_PCISetConfigCallbacks,
3726 pdmR3DevHlp_PCIPhysRead,
3727 pdmR3DevHlp_PCIPhysWrite,
3728 pdmR3DevHlp_PCISetIrq,
3729 pdmR3DevHlp_PCISetIrqNoWait,
3730 pdmR3DevHlp_ISASetIrq,
3731 pdmR3DevHlp_ISASetIrqNoWait,
3732 pdmR3DevHlp_DriverAttach,
3733 pdmR3DevHlp_QueueCreate,
3734 pdmR3DevHlp_CritSectInit,
3735 pdmR3DevHlp_CritSectGetNop,
3736 pdmR3DevHlp_CritSectGetNopR0,
3737 pdmR3DevHlp_CritSectGetNopRC,
3738 pdmR3DevHlp_SetDeviceCritSect,
3739 pdmR3DevHlp_ThreadCreate,
3740 pdmR3DevHlp_SetAsyncNotification,
3741 pdmR3DevHlp_AsyncNotificationCompleted,
3742 pdmR3DevHlp_RTCRegister,
3743 pdmR3DevHlp_PCIBusRegister,
3744 pdmR3DevHlp_PICRegister,
3745 pdmR3DevHlp_APICRegister,
3746 pdmR3DevHlp_IOAPICRegister,
3747 pdmR3DevHlp_HPETRegister,
3748 pdmR3DevHlp_PciRawRegister,
3749 pdmR3DevHlp_DMACRegister,
3750 pdmR3DevHlp_DMARegister,
3751 pdmR3DevHlp_DMAReadMemory,
3752 pdmR3DevHlp_DMAWriteMemory,
3753 pdmR3DevHlp_DMASetDREQ,
3754 pdmR3DevHlp_DMAGetChannelMode,
3755 pdmR3DevHlp_DMASchedule,
3756 pdmR3DevHlp_CMOSWrite,
3757 pdmR3DevHlp_CMOSRead,
3758 pdmR3DevHlp_AssertEMT,
3759 pdmR3DevHlp_AssertOther,
3760 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3761 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3762 pdmR3DevHlp_CallR0,
3763 pdmR3DevHlp_VMGetSuspendReason,
3764 pdmR3DevHlp_VMGetResumeReason,
3765 0,
3766 0,
3767 0,
3768 0,
3769 0,
3770 0,
3771 0,
3772 pdmR3DevHlp_Untrusted_GetUVM,
3773 pdmR3DevHlp_Untrusted_GetVM,
3774 pdmR3DevHlp_Untrusted_GetVMCPU,
3775 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3776 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3777 pdmR3DevHlp_Untrusted_VMReset,
3778 pdmR3DevHlp_Untrusted_VMSuspend,
3779 pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3780 pdmR3DevHlp_Untrusted_VMPowerOff,
3781 pdmR3DevHlp_Untrusted_A20IsEnabled,
3782 pdmR3DevHlp_Untrusted_A20Set,
3783 pdmR3DevHlp_Untrusted_GetCpuId,
3784 pdmR3DevHlp_TMTimeVirtGet,
3785 pdmR3DevHlp_TMTimeVirtGetFreq,
3786 pdmR3DevHlp_TMTimeVirtGetNano,
3787 pdmR3DevHlp_Untrusted_GetSupDrvSession,
3788 PDM_DEVHLPR3_VERSION /* the end */
3789};
3790
3791
3792
3793/**
3794 * Queue consumer callback for internal component.
3795 *
3796 * @returns Success indicator.
3797 * If false the item will not be removed and the flushing will stop.
3798 * @param pVM Pointer to the VM.
3799 * @param pItem The item to consume. Upon return this item will be freed.
3800 */
3801DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3802{
3803 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3804 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3805 switch (pTask->enmOp)
3806 {
3807 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3808 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel, pTask->u.SetIRQ.uTagSrc);
3809 break;
3810
3811 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3812 {
3813 /* Same as pdmR3DevHlp_PCISetIrq, except we've got a tag already. */
3814 PPDMDEVINS pDevIns = pTask->pDevInsR3;
3815 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
3816 if (pPciDev)
3817 {
3818 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
3819 Assert(pBus);
3820
3821 pdmLock(pVM);
3822 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, pTask->u.SetIRQ.iIrq,
3823 pTask->u.SetIRQ.iLevel, pTask->u.SetIRQ.uTagSrc);
3824 pdmUnlock(pVM);
3825 }
3826 else
3827 AssertReleaseMsgFailed(("No PCI device registered!\n"));
3828 break;
3829 }
3830
3831 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3832 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel, pTask->u.SetIRQ.uTagSrc);
3833 break;
3834
3835 default:
3836 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3837 break;
3838 }
3839 return true;
3840}
3841
3842/** @} */
3843
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