VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp@ 61574

Last change on this file since 61574 was 61364, checked in by vboxsync, 9 years ago

VMM/PDMDevMiscHlp: copy-paste typo.
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1/* $Id: PDMDevMiscHlp.cpp 61364 2016-06-01 09:14:41Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/hm.h>
27#ifdef VBOX_WITH_REM
28# include <VBox/vmm/rem.h>
29#endif
30#include <VBox/vmm/vm.h>
31#include <VBox/vmm/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40#include "PDMInline.h"
41#include "dtrace/VBoxVMM.h"
42
43
44
45/** @name Ring-3 PIC Helpers
46 * @{
47 */
48
49/** @interface_method_impl{PDMPICHLPR3,pfnSetInterruptFF} */
50static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
51{
52 PDMDEV_ASSERT_DEVINS(pDevIns);
53 PVM pVM = pDevIns->Internal.s.pVMR3;
54 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
55
56 if (pVM->pdm.s.Apic.pfnLocalInterruptR3)
57 {
58 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: Setting local interrupt on LAPIC\n",
59 pDevIns->pReg->szName, pDevIns->iInstance));
60
61 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
62 /** @todo 'rcRZ' propagation to pfnLocalInterrupt from caller. */
63 pVM->pdm.s.Apic.pfnLocalInterruptR3(pVM->pdm.s.Apic.pDevInsR3, pVCpu, 0 /* u8Pin */, 1 /* u8Level */,
64 VINF_SUCCESS /* rcRZ */);
65 return;
66 }
67
68 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_PIC %d -> 1\n",
69 pDevIns->pReg->szName, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72#ifdef VBOX_WITH_REM
73 REMR3NotifyInterruptSet(pVM, pVCpu);
74#endif
75 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
76}
77
78
79/** @interface_method_impl{PDMPICHLPR3,pfnClearInterruptFF} */
80static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
81{
82 PDMDEV_ASSERT_DEVINS(pDevIns);
83 PVM pVM = pDevIns->Internal.s.pVMR3;
84 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
85
86 if (pVM->pdm.s.Apic.pfnLocalInterruptR3)
87 {
88 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
89 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: Clearing local interrupt on LAPIC\n",
90 pDevIns->pReg->szName, pDevIns->iInstance));
91
92 /* Lower the LAPIC's LINT0 line instead of signaling the CPU directly. */
93 /** @todo 'rcRZ' propagation to pfnLocalInterrupt from caller. */
94 pVM->pdm.s.Apic.pfnLocalInterruptR3(pVM->pdm.s.Apic.pDevInsR3, pVCpu, 0 /* u8Pin */, 0 /* u8Level */,
95 VINF_SUCCESS /* rcRZ */);
96 return;
97 }
98
99 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_PIC %d -> 0\n",
100 pDevIns->pReg->szName, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
101
102 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
103#ifdef VBOX_WITH_REM
104 REMR3NotifyInterruptClear(pVM, pVCpu);
105#endif
106}
107
108
109/** @interface_method_impl{PDMPICHLPR3,pfnLock} */
110static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
111{
112 PDMDEV_ASSERT_DEVINS(pDevIns);
113 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
114}
115
116
117/** @interface_method_impl{PDMPICHLPR3,pfnUnlock} */
118static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
119{
120 PDMDEV_ASSERT_DEVINS(pDevIns);
121 pdmUnlock(pDevIns->Internal.s.pVMR3);
122}
123
124
125/** @interface_method_impl{PDMPICHLPR3,pfnGetRCHelpers} */
126static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
127{
128 PDMDEV_ASSERT_DEVINS(pDevIns);
129 PVM pVM = pDevIns->Internal.s.pVMR3;
130 VM_ASSERT_EMT(pVM);
131
132 RTRCPTR pRCHelpers = NIL_RTRCPTR;
133 if (!HMIsEnabled(pVM))
134 {
135 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPicHlp", &pRCHelpers);
136 AssertReleaseRC(rc);
137 AssertRelease(pRCHelpers);
138 }
139
140 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
141 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
142 return pRCHelpers;
143}
144
145
146/** @interface_method_impl{PDMPICHLPR3,pfnGetR0Helpers} */
147static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 VM_ASSERT_EMT(pVM);
152 PCPDMPICHLPR0 pR0Helpers = 0;
153 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PicHlp", &pR0Helpers);
154 AssertReleaseRC(rc);
155 AssertRelease(pR0Helpers);
156 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
157 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
158 return pR0Helpers;
159}
160
161
162/**
163 * PIC Device Helpers.
164 */
165const PDMPICHLPR3 g_pdmR3DevPicHlp =
166{
167 PDM_PICHLPR3_VERSION,
168 pdmR3PicHlp_SetInterruptFF,
169 pdmR3PicHlp_ClearInterruptFF,
170 pdmR3PicHlp_Lock,
171 pdmR3PicHlp_Unlock,
172 pdmR3PicHlp_GetRCHelpers,
173 pdmR3PicHlp_GetR0Helpers,
174 PDM_PICHLPR3_VERSION /* the end */
175};
176
177/** @} */
178
179
180
181
182/** @name R3 APIC Helpers
183 * @{
184 */
185
186/** @interface_method_impl{PDMAPICHLPR3,pfnSetInterruptFF} */
187static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
188{
189 PDMDEV_ASSERT_DEVINS(pDevIns);
190 PVM pVM = pDevIns->Internal.s.pVMR3;
191 PVMCPU pVCpu = &pVM->aCpus[idCpu];
192
193 AssertReturnVoid(idCpu < pVM->cCpus);
194
195 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_APIC(%d) %d -> 1\n",
196 pDevIns->pReg->szName, pDevIns->iInstance, idCpu, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
197
198 switch (enmType)
199 {
200 case PDMAPICIRQ_UPDATE_PENDING:
201 VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);
202 break;
203 case PDMAPICIRQ_HARDWARE:
204#ifdef VBOX_WITH_NEW_APIC
205 VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
206#endif
207 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
208 break;
209 case PDMAPICIRQ_NMI:
210 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
211 break;
212 case PDMAPICIRQ_SMI:
213 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
214 break;
215 case PDMAPICIRQ_EXTINT:
216 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
217 break;
218 default:
219 AssertMsgFailed(("enmType=%d\n", enmType));
220 break;
221 }
222#ifdef VBOX_WITH_REM
223 REMR3NotifyInterruptSet(pVM, pVCpu);
224#endif
225
226#ifdef VBOX_WITH_NEW_APIC
227 if (enmType != PDMAPICIRQ_HARDWARE)
228 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
229#else
230 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
231#endif
232}
233
234
235/** @interface_method_impl{PDMAPICHLPR3,pfnClearInterruptFF} */
236static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
237{
238 PDMDEV_ASSERT_DEVINS(pDevIns);
239 PVM pVM = pDevIns->Internal.s.pVMR3;
240 PVMCPU pVCpu = &pVM->aCpus[idCpu];
241
242 AssertReturnVoid(idCpu < pVM->cCpus);
243
244 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_APIC(%d) %d -> 0\n",
245 pDevIns->pReg->szName, pDevIns->iInstance, idCpu, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
246
247 /* Note: NMI/SMI can't be cleared. */
248 switch (enmType)
249 {
250 case PDMAPICIRQ_UPDATE_PENDING:
251 VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
252 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC);
253 break;
254 case PDMAPICIRQ_HARDWARE:
255 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
256 break;
257 case PDMAPICIRQ_EXTINT:
258 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
259 break;
260 default:
261 AssertMsgFailed(("enmType=%d\n", enmType));
262 break;
263 }
264#ifdef VBOX_WITH_REM
265 REMR3NotifyInterruptClear(pVM, pVCpu);
266#endif
267}
268
269
270/** @interface_method_impl{PDMAPICHLPR3,pfnBusBroadcastEoi} */
271static DECLCALLBACK(void) pdmR3ApicHlp_BusBroadcastEoi(PPDMDEVINS pDevIns, uint8_t u8Vector)
272{
273 /* pfnSetEoi will be NULL in the old IOAPIC code as it's not implemented. */
274#ifdef VBOX_WITH_NEW_IOAPIC
275 PDMDEV_ASSERT_DEVINS(pDevIns);
276 PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
277
278 /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having
279 multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */
280 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
281 {
282 Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));
283 pdmLock(pVM);
284 pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Vector);
285 pdmUnlock(pVM);
286 }
287#endif
288}
289
290
291
292/** @interface_method_impl{PDMAPICHLPR3,pfnCalcIrqTag} */
293static DECLCALLBACK(uint32_t) pdmR3ApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
294{
295 PDMDEV_ASSERT_DEVINS(pDevIns);
296 PVM pVM = pDevIns->Internal.s.pVMR3;
297 Assert(u8Level == PDM_IRQ_LEVEL_HIGH || u8Level == PDM_IRQ_LEVEL_FLIP_FLOP);
298
299 pdmLock(pVM);
300
301 uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
302 if (u8Level == PDM_IRQ_LEVEL_HIGH)
303 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
304 else
305 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
306
307
308 pdmUnlock(pVM);
309 LogFlow(("pdmR3ApicHlp_CalcIrqTag: caller='%s'/%d: returns %#x (u8Level=%d)\n",
310 pDevIns->pReg->szName, pDevIns->iInstance, uTagSrc, u8Level));
311 return uTagSrc;
312}
313
314
315/** @interface_method_impl{PDMAPICHLPR3,pfnChangeFeature} */
316static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICMODE enmMode)
317{
318#ifdef VBOX_WITH_NEW_APIC
319 /*
320 * The old code is also most likely incorrect with regards to changing the CPUID bits,
321 * see @bugref{8245#c32}.
322 *
323 * The new code should directly invoke APICUpdateCpuIdForMode() instead of using this
324 * indirect helper.
325 */
326 AssertMsgFailed(("pdmR3ApicHlp_ChangeFeature unsupported in VBOX_WITH_NEW_APIC!"));
327#else
328 PDMDEV_ASSERT_DEVINS(pDevIns);
329 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: mode=%d\n",
330 pDevIns->pReg->szName, pDevIns->iInstance, (int)enmMode));
331 switch (enmMode)
332 {
333 case PDMAPICMODE_NONE:
334 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
335 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
336 break;
337 case PDMAPICMODE_APIC:
338 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
339 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
340 break;
341 case PDMAPICMODE_X2APIC:
342 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
343 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
344 break;
345 default:
346 AssertMsgFailed(("Unknown APIC mode: %d\n", (int)enmMode));
347 }
348#endif
349}
350
351/** @interface_method_impl{PDMAPICHLPR3,pfnGetCpuId} */
352static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
353{
354 PDMDEV_ASSERT_DEVINS(pDevIns);
355 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
356 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
357}
358
359
360/** @interface_method_impl{PDMAPICHLPR3,pfnSendStartupIpi} */
361static DECLCALLBACK(void) pdmR3ApicHlp_SendStartupIpi(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector)
362{
363 PDMDEV_ASSERT_DEVINS(pDevIns);
364 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
365 VMMR3SendStartupIpi(pDevIns->Internal.s.pVMR3, idCpu, uVector);
366}
367
368
369/** @interface_method_impl{PDMAPICHLPR3,pfnSendInitIpi} */
370static DECLCALLBACK(void) pdmR3ApicHlp_SendInitIpi(PPDMDEVINS pDevIns, VMCPUID idCpu)
371{
372 PDMDEV_ASSERT_DEVINS(pDevIns);
373 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374 VMMR3SendInitIpi(pDevIns->Internal.s.pVMR3, idCpu);
375}
376
377
378/** @interface_method_impl{PDMAPICHLPR3,pfnGetRCHelpers} */
379static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
380{
381 PDMDEV_ASSERT_DEVINS(pDevIns);
382 PVM pVM = pDevIns->Internal.s.pVMR3;
383 VM_ASSERT_EMT(pVM);
384
385 RTRCPTR pRCHelpers = NIL_RTRCPTR;
386 if (!HMIsEnabled(pVM))
387 {
388 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCApicHlp", &pRCHelpers);
389 AssertReleaseRC(rc);
390 AssertRelease(pRCHelpers);
391 }
392
393 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
394 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
395 return pRCHelpers;
396}
397
398
399/** @interface_method_impl{PDMAPICHLPR3,pfnGetR0Helpers} */
400static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
401{
402 PDMDEV_ASSERT_DEVINS(pDevIns);
403 PVM pVM = pDevIns->Internal.s.pVMR3;
404 VM_ASSERT_EMT(pVM);
405 PCPDMAPICHLPR0 pR0Helpers = 0;
406 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
407 AssertReleaseRC(rc);
408 AssertRelease(pR0Helpers);
409 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
410 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
411 return pR0Helpers;
412}
413
414
415/** @interface_method_impl{PDMAPICHLPR3,pfnGetR3CritSect} */
416static DECLCALLBACK(R3PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR3CritSect(PPDMDEVINS pDevIns)
417{
418 PDMDEV_ASSERT_DEVINS(pDevIns);
419 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
420 return &pDevIns->Internal.s.pVMR3->pdm.s.CritSect;
421}
422
423
424/** @interface_method_impl{PDMAPICHLPR3,pfnGetRCCritSect} */
425static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetRCCritSect(PPDMDEVINS pDevIns)
426{
427 PDMDEV_ASSERT_DEVINS(pDevIns);
428 PVM pVM = pDevIns->Internal.s.pVMR3;
429 RTRCPTR RCPtr = MMHyperCCToRC(pVM, &pVM->pdm.s.CritSect);
430 LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, RCPtr));
431 return RCPtr;
432}
433
434
435/** @interface_method_impl{PDMAPICHLPR3,pfnGetR3CritSect} */
436static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR0CritSect(PPDMDEVINS pDevIns)
437{
438 PDMDEV_ASSERT_DEVINS(pDevIns);
439 PVM pVM = pDevIns->Internal.s.pVMR3;
440 RTR0PTR R0Ptr = MMHyperCCToR0(pVM, &pVM->pdm.s.CritSect);
441 LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, R0Ptr));
442 return R0Ptr;
443}
444
445
446
447/**
448 * APIC Device Helpers.
449 */
450const PDMAPICHLPR3 g_pdmR3DevApicHlp =
451{
452 PDM_APICHLPR3_VERSION,
453 pdmR3ApicHlp_SetInterruptFF,
454 pdmR3ApicHlp_ClearInterruptFF,
455 pdmR3ApicHlp_BusBroadcastEoi,
456 pdmR3ApicHlp_CalcIrqTag,
457 pdmR3ApicHlp_ChangeFeature,
458 pdmR3ApicHlp_GetCpuId,
459 pdmR3ApicHlp_SendStartupIpi,
460 pdmR3ApicHlp_SendInitIpi,
461 pdmR3ApicHlp_GetRCHelpers,
462 pdmR3ApicHlp_GetR0Helpers,
463 pdmR3ApicHlp_GetR3CritSect,
464 pdmR3ApicHlp_GetRCCritSect,
465 pdmR3ApicHlp_GetR0CritSect,
466 PDM_APICHLPR3_VERSION /* the end */
467};
468
469/** @} */
470
471
472
473
474/** @name Ring-3 I/O APIC Helpers
475 * @{
476 */
477
478/** @interface_method_impl{PDMIOAPICHLPR3,pfnApicBusDeliver} */
479static DECLCALLBACK(int) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
480 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)
481{
482 PDMDEV_ASSERT_DEVINS(pDevIns);
483 PVM pVM = pDevIns->Internal.s.pVMR3;
484 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
485 pDevIns->pReg->szName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc));
486 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
487 return pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc);
488 return VINF_SUCCESS;
489}
490
491
492/** @interface_method_impl{PDMIOAPICHLPR3,pfnLock} */
493static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
494{
495 PDMDEV_ASSERT_DEVINS(pDevIns);
496 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
497 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
498}
499
500
501/** @interface_method_impl{PDMIOAPICHLPR3,pfnUnlock} */
502static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
503{
504 PDMDEV_ASSERT_DEVINS(pDevIns);
505 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
506 pdmUnlock(pDevIns->Internal.s.pVMR3);
507}
508
509
510/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetRCHelpers} */
511static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
512{
513 PDMDEV_ASSERT_DEVINS(pDevIns);
514 PVM pVM = pDevIns->Internal.s.pVMR3;
515 VM_ASSERT_EMT(pVM);
516
517 RTRCPTR pRCHelpers = NIL_RTRCPTR;
518 if (!HMIsEnabled(pVM))
519 {
520 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
521 AssertReleaseRC(rc);
522 AssertRelease(pRCHelpers);
523 }
524
525 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
526 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
527 return pRCHelpers;
528}
529
530
531/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetR0Helpers} */
532static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
533{
534 PDMDEV_ASSERT_DEVINS(pDevIns);
535 PVM pVM = pDevIns->Internal.s.pVMR3;
536 VM_ASSERT_EMT(pVM);
537 PCPDMIOAPICHLPR0 pR0Helpers = 0;
538 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
539 AssertReleaseRC(rc);
540 AssertRelease(pR0Helpers);
541 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
542 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
543 return pR0Helpers;
544}
545
546
547/**
548 * I/O APIC Device Helpers.
549 */
550const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
551{
552 PDM_IOAPICHLPR3_VERSION,
553 pdmR3IoApicHlp_ApicBusDeliver,
554 pdmR3IoApicHlp_Lock,
555 pdmR3IoApicHlp_Unlock,
556 pdmR3IoApicHlp_GetRCHelpers,
557 pdmR3IoApicHlp_GetR0Helpers,
558 PDM_IOAPICHLPR3_VERSION /* the end */
559};
560
561/** @} */
562
563
564
565
566/** @name Ring-3 PCI Bus Helpers
567 * @{
568 */
569
570/** @interface_method_impl{PDMPCIHLPR3,pfnIsaSetIrq} */
571static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
572{
573 PDMDEV_ASSERT_DEVINS(pDevIns);
574 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
575 PVM pVM = pDevIns->Internal.s.pVMR3;
576 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
577}
578
579/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSetIrq} */
580static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
581{
582 PDMDEV_ASSERT_DEVINS(pDevIns);
583 Log4(("pdmR3PciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
584 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
585}
586
587/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSendMsi} */
588static DECLCALLBACK(void) pdmR3PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
589{
590 PDMDEV_ASSERT_DEVINS(pDevIns);
591 Log4(("pdmR3PciHlp_IoApicSendMsi: address=%p value=%x uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
592 PDMIoApicSendMsi(pDevIns->Internal.s.pVMR3, GCPhys, uValue, uTagSrc);
593}
594
595/** @interface_method_impl{PDMPCIHLPR3,pfnIsMMIO2Base} */
596static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
597{
598 PDMDEV_ASSERT_DEVINS(pDevIns);
599 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
600 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
601 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
602 return fRc;
603}
604
605
606/** @interface_method_impl{PDMPCIHLPR3,pfnLock} */
607static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
608{
609 PDMDEV_ASSERT_DEVINS(pDevIns);
610 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
611 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
612}
613
614
615/** @interface_method_impl{PDMPCIHLPR3,pfnUnlock} */
616static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
617{
618 PDMDEV_ASSERT_DEVINS(pDevIns);
619 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
620 pdmUnlock(pDevIns->Internal.s.pVMR3);
621}
622
623
624/** @interface_method_impl{PDMPCIHLPR3,pfnGetRCHelpers} */
625static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
626{
627 PDMDEV_ASSERT_DEVINS(pDevIns);
628 PVM pVM = pDevIns->Internal.s.pVMR3;
629 VM_ASSERT_EMT(pVM);
630
631 RTRCPTR pRCHelpers = NIL_RTRCPTR;
632 if (!HMIsEnabled(pVM))
633 {
634 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPciHlp", &pRCHelpers);
635 AssertReleaseRC(rc);
636 AssertRelease(pRCHelpers);
637 }
638
639 LogFlow(("pdmR3PciHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
640 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
641 return pRCHelpers;
642}
643
644
645/** @interface_method_impl{PDMPCIHLPR3,pfnGetR0Helpers} */
646static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
647{
648 PDMDEV_ASSERT_DEVINS(pDevIns);
649 PVM pVM = pDevIns->Internal.s.pVMR3;
650 VM_ASSERT_EMT(pVM);
651 PCPDMPCIHLPR0 pR0Helpers = 0;
652 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PciHlp", &pR0Helpers);
653 AssertReleaseRC(rc);
654 AssertRelease(pR0Helpers);
655 LogFlow(("pdmR3PciHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
656 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
657 return pR0Helpers;
658}
659
660
661/**
662 * PCI Bus Device Helpers.
663 */
664const PDMPCIHLPR3 g_pdmR3DevPciHlp =
665{
666 PDM_PCIHLPR3_VERSION,
667 pdmR3PciHlp_IsaSetIrq,
668 pdmR3PciHlp_IoApicSetIrq,
669 pdmR3PciHlp_IoApicSendMsi,
670 pdmR3PciHlp_IsMMIO2Base,
671 pdmR3PciHlp_GetRCHelpers,
672 pdmR3PciHlp_GetR0Helpers,
673 pdmR3PciHlp_Lock,
674 pdmR3PciHlp_Unlock,
675 PDM_PCIHLPR3_VERSION, /* the end */
676};
677
678/** @} */
679
680
681
682
683/** @name Ring-3 HPET Helpers
684 * {@
685 */
686
687/** @interface_method_impl{PDMHPETHLPR3,pfnSetLegacyMode} */
688static DECLCALLBACK(int) pdmR3HpetHlp_SetLegacyMode(PPDMDEVINS pDevIns, bool fActivated)
689{
690 PDMDEV_ASSERT_DEVINS(pDevIns);
691 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: fActivated=%RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance, fActivated));
692
693 size_t i;
694 int rc = VINF_SUCCESS;
695 static const char * const s_apszDevsToNotify[] =
696 {
697 "i8254",
698 "mc146818"
699 };
700 for (i = 0; i < RT_ELEMENTS(s_apszDevsToNotify); i++)
701 {
702 PPDMIBASE pBase;
703 rc = PDMR3QueryDevice(pDevIns->Internal.s.pVMR3->pUVM, "i8254", 0, &pBase);
704 if (RT_SUCCESS(rc))
705 {
706 PPDMIHPETLEGACYNOTIFY pPort = PDMIBASE_QUERY_INTERFACE(pBase, PDMIHPETLEGACYNOTIFY);
707 AssertLogRelMsgBreakStmt(pPort, ("%s\n", s_apszDevsToNotify[i]), rc = VERR_PDM_HPET_LEGACY_NOTIFY_MISSING);
708 pPort->pfnModeChanged(pPort, fActivated);
709 }
710 else if ( rc == VERR_PDM_DEVICE_NOT_FOUND
711 || rc == VERR_PDM_DEVICE_INSTANCE_NOT_FOUND)
712 rc = VINF_SUCCESS; /* the device isn't configured, ignore. */
713 else
714 AssertLogRelMsgFailedBreak(("%s -> %Rrc\n", s_apszDevsToNotify[i], rc));
715 }
716
717 /* Don't bother cleaning up, any failure here will cause a guru meditation. */
718
719 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
720 return rc;
721}
722
723
724/** @interface_method_impl{PDMHPETHLPR3,pfnSetIrq} */
725static DECLCALLBACK(int) pdmR3HpetHlp_SetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
726{
727 PDMDEV_ASSERT_DEVINS(pDevIns);
728 LogFlow(("pdmR3HpetHlp_SetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
729 PVM pVM = pDevIns->Internal.s.pVMR3;
730
731 pdmLock(pVM);
732 uint32_t uTagSrc;
733 if (iLevel & PDM_IRQ_LEVEL_HIGH)
734 {
735 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
736 if (iLevel == PDM_IRQ_LEVEL_HIGH)
737 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
738 else
739 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
740 }
741 else
742 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
743
744 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
745
746 if (iLevel == PDM_IRQ_LEVEL_LOW)
747 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
748 pdmUnlock(pVM);
749 return 0;
750}
751
752
753/** @interface_method_impl{PDMHPETHLPR3,pfnGetRCHelpers} */
754static DECLCALLBACK(PCPDMHPETHLPRC) pdmR3HpetHlp_GetRCHelpers(PPDMDEVINS pDevIns)
755{
756 PDMDEV_ASSERT_DEVINS(pDevIns);
757 PVM pVM = pDevIns->Internal.s.pVMR3;
758 VM_ASSERT_EMT(pVM);
759
760 RTRCPTR pRCHelpers = NIL_RTRCPTR;
761 if (!HMIsEnabled(pVM))
762 {
763 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCHpetHlp", &pRCHelpers);
764 AssertReleaseRC(rc);
765 AssertRelease(pRCHelpers);
766 }
767
768 LogFlow(("pdmR3HpetHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
769 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
770 return pRCHelpers;
771}
772
773
774/** @interface_method_impl{PDMHPETHLPR3,pfnGetR0Helpers} */
775static DECLCALLBACK(PCPDMHPETHLPR0) pdmR3HpetHlp_GetR0Helpers(PPDMDEVINS pDevIns)
776{
777 PDMDEV_ASSERT_DEVINS(pDevIns);
778 PVM pVM = pDevIns->Internal.s.pVMR3;
779 VM_ASSERT_EMT(pVM);
780 PCPDMHPETHLPR0 pR0Helpers = 0;
781 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0HpetHlp", &pR0Helpers);
782 AssertReleaseRC(rc);
783 AssertRelease(pR0Helpers);
784 LogFlow(("pdmR3HpetHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
785 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
786 return pR0Helpers;
787}
788
789
790/**
791 * HPET Device Helpers.
792 */
793const PDMHPETHLPR3 g_pdmR3DevHpetHlp =
794{
795 PDM_HPETHLPR3_VERSION,
796 pdmR3HpetHlp_GetRCHelpers,
797 pdmR3HpetHlp_GetR0Helpers,
798 pdmR3HpetHlp_SetLegacyMode,
799 pdmR3HpetHlp_SetIrq,
800 PDM_HPETHLPR3_VERSION, /* the end */
801};
802
803/** @} */
804
805
806/** @name Ring-3 Raw PCI Device Helpers
807 * {@
808 */
809
810/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetRCHelpers} */
811static DECLCALLBACK(PCPDMPCIRAWHLPRC) pdmR3PciRawHlp_GetRCHelpers(PPDMDEVINS pDevIns)
812{
813 PDMDEV_ASSERT_DEVINS(pDevIns);
814 PVM pVM = pDevIns->Internal.s.pVMR3;
815 VM_ASSERT_EMT(pVM);
816
817 RTRCPTR pRCHelpers = NIL_RTRCPTR;
818 if (!HMIsEnabled(pVM))
819 {
820 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPciRawHlp", &pRCHelpers);
821 AssertReleaseRC(rc);
822 AssertRelease(pRCHelpers);
823 }
824
825 LogFlow(("pdmR3PciRawHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
826 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
827 return pRCHelpers;
828}
829
830
831/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetR0Helpers} */
832static DECLCALLBACK(PCPDMPCIRAWHLPR0) pdmR3PciRawHlp_GetR0Helpers(PPDMDEVINS pDevIns)
833{
834 PDMDEV_ASSERT_DEVINS(pDevIns);
835 PVM pVM = pDevIns->Internal.s.pVMR3;
836 VM_ASSERT_EMT(pVM);
837 PCPDMHPETHLPR0 pR0Helpers = NIL_RTR0PTR;
838 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PciRawHlp", &pR0Helpers);
839 AssertReleaseRC(rc);
840 AssertRelease(pR0Helpers);
841 LogFlow(("pdmR3PciRawHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
842 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
843 return pR0Helpers;
844}
845
846
847/**
848 * Raw PCI Device Helpers.
849 */
850const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp =
851{
852 PDM_PCIRAWHLPR3_VERSION,
853 pdmR3PciRawHlp_GetRCHelpers,
854 pdmR3PciRawHlp_GetR0Helpers,
855 PDM_PCIRAWHLPR3_VERSION, /* the end */
856};
857
858/** @} */
859
860
861/* none yet */
862
863/**
864 * Firmware Device Helpers.
865 */
866const PDMFWHLPR3 g_pdmR3DevFirmwareHlp =
867{
868 PDM_FWHLPR3_VERSION,
869 PDM_FWHLPR3_VERSION
870};
871
872/**
873 * DMAC Device Helpers.
874 */
875const PDMDMACHLP g_pdmR3DevDmacHlp =
876{
877 PDM_DMACHLP_VERSION
878};
879
880
881
882
883/* none yet */
884
885/**
886 * RTC Device Helpers.
887 */
888const PDMRTCHLP g_pdmR3DevRtcHlp =
889{
890 PDM_RTCHLP_VERSION
891};
892
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