VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp@ 61744

Last change on this file since 61744 was 61735, checked in by vboxsync, 8 years ago

PDM,VMM: I/O APIC critsect fixes and interface changes to broadcast EOI.
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File size: 28.5 KB
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1/* $Id: PDMDevMiscHlp.cpp 61735 2016-06-17 07:39:35Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/hm.h>
27#ifdef VBOX_WITH_REM
28# include <VBox/vmm/rem.h>
29#endif
30#include <VBox/vmm/vm.h>
31#include <VBox/vmm/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40#include "PDMInline.h"
41#include "dtrace/VBoxVMM.h"
42
43
44
45/** @name Ring-3 PIC Helpers
46 * @{
47 */
48
49/** @interface_method_impl{PDMPICHLPR3,pfnSetInterruptFF} */
50static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
51{
52 PDMDEV_ASSERT_DEVINS(pDevIns);
53 PVM pVM = pDevIns->Internal.s.pVMR3;
54 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
55
56 if (pVM->pdm.s.Apic.pfnLocalInterruptR3)
57 {
58 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: Setting local interrupt on LAPIC\n",
59 pDevIns->pReg->szName, pDevIns->iInstance));
60
61 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
62 /** @todo 'rcRZ' propagation to pfnLocalInterrupt from caller. */
63 pVM->pdm.s.Apic.pfnLocalInterruptR3(pVM->pdm.s.Apic.pDevInsR3, pVCpu, 0 /* u8Pin */, 1 /* u8Level */,
64 VINF_SUCCESS /* rcRZ */);
65 return;
66 }
67
68 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_PIC %d -> 1\n",
69 pDevIns->pReg->szName, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72#ifdef VBOX_WITH_REM
73 REMR3NotifyInterruptSet(pVM, pVCpu);
74#endif
75 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
76}
77
78
79/** @interface_method_impl{PDMPICHLPR3,pfnClearInterruptFF} */
80static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
81{
82 PDMDEV_ASSERT_DEVINS(pDevIns);
83 PVM pVM = pDevIns->Internal.s.pVMR3;
84 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
85
86 if (pVM->pdm.s.Apic.pfnLocalInterruptR3)
87 {
88 /* Raise the LAPIC's LINT0 line instead of signaling the CPU directly. */
89 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: Clearing local interrupt on LAPIC\n",
90 pDevIns->pReg->szName, pDevIns->iInstance));
91
92 /* Lower the LAPIC's LINT0 line instead of signaling the CPU directly. */
93 /** @todo 'rcRZ' propagation to pfnLocalInterrupt from caller. */
94 pVM->pdm.s.Apic.pfnLocalInterruptR3(pVM->pdm.s.Apic.pDevInsR3, pVCpu, 0 /* u8Pin */, 0 /* u8Level */,
95 VINF_SUCCESS /* rcRZ */);
96 return;
97 }
98
99 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_PIC %d -> 0\n",
100 pDevIns->pReg->szName, pDevIns->iInstance, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
101
102 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
103#ifdef VBOX_WITH_REM
104 REMR3NotifyInterruptClear(pVM, pVCpu);
105#endif
106}
107
108
109/** @interface_method_impl{PDMPICHLPR3,pfnLock} */
110static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
111{
112 PDMDEV_ASSERT_DEVINS(pDevIns);
113 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
114}
115
116
117/** @interface_method_impl{PDMPICHLPR3,pfnUnlock} */
118static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
119{
120 PDMDEV_ASSERT_DEVINS(pDevIns);
121 pdmUnlock(pDevIns->Internal.s.pVMR3);
122}
123
124
125/** @interface_method_impl{PDMPICHLPR3,pfnGetRCHelpers} */
126static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
127{
128 PDMDEV_ASSERT_DEVINS(pDevIns);
129 PVM pVM = pDevIns->Internal.s.pVMR3;
130 VM_ASSERT_EMT(pVM);
131
132 RTRCPTR pRCHelpers = NIL_RTRCPTR;
133 if (!HMIsEnabled(pVM))
134 {
135 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPicHlp", &pRCHelpers);
136 AssertReleaseRC(rc);
137 AssertRelease(pRCHelpers);
138 }
139
140 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
141 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
142 return pRCHelpers;
143}
144
145
146/** @interface_method_impl{PDMPICHLPR3,pfnGetR0Helpers} */
147static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 VM_ASSERT_EMT(pVM);
152 PCPDMPICHLPR0 pR0Helpers = 0;
153 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PicHlp", &pR0Helpers);
154 AssertReleaseRC(rc);
155 AssertRelease(pR0Helpers);
156 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
157 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
158 return pR0Helpers;
159}
160
161
162/**
163 * PIC Device Helpers.
164 */
165const PDMPICHLPR3 g_pdmR3DevPicHlp =
166{
167 PDM_PICHLPR3_VERSION,
168 pdmR3PicHlp_SetInterruptFF,
169 pdmR3PicHlp_ClearInterruptFF,
170 pdmR3PicHlp_Lock,
171 pdmR3PicHlp_Unlock,
172 pdmR3PicHlp_GetRCHelpers,
173 pdmR3PicHlp_GetR0Helpers,
174 PDM_PICHLPR3_VERSION /* the end */
175};
176
177/** @} */
178
179
180
181
182/** @name R3 APIC Helpers
183 * @{
184 */
185
186/** @interface_method_impl{PDMAPICHLPR3,pfnSetInterruptFF} */
187static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
188{
189 PDMDEV_ASSERT_DEVINS(pDevIns);
190 PVM pVM = pDevIns->Internal.s.pVMR3;
191 PVMCPU pVCpu = &pVM->aCpus[idCpu];
192
193 AssertReturnVoid(idCpu < pVM->cCpus);
194
195 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_APIC(%d) %d -> 1\n",
196 pDevIns->pReg->szName, pDevIns->iInstance, idCpu, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
197
198 switch (enmType)
199 {
200 case PDMAPICIRQ_UPDATE_PENDING:
201 VMCPU_FF_SET(pVCpu, VMCPU_FF_UPDATE_APIC);
202 break;
203 case PDMAPICIRQ_HARDWARE:
204#ifdef VBOX_WITH_NEW_APIC
205 VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
206#endif
207 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
208 break;
209 case PDMAPICIRQ_NMI:
210 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
211 break;
212 case PDMAPICIRQ_SMI:
213 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
214 break;
215 case PDMAPICIRQ_EXTINT:
216 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
217 break;
218 default:
219 AssertMsgFailed(("enmType=%d\n", enmType));
220 break;
221 }
222#ifdef VBOX_WITH_REM
223 REMR3NotifyInterruptSet(pVM, pVCpu);
224#endif
225
226#ifdef VBOX_WITH_NEW_APIC
227 if (enmType != PDMAPICIRQ_HARDWARE)
228 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
229#else
230 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
231#endif
232}
233
234
235/** @interface_method_impl{PDMAPICHLPR3,pfnClearInterruptFF} */
236static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
237{
238 PDMDEV_ASSERT_DEVINS(pDevIns);
239 PVM pVM = pDevIns->Internal.s.pVMR3;
240 PVMCPU pVCpu = &pVM->aCpus[idCpu];
241
242 AssertReturnVoid(idCpu < pVM->cCpus);
243
244 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VMCPU_FF_INTERRUPT_APIC(%d) %d -> 0\n",
245 pDevIns->pReg->szName, pDevIns->iInstance, idCpu, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
246
247 /* Note: NMI/SMI can't be cleared. */
248 switch (enmType)
249 {
250 case PDMAPICIRQ_UPDATE_PENDING:
251 VMCPU_ASSERT_EMT_OR_NOT_RUNNING(pVCpu);
252 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_UPDATE_APIC);
253 break;
254 case PDMAPICIRQ_HARDWARE:
255 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
256 break;
257 case PDMAPICIRQ_EXTINT:
258 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
259 break;
260 default:
261 AssertMsgFailed(("enmType=%d\n", enmType));
262 break;
263 }
264#ifdef VBOX_WITH_REM
265 REMR3NotifyInterruptClear(pVM, pVCpu);
266#endif
267}
268
269
270/** @interface_method_impl{PDMAPICHLPR3,pfnBusBroadcastEoi} */
271static DECLCALLBACK(int) pdmR3ApicHlp_BusBroadcastEoi(PPDMDEVINS pDevIns, uint8_t u8Vector)
272{
273 /* pfnSetEoi will be NULL in the old IOAPIC code as it's not implemented. */
274#ifdef VBOX_WITH_NEW_IOAPIC
275 PDMDEV_ASSERT_DEVINS(pDevIns);
276 PVM pVM = pDevIns->Internal.s.CTX_SUFF(pVM);
277
278 /* At present, we support only a maximum of one I/O APIC per-VM. If we ever implement having
279 multiple I/O APICs per-VM, we'll have to broadcast this EOI to all of the I/O APICs. */
280 if (pVM->pdm.s.IoApic.CTX_SUFF(pDevIns))
281 {
282 Assert(pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi));
283 return pVM->pdm.s.IoApic.CTX_SUFF(pfnSetEoi)(pVM->pdm.s.IoApic.CTX_SUFF(pDevIns), u8Vector);
284 }
285#endif
286 return VINF_SUCCESS;
287}
288
289
290/** @interface_method_impl{PDMAPICHLPR3,pfnCalcIrqTag} */
291static DECLCALLBACK(uint32_t) pdmR3ApicHlp_CalcIrqTag(PPDMDEVINS pDevIns, uint8_t u8Level)
292{
293 PDMDEV_ASSERT_DEVINS(pDevIns);
294 PVM pVM = pDevIns->Internal.s.pVMR3;
295 Assert(u8Level == PDM_IRQ_LEVEL_HIGH || u8Level == PDM_IRQ_LEVEL_FLIP_FLOP);
296
297 pdmLock(pVM);
298
299 uint32_t uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
300 if (u8Level == PDM_IRQ_LEVEL_HIGH)
301 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
302 else
303 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
304
305
306 pdmUnlock(pVM);
307 LogFlow(("pdmR3ApicHlp_CalcIrqTag: caller='%s'/%d: returns %#x (u8Level=%d)\n",
308 pDevIns->pReg->szName, pDevIns->iInstance, uTagSrc, u8Level));
309 return uTagSrc;
310}
311
312
313/** @interface_method_impl{PDMAPICHLPR3,pfnChangeFeature} */
314static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICMODE enmMode)
315{
316#ifdef VBOX_WITH_NEW_APIC
317 /*
318 * The old code is also most likely incorrect with regards to changing the CPUID bits,
319 * see @bugref{8245#c32}.
320 *
321 * The new code should directly invoke APICUpdateCpuIdForMode() instead of using this
322 * indirect helper.
323 */
324 AssertMsgFailed(("pdmR3ApicHlp_ChangeFeature unsupported in VBOX_WITH_NEW_APIC!"));
325#else
326 PDMDEV_ASSERT_DEVINS(pDevIns);
327 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: mode=%d\n",
328 pDevIns->pReg->szName, pDevIns->iInstance, (int)enmMode));
329 switch (enmMode)
330 {
331 case PDMAPICMODE_NONE:
332 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
333 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
334 break;
335 case PDMAPICMODE_APIC:
336 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
337 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
338 break;
339 case PDMAPICMODE_X2APIC:
340 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
341 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
342 break;
343 default:
344 AssertMsgFailed(("Unknown APIC mode: %d\n", (int)enmMode));
345 }
346#endif
347}
348
349/** @interface_method_impl{PDMAPICHLPR3,pfnGetCpuId} */
350static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
351{
352 PDMDEV_ASSERT_DEVINS(pDevIns);
353 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
354 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
355}
356
357
358/** @interface_method_impl{PDMAPICHLPR3,pfnSendStartupIpi} */
359static DECLCALLBACK(void) pdmR3ApicHlp_SendStartupIpi(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector)
360{
361 PDMDEV_ASSERT_DEVINS(pDevIns);
362 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
363 VMMR3SendStartupIpi(pDevIns->Internal.s.pVMR3, idCpu, uVector);
364}
365
366
367/** @interface_method_impl{PDMAPICHLPR3,pfnSendInitIpi} */
368static DECLCALLBACK(void) pdmR3ApicHlp_SendInitIpi(PPDMDEVINS pDevIns, VMCPUID idCpu)
369{
370 PDMDEV_ASSERT_DEVINS(pDevIns);
371 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
372 VMMR3SendInitIpi(pDevIns->Internal.s.pVMR3, idCpu);
373}
374
375
376/** @interface_method_impl{PDMAPICHLPR3,pfnGetRCHelpers} */
377static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
378{
379 PDMDEV_ASSERT_DEVINS(pDevIns);
380 PVM pVM = pDevIns->Internal.s.pVMR3;
381 VM_ASSERT_EMT(pVM);
382
383 RTRCPTR pRCHelpers = NIL_RTRCPTR;
384 if (!HMIsEnabled(pVM))
385 {
386 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCApicHlp", &pRCHelpers);
387 AssertReleaseRC(rc);
388 AssertRelease(pRCHelpers);
389 }
390
391 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
392 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
393 return pRCHelpers;
394}
395
396
397/** @interface_method_impl{PDMAPICHLPR3,pfnGetR0Helpers} */
398static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
399{
400 PDMDEV_ASSERT_DEVINS(pDevIns);
401 PVM pVM = pDevIns->Internal.s.pVMR3;
402 VM_ASSERT_EMT(pVM);
403 PCPDMAPICHLPR0 pR0Helpers = 0;
404 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
405 AssertReleaseRC(rc);
406 AssertRelease(pR0Helpers);
407 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
408 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
409 return pR0Helpers;
410}
411
412
413/** @interface_method_impl{PDMAPICHLPR3,pfnGetR3CritSect} */
414static DECLCALLBACK(R3PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR3CritSect(PPDMDEVINS pDevIns)
415{
416 PDMDEV_ASSERT_DEVINS(pDevIns);
417 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
418 return &pDevIns->Internal.s.pVMR3->pdm.s.CritSect;
419}
420
421
422/** @interface_method_impl{PDMAPICHLPR3,pfnGetRCCritSect} */
423static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetRCCritSect(PPDMDEVINS pDevIns)
424{
425 PDMDEV_ASSERT_DEVINS(pDevIns);
426 PVM pVM = pDevIns->Internal.s.pVMR3;
427 RTRCPTR RCPtr = MMHyperCCToRC(pVM, &pVM->pdm.s.CritSect);
428 LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, RCPtr));
429 return RCPtr;
430}
431
432
433/** @interface_method_impl{PDMAPICHLPR3,pfnGetR3CritSect} */
434static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR0CritSect(PPDMDEVINS pDevIns)
435{
436 PDMDEV_ASSERT_DEVINS(pDevIns);
437 PVM pVM = pDevIns->Internal.s.pVMR3;
438 RTR0PTR R0Ptr = MMHyperCCToR0(pVM, &pVM->pdm.s.CritSect);
439 LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, R0Ptr));
440 return R0Ptr;
441}
442
443
444
445/**
446 * APIC Device Helpers.
447 */
448const PDMAPICHLPR3 g_pdmR3DevApicHlp =
449{
450 PDM_APICHLPR3_VERSION,
451 pdmR3ApicHlp_SetInterruptFF,
452 pdmR3ApicHlp_ClearInterruptFF,
453 pdmR3ApicHlp_BusBroadcastEoi,
454 pdmR3ApicHlp_CalcIrqTag,
455 pdmR3ApicHlp_ChangeFeature,
456 pdmR3ApicHlp_GetCpuId,
457 pdmR3ApicHlp_SendStartupIpi,
458 pdmR3ApicHlp_SendInitIpi,
459 pdmR3ApicHlp_GetRCHelpers,
460 pdmR3ApicHlp_GetR0Helpers,
461 pdmR3ApicHlp_GetR3CritSect,
462 pdmR3ApicHlp_GetRCCritSect,
463 pdmR3ApicHlp_GetR0CritSect,
464 PDM_APICHLPR3_VERSION /* the end */
465};
466
467/** @} */
468
469
470
471
472/** @name Ring-3 I/O APIC Helpers
473 * @{
474 */
475
476/** @interface_method_impl{PDMIOAPICHLPR3,pfnApicBusDeliver} */
477static DECLCALLBACK(int) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
478 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc)
479{
480 PDMDEV_ASSERT_DEVINS(pDevIns);
481 PVM pVM = pDevIns->Internal.s.pVMR3;
482 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
483 pDevIns->pReg->szName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc));
484 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
485 return pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode, uTagSrc);
486 return VINF_SUCCESS;
487}
488
489
490/** @interface_method_impl{PDMIOAPICHLPR3,pfnLock} */
491static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
492{
493 PDMDEV_ASSERT_DEVINS(pDevIns);
494 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
495#ifdef VBOX_WITH_NEW_IOAPIC
496 AssertFailed();
497#endif
498 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
499}
500
501
502/** @interface_method_impl{PDMIOAPICHLPR3,pfnUnlock} */
503static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
504{
505 PDMDEV_ASSERT_DEVINS(pDevIns);
506 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
507#ifdef VBOX_WITH_NEW_IOAPIC
508 AssertFailed();
509#endif
510 pdmUnlock(pDevIns->Internal.s.pVMR3);
511}
512
513
514/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetRCHelpers} */
515static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
516{
517 PDMDEV_ASSERT_DEVINS(pDevIns);
518 PVM pVM = pDevIns->Internal.s.pVMR3;
519 VM_ASSERT_EMT(pVM);
520
521 RTRCPTR pRCHelpers = NIL_RTRCPTR;
522 if (!HMIsEnabled(pVM))
523 {
524 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
525 AssertReleaseRC(rc);
526 AssertRelease(pRCHelpers);
527 }
528
529 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
530 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
531 return pRCHelpers;
532}
533
534
535/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetR0Helpers} */
536static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
537{
538 PDMDEV_ASSERT_DEVINS(pDevIns);
539 PVM pVM = pDevIns->Internal.s.pVMR3;
540 VM_ASSERT_EMT(pVM);
541 PCPDMIOAPICHLPR0 pR0Helpers = 0;
542 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
543 AssertReleaseRC(rc);
544 AssertRelease(pR0Helpers);
545 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
546 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
547 return pR0Helpers;
548}
549
550
551/**
552 * I/O APIC Device Helpers.
553 */
554const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
555{
556 PDM_IOAPICHLPR3_VERSION,
557 pdmR3IoApicHlp_ApicBusDeliver,
558 pdmR3IoApicHlp_Lock,
559 pdmR3IoApicHlp_Unlock,
560 pdmR3IoApicHlp_GetRCHelpers,
561 pdmR3IoApicHlp_GetR0Helpers,
562 PDM_IOAPICHLPR3_VERSION /* the end */
563};
564
565/** @} */
566
567
568
569
570/** @name Ring-3 PCI Bus Helpers
571 * @{
572 */
573
574/** @interface_method_impl{PDMPCIHLPR3,pfnIsaSetIrq} */
575static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
576{
577 PDMDEV_ASSERT_DEVINS(pDevIns);
578 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
579 PVM pVM = pDevIns->Internal.s.pVMR3;
580 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
581}
582
583/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSetIrq} */
584static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
585{
586 PDMDEV_ASSERT_DEVINS(pDevIns);
587 Log4(("pdmR3PciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
588 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
589}
590
591/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSendMsi} */
592static DECLCALLBACK(void) pdmR3PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
593{
594 PDMDEV_ASSERT_DEVINS(pDevIns);
595 Log4(("pdmR3PciHlp_IoApicSendMsi: address=%p value=%x uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
596 PDMIoApicSendMsi(pDevIns->Internal.s.pVMR3, GCPhys, uValue, uTagSrc);
597}
598
599/** @interface_method_impl{PDMPCIHLPR3,pfnIsMMIO2Base} */
600static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
601{
602 PDMDEV_ASSERT_DEVINS(pDevIns);
603 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
604 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
605 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
606 return fRc;
607}
608
609
610/** @interface_method_impl{PDMPCIHLPR3,pfnLock} */
611static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
612{
613 PDMDEV_ASSERT_DEVINS(pDevIns);
614 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
615 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
616}
617
618
619/** @interface_method_impl{PDMPCIHLPR3,pfnUnlock} */
620static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
621{
622 PDMDEV_ASSERT_DEVINS(pDevIns);
623 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
624 pdmUnlock(pDevIns->Internal.s.pVMR3);
625}
626
627
628/** @interface_method_impl{PDMPCIHLPR3,pfnGetRCHelpers} */
629static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
630{
631 PDMDEV_ASSERT_DEVINS(pDevIns);
632 PVM pVM = pDevIns->Internal.s.pVMR3;
633 VM_ASSERT_EMT(pVM);
634
635 RTRCPTR pRCHelpers = NIL_RTRCPTR;
636 if (!HMIsEnabled(pVM))
637 {
638 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPciHlp", &pRCHelpers);
639 AssertReleaseRC(rc);
640 AssertRelease(pRCHelpers);
641 }
642
643 LogFlow(("pdmR3PciHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
644 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
645 return pRCHelpers;
646}
647
648
649/** @interface_method_impl{PDMPCIHLPR3,pfnGetR0Helpers} */
650static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
651{
652 PDMDEV_ASSERT_DEVINS(pDevIns);
653 PVM pVM = pDevIns->Internal.s.pVMR3;
654 VM_ASSERT_EMT(pVM);
655 PCPDMPCIHLPR0 pR0Helpers = 0;
656 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PciHlp", &pR0Helpers);
657 AssertReleaseRC(rc);
658 AssertRelease(pR0Helpers);
659 LogFlow(("pdmR3PciHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
660 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
661 return pR0Helpers;
662}
663
664
665/**
666 * PCI Bus Device Helpers.
667 */
668const PDMPCIHLPR3 g_pdmR3DevPciHlp =
669{
670 PDM_PCIHLPR3_VERSION,
671 pdmR3PciHlp_IsaSetIrq,
672 pdmR3PciHlp_IoApicSetIrq,
673 pdmR3PciHlp_IoApicSendMsi,
674 pdmR3PciHlp_IsMMIO2Base,
675 pdmR3PciHlp_GetRCHelpers,
676 pdmR3PciHlp_GetR0Helpers,
677 pdmR3PciHlp_Lock,
678 pdmR3PciHlp_Unlock,
679 PDM_PCIHLPR3_VERSION, /* the end */
680};
681
682/** @} */
683
684
685
686
687/** @name Ring-3 HPET Helpers
688 * {@
689 */
690
691/** @interface_method_impl{PDMHPETHLPR3,pfnSetLegacyMode} */
692static DECLCALLBACK(int) pdmR3HpetHlp_SetLegacyMode(PPDMDEVINS pDevIns, bool fActivated)
693{
694 PDMDEV_ASSERT_DEVINS(pDevIns);
695 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: fActivated=%RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance, fActivated));
696
697 size_t i;
698 int rc = VINF_SUCCESS;
699 static const char * const s_apszDevsToNotify[] =
700 {
701 "i8254",
702 "mc146818"
703 };
704 for (i = 0; i < RT_ELEMENTS(s_apszDevsToNotify); i++)
705 {
706 PPDMIBASE pBase;
707 rc = PDMR3QueryDevice(pDevIns->Internal.s.pVMR3->pUVM, "i8254", 0, &pBase);
708 if (RT_SUCCESS(rc))
709 {
710 PPDMIHPETLEGACYNOTIFY pPort = PDMIBASE_QUERY_INTERFACE(pBase, PDMIHPETLEGACYNOTIFY);
711 AssertLogRelMsgBreakStmt(pPort, ("%s\n", s_apszDevsToNotify[i]), rc = VERR_PDM_HPET_LEGACY_NOTIFY_MISSING);
712 pPort->pfnModeChanged(pPort, fActivated);
713 }
714 else if ( rc == VERR_PDM_DEVICE_NOT_FOUND
715 || rc == VERR_PDM_DEVICE_INSTANCE_NOT_FOUND)
716 rc = VINF_SUCCESS; /* the device isn't configured, ignore. */
717 else
718 AssertLogRelMsgFailedBreak(("%s -> %Rrc\n", s_apszDevsToNotify[i], rc));
719 }
720
721 /* Don't bother cleaning up, any failure here will cause a guru meditation. */
722
723 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
724 return rc;
725}
726
727
728/** @interface_method_impl{PDMHPETHLPR3,pfnSetIrq} */
729static DECLCALLBACK(int) pdmR3HpetHlp_SetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
730{
731 PDMDEV_ASSERT_DEVINS(pDevIns);
732 LogFlow(("pdmR3HpetHlp_SetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
733 PVM pVM = pDevIns->Internal.s.pVMR3;
734
735 pdmLock(pVM);
736 uint32_t uTagSrc;
737 if (iLevel & PDM_IRQ_LEVEL_HIGH)
738 {
739 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
740 if (iLevel == PDM_IRQ_LEVEL_HIGH)
741 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
742 else
743 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
744 }
745 else
746 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
747
748 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
749
750 if (iLevel == PDM_IRQ_LEVEL_LOW)
751 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
752 pdmUnlock(pVM);
753 return 0;
754}
755
756
757/** @interface_method_impl{PDMHPETHLPR3,pfnGetRCHelpers} */
758static DECLCALLBACK(PCPDMHPETHLPRC) pdmR3HpetHlp_GetRCHelpers(PPDMDEVINS pDevIns)
759{
760 PDMDEV_ASSERT_DEVINS(pDevIns);
761 PVM pVM = pDevIns->Internal.s.pVMR3;
762 VM_ASSERT_EMT(pVM);
763
764 RTRCPTR pRCHelpers = NIL_RTRCPTR;
765 if (!HMIsEnabled(pVM))
766 {
767 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCHpetHlp", &pRCHelpers);
768 AssertReleaseRC(rc);
769 AssertRelease(pRCHelpers);
770 }
771
772 LogFlow(("pdmR3HpetHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
773 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
774 return pRCHelpers;
775}
776
777
778/** @interface_method_impl{PDMHPETHLPR3,pfnGetR0Helpers} */
779static DECLCALLBACK(PCPDMHPETHLPR0) pdmR3HpetHlp_GetR0Helpers(PPDMDEVINS pDevIns)
780{
781 PDMDEV_ASSERT_DEVINS(pDevIns);
782 PVM pVM = pDevIns->Internal.s.pVMR3;
783 VM_ASSERT_EMT(pVM);
784 PCPDMHPETHLPR0 pR0Helpers = 0;
785 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0HpetHlp", &pR0Helpers);
786 AssertReleaseRC(rc);
787 AssertRelease(pR0Helpers);
788 LogFlow(("pdmR3HpetHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
789 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
790 return pR0Helpers;
791}
792
793
794/**
795 * HPET Device Helpers.
796 */
797const PDMHPETHLPR3 g_pdmR3DevHpetHlp =
798{
799 PDM_HPETHLPR3_VERSION,
800 pdmR3HpetHlp_GetRCHelpers,
801 pdmR3HpetHlp_GetR0Helpers,
802 pdmR3HpetHlp_SetLegacyMode,
803 pdmR3HpetHlp_SetIrq,
804 PDM_HPETHLPR3_VERSION, /* the end */
805};
806
807/** @} */
808
809
810/** @name Ring-3 Raw PCI Device Helpers
811 * {@
812 */
813
814/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetRCHelpers} */
815static DECLCALLBACK(PCPDMPCIRAWHLPRC) pdmR3PciRawHlp_GetRCHelpers(PPDMDEVINS pDevIns)
816{
817 PDMDEV_ASSERT_DEVINS(pDevIns);
818 PVM pVM = pDevIns->Internal.s.pVMR3;
819 VM_ASSERT_EMT(pVM);
820
821 RTRCPTR pRCHelpers = NIL_RTRCPTR;
822 if (!HMIsEnabled(pVM))
823 {
824 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPciRawHlp", &pRCHelpers);
825 AssertReleaseRC(rc);
826 AssertRelease(pRCHelpers);
827 }
828
829 LogFlow(("pdmR3PciRawHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
830 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
831 return pRCHelpers;
832}
833
834
835/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetR0Helpers} */
836static DECLCALLBACK(PCPDMPCIRAWHLPR0) pdmR3PciRawHlp_GetR0Helpers(PPDMDEVINS pDevIns)
837{
838 PDMDEV_ASSERT_DEVINS(pDevIns);
839 PVM pVM = pDevIns->Internal.s.pVMR3;
840 VM_ASSERT_EMT(pVM);
841 PCPDMHPETHLPR0 pR0Helpers = NIL_RTR0PTR;
842 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PciRawHlp", &pR0Helpers);
843 AssertReleaseRC(rc);
844 AssertRelease(pR0Helpers);
845 LogFlow(("pdmR3PciRawHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
846 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
847 return pR0Helpers;
848}
849
850
851/**
852 * Raw PCI Device Helpers.
853 */
854const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp =
855{
856 PDM_PCIRAWHLPR3_VERSION,
857 pdmR3PciRawHlp_GetRCHelpers,
858 pdmR3PciRawHlp_GetR0Helpers,
859 PDM_PCIRAWHLPR3_VERSION, /* the end */
860};
861
862/** @} */
863
864
865/* none yet */
866
867/**
868 * Firmware Device Helpers.
869 */
870const PDMFWHLPR3 g_pdmR3DevFirmwareHlp =
871{
872 PDM_FWHLPR3_VERSION,
873 PDM_FWHLPR3_VERSION
874};
875
876/**
877 * DMAC Device Helpers.
878 */
879const PDMDMACHLP g_pdmR3DevDmacHlp =
880{
881 PDM_DMACHLP_VERSION
882};
883
884
885
886
887/* none yet */
888
889/**
890 * RTC Device Helpers.
891 */
892const PDMRTCHLP g_pdmR3DevRtcHlp =
893{
894 PDM_RTCHLP_VERSION
895};
896
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