VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp@ 80960

Last change on this file since 80960 was 80960, checked in by vboxsync, 5 years ago

IOM,PDM,DevPCI,DevPciIch9,RTC: Fixes to the I/O port lookup table insertion code. Converted (mostly) the two PCI buses to the new PDM device style. The ICH9 variant wasn't actually dropping the default critsect, it turned out. Changed the new I/O port callbacks to return VBOXSTRICTRC rather than plain int. bugref:9218
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 16.6 KB
Line 
1/* $Id: PDMDevMiscHlp.cpp 80960 2019-09-23 20:54:03Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/hm.h>
27#include <VBox/vmm/apic.h>
28#ifdef VBOX_WITH_REM
29# include <VBox/vmm/rem.h>
30#endif
31#include <VBox/vmm/vm.h>
32#include <VBox/vmm/vmm.h>
33
34#include <VBox/log.h>
35#include <VBox/err.h>
36#include <iprt/asm.h>
37#include <iprt/assert.h>
38#include <iprt/thread.h>
39
40
41#include "PDMInline.h"
42#include "dtrace/VBoxVMM.h"
43
44
45
46/** @name Ring-3 PIC Helpers
47 * @{
48 */
49
50/** @interface_method_impl{PDMPICHLPR3,pfnSetInterruptFF} */
51static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
52{
53 PDMDEV_ASSERT_DEVINS(pDevIns);
54 PVM pVM = pDevIns->Internal.s.pVMR3;
55 PVMCPU pVCpu = pVM->apCpusR3[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
56
57 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */
58 Assert(pVM->enmVMState != VMSTATE_LOADING || pVM->pdm.s.fStateLoaded);
59
60 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 1 /* u8Level */, VINF_SUCCESS /* rcRZ */);
61}
62
63
64/** @interface_method_impl{PDMPICHLPR3,pfnClearInterruptFF} */
65static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
66{
67 PDMDEV_ASSERT_DEVINS(pDevIns);
68 PVM pVM = pDevIns->Internal.s.pVMR3;
69 PVMCPU pVCpu = pVM->apCpusR3[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
70
71 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */
72 Assert(pVM->enmVMState != VMSTATE_LOADING || pVM->pdm.s.fStateLoaded);
73
74 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 0 /* u8Level */, VINF_SUCCESS /* rcRZ */);
75}
76
77
78/** @interface_method_impl{PDMPICHLPR3,pfnLock} */
79static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
80{
81 PDMDEV_ASSERT_DEVINS(pDevIns);
82 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
83}
84
85
86/** @interface_method_impl{PDMPICHLPR3,pfnUnlock} */
87static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
88{
89 PDMDEV_ASSERT_DEVINS(pDevIns);
90 pdmUnlock(pDevIns->Internal.s.pVMR3);
91}
92
93
94/** @interface_method_impl{PDMPICHLPR3,pfnGetRCHelpers} */
95static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
96{
97 PDMDEV_ASSERT_DEVINS(pDevIns);
98 PVM pVM = pDevIns->Internal.s.pVMR3;
99 VM_ASSERT_EMT(pVM);
100
101 RTRCPTR pRCHelpers = NIL_RTRCPTR;
102 if (VM_IS_RAW_MODE_ENABLED(pVM))
103 {
104 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPicHlp", &pRCHelpers);
105 AssertReleaseRC(rc);
106 AssertRelease(pRCHelpers);
107 }
108
109 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
110 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
111 return pRCHelpers;
112}
113
114
115/** @interface_method_impl{PDMPICHLPR3,pfnGetR0Helpers} */
116static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
117{
118 PDMDEV_ASSERT_DEVINS(pDevIns);
119 PVM pVM = pDevIns->Internal.s.pVMR3;
120 VM_ASSERT_EMT(pVM);
121 PCPDMPICHLPR0 pR0Helpers = 0;
122 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PicHlp", &pR0Helpers);
123 AssertReleaseRC(rc);
124 AssertRelease(pR0Helpers);
125 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
126 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
127 return pR0Helpers;
128}
129
130
131/**
132 * PIC Device Helpers.
133 */
134const PDMPICHLPR3 g_pdmR3DevPicHlp =
135{
136 PDM_PICHLPR3_VERSION,
137 pdmR3PicHlp_SetInterruptFF,
138 pdmR3PicHlp_ClearInterruptFF,
139 pdmR3PicHlp_Lock,
140 pdmR3PicHlp_Unlock,
141 pdmR3PicHlp_GetRCHelpers,
142 pdmR3PicHlp_GetR0Helpers,
143 PDM_PICHLPR3_VERSION /* the end */
144};
145
146/** @} */
147
148
149/** @name Ring-3 I/O APIC Helpers
150 * @{
151 */
152
153/** @interface_method_impl{PDMIOAPICHLPR3,pfnApicBusDeliver} */
154static DECLCALLBACK(int) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
155 uint8_t u8DeliveryMode, uint8_t uVector, uint8_t u8Polarity,
156 uint8_t u8TriggerMode, uint32_t uTagSrc)
157{
158 PDMDEV_ASSERT_DEVINS(pDevIns);
159 PVM pVM = pDevIns->Internal.s.pVMR3;
160 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 uVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
161 pDevIns->pReg->szName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc));
162 return APICBusDeliver(pVM, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc);
163}
164
165
166/** @interface_method_impl{PDMIOAPICHLPR3,pfnLock} */
167static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
168{
169 PDMDEV_ASSERT_DEVINS(pDevIns);
170 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
171 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
172}
173
174
175/** @interface_method_impl{PDMIOAPICHLPR3,pfnUnlock} */
176static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
177{
178 PDMDEV_ASSERT_DEVINS(pDevIns);
179 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
180 pdmUnlock(pDevIns->Internal.s.pVMR3);
181}
182
183
184/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetRCHelpers} */
185static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
186{
187 PDMDEV_ASSERT_DEVINS(pDevIns);
188 PVM pVM = pDevIns->Internal.s.pVMR3;
189 VM_ASSERT_EMT(pVM);
190
191 RTRCPTR pRCHelpers = NIL_RTRCPTR;
192 if (VM_IS_RAW_MODE_ENABLED(pVM))
193 {
194 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
195 AssertReleaseRC(rc);
196 AssertRelease(pRCHelpers);
197 }
198
199 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
200 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
201 return pRCHelpers;
202}
203
204
205/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetR0Helpers} */
206static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
207{
208 PDMDEV_ASSERT_DEVINS(pDevIns);
209 PVM pVM = pDevIns->Internal.s.pVMR3;
210 VM_ASSERT_EMT(pVM);
211 PCPDMIOAPICHLPR0 pR0Helpers = 0;
212 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
213 AssertReleaseRC(rc);
214 AssertRelease(pR0Helpers);
215 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
216 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
217 return pR0Helpers;
218}
219
220
221/**
222 * I/O APIC Device Helpers.
223 */
224const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
225{
226 PDM_IOAPICHLPR3_VERSION,
227 pdmR3IoApicHlp_ApicBusDeliver,
228 pdmR3IoApicHlp_Lock,
229 pdmR3IoApicHlp_Unlock,
230 pdmR3IoApicHlp_GetRCHelpers,
231 pdmR3IoApicHlp_GetR0Helpers,
232 PDM_IOAPICHLPR3_VERSION /* the end */
233};
234
235/** @} */
236
237
238
239
240/** @name Ring-3 PCI Bus Helpers
241 * @{
242 */
243
244/** @interface_method_impl{PDMPCIHLPR3,pfnIsaSetIrq} */
245static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
246{
247 PDMDEV_ASSERT_DEVINS(pDevIns);
248 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
249 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
250}
251
252/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSetIrq} */
253static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
254{
255 PDMDEV_ASSERT_DEVINS(pDevIns);
256 Log4(("pdmR3PciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
257 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
258}
259
260/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSendMsi} */
261static DECLCALLBACK(void) pdmR3PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
262{
263 PDMDEV_ASSERT_DEVINS(pDevIns);
264 Log4(("pdmR3PciHlp_IoApicSendMsi: address=%p value=%x uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
265 PDMIoApicSendMsi(pDevIns->Internal.s.pVMR3, GCPhys, uValue, uTagSrc);
266}
267
268/** @interface_method_impl{PDMPCIHLPR3,pfnIsMMIOExBase} */
269static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
270{
271 PDMDEV_ASSERT_DEVINS(pDevIns);
272 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
273 bool fRc = PGMR3PhysMMIOExIsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
274 Log4(("pdmR3PciHlp_IsMMIOExBase: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
275 return fRc;
276}
277
278
279/** @interface_method_impl{PDMPCIHLPR3,pfnLock} */
280static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
281{
282 PDMDEV_ASSERT_DEVINS(pDevIns);
283 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
284 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
285}
286
287
288/** @interface_method_impl{PDMPCIHLPR3,pfnUnlock} */
289static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
290{
291 PDMDEV_ASSERT_DEVINS(pDevIns);
292 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
293 pdmUnlock(pDevIns->Internal.s.pVMR3);
294}
295
296
297/** @interface_method_impl{PDMPCIHLPR3,pfnGetBusByNo} */
298static DECLCALLBACK(PPDMDEVINS) pdmR3PciHlp_GetBusByNo(PPDMDEVINS pDevIns, uint32_t idxPdmBus)
299{
300 PDMDEV_ASSERT_DEVINS(pDevIns);
301 PVM pVM = pDevIns->Internal.s.pVMR3;
302 AssertReturn(idxPdmBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses), NULL);
303 PPDMDEVINS pRetDevIns = pVM->pdm.s.aPciBuses[idxPdmBus].pDevInsR3;
304 LogFlow(("pdmR3PciHlp_GetBusByNo: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pRetDevIns));
305 return pRetDevIns;
306}
307
308
309/**
310 * PCI Bus Device Helpers.
311 */
312const PDMPCIHLPR3 g_pdmR3DevPciHlp =
313{
314 PDM_PCIHLPR3_VERSION,
315 pdmR3PciHlp_IsaSetIrq,
316 pdmR3PciHlp_IoApicSetIrq,
317 pdmR3PciHlp_IoApicSendMsi,
318 pdmR3PciHlp_IsMMIO2Base,
319 pdmR3PciHlp_Lock,
320 pdmR3PciHlp_Unlock,
321 pdmR3PciHlp_GetBusByNo,
322 PDM_PCIHLPR3_VERSION, /* the end */
323};
324
325/** @} */
326
327
328
329
330/** @name Ring-3 HPET Helpers
331 * {@
332 */
333
334/** @interface_method_impl{PDMHPETHLPR3,pfnSetLegacyMode} */
335static DECLCALLBACK(int) pdmR3HpetHlp_SetLegacyMode(PPDMDEVINS pDevIns, bool fActivated)
336{
337 PDMDEV_ASSERT_DEVINS(pDevIns);
338 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: fActivated=%RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance, fActivated));
339
340 size_t i;
341 int rc = VINF_SUCCESS;
342 static const char * const s_apszDevsToNotify[] =
343 {
344 "i8254",
345 "mc146818"
346 };
347 for (i = 0; i < RT_ELEMENTS(s_apszDevsToNotify); i++)
348 {
349 PPDMIBASE pBase;
350 rc = PDMR3QueryDevice(pDevIns->Internal.s.pVMR3->pUVM, "i8254", 0, &pBase);
351 if (RT_SUCCESS(rc))
352 {
353 PPDMIHPETLEGACYNOTIFY pPort = PDMIBASE_QUERY_INTERFACE(pBase, PDMIHPETLEGACYNOTIFY);
354 AssertLogRelMsgBreakStmt(pPort, ("%s\n", s_apszDevsToNotify[i]), rc = VERR_PDM_HPET_LEGACY_NOTIFY_MISSING);
355 pPort->pfnModeChanged(pPort, fActivated);
356 }
357 else if ( rc == VERR_PDM_DEVICE_NOT_FOUND
358 || rc == VERR_PDM_DEVICE_INSTANCE_NOT_FOUND)
359 rc = VINF_SUCCESS; /* the device isn't configured, ignore. */
360 else
361 AssertLogRelMsgFailedBreak(("%s -> %Rrc\n", s_apszDevsToNotify[i], rc));
362 }
363
364 /* Don't bother cleaning up, any failure here will cause a guru meditation. */
365
366 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
367 return rc;
368}
369
370
371/** @interface_method_impl{PDMHPETHLPR3,pfnSetIrq} */
372static DECLCALLBACK(int) pdmR3HpetHlp_SetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
373{
374 PDMDEV_ASSERT_DEVINS(pDevIns);
375 LogFlow(("pdmR3HpetHlp_SetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
376 PVM pVM = pDevIns->Internal.s.pVMR3;
377
378 pdmLock(pVM);
379 uint32_t uTagSrc;
380 if (iLevel & PDM_IRQ_LEVEL_HIGH)
381 {
382 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
383 if (iLevel == PDM_IRQ_LEVEL_HIGH)
384 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
385 else
386 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
387 }
388 else
389 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
390
391 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
392
393 if (iLevel == PDM_IRQ_LEVEL_LOW)
394 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
395 pdmUnlock(pVM);
396 return 0;
397}
398
399
400/** @interface_method_impl{PDMHPETHLPR3,pfnGetRCHelpers} */
401static DECLCALLBACK(PCPDMHPETHLPRC) pdmR3HpetHlp_GetRCHelpers(PPDMDEVINS pDevIns)
402{
403 PDMDEV_ASSERT_DEVINS(pDevIns);
404 PVM pVM = pDevIns->Internal.s.pVMR3;
405 VM_ASSERT_EMT(pVM);
406
407 RTRCPTR pRCHelpers = NIL_RTRCPTR;
408 if (VM_IS_RAW_MODE_ENABLED(pVM))
409 {
410 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCHpetHlp", &pRCHelpers);
411 AssertReleaseRC(rc);
412 AssertRelease(pRCHelpers);
413 }
414
415 LogFlow(("pdmR3HpetHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
416 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
417 return pRCHelpers;
418}
419
420
421/** @interface_method_impl{PDMHPETHLPR3,pfnGetR0Helpers} */
422static DECLCALLBACK(PCPDMHPETHLPR0) pdmR3HpetHlp_GetR0Helpers(PPDMDEVINS pDevIns)
423{
424 PDMDEV_ASSERT_DEVINS(pDevIns);
425 PVM pVM = pDevIns->Internal.s.pVMR3;
426 VM_ASSERT_EMT(pVM);
427 PCPDMHPETHLPR0 pR0Helpers = 0;
428 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0HpetHlp", &pR0Helpers);
429 AssertReleaseRC(rc);
430 AssertRelease(pR0Helpers);
431 LogFlow(("pdmR3HpetHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
432 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
433 return pR0Helpers;
434}
435
436
437/**
438 * HPET Device Helpers.
439 */
440const PDMHPETHLPR3 g_pdmR3DevHpetHlp =
441{
442 PDM_HPETHLPR3_VERSION,
443 pdmR3HpetHlp_GetRCHelpers,
444 pdmR3HpetHlp_GetR0Helpers,
445 pdmR3HpetHlp_SetLegacyMode,
446 pdmR3HpetHlp_SetIrq,
447 PDM_HPETHLPR3_VERSION, /* the end */
448};
449
450/** @} */
451
452
453/** @name Ring-3 Raw PCI Device Helpers
454 * {@
455 */
456
457/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetRCHelpers} */
458static DECLCALLBACK(PCPDMPCIRAWHLPRC) pdmR3PciRawHlp_GetRCHelpers(PPDMDEVINS pDevIns)
459{
460 PDMDEV_ASSERT_DEVINS(pDevIns);
461 PVM pVM = pDevIns->Internal.s.pVMR3;
462 VM_ASSERT_EMT(pVM);
463
464 RTRCPTR pRCHelpers = NIL_RTRCPTR;
465 if (VM_IS_RAW_MODE_ENABLED(pVM))
466 {
467 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPciRawHlp", &pRCHelpers);
468 AssertReleaseRC(rc);
469 AssertRelease(pRCHelpers);
470 }
471
472 LogFlow(("pdmR3PciRawHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
473 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
474 return pRCHelpers;
475}
476
477
478/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetR0Helpers} */
479static DECLCALLBACK(PCPDMPCIRAWHLPR0) pdmR3PciRawHlp_GetR0Helpers(PPDMDEVINS pDevIns)
480{
481 PDMDEV_ASSERT_DEVINS(pDevIns);
482 PVM pVM = pDevIns->Internal.s.pVMR3;
483 VM_ASSERT_EMT(pVM);
484 PCPDMHPETHLPR0 pR0Helpers = NIL_RTR0PTR;
485 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PciRawHlp", &pR0Helpers);
486 AssertReleaseRC(rc);
487 AssertRelease(pR0Helpers);
488 LogFlow(("pdmR3PciRawHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
489 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
490 return pR0Helpers;
491}
492
493
494/**
495 * Raw PCI Device Helpers.
496 */
497const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp =
498{
499 PDM_PCIRAWHLPR3_VERSION,
500 pdmR3PciRawHlp_GetRCHelpers,
501 pdmR3PciRawHlp_GetR0Helpers,
502 PDM_PCIRAWHLPR3_VERSION, /* the end */
503};
504
505/** @} */
506
507
508/* none yet */
509
510/**
511 * Firmware Device Helpers.
512 */
513const PDMFWHLPR3 g_pdmR3DevFirmwareHlp =
514{
515 PDM_FWHLPR3_VERSION,
516 PDM_FWHLPR3_VERSION
517};
518
519/**
520 * DMAC Device Helpers.
521 */
522const PDMDMACHLP g_pdmR3DevDmacHlp =
523{
524 PDM_DMACHLP_VERSION
525};
526
527
528
529
530/* none yet */
531
532/**
533 * RTC Device Helpers.
534 */
535const PDMRTCHLP g_pdmR3DevRtcHlp =
536{
537 PDM_RTCHLP_VERSION
538};
539
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette