VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp@ 81369

Last change on this file since 81369 was 81369, checked in by vboxsync, 5 years ago

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1/* $Id: PDMDevMiscHlp.cpp 81369 2019-10-18 21:13:03Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/vmm/pdm.h>
25#include <VBox/vmm/pgm.h>
26#include <VBox/vmm/hm.h>
27#include <VBox/vmm/apic.h>
28#include <VBox/vmm/vm.h>
29#include <VBox/vmm/vmm.h>
30
31#include <VBox/log.h>
32#include <VBox/err.h>
33#include <iprt/asm.h>
34#include <iprt/assert.h>
35#include <iprt/thread.h>
36
37
38#include "PDMInline.h"
39#include "dtrace/VBoxVMM.h"
40
41
42
43/** @name Ring-3 PIC Helpers
44 * @{
45 */
46
47/** @interface_method_impl{PDMPICHLPR3,pfnSetInterruptFF} */
48static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
49{
50 PDMDEV_ASSERT_DEVINS(pDevIns);
51 PVM pVM = pDevIns->Internal.s.pVMR3;
52 PVMCPU pVCpu = pVM->apCpusR3[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
53
54 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */
55 Assert(pVM->enmVMState != VMSTATE_LOADING || pVM->pdm.s.fStateLoaded);
56
57 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 1 /* u8Level */, VINF_SUCCESS /* rcRZ */);
58}
59
60
61/** @interface_method_impl{PDMPICHLPR3,pfnClearInterruptFF} */
62static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 PVM pVM = pDevIns->Internal.s.pVMR3;
66 PVMCPU pVCpu = pVM->apCpusR3[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
67
68 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */
69 Assert(pVM->enmVMState != VMSTATE_LOADING || pVM->pdm.s.fStateLoaded);
70
71 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 0 /* u8Level */, VINF_SUCCESS /* rcRZ */);
72}
73
74
75/** @interface_method_impl{PDMPICHLPR3,pfnLock} */
76static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
77{
78 PDMDEV_ASSERT_DEVINS(pDevIns);
79 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
80}
81
82
83/** @interface_method_impl{PDMPICHLPR3,pfnUnlock} */
84static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
85{
86 PDMDEV_ASSERT_DEVINS(pDevIns);
87 pdmUnlock(pDevIns->Internal.s.pVMR3);
88}
89
90
91/** @interface_method_impl{PDMPICHLPR3,pfnGetRCHelpers} */
92static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
93{
94 PDMDEV_ASSERT_DEVINS(pDevIns);
95 PVM pVM = pDevIns->Internal.s.pVMR3;
96 VM_ASSERT_EMT(pVM);
97
98 RTRCPTR pRCHelpers = NIL_RTRCPTR;
99 if (VM_IS_RAW_MODE_ENABLED(pVM))
100 {
101 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPicHlp", &pRCHelpers);
102 AssertReleaseRC(rc);
103 AssertRelease(pRCHelpers);
104 }
105
106 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
107 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
108 return pRCHelpers;
109}
110
111
112/** @interface_method_impl{PDMPICHLPR3,pfnGetR0Helpers} */
113static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
114{
115 PDMDEV_ASSERT_DEVINS(pDevIns);
116 PVM pVM = pDevIns->Internal.s.pVMR3;
117 VM_ASSERT_EMT(pVM);
118 PCPDMPICHLPR0 pR0Helpers = 0;
119 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PicHlp", &pR0Helpers);
120 AssertReleaseRC(rc);
121 AssertRelease(pR0Helpers);
122 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
123 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
124 return pR0Helpers;
125}
126
127
128/**
129 * PIC Device Helpers.
130 */
131const PDMPICHLPR3 g_pdmR3DevPicHlp =
132{
133 PDM_PICHLPR3_VERSION,
134 pdmR3PicHlp_SetInterruptFF,
135 pdmR3PicHlp_ClearInterruptFF,
136 pdmR3PicHlp_Lock,
137 pdmR3PicHlp_Unlock,
138 pdmR3PicHlp_GetRCHelpers,
139 pdmR3PicHlp_GetR0Helpers,
140 PDM_PICHLPR3_VERSION /* the end */
141};
142
143/** @} */
144
145
146/** @name Ring-3 I/O APIC Helpers
147 * @{
148 */
149
150/** @interface_method_impl{PDMIOAPICHLPR3,pfnApicBusDeliver} */
151static DECLCALLBACK(int) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
152 uint8_t u8DeliveryMode, uint8_t uVector, uint8_t u8Polarity,
153 uint8_t u8TriggerMode, uint32_t uTagSrc)
154{
155 PDMDEV_ASSERT_DEVINS(pDevIns);
156 PVM pVM = pDevIns->Internal.s.pVMR3;
157 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 uVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
158 pDevIns->pReg->szName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc));
159 return APICBusDeliver(pVM, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc);
160}
161
162
163/** @interface_method_impl{PDMIOAPICHLPR3,pfnLock} */
164static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
165{
166 PDMDEV_ASSERT_DEVINS(pDevIns);
167 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
168 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
169}
170
171
172/** @interface_method_impl{PDMIOAPICHLPR3,pfnUnlock} */
173static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
174{
175 PDMDEV_ASSERT_DEVINS(pDevIns);
176 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
177 pdmUnlock(pDevIns->Internal.s.pVMR3);
178}
179
180
181/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetRCHelpers} */
182static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 PVM pVM = pDevIns->Internal.s.pVMR3;
186 VM_ASSERT_EMT(pVM);
187
188 RTRCPTR pRCHelpers = NIL_RTRCPTR;
189 if (VM_IS_RAW_MODE_ENABLED(pVM))
190 {
191 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
192 AssertReleaseRC(rc);
193 AssertRelease(pRCHelpers);
194 }
195
196 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
197 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
198 return pRCHelpers;
199}
200
201
202/** @interface_method_impl{PDMIOAPICHLPR3,pfnGetR0Helpers} */
203static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
204{
205 PDMDEV_ASSERT_DEVINS(pDevIns);
206 PVM pVM = pDevIns->Internal.s.pVMR3;
207 VM_ASSERT_EMT(pVM);
208 PCPDMIOAPICHLPR0 pR0Helpers = 0;
209 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
210 AssertReleaseRC(rc);
211 AssertRelease(pR0Helpers);
212 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
213 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
214 return pR0Helpers;
215}
216
217
218/**
219 * I/O APIC Device Helpers.
220 */
221const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
222{
223 PDM_IOAPICHLPR3_VERSION,
224 pdmR3IoApicHlp_ApicBusDeliver,
225 pdmR3IoApicHlp_Lock,
226 pdmR3IoApicHlp_Unlock,
227 pdmR3IoApicHlp_GetRCHelpers,
228 pdmR3IoApicHlp_GetR0Helpers,
229 PDM_IOAPICHLPR3_VERSION /* the end */
230};
231
232/** @} */
233
234
235
236
237/** @name Ring-3 PCI Bus Helpers
238 * @{
239 */
240
241/** @interface_method_impl{PDMPCIHLPR3,pfnIsaSetIrq} */
242static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
243{
244 PDMDEV_ASSERT_DEVINS(pDevIns);
245 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
246 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
247}
248
249/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSetIrq} */
250static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
251{
252 PDMDEV_ASSERT_DEVINS(pDevIns);
253 Log4(("pdmR3PciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
254 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel, uTagSrc);
255}
256
257/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSendMsi} */
258static DECLCALLBACK(void) pdmR3PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
259{
260 PDMDEV_ASSERT_DEVINS(pDevIns);
261 Log4(("pdmR3PciHlp_IoApicSendMsi: address=%p value=%x uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
262 PDMIoApicSendMsi(pDevIns->Internal.s.pVMR3, GCPhys, uValue, uTagSrc);
263}
264
265/** @interface_method_impl{PDMPCIHLPR3,pfnIsMMIOExBase} */
266static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
267{
268 PDMDEV_ASSERT_DEVINS(pDevIns);
269 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
270 bool fRc = PGMR3PhysMMIOExIsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
271 Log4(("pdmR3PciHlp_IsMMIOExBase: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
272 return fRc;
273}
274
275
276/** @interface_method_impl{PDMPCIHLPR3,pfnLock} */
277static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
278{
279 PDMDEV_ASSERT_DEVINS(pDevIns);
280 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
281 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
282}
283
284
285/** @interface_method_impl{PDMPCIHLPR3,pfnUnlock} */
286static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
287{
288 PDMDEV_ASSERT_DEVINS(pDevIns);
289 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
290 pdmUnlock(pDevIns->Internal.s.pVMR3);
291}
292
293
294/** @interface_method_impl{PDMPCIHLPR3,pfnGetBusByNo} */
295static DECLCALLBACK(PPDMDEVINS) pdmR3PciHlp_GetBusByNo(PPDMDEVINS pDevIns, uint32_t idxPdmBus)
296{
297 PDMDEV_ASSERT_DEVINS(pDevIns);
298 PVM pVM = pDevIns->Internal.s.pVMR3;
299 AssertReturn(idxPdmBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses), NULL);
300 PPDMDEVINS pRetDevIns = pVM->pdm.s.aPciBuses[idxPdmBus].pDevInsR3;
301 LogFlow(("pdmR3PciHlp_GetBusByNo: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pRetDevIns));
302 return pRetDevIns;
303}
304
305
306/**
307 * PCI Bus Device Helpers.
308 */
309const PDMPCIHLPR3 g_pdmR3DevPciHlp =
310{
311 PDM_PCIHLPR3_VERSION,
312 pdmR3PciHlp_IsaSetIrq,
313 pdmR3PciHlp_IoApicSetIrq,
314 pdmR3PciHlp_IoApicSendMsi,
315 pdmR3PciHlp_IsMMIO2Base,
316 pdmR3PciHlp_Lock,
317 pdmR3PciHlp_Unlock,
318 pdmR3PciHlp_GetBusByNo,
319 PDM_PCIHLPR3_VERSION, /* the end */
320};
321
322/** @} */
323
324
325
326
327/** @name Ring-3 HPET Helpers
328 * @{
329 */
330
331/** @interface_method_impl{PDMHPETHLPR3,pfnSetLegacyMode} */
332static DECLCALLBACK(int) pdmR3HpetHlp_SetLegacyMode(PPDMDEVINS pDevIns, bool fActivated)
333{
334 PDMDEV_ASSERT_DEVINS(pDevIns);
335 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: fActivated=%RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance, fActivated));
336
337 size_t i;
338 int rc = VINF_SUCCESS;
339 static const char * const s_apszDevsToNotify[] =
340 {
341 "i8254",
342 "mc146818"
343 };
344 for (i = 0; i < RT_ELEMENTS(s_apszDevsToNotify); i++)
345 {
346 PPDMIBASE pBase;
347 rc = PDMR3QueryDevice(pDevIns->Internal.s.pVMR3->pUVM, "i8254", 0, &pBase);
348 if (RT_SUCCESS(rc))
349 {
350 PPDMIHPETLEGACYNOTIFY pPort = PDMIBASE_QUERY_INTERFACE(pBase, PDMIHPETLEGACYNOTIFY);
351 AssertLogRelMsgBreakStmt(pPort, ("%s\n", s_apszDevsToNotify[i]), rc = VERR_PDM_HPET_LEGACY_NOTIFY_MISSING);
352 pPort->pfnModeChanged(pPort, fActivated);
353 }
354 else if ( rc == VERR_PDM_DEVICE_NOT_FOUND
355 || rc == VERR_PDM_DEVICE_INSTANCE_NOT_FOUND)
356 rc = VINF_SUCCESS; /* the device isn't configured, ignore. */
357 else
358 AssertLogRelMsgFailedBreak(("%s -> %Rrc\n", s_apszDevsToNotify[i], rc));
359 }
360
361 /* Don't bother cleaning up, any failure here will cause a guru meditation. */
362
363 LogFlow(("pdmR3HpetHlp_SetLegacyMode: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
364 return rc;
365}
366
367
368/** @interface_method_impl{PDMHPETHLPR3,pfnSetIrq} */
369static DECLCALLBACK(int) pdmR3HpetHlp_SetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
370{
371 PDMDEV_ASSERT_DEVINS(pDevIns);
372 LogFlow(("pdmR3HpetHlp_SetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
373 PVM pVM = pDevIns->Internal.s.pVMR3;
374
375 pdmLock(pVM);
376 uint32_t uTagSrc;
377 if (iLevel & PDM_IRQ_LEVEL_HIGH)
378 {
379 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
380 if (iLevel == PDM_IRQ_LEVEL_HIGH)
381 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
382 else
383 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
384 }
385 else
386 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
387
388 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
389
390 if (iLevel == PDM_IRQ_LEVEL_LOW)
391 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
392 pdmUnlock(pVM);
393 return 0;
394}
395
396
397/** @interface_method_impl{PDMHPETHLPR3,pfnGetRCHelpers} */
398static DECLCALLBACK(PCPDMHPETHLPRC) pdmR3HpetHlp_GetRCHelpers(PPDMDEVINS pDevIns)
399{
400 PDMDEV_ASSERT_DEVINS(pDevIns);
401 PVM pVM = pDevIns->Internal.s.pVMR3;
402 VM_ASSERT_EMT(pVM);
403
404 RTRCPTR pRCHelpers = NIL_RTRCPTR;
405 if (VM_IS_RAW_MODE_ENABLED(pVM))
406 {
407 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCHpetHlp", &pRCHelpers);
408 AssertReleaseRC(rc);
409 AssertRelease(pRCHelpers);
410 }
411
412 LogFlow(("pdmR3HpetHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
413 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
414 return pRCHelpers;
415}
416
417
418/** @interface_method_impl{PDMHPETHLPR3,pfnGetR0Helpers} */
419static DECLCALLBACK(PCPDMHPETHLPR0) pdmR3HpetHlp_GetR0Helpers(PPDMDEVINS pDevIns)
420{
421 PDMDEV_ASSERT_DEVINS(pDevIns);
422 PVM pVM = pDevIns->Internal.s.pVMR3;
423 VM_ASSERT_EMT(pVM);
424 PCPDMHPETHLPR0 pR0Helpers = 0;
425 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0HpetHlp", &pR0Helpers);
426 AssertReleaseRC(rc);
427 AssertRelease(pR0Helpers);
428 LogFlow(("pdmR3HpetHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
429 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
430 return pR0Helpers;
431}
432
433
434/**
435 * HPET Device Helpers.
436 */
437const PDMHPETHLPR3 g_pdmR3DevHpetHlp =
438{
439 PDM_HPETHLPR3_VERSION,
440 pdmR3HpetHlp_GetRCHelpers,
441 pdmR3HpetHlp_GetR0Helpers,
442 pdmR3HpetHlp_SetLegacyMode,
443 pdmR3HpetHlp_SetIrq,
444 PDM_HPETHLPR3_VERSION, /* the end */
445};
446
447/** @} */
448
449
450/** @name Ring-3 Raw PCI Device Helpers
451 * @{
452 */
453
454/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetRCHelpers} */
455static DECLCALLBACK(PCPDMPCIRAWHLPRC) pdmR3PciRawHlp_GetRCHelpers(PPDMDEVINS pDevIns)
456{
457 PDMDEV_ASSERT_DEVINS(pDevIns);
458 PVM pVM = pDevIns->Internal.s.pVMR3;
459 VM_ASSERT_EMT(pVM);
460
461 RTRCPTR pRCHelpers = NIL_RTRCPTR;
462 if (VM_IS_RAW_MODE_ENABLED(pVM))
463 {
464 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_pdmRCPciRawHlp", &pRCHelpers);
465 AssertReleaseRC(rc);
466 AssertRelease(pRCHelpers);
467 }
468
469 LogFlow(("pdmR3PciRawHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
470 pDevIns->pReg->szName, pDevIns->iInstance, pRCHelpers));
471 return pRCHelpers;
472}
473
474
475/** @interface_method_impl{PDMPCIRAWHLPR3,pfnGetR0Helpers} */
476static DECLCALLBACK(PCPDMPCIRAWHLPR0) pdmR3PciRawHlp_GetR0Helpers(PPDMDEVINS pDevIns)
477{
478 PDMDEV_ASSERT_DEVINS(pDevIns);
479 PVM pVM = pDevIns->Internal.s.pVMR3;
480 VM_ASSERT_EMT(pVM);
481 PCPDMHPETHLPR0 pR0Helpers = NIL_RTR0PTR;
482 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "g_pdmR0PciRawHlp", &pR0Helpers);
483 AssertReleaseRC(rc);
484 AssertRelease(pR0Helpers);
485 LogFlow(("pdmR3PciRawHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
486 pDevIns->pReg->szName, pDevIns->iInstance, pR0Helpers));
487 return pR0Helpers;
488}
489
490
491/**
492 * Raw PCI Device Helpers.
493 */
494const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp =
495{
496 PDM_PCIRAWHLPR3_VERSION,
497 pdmR3PciRawHlp_GetRCHelpers,
498 pdmR3PciRawHlp_GetR0Helpers,
499 PDM_PCIRAWHLPR3_VERSION, /* the end */
500};
501
502/** @} */
503
504
505/* none yet */
506
507/**
508 * Firmware Device Helpers.
509 */
510const PDMFWHLPR3 g_pdmR3DevFirmwareHlp =
511{
512 PDM_FWHLPR3_VERSION,
513 PDM_FWHLPR3_VERSION
514};
515
516/**
517 * DMAC Device Helpers.
518 */
519const PDMDMACHLP g_pdmR3DevDmacHlp =
520{
521 PDM_DMACHLP_VERSION
522};
523
524
525
526
527/* none yet */
528
529/**
530 * RTC Device Helpers.
531 */
532const PDMRTCHLP g_pdmR3DevRtcHlp =
533{
534 PDM_RTCHLP_VERSION
535};
536
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