PGMDbg.cpp@ 57329

Last change on this file since 57329 was 57126, checked in by vboxsync, 9 years ago
VMM: Optimizations for memory scanning, trying to make 'detect' run faster against 64-bit guest systems.
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File size: 103.4 KB

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1	/* $Id: PGMDbg.cpp 57126 2015-07-30 10:17:57Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor - Debugger & Debugging APIs.
4	*/
5
6	/*
7	* Copyright (C) 2006-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/*******************************************************************************
19	* Header Files *
20	*******************************************************************************/
21	#define LOG_GROUP LOG_GROUP_PGM
22	#include <VBox/vmm/pgm.h>
23	#include <VBox/vmm/stam.h>
24	#include "PGMInternal.h"
25	#include <VBox/vmm/vm.h>
26	#include <VBox/vmm/uvm.h>
27	#include "PGMInline.h"
28	#include <iprt/assert.h>
29	#include <iprt/asm.h>
30	#include <iprt/string.h>
31	#include <VBox/log.h>
32	#include <VBox/param.h>
33	#include <VBox/err.h>
34
35
36	/*******************************************************************************
37	* Defined Constants And Macros *
38	*******************************************************************************/
39	/** The max needle size that we will bother searching for
40	* This must not be more than half a page! */
41	#define MAX_NEEDLE_SIZE 256
42
43
44	/*******************************************************************************
45	* Structures and Typedefs *
46	*******************************************************************************/
47	/**
48	* State structure for the paging hierarchy dumpers.
49	*/
50	typedef struct PGMR3DUMPHIERARCHYSTATE
51	{
52	/** Pointer to the VM. */
53	PVM pVM;
54	/** Output helpers. */
55	PCDBGFINFOHLP pHlp;
56	/** Set if PSE, PAE or long mode is enabled. */
57	bool fPse;
58	/** Set if PAE or long mode is enabled. */
59	bool fPae;
60	/** Set if long mode is enabled. */
61	bool fLme;
62	/** Set if nested paging. */
63	bool fNp;
64	/** Set if EPT. */
65	bool fEpt;
66	/** Set if NXE is enabled. */
67	bool fNxe;
68	/** The number or chars the address needs. */
69	uint8_t cchAddress;
70	/** The last reserved bit. */
71	uint8_t uLastRsvdBit;
72	/** Dump the page info as well (shadow page summary / guest physical
73	* page summary). */
74	bool fDumpPageInfo;
75	/** Whether or not to print the header. */
76	bool fPrintHeader;
77	/** Whether to print the CR3 value */
78	bool fPrintCr3;
79	/** Padding*/
80	bool afReserved[5];
81	/** The current address. */
82	uint64_t u64Address;
83	/** The last address to dump structures for. */
84	uint64_t u64FirstAddress;
85	/** The last address to dump structures for. */
86	uint64_t u64LastAddress;
87	/** Mask with the high reserved bits set. */
88	uint64_t u64HighReservedBits;
89	/** The number of leaf entries that we've printed. */
90	uint64_t cLeaves;
91	} PGMR3DUMPHIERARCHYSTATE;
92	/** Pointer to the paging hierarchy dumper state. */
93	typedef PGMR3DUMPHIERARCHYSTATE *PPGMR3DUMPHIERARCHYSTATE;
94
95
96	/**
97	* Assembly scanning function.
98	*
99	* @returns Pointer to possible match or NULL.
100	* @param pvHaystack Pointer to what we search in.
101	* @param cbHaystack Number of bytes to search.
102	* @param pvNeedle Pointer to what we search for.
103	* @param cbNeedle Size of what we're searching for.
104	*/
105	typedef DECLCALLBACK(uint8_t const ) FNPGMR3DBGFIXEDMEMSCAN(void const pvHaystack, uint32_t cbHaystack,
106	void const *pvNeedle, size_t cbNeedle);
107	/** Pointer to an fixed size and step assembly scanner function. */
108	typedef FNPGMR3DBGFIXEDMEMSCAN *PFNPGMR3DBGFIXEDMEMSCAN;
109
110
111	/*******************************************************************************
112	* Internal Functions *
113	*******************************************************************************/
114	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan8Wide8Step(void const , uint32_t, void const *, size_t cbNeedle);
115	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan4Wide4Step(void const , uint32_t, void const *, size_t cbNeedle);
116	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan2Wide2Step(void const , uint32_t, void const *, size_t cbNeedle);
117	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan1Wide1Step(void const , uint32_t, void const *, size_t cbNeedle);
118	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan4Wide1Step(void const , uint32_t, void const *, size_t cbNeedle);
119	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan8Wide1Step(void const , uint32_t, void const *, size_t cbNeedle);
120
121
122	/**
123	* Converts a R3 pointer to a GC physical address.
124	*
125	* Only for the debugger.
126	*
127	* @returns VBox status code.
128	* @retval VINF_SUCCESS on success, *pGCPhys is set.
129	* @retval VERR_INVALID_POINTER if the pointer is not within the GC physical memory.
130	*
131	* @param pUVM The user mode VM handle.
132	* @param R3Ptr The R3 pointer to convert.
133	* @param pGCPhys Where to store the GC physical address on success.
134	*/
135	VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys)
136	{
137	NOREF(pUVM); NOREF(R3Ptr);
138	*pGCPhys = NIL_RTGCPHYS;
139	return VERR_NOT_IMPLEMENTED;
140	}
141
142
143	/**
144	* Converts a R3 pointer to a HC physical address.
145	*
146	* Only for the debugger.
147	*
148	* @returns VBox status code.
149	* @retval VINF_SUCCESS on success, *pHCPhys is set.
150	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical page but has no physical backing.
151	* @retval VERR_INVALID_POINTER if the pointer is not within the GC physical memory.
152	*
153	* @param pUVM The user mode VM handle.
154	* @param R3Ptr The R3 pointer to convert.
155	* @param pHCPhys Where to store the HC physical address on success.
156	*/
157	VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys)
158	{
159	NOREF(pUVM); NOREF(R3Ptr);
160	*pHCPhys = NIL_RTHCPHYS;
161	return VERR_NOT_IMPLEMENTED;
162	}
163
164
165	/**
166	* Converts a HC physical address to a GC physical address.
167	*
168	* Only for the debugger.
169	*
170	* @returns VBox status code
171	* @retval VINF_SUCCESS on success, *pGCPhys is set.
172	* @retval VERR_INVALID_POINTER if the HC physical address is not within the GC physical memory.
173	*
174	* @param pUVM The user mode VM handle.
175	* @param HCPhys The HC physical address to convert.
176	* @param pGCPhys Where to store the GC physical address on success.
177	*/
178	VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PUVM pUVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys)
179	{
180	UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
181	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
182
183	/*
184	* Validate and adjust the input a bit.
185	*/
186	if (HCPhys == NIL_RTHCPHYS)
187	return VERR_INVALID_POINTER;
188	unsigned off = HCPhys & PAGE_OFFSET_MASK;
189	HCPhys &= X86_PTE_PAE_PG_MASK;
190	if (HCPhys == 0)
191	return VERR_INVALID_POINTER;
192
193	for (PPGMRAMRANGE pRam = pUVM->pVM->pgm.s.CTX_SUFF(pRamRangesX);
194	pRam;
195	pRam = pRam->CTX_SUFF(pNext))
196	{
197	uint32_t iPage = pRam->cb >> PAGE_SHIFT;
198	while (iPage-- > 0)
199	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
200	{
201	*pGCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT) + off;
202	return VINF_SUCCESS;
203	}
204	}
205	return VERR_INVALID_POINTER;
206	}
207
208
209	/**
210	* Read physical memory API for the debugger, similar to
211	* PGMPhysSimpleReadGCPhys.
212	*
213	* @returns VBox status code.
214	*
215	* @param pVM Pointer to the VM.
216	* @param pvDst Where to store what's read.
217	* @param GCPhysDst Where to start reading from.
218	* @param cb The number of bytes to attempt reading.
219	* @param fFlags Flags, MBZ.
220	* @param pcbRead For store the actual number of bytes read, pass NULL if
221	* partial reads are unwanted.
222	* @todo Unused?
223	*/
224	VMMR3_INT_DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t pcbRead)
225	{
226	/* validate */
227	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
228	AssertReturn(pVM, VERR_INVALID_PARAMETER);
229
230	/* try simple first. */
231	int rc = PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc, cb);
232	if (RT_SUCCESS(rc) \|\| !pcbRead)
233	return rc;
234
235	/* partial read that failed, chop it up in pages. */
236	*pcbRead = 0;
237	rc = VINF_SUCCESS;
238	while (cb > 0)
239	{
240	size_t cbChunk = PAGE_SIZE;
241	cbChunk -= GCPhysSrc & PAGE_OFFSET_MASK;
242	if (cbChunk > cb)
243	cbChunk = cb;
244
245	rc = PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc, cbChunk);
246
247	/* advance */
248	if (RT_FAILURE(rc))
249	break;
250	*pcbRead += cbChunk;
251	cb -= cbChunk;
252	GCPhysSrc += cbChunk;
253	pvDst = (uint8_t *)pvDst + cbChunk;
254	}
255
256	return *pcbRead && RT_FAILURE(rc) ? -rc : rc;
257	}
258
259
260	/**
261	* Write physical memory API for the debugger, similar to
262	* PGMPhysSimpleWriteGCPhys.
263	*
264	* @returns VBox status code.
265	*
266	* @param pVM Pointer to the VM.
267	* @param GCPhysDst Where to start writing.
268	* @param pvSrc What to write.
269	* @param cb The number of bytes to attempt writing.
270	* @param fFlags Flags, MBZ.
271	* @param pcbWritten For store the actual number of bytes written, pass NULL
272	* if partial writes are unwanted.
273	* @todo Unused?
274	*/
275	VMMR3_INT_DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void pvSrc, size_t cb, uint32_t fFlags, size_t pcbWritten)
276	{
277	/* validate */
278	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
279	AssertReturn(pVM, VERR_INVALID_PARAMETER);
280
281	/* try simple first. */
282	int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysDst, pvSrc, cb);
283	if (RT_SUCCESS(rc) \|\| !pcbWritten)
284	return rc;
285
286	/* partial write that failed, chop it up in pages. */
287	*pcbWritten = 0;
288	rc = VINF_SUCCESS;
289	while (cb > 0)
290	{
291	size_t cbChunk = PAGE_SIZE;
292	cbChunk -= GCPhysDst & PAGE_OFFSET_MASK;
293	if (cbChunk > cb)
294	cbChunk = cb;
295
296	rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysDst, pvSrc, cbChunk);
297
298	/* advance */
299	if (RT_FAILURE(rc))
300	break;
301	*pcbWritten += cbChunk;
302	cb -= cbChunk;
303	GCPhysDst += cbChunk;
304	pvSrc = (uint8_t const *)pvSrc + cbChunk;
305	}
306
307	return *pcbWritten && RT_FAILURE(rc) ? -rc : rc;
308
309	}
310
311
312	/**
313	* Read virtual memory API for the debugger, similar to PGMPhysSimpleReadGCPtr.
314	*
315	* @returns VBox status code.
316	*
317	* @param pVM Pointer to the VM.
318	* @param pvDst Where to store what's read.
319	* @param GCPtrDst Where to start reading from.
320	* @param cb The number of bytes to attempt reading.
321	* @param fFlags Flags, MBZ.
322	* @param pcbRead For store the actual number of bytes read, pass NULL if
323	* partial reads are unwanted.
324	* @todo Unused?
325	*/
326	VMMR3_INT_DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t pcbRead)
327	{
328	/* validate */
329	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
330	AssertReturn(pVM, VERR_INVALID_PARAMETER);
331
332	/* @todo SMP support! */
333	PVMCPU pVCpu = &pVM->aCpus[0];
334
335	/** @todo deal with HMA */
336	/* try simple first. */
337	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCPtrSrc, cb);
338	if (RT_SUCCESS(rc) \|\| !pcbRead)
339	return rc;
340
341	/* partial read that failed, chop it up in pages. */
342	*pcbRead = 0;
343	rc = VINF_SUCCESS;
344	while (cb > 0)
345	{
346	size_t cbChunk = PAGE_SIZE;
347	cbChunk -= GCPtrSrc & PAGE_OFFSET_MASK;
348	if (cbChunk > cb)
349	cbChunk = cb;
350
351	rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCPtrSrc, cbChunk);
352
353	/* advance */
354	if (RT_FAILURE(rc))
355	break;
356	*pcbRead += cbChunk;
357	cb -= cbChunk;
358	GCPtrSrc += cbChunk;
359	pvDst = (uint8_t *)pvDst + cbChunk;
360	}
361
362	return *pcbRead && RT_FAILURE(rc) ? -rc : rc;
363
364	}
365
366
367	/**
368	* Write virtual memory API for the debugger, similar to
369	* PGMPhysSimpleWriteGCPtr.
370	*
371	* @returns VBox status code.
372	*
373	* @param pVM Pointer to the VM.
374	* @param GCPtrDst Where to start writing.
375	* @param pvSrc What to write.
376	* @param cb The number of bytes to attempt writing.
377	* @param fFlags Flags, MBZ.
378	* @param pcbWritten For store the actual number of bytes written, pass NULL
379	* if partial writes are unwanted.
380	* @todo Unused?
381	*/
382	VMMR3_INT_DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const pvSrc, size_t cb, uint32_t fFlags, size_t pcbWritten)
383	{
384	/* validate */
385	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
386	AssertReturn(pVM, VERR_INVALID_PARAMETER);
387
388	/* @todo SMP support! */
389	PVMCPU pVCpu = &pVM->aCpus[0];
390
391	/** @todo deal with HMA */
392	/* try simple first. */
393	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb);
394	if (RT_SUCCESS(rc) \|\| !pcbWritten)
395	return rc;
396
397	/* partial write that failed, chop it up in pages. */
398	*pcbWritten = 0;
399	rc = VINF_SUCCESS;
400	while (cb > 0)
401	{
402	size_t cbChunk = PAGE_SIZE;
403	cbChunk -= GCPtrDst & PAGE_OFFSET_MASK;
404	if (cbChunk > cb)
405	cbChunk = cb;
406
407	rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cbChunk);
408
409	/* advance */
410	if (RT_FAILURE(rc))
411	break;
412	*pcbWritten += cbChunk;
413	cb -= cbChunk;
414	GCPtrDst += cbChunk;
415	pvSrc = (uint8_t const *)pvSrc + cbChunk;
416	}
417
418	return *pcbWritten && RT_FAILURE(rc) ? -rc : rc;
419
420	}
421
422
423	/**
424	* memchr() with alignment considerations.
425	*
426	* @returns Pointer to matching byte, NULL if none found.
427	* @param pb Where to search. Aligned.
428	* @param b What to search for.
429	* @param cb How much to search .
430	* @param uAlign The alignment restriction of the result.
431	*/
432	static const uint8_t pgmR3DbgAlignedMemChr(const uint8_t pb, uint8_t b, size_t cb, uint32_t uAlign)
433	{
434	const uint8_t *pbRet;
435	if (uAlign <= 32)
436	{
437	pbRet = (const uint8_t *)memchr(pb, b, cb);
438	if ((uintptr_t)pbRet & (uAlign - 1))
439	{
440	do
441	{
442	pbRet++;
443	size_t cbLeft = cb - (pbRet - pb);
444	if (!cbLeft)
445	{
446	pbRet = NULL;
447	break;
448	}
449	pbRet = (const uint8_t *)memchr(pbRet, b, cbLeft);
450	} while ((uintptr_t)pbRet & (uAlign - 1));
451	}
452	}
453	else
454	{
455	pbRet = NULL;
456	if (cb)
457	{
458	for (;;)
459	{
460	if (*pb == b)
461	{
462	pbRet = pb;
463	break;
464	}
465	if (cb <= uAlign)
466	break;
467	cb -= uAlign;
468	pb += uAlign;
469	}
470	}
471	}
472	return pbRet;
473	}
474
475
476	/**
477	* Scans a page for a byte string, keeping track of potential
478	* cross page matches.
479	*
480	* @returns true and *poff on match.
481	* false on mismatch.
482	* @param pbPage Pointer to the current page.
483	* @param poff Input: The offset into the page (aligned).
484	* Output: The page offset of the match on success.
485	* @param cb The number of bytes to search, starting of *poff.
486	* @param uAlign The needle alignment. This is of course less than a page.
487	* @param pabNeedle The byte string to search for.
488	* @param cbNeedle The length of the byte string.
489	* @param pabPrev The buffer that keeps track of a partial match that we
490	* bring over from the previous page. This buffer must be
491	* at least cbNeedle - 1 big.
492	* @param pcbPrev Input: The number of partial matching bytes from the previous page.
493	* Output: The number of partial matching bytes from this page.
494	* Initialize to 0 before the first call to this function.
495	*/
496	static bool pgmR3DbgScanPage(const uint8_t pbPage, int32_t poff, uint32_t cb, uint32_t uAlign,
497	const uint8_t *pabNeedle, size_t cbNeedle, PFNPGMR3DBGFIXEDMEMSCAN pfnFixedMemScan,
498	uint8_t pabPrev, size_t pcbPrev)
499	{
500	/*
501	* Try complete any partial match from the previous page.
502	*/
503	if (*pcbPrev > 0)
504	{
505	size_t cbPrev = *pcbPrev;
506	Assert(!*poff);
507	Assert(cbPrev < cbNeedle);
508	if (!memcmp(pbPage, pabNeedle + cbPrev, cbNeedle - cbPrev))
509	{
510	if (cbNeedle - cbPrev > cb)
511	return false;
512	*poff = -(int32_t)cbPrev;
513	return true;
514	}
515
516	/* check out the remainder of the previous page. */
517	const uint8_t *pb = pabPrev;
518	for (;;)
519	{
520	if (cbPrev <= uAlign)
521	break;
522	cbPrev -= uAlign;
523	pb = pgmR3DbgAlignedMemChr(pb + uAlign, *pabNeedle, cbPrev, uAlign);
524	if (!pb)
525	break;
526	cbPrev = *pcbPrev - (pb - pabPrev);
527	if ( !memcmp(pb + 1, &pabNeedle[1], cbPrev - 1)
528	&& !memcmp(pbPage, pabNeedle + cbPrev, cbNeedle - cbPrev))
529	{
530	if (cbNeedle - cbPrev > cb)
531	return false;
532	*poff = -(int32_t)cbPrev;
533	return true;
534	}
535	}
536
537	*pcbPrev = 0;
538	}
539
540	/*
541	* Match the body of the page.
542	*/
543	const uint8_t pb = pbPage + poff;
544	const uint8_t * const pbEnd = pb + cb;
545	for (;;)
546	{
547	AssertMsg(((uintptr_t)pb & (uAlign - 1)) == 0, ("%#p %#x\n", pb, uAlign));
548	if (pfnFixedMemScan)
549	pb = pfnFixedMemScan(pb, cb, pabNeedle, cbNeedle);
550	else
551	pb = pgmR3DbgAlignedMemChr(pb, *pabNeedle, cb, uAlign);
552	if (!pb)
553	break;
554	cb = pbEnd - pb;
555	if (cb >= cbNeedle)
556	{
557	/* match? */
558	if (!memcmp(pb + 1, &pabNeedle[1], cbNeedle - 1))
559	{
560	*poff = pb - pbPage;
561	return true;
562	}
563	}
564	else
565	{
566	/* partial match at the end of the page? */
567	if (!memcmp(pb + 1, &pabNeedle[1], cb - 1))
568	{
569	/* We're copying one byte more that we really need here, but wtf. */
570	memcpy(pabPrev, pb, cb);
571	*pcbPrev = cb;
572	return false;
573	}
574	}
575
576	/* no match, skip ahead. */
577	if (cb <= uAlign)
578	break;
579	pb += uAlign;
580	cb -= uAlign;
581	}
582
583	return false;
584	}
585
586
587	static void pgmR3DbgSelectMemScanFunction(PFNPGMR3DBGFIXEDMEMSCAN *ppfnMemScan, uint32_t GCPhysAlign, size_t cbNeedle)
588	{
589	*ppfnMemScan = NULL;
590	switch (GCPhysAlign)
591	{
592	case 1:
593	if (cbNeedle >= 8)
594	*ppfnMemScan = pgmR3DbgFixedMemScan8Wide1Step;
595	else if (cbNeedle >= 4)
596	*ppfnMemScan = pgmR3DbgFixedMemScan8Wide1Step;
597	else
598	*ppfnMemScan = pgmR3DbgFixedMemScan1Wide1Step;
599	break;
600	case 2:
601	if (cbNeedle >= 2)
602	*ppfnMemScan = pgmR3DbgFixedMemScan2Wide2Step;
603	break;
604	case 4:
605	if (cbNeedle >= 4)
606	*ppfnMemScan = pgmR3DbgFixedMemScan4Wide4Step;
607	break;
608	case 8:
609	if (cbNeedle >= 8)
610	*ppfnMemScan = pgmR3DbgFixedMemScan8Wide8Step;
611	break;
612	}
613	}
614
615
616
617	/**
618	* Scans guest physical memory for a byte string.
619	*
620	* @returns VBox status codes:
621	* @retval VINF_SUCCESS and *pGCPtrHit on success.
622	* @retval VERR_DBGF_MEM_NOT_FOUND if not found.
623	* @retval VERR_INVALID_POINTER if any of the pointer arguments are invalid.
624	* @retval VERR_INVALID_ARGUMENT if any other arguments are invalid.
625	*
626	* @param pVM Pointer to the VM.
627	* @param GCPhys Where to start searching.
628	* @param cbRange The number of bytes to search.
629	* @param GCPhysAlign The alignment of the needle. Must be a power of two
630	* and less or equal to 4GB.
631	* @param pabNeedle The byte string to search for.
632	* @param cbNeedle The length of the byte string. Max 256 bytes.
633	* @param pGCPhysHit Where to store the address of the first occurrence on success.
634	*/
635	VMMR3_INT_DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, RTGCPHYS GCPhysAlign,
636	const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit)
637	{
638	/*
639	* Validate and adjust the input a bit.
640	*/
641	if (!VALID_PTR(pGCPhysHit))
642	return VERR_INVALID_POINTER;
643	*pGCPhysHit = NIL_RTGCPHYS;
644
645	if ( !VALID_PTR(pabNeedle)
646	\|\| GCPhys == NIL_RTGCPHYS)
647	return VERR_INVALID_POINTER;
648	if (!cbNeedle)
649	return VERR_INVALID_PARAMETER;
650	if (cbNeedle > MAX_NEEDLE_SIZE)
651	return VERR_INVALID_PARAMETER;
652
653	if (!cbRange)
654	return VERR_DBGF_MEM_NOT_FOUND;
655	if (GCPhys + cbNeedle - 1 < GCPhys)
656	return VERR_DBGF_MEM_NOT_FOUND;
657
658	if (!GCPhysAlign)
659	return VERR_INVALID_PARAMETER;
660	if (GCPhysAlign > UINT32_MAX)
661	return VERR_NOT_POWER_OF_TWO;
662	if (GCPhysAlign & (GCPhysAlign - 1))
663	return VERR_INVALID_PARAMETER;
664
665	if (GCPhys & (GCPhysAlign - 1))
666	{
667	RTGCPHYS Adj = GCPhysAlign - (GCPhys & (GCPhysAlign - 1));
668	if ( cbRange <= Adj
669	\|\| GCPhys + Adj < GCPhys)
670	return VERR_DBGF_MEM_NOT_FOUND;
671	GCPhys += Adj;
672	cbRange -= Adj;
673	}
674
675	const bool fAllZero = ASMMemIsAll8(pabNeedle, cbNeedle, 0) == NULL;
676	const uint32_t cIncPages = GCPhysAlign <= PAGE_SIZE
677	? 1
678	: GCPhysAlign >> PAGE_SHIFT;
679	const RTGCPHYS GCPhysLast = GCPhys + cbRange - 1 >= GCPhys
680	? GCPhys + cbRange - 1
681	: ~(RTGCPHYS)0;
682
683	PFNPGMR3DBGFIXEDMEMSCAN pfnMemScan;
684	pgmR3DbgSelectMemScanFunction(&pfnMemScan, (uint32_t)GCPhysAlign, cbNeedle);
685
686	/*
687	* Search the memory - ignore MMIO and zero pages, also don't
688	* bother to match across ranges.
689	*/
690	pgmLock(pVM);
691	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRangesX);
692	pRam;
693	pRam = pRam->CTX_SUFF(pNext))
694	{
695	/*
696	* If the search range starts prior to the current ram range record,
697	* adjust the search range and possibly conclude the search.
698	*/
699	RTGCPHYS off;
700	if (GCPhys < pRam->GCPhys)
701	{
702	if (GCPhysLast < pRam->GCPhys)
703	break;
704	GCPhys = pRam->GCPhys;
705	off = 0;
706	}
707	else
708	off = GCPhys - pRam->GCPhys;
709	if (off < pRam->cb)
710	{
711	/*
712	* Iterate the relevant pages.
713	*/
714	uint8_t abPrev[MAX_NEEDLE_SIZE];
715	size_t cbPrev = 0;
716	const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
717	uint32_t iPage = off >> PAGE_SHIFT;
718	uint32_t offPage = GCPhys & PAGE_OFFSET_MASK;
719	GCPhys &= ~(RTGCPHYS)PAGE_OFFSET_MASK;
720	for (;; offPage = 0)
721	{
722	PPGMPAGE pPage = &pRam->aPages[iPage];
723	if ( ( !PGM_PAGE_IS_ZERO(pPage)
724	\|\| fAllZero)
725	&& !PGM_PAGE_IS_MMIO_OR_ALIAS(pPage)
726	&& !PGM_PAGE_IS_BALLOONED(pPage))
727	{
728	void const *pvPage;
729	PGMPAGEMAPLOCK Lock;
730	int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, &pvPage, &Lock);
731	if (RT_SUCCESS(rc))
732	{
733	int32_t offHit = offPage;
734	bool fRc;
735	if (GCPhysAlign < PAGE_SIZE)
736	{
737	uint32_t cbSearch = (GCPhys ^ GCPhysLast) & ~(RTGCPHYS)PAGE_OFFSET_MASK
738	? PAGE_SIZE - (uint32_t)offPage
739	: (GCPhysLast & PAGE_OFFSET_MASK) + 1 - (uint32_t)offPage;
740	fRc = pgmR3DbgScanPage((uint8_t const *)pvPage, &offHit, cbSearch, (uint32_t)GCPhysAlign,
741	pabNeedle, cbNeedle, pfnMemScan, &abPrev[0], &cbPrev);
742	}
743	else
744	fRc = memcmp(pvPage, pabNeedle, cbNeedle) == 0
745	&& (GCPhysLast - GCPhys) >= cbNeedle;
746	PGMPhysReleasePageMappingLock(pVM, &Lock);
747	if (fRc)
748	{
749	*pGCPhysHit = GCPhys + offHit;
750	pgmUnlock(pVM);
751	return VINF_SUCCESS;
752	}
753	}
754	else
755	cbPrev = 0; /* ignore error. */
756	}
757	else
758	cbPrev = 0;
759
760	/* advance to the next page. */
761	GCPhys += (RTGCPHYS)cIncPages << PAGE_SHIFT;
762	if (GCPhys >= GCPhysLast) /* (may not always hit, but we're run out of ranges.) */
763	{
764	pgmUnlock(pVM);
765	return VERR_DBGF_MEM_NOT_FOUND;
766	}
767	iPage += cIncPages;
768	if ( iPage < cIncPages
769	\|\| iPage >= cPages)
770	break;
771	}
772	}
773	}
774	pgmUnlock(pVM);
775	return VERR_DBGF_MEM_NOT_FOUND;
776	}
777
778
779	/**
780	* Scans (guest) virtual memory for a byte string.
781	*
782	* @returns VBox status codes:
783	* @retval VINF_SUCCESS and *pGCPtrHit on success.
784	* @retval VERR_DBGF_MEM_NOT_FOUND if not found.
785	* @retval VERR_INVALID_POINTER if any of the pointer arguments are invalid.
786	* @retval VERR_INVALID_ARGUMENT if any other arguments are invalid.
787	*
788	* @param pVM Pointer to the VM.
789	* @param pVCpu The CPU context to search in.
790	* @param GCPtr Where to start searching.
791	* @param GCPtrAlign The alignment of the needle. Must be a power of two
792	* and less or equal to 4GB.
793	* @param cbRange The number of bytes to search. Max 256 bytes.
794	* @param pabNeedle The byte string to search for.
795	* @param cbNeedle The length of the byte string.
796	* @param pGCPtrHit Where to store the address of the first occurrence on success.
797	*/
798	VMMR3_INT_DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, RTGCPTR GCPtrAlign,
799	const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPtrHit)
800	{
801	VMCPU_ASSERT_EMT(pVCpu);
802
803	/*
804	* Validate and adjust the input a bit.
805	*/
806	if (!VALID_PTR(pGCPtrHit))
807	return VERR_INVALID_POINTER;
808	*pGCPtrHit = 0;
809
810	if (!VALID_PTR(pabNeedle))
811	return VERR_INVALID_POINTER;
812	if (!cbNeedle)
813	return VERR_INVALID_PARAMETER;
814	if (cbNeedle > MAX_NEEDLE_SIZE)
815	return VERR_INVALID_PARAMETER;
816
817	if (!cbRange)
818	return VERR_DBGF_MEM_NOT_FOUND;
819	if (GCPtr + cbNeedle - 1 < GCPtr)
820	return VERR_DBGF_MEM_NOT_FOUND;
821
822	if (!GCPtrAlign)
823	return VERR_INVALID_PARAMETER;
824	if (GCPtrAlign > UINT32_MAX)
825	return VERR_NOT_POWER_OF_TWO;
826	if (GCPtrAlign & (GCPtrAlign - 1))
827	return VERR_INVALID_PARAMETER;
828
829	if (GCPtr & (GCPtrAlign - 1))
830	{
831	RTGCPTR Adj = GCPtrAlign - (GCPtr & (GCPtrAlign - 1));
832	if ( cbRange <= Adj
833	\|\| GCPtr + Adj < GCPtr)
834	return VERR_DBGF_MEM_NOT_FOUND;
835	GCPtr += Adj;
836	cbRange -= Adj;
837	}
838
839	/* Only paged protected mode or long mode here, use the physical scan for
840	the other modes. */
841	PGMMODE enmMode = PGMGetGuestMode(pVCpu);
842	AssertReturn(PGMMODE_WITH_PAGING(enmMode), VERR_PGM_NOT_USED_IN_MODE);
843
844	/*
845	* Search the memory - ignore MMIO, zero and not-present pages.
846	*/
847	const bool fAllZero = ASMMemIsAll8(pabNeedle, cbNeedle, 0) == NULL;
848	RTGCPTR GCPtrMask = PGMMODE_IS_LONG_MODE(enmMode) ? UINT64_MAX : UINT32_MAX;
849	uint8_t abPrev[MAX_NEEDLE_SIZE];
850	size_t cbPrev = 0;
851	const uint32_t cIncPages = GCPtrAlign <= PAGE_SIZE
852	? 1
853	: GCPtrAlign >> PAGE_SHIFT;
854	const RTGCPTR GCPtrLast = GCPtr + cbRange - 1 >= GCPtr
855	? (GCPtr + cbRange - 1) & GCPtrMask
856	: GCPtrMask;
857	RTGCPTR cPages = (((GCPtrLast - GCPtr) + (GCPtr & PAGE_OFFSET_MASK)) >> PAGE_SHIFT) + 1;
858	uint32_t offPage = GCPtr & PAGE_OFFSET_MASK;
859	GCPtr &= ~(RTGCPTR)PAGE_OFFSET_MASK;
860
861	PFNPGMR3DBGFIXEDMEMSCAN pfnMemScan;
862	pgmR3DbgSelectMemScanFunction(&pfnMemScan, (uint32_t)GCPtrAlign, cbNeedle);
863
864	uint32_t cYieldCountDown = 4096;
865	pgmLock(pVM);
866	for (;; offPage = 0)
867	{
868	PGMPTWALKGST Walk;
869	int rc = pgmGstPtWalk(pVCpu, GCPtr, &Walk);
870	if (RT_SUCCESS(rc) && Walk.u.Core.fSucceeded)
871	{
872	PPGMPAGE pPage = pgmPhysGetPage(pVM, Walk.u.Core.GCPhys);
873	if ( pPage
874	&& ( !PGM_PAGE_IS_ZERO(pPage)
875	\|\| fAllZero)
876	&& !PGM_PAGE_IS_MMIO_OR_ALIAS(pPage)
877	&& !PGM_PAGE_IS_BALLOONED(pPage))
878	{
879	void const *pvPage;
880	PGMPAGEMAPLOCK Lock;
881	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, Walk.u.Core.GCPhys, &pvPage, &Lock);
882	if (RT_SUCCESS(rc))
883	{
884	int32_t offHit = offPage;
885	bool fRc;
886	if (GCPtrAlign < PAGE_SIZE)
887	{
888	uint32_t cbSearch = cPages > 0
889	? PAGE_SIZE - (uint32_t)offPage
890	: (GCPtrLast & PAGE_OFFSET_MASK) + 1 - (uint32_t)offPage;
891	fRc = pgmR3DbgScanPage((uint8_t const *)pvPage, &offHit, cbSearch, (uint32_t)GCPtrAlign,
892	pabNeedle, cbNeedle, pfnMemScan, &abPrev[0], &cbPrev);
893	}
894	else
895	fRc = memcmp(pvPage, pabNeedle, cbNeedle) == 0
896	&& (GCPtrLast - GCPtr) >= cbNeedle;
897	PGMPhysReleasePageMappingLock(pVM, &Lock);
898	if (fRc)
899	{
900	*pGCPtrHit = GCPtr + offHit;
901	pgmUnlock(pVM);
902	return VINF_SUCCESS;
903	}
904	}
905	else
906	cbPrev = 0; /* ignore error. */
907	}
908	else
909	cbPrev = 0;
910	}
911	else
912	{
913	Assert(Walk.enmType != PGMPTWALKGSTTYPE_INVALID);
914	Assert(!Walk.u.Core.fSucceeded);
915	cbPrev = 0; /* ignore error. */
916
917	/*
918	* Try skip as much as possible. No need to figure out that a PDE
919	* is not present 512 times!
920	*/
921	uint64_t cPagesCanSkip;
922	switch (Walk.u.Core.uLevel)
923	{
924	case 1:
925	/* page level, use cIncPages */
926	cPagesCanSkip = 1;
927	break;
928	case 2:
929	if (Walk.enmType == PGMPTWALKGSTTYPE_32BIT)
930	{
931	cPagesCanSkip = X86_PG_ENTRIES - ((GCPtr >> X86_PT_SHIFT) & X86_PT_MASK);
932	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PD_SHIFT) - 1)));
933	}
934	else
935	{
936	cPagesCanSkip = X86_PG_PAE_ENTRIES - ((GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK);
937	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PD_PAE_SHIFT) - 1)));
938	}
939	break;
940	case 3:
941	cPagesCanSkip = (X86_PG_PAE_ENTRIES - ((GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK)) * X86_PG_PAE_ENTRIES
942	- ((GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK);
943	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PDPT_SHIFT) - 1)));
944	break;
945	case 4:
946	cPagesCanSkip = (X86_PG_PAE_ENTRIES - ((GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64))
947	* X86_PG_PAE_ENTRIES * X86_PG_PAE_ENTRIES
948	- ((((GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK)) * X86_PG_PAE_ENTRIES)
949	- (( GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK);
950	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PML4_SHIFT) - 1)));
951	break;
952	case 8:
953	/* The CR3 value is bad, forget the whole search. */
954	cPagesCanSkip = cPages;
955	break;
956	default:
957	AssertMsgFailed(("%d\n", Walk.u.Core.uLevel));
958	cPagesCanSkip = 0;
959	break;
960	}
961	if (cPages <= cPagesCanSkip)
962	break;
963	if (cPagesCanSkip >= cIncPages)
964	{
965	cPages -= cPagesCanSkip;
966	GCPtr += (RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT;
967	continue;
968	}
969	}
970
971	/* advance to the next page. */
972	if (cPages <= cIncPages)
973	break;
974	cPages -= cIncPages;
975	GCPtr += (RTGCPTR)cIncPages << X86_PT_PAE_SHIFT;
976
977	/* Yield the PGM lock every now and then. */
978	if (!--cYieldCountDown)
979	{
980	PDMR3CritSectYield(&pVM->pgm.s.CritSectX);
981	cYieldCountDown = 4096;
982	}
983	}
984	pgmUnlock(pVM);
985	return VERR_DBGF_MEM_NOT_FOUND;
986	}
987
988
989	/**
990	* Initializes the dumper state.
991	*
992	* @param pState The state to initialize.
993	* @param pVM Pointer to the VM.
994	* @param fFlags The flags.
995	* @param u64FirstAddr The first address.
996	* @param u64LastAddr The last address.
997	* @param pHlp The output helpers.
998	*/
999	static void pgmR3DumpHierarchyInitState(PPGMR3DUMPHIERARCHYSTATE pState, PVM pVM, uint32_t fFlags,
1000	uint64_t u64FirstAddr, uint64_t u64LastAddr, PCDBGFINFOHLP pHlp)
1001	{
1002	pState->pVM = pVM;
1003	pState->pHlp = pHlp ? pHlp : DBGFR3InfoLogHlp();
1004	pState->fPse = !!(fFlags & (DBGFPGDMP_FLAGS_PSE \| DBGFPGDMP_FLAGS_PAE \| DBGFPGDMP_FLAGS_LME));
1005	pState->fPae = !!(fFlags & (DBGFPGDMP_FLAGS_PAE \| DBGFPGDMP_FLAGS_LME));
1006	pState->fLme = !!(fFlags & DBGFPGDMP_FLAGS_LME);
1007	pState->fNp = !!(fFlags & DBGFPGDMP_FLAGS_NP);
1008	pState->fEpt = !!(fFlags & DBGFPGDMP_FLAGS_EPT);
1009	pState->fNxe = !!(fFlags & DBGFPGDMP_FLAGS_NXE);
1010	pState->cchAddress = pState->fLme ? 16 : 8;
1011	pState->uLastRsvdBit = pState->fNxe ? 62 : 63;
1012	pState->fDumpPageInfo = !!(fFlags & DBGFPGDMP_FLAGS_PAGE_INFO);
1013	pState->fPrintHeader = !!(fFlags & DBGFPGDMP_FLAGS_HEADER);
1014	pState->fPrintCr3 = !!(fFlags & DBGFPGDMP_FLAGS_PRINT_CR3);
1015	pState->afReserved[0] = false;
1016	pState->afReserved[1] = false;
1017	pState->afReserved[2] = false;
1018	pState->afReserved[3] = false;
1019	pState->afReserved[4] = false;
1020	pState->u64Address = u64FirstAddr;
1021	pState->u64FirstAddress = u64FirstAddr;
1022	pState->u64LastAddress = u64LastAddr;
1023	pState->u64HighReservedBits = pState->uLastRsvdBit == 62 ? UINT64_C(0x7ff) << 52 : UINT64_C(0xfff) << 52;
1024	pState->cLeaves = 0;
1025	}
1026
1027
1028	/**
1029	* The simple way out, too tired to think of a more elegant solution.
1030	*
1031	* @returns The base address of this page table/directory/whatever.
1032	* @param pState The state where we get the current address.
1033	* @param cShift The shift count for the table entries.
1034	* @param cEntries The number of table entries.
1035	* @param piFirst Where to return the table index of the first
1036	* entry to dump.
1037	* @param piLast Where to return the table index of the last
1038	* entry.
1039	*/
1040	static uint64_t pgmR3DumpHierarchyCalcRange(PPGMR3DUMPHIERARCHYSTATE pState, uint32_t cShift, uint32_t cEntries,
1041	uint32_t piFirst, uint32_t piLast)
1042	{
1043	const uint64_t iBase = (pState->u64Address >> cShift) & ~(uint64_t)(cEntries - 1);
1044	const uint64_t iFirst = pState->u64FirstAddress >> cShift;
1045	const uint64_t iLast = pState->u64LastAddress >> cShift;
1046
1047	if ( iBase >= iFirst
1048	&& iBase + cEntries - 1 <= iLast)
1049	{
1050	/* full range. */
1051	*piFirst = 0;
1052	*piLast = cEntries - 1;
1053	}
1054	else if ( iBase + cEntries - 1 < iFirst
1055	\|\| iBase > iLast)
1056	{
1057	/* no match */
1058	*piFirst = cEntries;
1059	*piLast = 0;
1060	}
1061	else
1062	{
1063	/* partial overlap */
1064	*piFirst = iBase <= iFirst
1065	? iFirst - iBase
1066	: 0;
1067	*piLast = iBase + cEntries - 1 <= iLast
1068	? cEntries - 1
1069	: iLast - iBase;
1070	}
1071
1072	return iBase << cShift;
1073	}
1074
1075
1076	/**
1077	* Maps/finds the shadow page.
1078	*
1079	* @returns VBox status code.
1080	* @param pState The dumper state.
1081	* @param HCPhys The physical address of the shadow page.
1082	* @param pszDesc The description.
1083	* @param fIsMapping Set if it's a mapping.
1084	* @param ppv Where to return the pointer.
1085	*/
1086	static int pgmR3DumpHierarchyShwMapPage(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, const char *pszDesc,
1087	bool fIsMapping, void const **ppv)
1088	{
1089	void *pvPage;
1090	if (!fIsMapping)
1091	{
1092	int rc = MMPagePhys2PageTry(pState->pVM, HCPhys, &pvPage);
1093	if (RT_FAILURE(rc))
1094	{
1095	pState->pHlp->pfnPrintf(pState->pHlp, "%0*llx error! %s at HCPhys=%RHp was not found in the page pool!\n",
1096	pState->cchAddress, pState->u64Address, pszDesc, HCPhys);
1097	return rc;
1098	}
1099	}
1100	else
1101	{
1102	pvPage = NULL;
1103	for (PPGMMAPPING pMap = pState->pVM->pgm.s.pMappingsR3; pMap; pMap = pMap->pNextR3)
1104	{
1105	uint64_t off = pState->u64Address - pMap->GCPtr;
1106	if (off < pMap->cb)
1107	{
1108	const int iPDE = (uint32_t)(off >> X86_PD_SHIFT);
1109	const int iSub = (int)((off >> X86_PD_PAE_SHIFT) & 1); /* MSC is a pain sometimes */
1110	if ((iSub ? pMap->aPTs[iPDE].HCPhysPaePT1 : pMap->aPTs[iPDE].HCPhysPaePT0) != HCPhys)
1111	pState->pHlp->pfnPrintf(pState->pHlp,
1112	"%0*llx error! Mapping error! PT %d has HCPhysPT=%RHp not %RHp is in the PD.\n",
1113	pState->cchAddress, pState->u64Address, iPDE,
1114	iSub ? pMap->aPTs[iPDE].HCPhysPaePT1 : pMap->aPTs[iPDE].HCPhysPaePT0, HCPhys);
1115	pvPage = &pMap->aPTs[iPDE].paPaePTsR3[iSub];
1116	break;
1117	}
1118	}
1119	if (!pvPage)
1120	{
1121	pState->pHlp->pfnPrintf(pState->pHlp, "%0*llx error! PT mapping %s at HCPhys=%RHp was not found in the page pool!\n",
1122	pState->cchAddress, pState->u64Address, pszDesc, HCPhys);
1123	return VERR_INVALID_PARAMETER;
1124	}
1125	}
1126	*ppv = pvPage;
1127	return VINF_SUCCESS;
1128	}
1129
1130
1131	/**
1132	* Dumps the a shadow page summary or smth.
1133	*
1134	* @param pState The dumper state.
1135	* @param HCPhys The page address.
1136	*/
1137	static void pgmR3DumpHierarchyShwTablePageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys)
1138	{
1139	pgmLock(pState->pVM);
1140	char szPage[80];
1141	PPGMPOOLPAGE pPage = pgmPoolQueryPageForDbg(pState->pVM->pgm.s.CTX_SUFF(pPool), HCPhys);
1142	if (pPage)
1143	RTStrPrintf(szPage, sizeof(szPage), " idx=0i%u", pPage->idx);
1144	else
1145	{
1146	/* probably a mapping */
1147	strcpy(szPage, " not found");
1148	for (PPGMMAPPING pMap = pState->pVM->pgm.s.pMappingsR3; pMap; pMap = pMap->pNextR3)
1149	{
1150	uint64_t off = pState->u64Address - pMap->GCPtr;
1151	if (off < pMap->cb)
1152	{
1153	const int iPDE = (uint32_t)(off >> X86_PD_SHIFT);
1154	if (pMap->aPTs[iPDE].HCPhysPT == HCPhys)
1155	RTStrPrintf(szPage, sizeof(szPage), " #%u: %s", iPDE, pMap->pszDesc);
1156	else if (pMap->aPTs[iPDE].HCPhysPaePT0 == HCPhys)
1157	RTStrPrintf(szPage, sizeof(szPage), " #%u/0: %s", iPDE, pMap->pszDesc);
1158	else if (pMap->aPTs[iPDE].HCPhysPaePT1 == HCPhys)
1159	RTStrPrintf(szPage, sizeof(szPage), " #%u/1: %s", iPDE, pMap->pszDesc);
1160	else
1161	continue;
1162	break;
1163	}
1164	}
1165	}
1166	pgmUnlock(pState->pVM);
1167	pState->pHlp->pfnPrintf(pState->pHlp, "%s", szPage);
1168	}
1169
1170
1171	/**
1172	* Figures out which guest page this is and dumps a summary.
1173	*
1174	* @param pState The dumper state.
1175	* @param HCPhys The page address.
1176	* @param cbPage The page size.
1177	*/
1178	static void pgmR3DumpHierarchyShwGuestPageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, uint32_t cbPage)
1179	{
1180	char szPage[80];
1181	RTGCPHYS GCPhys;
1182	int rc = PGMR3DbgHCPhys2GCPhys(pState->pVM->pUVM, HCPhys, &GCPhys);
1183	if (RT_SUCCESS(rc))
1184	{
1185	pgmLock(pState->pVM);
1186	PCPGMPAGE pPage = pgmPhysGetPage(pState->pVM, GCPhys);
1187	if (pPage)
1188	RTStrPrintf(szPage, sizeof(szPage), "%R[pgmpage]", pPage);
1189	else
1190	strcpy(szPage, "not found");
1191	pgmUnlock(pState->pVM);
1192	pState->pHlp->pfnPrintf(pState->pHlp, " -> %RGp %s", GCPhys, szPage);
1193	}
1194	else
1195	{
1196	/* check the heap */
1197	uint32_t cbAlloc;
1198	rc = MMR3HyperQueryInfoFromHCPhys(pState->pVM, HCPhys, szPage, sizeof(szPage), &cbAlloc);
1199	if (RT_SUCCESS(rc))
1200	pState->pHlp->pfnPrintf(pState->pHlp, " %s %#x bytes", szPage, cbAlloc);
1201	else
1202	pState->pHlp->pfnPrintf(pState->pHlp, " not found");
1203	}
1204	NOREF(cbPage);
1205	}
1206
1207
1208	/**
1209	* Dumps a PAE shadow page table.
1210	*
1211	* @returns VBox status code (VINF_SUCCESS).
1212	* @param pState The dumper state.
1213	* @param HCPhys The page table address.
1214	* @param fIsMapping Whether it is a mapping.
1215	*/
1216	static int pgmR3DumpHierarchyShwPaePT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, bool fIsMapping)
1217	{
1218	PCPGMSHWPTPAE pPT;
1219	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page table", fIsMapping, (void const **)&pPT);
1220	if (RT_FAILURE(rc))
1221	return rc;
1222
1223	uint32_t iFirst, iLast;
1224	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1225	for (uint32_t i = iFirst; i <= iLast; i++)
1226	if (PGMSHWPTEPAE_GET_U(pPT->a[i]) & X86_PTE_P)
1227	{
1228	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PT_PAE_SHIFT);
1229	if (PGMSHWPTEPAE_IS_P(pPT->a[i]))
1230	{
1231	X86PTEPAE Pte;
1232	Pte.u = PGMSHWPTEPAE_GET_U(pPT->a[i]);
1233	pState->pHlp->pfnPrintf(pState->pHlp,
1234	pState->fLme /P R S A D G WT CD AT NX 4M a p ? /
1235	? "%016llx 3 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx"
1236	: "%08llx 2 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx",
1237	pState->u64Address,
1238	Pte.n.u1Write ? 'W' : 'R',
1239	Pte.n.u1User ? 'U' : 'S',
1240	Pte.n.u1Accessed ? 'A' : '-',
1241	Pte.n.u1Dirty ? 'D' : '-',
1242	Pte.n.u1Global ? 'G' : '-',
1243	Pte.n.u1WriteThru ? "WT" : "--",
1244	Pte.n.u1CacheDisable? "CD" : "--",
1245	Pte.n.u1PAT ? "AT" : "--",
1246	Pte.n.u1NoExecute ? "NX" : "--",
1247	Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
1248	Pte.u & RT_BIT(10) ? '1' : '0',
1249	Pte.u & PGM_PTFLAGS_CSAM_VALIDATED? 'v' : '-',
1250	Pte.u & X86_PTE_PAE_PG_MASK);
1251	if (pState->fDumpPageInfo)
1252	pgmR3DumpHierarchyShwGuestPageInfo(pState, Pte.u & X86_PTE_PAE_PG_MASK, _4K);
1253	if ((Pte.u >> 52) & 0x7ff)
1254	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx%s", (Pte.u >> 52) & 0x7ff, pState->fLme ? "" : "!");
1255	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1256	}
1257	else if ( (PGMSHWPTEPAE_GET_U(pPT->a[i]) & (pState->pVM->pgm.s.HCPhysInvMmioPg \| X86_PTE_PAE_MBZ_MASK_NO_NX))
1258	== (pState->pVM->pgm.s.HCPhysInvMmioPg \| X86_PTE_PAE_MBZ_MASK_NO_NX))
1259	pState->pHlp->pfnPrintf(pState->pHlp,
1260	pState->fLme
1261	? "%016llx 3 \| invalid / MMIO optimization\n"
1262	: "%08llx 2 \| invalid / MMIO optimization\n",
1263	pState->u64Address);
1264	else
1265	pState->pHlp->pfnPrintf(pState->pHlp,
1266	pState->fLme
1267	? "%016llx 3 \| invalid: %RX64\n"
1268	: "%08llx 2 \| invalid: %RX64\n",
1269	pState->u64Address, PGMSHWPTEPAE_GET_U(pPT->a[i]));
1270	pState->cLeaves++;
1271	}
1272	return VINF_SUCCESS;
1273	}
1274
1275
1276	/**
1277	* Dumps a PAE shadow page directory table.
1278	*
1279	* @returns VBox status code (VINF_SUCCESS).
1280	* @param pState The dumper state.
1281	* @param HCPhys The physical address of the page directory table.
1282	* @param cMaxDepth The maximum depth.
1283	*/
1284	static int pgmR3DumpHierarchyShwPaePD(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1285	{
1286	PCX86PDPAE pPD;
1287	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page directory", false, (void const **)&pPD);
1288	if (RT_FAILURE(rc))
1289	return rc;
1290
1291	Assert(cMaxDepth > 0);
1292	cMaxDepth--;
1293
1294	uint32_t iFirst, iLast;
1295	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PD_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1296	for (uint32_t i = iFirst; i <= iLast; i++)
1297	{
1298	X86PDEPAE Pde = pPD->a[i];
1299	if (Pde.n.u1Present)
1300	{
1301	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PD_PAE_SHIFT);
1302	if (Pde.b.u1Size)
1303	{
1304	pState->pHlp->pfnPrintf(pState->pHlp,
1305	pState->fLme /P R S A D G WT CD AT NX 2M a p ? phys/
1306	? "%016llx 2 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx"
1307	: "%08llx 1 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx",
1308	pState->u64Address,
1309	Pde.b.u1Write ? 'W' : 'R',
1310	Pde.b.u1User ? 'U' : 'S',
1311	Pde.b.u1Accessed ? 'A' : '-',
1312	Pde.b.u1Dirty ? 'D' : '-',
1313	Pde.b.u1Global ? 'G' : '-',
1314	Pde.b.u1WriteThru ? "WT" : "--",
1315	Pde.b.u1CacheDisable? "CD" : "--",
1316	Pde.b.u1PAT ? "AT" : "--",
1317	Pde.b.u1NoExecute ? "NX" : "--",
1318	Pde.u & RT_BIT_64(9) ? '1' : '0',
1319	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1320	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1321	Pde.u & X86_PDE2M_PAE_PG_MASK);
1322	if (pState->fDumpPageInfo)
1323	pgmR3DumpHierarchyShwGuestPageInfo(pState, Pde.u & X86_PDE2M_PAE_PG_MASK, _2M);
1324	if ((Pde.u >> 52) & 0x7ff)
1325	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx%s", (Pde.u >> 52) & 0x7ff, pState->fLme ? "" : "!");
1326	if ((Pde.u >> 13) & 0xff)
1327	pState->pHlp->pfnPrintf(pState->pHlp, " 20:13=%02llx%s", (Pde.u >> 13) & 0x0ff, pState->fLme ? "" : "!");
1328	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1329
1330	pState->cLeaves++;
1331	}
1332	else
1333	{
1334	pState->pHlp->pfnPrintf(pState->pHlp,
1335	pState->fLme /P R S A D G WT CD AT NX 4M a p ? phys /
1336	? "%016llx 2 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx"
1337	: "%08llx 1 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx",
1338	pState->u64Address,
1339	Pde.n.u1Write ? 'W' : 'R',
1340	Pde.n.u1User ? 'U' : 'S',
1341	Pde.n.u1Accessed ? 'A' : '-',
1342	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
1343	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
1344	Pde.n.u1WriteThru ? "WT" : "--",
1345	Pde.n.u1CacheDisable? "CD" : "--",
1346	Pde.n.u1NoExecute ? "NX" : "--",
1347	Pde.u & RT_BIT_64(9) ? '1' : '0',
1348	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1349	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1350	Pde.u & X86_PDE_PAE_PG_MASK);
1351	if (pState->fDumpPageInfo)
1352	pgmR3DumpHierarchyShwTablePageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK);
1353	if ((Pde.u >> 52) & 0x7ff)
1354	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx!", (Pde.u >> 52) & 0x7ff);
1355	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1356
1357	if (cMaxDepth)
1358	{
1359	int rc2 = pgmR3DumpHierarchyShwPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK, !!(Pde.u & PGM_PDFLAGS_MAPPING));
1360	if (rc2 < rc && RT_SUCCESS(rc))
1361	rc = rc2;
1362	}
1363	else
1364	pState->cLeaves++;
1365	}
1366	}
1367	}
1368	return rc;
1369	}
1370
1371
1372	/**
1373	* Dumps a PAE shadow page directory pointer table.
1374	*
1375	* @returns VBox status code (VINF_SUCCESS).
1376	* @param pState The dumper state.
1377	* @param HCPhys The physical address of the page directory pointer table.
1378	* @param cMaxDepth The maximum depth.
1379	*/
1380	static int pgmR3DumpHierarchyShwPaePDPT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1381	{
1382	/* Fend of addresses that are out of range in PAE mode - simplifies the code below. */
1383	if (!pState->fLme && pState->u64Address >= _4G)
1384	return VINF_SUCCESS;
1385
1386	PCX86PDPT pPDPT;
1387	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page directory pointer table", false, (void const **)&pPDPT);
1388	if (RT_FAILURE(rc))
1389	return rc;
1390
1391	Assert(cMaxDepth > 0);
1392	cMaxDepth--;
1393
1394	uint32_t iFirst, iLast;
1395	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PDPT_SHIFT,
1396	pState->fLme ? X86_PG_AMD64_PDPE_ENTRIES : X86_PG_PAE_PDPE_ENTRIES,
1397	&iFirst, &iLast);
1398	for (uint32_t i = iFirst; i <= iLast; i++)
1399	{
1400	X86PDPE Pdpe = pPDPT->a[i];
1401	if (Pdpe.n.u1Present)
1402	{
1403	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PDPT_SHIFT);
1404	if (pState->fLme)
1405	{
1406	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX .. a p ? /
1407	"%016llx 1 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
1408	pState->u64Address,
1409	Pdpe.lm.u1Write ? 'W' : 'R',
1410	Pdpe.lm.u1User ? 'U' : 'S',
1411	Pdpe.lm.u1Accessed ? 'A' : '-',
1412	Pdpe.lm.u3Reserved & 1? '?' : '.', /* ignored */
1413	Pdpe.lm.u3Reserved & 4? '!' : '.', /* mbz */
1414	Pdpe.lm.u1WriteThru ? "WT" : "--",
1415	Pdpe.lm.u1CacheDisable? "CD" : "--",
1416	Pdpe.lm.u3Reserved & 2? "!" : "..",/* mbz */
1417	Pdpe.lm.u1NoExecute ? "NX" : "--",
1418	Pdpe.u & RT_BIT(9) ? '1' : '0',
1419	Pdpe.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
1420	Pdpe.u & RT_BIT(11) ? '1' : '0',
1421	Pdpe.u & X86_PDPE_PG_MASK);
1422	if (pState->fDumpPageInfo)
1423	pgmR3DumpHierarchyShwTablePageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK);
1424	if ((Pdpe.u >> 52) & 0x7ff)
1425	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx", (Pdpe.u >> 52) & 0x7ff);
1426	}
1427	else
1428	{
1429	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX .. a p ? /
1430	"%08llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
1431	pState->u64Address,
1432	Pdpe.n.u2Reserved & 1? '!' : '.', /* mbz */
1433	Pdpe.n.u2Reserved & 2? '!' : '.', /* mbz */
1434	Pdpe.n.u4Reserved & 1? '!' : '.', /* mbz */
1435	Pdpe.n.u4Reserved & 2? '!' : '.', /* mbz */
1436	Pdpe.n.u4Reserved & 8? '!' : '.', /* mbz */
1437	Pdpe.n.u1WriteThru ? "WT" : "--",
1438	Pdpe.n.u1CacheDisable? "CD" : "--",
1439	Pdpe.n.u4Reserved & 2? "!" : "..",/* mbz */
1440	Pdpe.lm.u1NoExecute ? "!!" : "..",/* mbz */
1441	Pdpe.u & RT_BIT(9) ? '1' : '0',
1442	Pdpe.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
1443	Pdpe.u & RT_BIT(11) ? '1' : '0',
1444	Pdpe.u & X86_PDPE_PG_MASK);
1445	if (pState->fDumpPageInfo)
1446	pgmR3DumpHierarchyShwTablePageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK);
1447	if ((Pdpe.u >> 52) & 0xfff)
1448	pState->pHlp->pfnPrintf(pState->pHlp, " 63:52=%03llx!", (Pdpe.u >> 52) & 0xfff);
1449	}
1450	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1451
1452	if (cMaxDepth)
1453	{
1454	int rc2 = pgmR3DumpHierarchyShwPaePD(pState, Pdpe.u & X86_PDPE_PG_MASK, cMaxDepth);
1455	if (rc2 < rc && RT_SUCCESS(rc))
1456	rc = rc2;
1457	}
1458	else
1459	pState->cLeaves++;
1460	}
1461	}
1462	return rc;
1463	}
1464
1465
1466	/**
1467	* Dumps a 32-bit shadow page table.
1468	*
1469	* @returns VBox status code (VINF_SUCCESS).
1470	* @param pVM Pointer to the VM.
1471	* @param HCPhys The physical address of the table.
1472	* @param cMaxDepth The maximum depth.
1473	*/
1474	static int pgmR3DumpHierarchyShwPaePML4(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1475	{
1476	PCX86PML4 pPML4;
1477	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page map level 4", false, (void const **)&pPML4);
1478	if (RT_FAILURE(rc))
1479	return rc;
1480
1481	Assert(cMaxDepth);
1482	cMaxDepth--;
1483
1484	/*
1485	* This is a bit tricky as we're working on unsigned addresses while the
1486	* AMD64 spec uses signed tricks.
1487	*/
1488	uint32_t iFirst = (pState->u64FirstAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
1489	uint32_t iLast = (pState->u64LastAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
1490	if ( pState->u64LastAddress <= UINT64_C(0x00007fffffffffff)
1491	\|\| pState->u64FirstAddress >= UINT64_C(0xffff800000000000))
1492	{ /* Simple, nothing to adjust */ }
1493	else if (pState->u64FirstAddress <= UINT64_C(0x00007fffffffffff))
1494	iLast = X86_PG_AMD64_ENTRIES / 2 - 1;
1495	else if (pState->u64LastAddress >= UINT64_C(0xffff800000000000))
1496	iFirst = X86_PG_AMD64_ENTRIES / 2;
1497	else
1498	iFirst = X86_PG_AMD64_ENTRIES; /* neither address is canonical */
1499
1500	for (uint32_t i = iFirst; i <= iLast; i++)
1501	{
1502	X86PML4E Pml4e = pPML4->a[i];
1503	if (Pml4e.n.u1Present)
1504	{
1505	pState->u64Address = ((uint64_t)i << X86_PML4_SHIFT)
1506	\| (i >= RT_ELEMENTS(pPML4->a) / 2 ? UINT64_C(0xffff000000000000) : 0);
1507	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX 4M a p ? /
1508	"%016llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
1509	pState->u64Address,
1510	Pml4e.n.u1Write ? 'W' : 'R',
1511	Pml4e.n.u1User ? 'U' : 'S',
1512	Pml4e.n.u1Accessed ? 'A' : '-',
1513	Pml4e.n.u3Reserved & 1? '?' : '.', /* ignored */
1514	Pml4e.n.u3Reserved & 4? '!' : '.', /* mbz */
1515	Pml4e.n.u1WriteThru ? "WT" : "--",
1516	Pml4e.n.u1CacheDisable? "CD" : "--",
1517	Pml4e.n.u3Reserved & 2? "!" : "..",/* mbz */
1518	Pml4e.n.u1NoExecute ? "NX" : "--",
1519	Pml4e.u & RT_BIT(9) ? '1' : '0',
1520	Pml4e.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
1521	Pml4e.u & RT_BIT(11) ? '1' : '0',
1522	Pml4e.u & X86_PML4E_PG_MASK);
1523	if (pState->fDumpPageInfo)
1524	pgmR3DumpHierarchyShwTablePageInfo(pState, Pml4e.u & X86_PML4E_PG_MASK);
1525	if ((Pml4e.u >> 52) & 0x7ff)
1526	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx!", (Pml4e.u >> 52) & 0x7ff);
1527	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1528
1529	if (cMaxDepth)
1530	{
1531	int rc2 = pgmR3DumpHierarchyShwPaePDPT(pState, Pml4e.u & X86_PML4E_PG_MASK, cMaxDepth);
1532	if (rc2 < rc && RT_SUCCESS(rc))
1533	rc = rc2;
1534	}
1535	else
1536	pState->cLeaves++;
1537	}
1538	}
1539	return rc;
1540	}
1541
1542
1543	/**
1544	* Dumps a 32-bit shadow page table.
1545	*
1546	* @returns VBox status code (VINF_SUCCESS).
1547	* @param pVM Pointer to the VM.
1548	* @param pPT Pointer to the page table.
1549	* @param fMapping Set if it's a guest mapping.
1550	*/
1551	static int pgmR3DumpHierarchyShw32BitPT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, bool fMapping)
1552	{
1553	PCX86PT pPT;
1554	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page table", fMapping, (void const **)&pPT);
1555	if (RT_FAILURE(rc))
1556	return rc;
1557
1558	uint32_t iFirst, iLast;
1559	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
1560	for (uint32_t i = iFirst; i <= iLast; i++)
1561	{
1562	X86PTE Pte = pPT->a[i];
1563	if (Pte.n.u1Present)
1564	{
1565	pState->u64Address = u64BaseAddress + (i << X86_PT_SHIFT);
1566	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d /
1567	"%08llx 1 \| P %c %c %c %c %c %s %s %s .. 4K %c%c%c %08x",
1568	pState->u64Address,
1569	Pte.n.u1Write ? 'W' : 'R',
1570	Pte.n.u1User ? 'U' : 'S',
1571	Pte.n.u1Accessed ? 'A' : '-',
1572	Pte.n.u1Dirty ? 'D' : '-',
1573	Pte.n.u1Global ? 'G' : '-',
1574	Pte.n.u1WriteThru ? "WT" : "--",
1575	Pte.n.u1CacheDisable? "CD" : "--",
1576	Pte.n.u1PAT ? "AT" : "--",
1577	Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
1578	Pte.u & RT_BIT(10) ? '1' : '0',
1579	Pte.u & PGM_PTFLAGS_CSAM_VALIDATED ? 'v' : '-',
1580	Pte.u & X86_PDE_PG_MASK);
1581	if (pState->fDumpPageInfo)
1582	pgmR3DumpHierarchyShwGuestPageInfo(pState, Pte.u & X86_PDE_PG_MASK, _4K);
1583	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1584	}
1585	}
1586	return VINF_SUCCESS;
1587	}
1588
1589
1590	/**
1591	* Dumps a 32-bit shadow page directory and page tables.
1592	*
1593	* @returns VBox status code (VINF_SUCCESS).
1594	* @param pState The dumper state.
1595	* @param HCPhys The physical address of the table.
1596	* @param cMaxDepth The maximum depth.
1597	*/
1598	static int pgmR3DumpHierarchyShw32BitPD(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1599	{
1600	if (pState->u64Address >= _4G)
1601	return VINF_SUCCESS;
1602
1603	PCX86PD pPD;
1604	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page directory", false, (void const **)&pPD);
1605	if (RT_FAILURE(rc))
1606	return rc;
1607
1608	Assert(cMaxDepth > 0);
1609	cMaxDepth--;
1610
1611	uint32_t iFirst, iLast;
1612	pgmR3DumpHierarchyCalcRange(pState, X86_PD_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
1613	for (uint32_t i = iFirst; i <= iLast; i++)
1614	{
1615	X86PDE Pde = pPD->a[i];
1616	if (Pde.n.u1Present)
1617	{
1618	pState->u64Address = (uint32_t)i << X86_PD_SHIFT;
1619	if (Pde.b.u1Size && pState->fPse)
1620	{
1621	uint64_t u64Phys = ((uint64_t)(Pde.u & X86_PDE4M_PG_HIGH_MASK) << X86_PDE4M_PG_HIGH_SHIFT)
1622	\| (Pde.u & X86_PDE4M_PG_MASK);
1623	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
1624	"%08llx 0 \| P %c %c %c %c %c %s %s %s .. 4M %c%c%c %08llx",
1625	pState->u64Address,
1626	Pde.b.u1Write ? 'W' : 'R',
1627	Pde.b.u1User ? 'U' : 'S',
1628	Pde.b.u1Accessed ? 'A' : '-',
1629	Pde.b.u1Dirty ? 'D' : '-',
1630	Pde.b.u1Global ? 'G' : '-',
1631	Pde.b.u1WriteThru ? "WT" : "--",
1632	Pde.b.u1CacheDisable? "CD" : "--",
1633	Pde.b.u1PAT ? "AT" : "--",
1634	Pde.u & RT_BIT_32(9) ? '1' : '0',
1635	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1636	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1637	u64Phys);
1638	if (pState->fDumpPageInfo)
1639	pgmR3DumpHierarchyShwGuestPageInfo(pState, u64Phys, _4M);
1640	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1641	pState->cLeaves++;
1642	}
1643	else
1644	{
1645	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
1646	"%08llx 0 \| P %c %c %c %c %c %s %s .. .. 4K %c%c%c %08x",
1647	pState->u64Address,
1648	Pde.n.u1Write ? 'W' : 'R',
1649	Pde.n.u1User ? 'U' : 'S',
1650	Pde.n.u1Accessed ? 'A' : '-',
1651	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
1652	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
1653	Pde.n.u1WriteThru ? "WT" : "--",
1654	Pde.n.u1CacheDisable? "CD" : "--",
1655	Pde.u & RT_BIT_32(9) ? '1' : '0',
1656	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1657	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1658	Pde.u & X86_PDE_PG_MASK);
1659	if (pState->fDumpPageInfo)
1660	pgmR3DumpHierarchyShwTablePageInfo(pState, Pde.u & X86_PDE_PG_MASK);
1661	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1662
1663	if (cMaxDepth)
1664	{
1665	int rc2 = pgmR3DumpHierarchyShw32BitPT(pState, Pde.u & X86_PDE_PG_MASK, !!(Pde.u & PGM_PDFLAGS_MAPPING));
1666	if (rc2 < rc && RT_SUCCESS(rc))
1667	rc = rc2;
1668	}
1669	else
1670	pState->cLeaves++;
1671	}
1672	}
1673	}
1674
1675	return rc;
1676	}
1677
1678
1679	/**
1680	* Internal worker that initiates the actual dump.
1681	*
1682	* @returns VBox status code.
1683	* @param pState The dumper state.
1684	* @param cr3 The CR3 value.
1685	* @param cMaxDepth The max depth.
1686	*/
1687	static int pgmR3DumpHierarchyShwDoIt(PPGMR3DUMPHIERARCHYSTATE pState, uint64_t cr3, unsigned cMaxDepth)
1688	{
1689	int rc;
1690	unsigned const cch = pState->cchAddress;
1691	uint64_t const cr3Mask = pState->fEpt ? X86_CR3_AMD64_PAGE_MASK
1692	: pState->fLme ? X86_CR3_AMD64_PAGE_MASK
1693	: pState->fPae ? X86_CR3_PAE_PAGE_MASK
1694	: X86_CR3_PAGE_MASK;
1695	if (pState->fPrintCr3)
1696	{
1697	const char * const pszMode = pState->fEpt ? "Extended Page Tables"
1698	: pState->fLme ? "Long Mode"
1699	: pState->fPae ? "PAE Mode"
1700	: pState->fPse ? "32-bit w/ PSE"
1701	: "32-bit";
1702	pState->pHlp->pfnPrintf(pState->pHlp, "cr3=%0*llx", cch, cr3);
1703	if (pState->fDumpPageInfo)
1704	pgmR3DumpHierarchyShwTablePageInfo(pState, cr3 & X86_CR3_AMD64_PAGE_MASK);
1705	pState->pHlp->pfnPrintf(pState->pHlp, " %s%s%s\n",
1706	pszMode,
1707	pState->fNp ? " + Nested Paging" : "",
1708	pState->fNxe ? " + NX" : "");
1709	}
1710
1711
1712	if (pState->fEpt)
1713	{
1714	if (pState->fPrintHeader)
1715	pState->pHlp->pfnPrintf(pState->pHlp,
1716	"%-*s R - Readable\n"
1717	"%-*s \| W - Writeable\n"
1718	"%-*s \| \| X - Executable\n"
1719	"%-*s \| \| \| EMT - EPT memory type\n"
1720	"%-*s \| \| \| \| PAT - Ignored PAT?\n"
1721	"%-*s \| \| \| \| \| AVL1 - 4 available bits\n"
1722	"%-*s \| \| \| \| \| \| AVL2 - 12 available bits\n"
1723	"%-*s Level \| \| \| \| \| \| \| page \n"
1724	/* xxxx n **** R W X EMT PAT AVL1 AVL2 xxxxxxxxxxxxx
1725	R W X 7 0 f fff 0123456701234567 */
1726	,
1727	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
1728
1729	pState->pHlp->pfnPrintf(pState->pHlp, "EPT dumping is not yet implemented, sorry.\n");
1730	/** @todo implemented EPT dumping. */
1731	rc = VERR_NOT_IMPLEMENTED;
1732	}
1733	else
1734	{
1735	if (pState->fPrintHeader)
1736	pState->pHlp->pfnPrintf(pState->pHlp,
1737	"%-*s P - Present\n"
1738	"%-*s \| R/W - Read (0) / Write (1)\n"
1739	"%-*s \| \| U/S - User (1) / Supervisor (0)\n"
1740	"%-*s \| \| \| A - Accessed\n"
1741	"%-*s \| \| \| \| D - Dirty\n"
1742	"%-*s \| \| \| \| \| G - Global\n"
1743	"%-*s \| \| \| \| \| \| WT - Write thru\n"
1744	"%-*s \| \| \| \| \| \| \| CD - Cache disable\n"
1745	"%-*s \| \| \| \| \| \| \| \| AT - Attribute table (PAT)\n"
1746	"%-*s \| \| \| \| \| \| \| \| \| NX - No execute (K8)\n"
1747	"%-*s \| \| \| \| \| \| \| \| \| \| 4K/4M/2M - Page size.\n"
1748	"%-*s \| \| \| \| \| \| \| \| \| \| \| AVL - a=allocated; m=mapping; d=track dirty;\n"
1749	"%-*s \| \| \| \| \| \| \| \| \| \| \| \| p=permanent; v=validated;\n"
1750	"%-*s Level \| \| \| \| \| \| \| \| \| \| \| \| Page\n"
1751	/* xxxx n **** P R S A D G WT CD AT NX 4M AVL xxxxxxxxxxxxx
1752	- W U - - - -- -- -- -- -- 010 */
1753	,
1754	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "",
1755	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
1756	if (pState->fLme)
1757	rc = pgmR3DumpHierarchyShwPaePML4(pState, cr3 & cr3Mask, cMaxDepth);
1758	else if (pState->fPae)
1759	rc = pgmR3DumpHierarchyShwPaePDPT(pState, cr3 & cr3Mask, cMaxDepth);
1760	else
1761	rc = pgmR3DumpHierarchyShw32BitPD(pState, cr3 & cr3Mask, cMaxDepth);
1762	}
1763
1764	if (!pState->cLeaves)
1765	pState->pHlp->pfnPrintf(pState->pHlp, "not present\n");
1766	return rc;
1767	}
1768
1769
1770	/**
1771	* dbgfR3PagingDumpEx worker.
1772	*
1773	* @returns VBox status code.
1774	* @param pVM Pointer to the VM.
1775	* @param cr3 The CR3 register value.
1776	* @param fFlags The flags, DBGFPGDMP_FLAGS_XXX.
1777	* @param u64FirstAddr The start address.
1778	* @param u64LastAddr The address to stop after.
1779	* @param cMaxDepth The max depth.
1780	* @param pHlp The output callbacks. Defaults to log if NULL.
1781	*
1782	* @internal
1783	*/
1784	VMMR3_INT_DECL(int) PGMR3DumpHierarchyShw(PVM pVM, uint64_t cr3, uint32_t fFlags, uint64_t u64FirstAddr, uint64_t u64LastAddr,
1785	uint32_t cMaxDepth, PCDBGFINFOHLP pHlp)
1786	{
1787	/* Minimal validation as we're only supposed to service DBGF. */
1788	AssertReturn(~(fFlags & ~DBGFPGDMP_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
1789	AssertReturn(!(fFlags & (DBGFPGDMP_FLAGS_CURRENT_MODE \| DBGFPGDMP_FLAGS_CURRENT_CR3)), VERR_INVALID_PARAMETER);
1790	AssertReturn(fFlags & DBGFPGDMP_FLAGS_SHADOW, VERR_INVALID_PARAMETER);
1791
1792	PGMR3DUMPHIERARCHYSTATE State;
1793	pgmR3DumpHierarchyInitState(&State, pVM, fFlags, u64FirstAddr, u64LastAddr, pHlp);
1794	return pgmR3DumpHierarchyShwDoIt(&State, cr3, cMaxDepth);
1795	}
1796
1797
1798	/**
1799	* Dumps a page table hierarchy use only physical addresses and cr4/lm flags.
1800	*
1801	* @returns VBox status code (VINF_SUCCESS).
1802	* @param pVM Pointer to the VM.
1803	* @param cr3 The root of the hierarchy.
1804	* @param cr4 The cr4, only PAE and PSE is currently used.
1805	* @param fLongMode Set if long mode, false if not long mode.
1806	* @param cMaxDepth Number of levels to dump.
1807	* @param pHlp Pointer to the output functions.
1808	*
1809	* @deprecated Use DBGFR3PagingDumpEx.
1810	*/
1811	VMMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint64_t cr3, uint64_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp)
1812	{
1813	if (!cMaxDepth)
1814	return VINF_SUCCESS;
1815
1816	PVMCPU pVCpu = VMMGetCpu(pVM);
1817	if (!pVCpu)
1818	pVCpu = &pVM->aCpus[0];
1819
1820	uint32_t fFlags = DBGFPGDMP_FLAGS_HEADER \| DBGFPGDMP_FLAGS_PRINT_CR3 \| DBGFPGDMP_FLAGS_PAGE_INFO \| DBGFPGDMP_FLAGS_SHADOW;
1821	fFlags \|= cr4 & (X86_CR4_PAE \| X86_CR4_PSE);
1822	if (fLongMode)
1823	fFlags \|= DBGFPGDMP_FLAGS_LME;
1824
1825	return DBGFR3PagingDumpEx(pVM->pUVM, pVCpu->idCpu, fFlags, cr3, 0, fLongMode ? UINT64_MAX : UINT32_MAX, cMaxDepth, pHlp);
1826	}
1827
1828
1829	/**
1830	* Maps the guest page.
1831	*
1832	* @returns VBox status code.
1833	* @param pState The dumper state.
1834	* @param GCPhys The physical address of the guest page.
1835	* @param pszDesc The description.
1836	* @param ppv Where to return the pointer.
1837	* @param pLock Where to return the mapping lock. Hand this to
1838	* PGMPhysReleasePageMappingLock when done.
1839	*/
1840	static int pgmR3DumpHierarchyGstMapPage(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, const char *pszDesc,
1841	void const **ppv, PPGMPAGEMAPLOCK pLock)
1842	{
1843	int rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, GCPhys, ppv, pLock);
1844	if (RT_FAILURE(rc))
1845	{
1846	pState->pHlp->pfnPrintf(pState->pHlp, "%0*llx error! Failed to map %s at GCPhys=%RGp: %Rrc!\n",
1847	pState->cchAddress, pState->u64Address, pszDesc, GCPhys, rc);
1848	return rc;
1849	}
1850	return VINF_SUCCESS;
1851	}
1852
1853
1854	/**
1855	* Figures out which guest page this is and dumps a summary.
1856	*
1857	* @param pState The dumper state.
1858	* @param GCPhys The page address.
1859	* @param cbPage The page size.
1860	*/
1861	static void pgmR3DumpHierarchyGstPageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, uint32_t cbPage)
1862	{
1863	char szPage[80];
1864	pgmLock(pState->pVM);
1865	PCPGMPAGE pPage = pgmPhysGetPage(pState->pVM, GCPhys);
1866	if (pPage)
1867	RTStrPrintf(szPage, sizeof(szPage), " %R[pgmpage]", pPage);
1868	else
1869	strcpy(szPage, " not found");
1870	pgmUnlock(pState->pVM);
1871	pState->pHlp->pfnPrintf(pState->pHlp, "%s", szPage);
1872	NOREF(cbPage);
1873	}
1874
1875
1876	/**
1877	* Checks the entry for reserved bits.
1878	*
1879	* @param pState The dumper state.
1880	* @param u64Entry The entry to check.
1881	*/
1882	static void pgmR3DumpHierarchyGstCheckReservedHighBits(PPGMR3DUMPHIERARCHYSTATE pState, uint64_t u64Entry)
1883	{
1884	uint32_t uRsvd = (u64Entry & pState->u64HighReservedBits) >> 52;
1885	if (uRsvd)
1886	pState->pHlp->pfnPrintf(pState->pHlp, " %u:52=%03x%s",
1887	pState->uLastRsvdBit, uRsvd, pState->fLme ? "" : "!");
1888	/** @todo check the valid physical bits as well. */
1889	}
1890
1891
1892	/**
1893	* Dumps a PAE shadow page table.
1894	*
1895	* @returns VBox status code (VINF_SUCCESS).
1896	* @param pState The dumper state.
1897	* @param GCPhys The page table address.
1898	*/
1899	static int pgmR3DumpHierarchyGstPaePT(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys)
1900	{
1901	PCX86PTPAE pPT;
1902	PGMPAGEMAPLOCK Lock;
1903	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page table", (void const **)&pPT, &Lock);
1904	if (RT_FAILURE(rc))
1905	return rc;
1906
1907	uint32_t iFirst, iLast;
1908	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1909	for (uint32_t i = iFirst; i <= iLast; i++)
1910	{
1911	X86PTEPAE Pte = pPT->a[i];
1912	if (Pte.n.u1Present)
1913	{
1914	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PT_PAE_SHIFT);
1915	pState->pHlp->pfnPrintf(pState->pHlp,
1916	pState->fLme /P R S A D G WT CD AT NX 4M a p ? /
1917	? "%016llx 3 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx"
1918	: "%08llx 2 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx",
1919	pState->u64Address,
1920	Pte.n.u1Write ? 'W' : 'R',
1921	Pte.n.u1User ? 'U' : 'S',
1922	Pte.n.u1Accessed ? 'A' : '-',
1923	Pte.n.u1Dirty ? 'D' : '-',
1924	Pte.n.u1Global ? 'G' : '-',
1925	Pte.n.u1WriteThru ? "WT" : "--",
1926	Pte.n.u1CacheDisable? "CD" : "--",
1927	Pte.n.u1PAT ? "AT" : "--",
1928	Pte.n.u1NoExecute ? "NX" : "--",
1929	Pte.u & RT_BIT(9) ? '1' : '0',
1930	Pte.u & RT_BIT(10) ? '1' : '0',
1931	Pte.u & RT_BIT(11) ? '1' : '0',
1932	Pte.u & X86_PTE_PAE_PG_MASK);
1933	if (pState->fDumpPageInfo)
1934	pgmR3DumpHierarchyGstPageInfo(pState, Pte.u & X86_PTE_PAE_PG_MASK, _4K);
1935	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pte.u);
1936	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1937	pState->cLeaves++;
1938	}
1939	}
1940
1941	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
1942	return VINF_SUCCESS;
1943	}
1944
1945
1946	/**
1947	* Dumps a PAE shadow page directory table.
1948	*
1949	* @returns VBox status code (VINF_SUCCESS).
1950	* @param pState The dumper state.
1951	* @param GCPhys The physical address of the table.
1952	* @param cMaxDepth The maximum depth.
1953	*/
1954	static int pgmR3DumpHierarchyGstPaePD(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, unsigned cMaxDepth)
1955	{
1956	PCX86PDPAE pPD;
1957	PGMPAGEMAPLOCK Lock;
1958	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page directory", (void const **)&pPD, &Lock);
1959	if (RT_FAILURE(rc))
1960	return rc;
1961
1962	Assert(cMaxDepth > 0);
1963	cMaxDepth--;
1964
1965	uint32_t iFirst, iLast;
1966	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PD_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1967	for (uint32_t i = iFirst; i <= iLast; i++)
1968	{
1969	X86PDEPAE Pde = pPD->a[i];
1970	if (Pde.n.u1Present)
1971	{
1972	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PD_PAE_SHIFT);
1973	if (Pde.b.u1Size)
1974	{
1975	pState->pHlp->pfnPrintf(pState->pHlp,
1976	pState->fLme /P R S A D G WT CD AT NX 2M a p ? phys/
1977	? "%016llx 2 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx"
1978	: "%08llx 1 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx",
1979	pState->u64Address,
1980	Pde.b.u1Write ? 'W' : 'R',
1981	Pde.b.u1User ? 'U' : 'S',
1982	Pde.b.u1Accessed ? 'A' : '-',
1983	Pde.b.u1Dirty ? 'D' : '-',
1984	Pde.b.u1Global ? 'G' : '-',
1985	Pde.b.u1WriteThru ? "WT" : "--",
1986	Pde.b.u1CacheDisable ? "CD" : "--",
1987	Pde.b.u1PAT ? "AT" : "--",
1988	Pde.b.u1NoExecute ? "NX" : "--",
1989	Pde.u & RT_BIT_64(9) ? '1' : '0',
1990	Pde.u & RT_BIT_64(10) ? '1' : '0',
1991	Pde.u & RT_BIT_64(11) ? '1' : '0',
1992	Pde.u & X86_PDE2M_PAE_PG_MASK);
1993	if (pState->fDumpPageInfo)
1994	pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE2M_PAE_PG_MASK, _2M);
1995	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pde.u);
1996	if ((Pde.u >> 13) & 0xff)
1997	pState->pHlp->pfnPrintf(pState->pHlp, " 20:13=%02llx%s", (Pde.u >> 13) & 0x0ff, pState->fLme ? "" : "!");
1998	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1999
2000	pState->cLeaves++;
2001	}
2002	else
2003	{
2004	pState->pHlp->pfnPrintf(pState->pHlp,
2005	pState->fLme /P R S A D G WT CD AT NX 4M a p ? phys /
2006	? "%016llx 2 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx"
2007	: "%08llx 1 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx",
2008	pState->u64Address,
2009	Pde.n.u1Write ? 'W' : 'R',
2010	Pde.n.u1User ? 'U' : 'S',
2011	Pde.n.u1Accessed ? 'A' : '-',
2012	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
2013	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
2014	Pde.n.u1WriteThru ? "WT" : "--",
2015	Pde.n.u1CacheDisable ? "CD" : "--",
2016	Pde.n.u1NoExecute ? "NX" : "--",
2017	Pde.u & RT_BIT_64(9) ? '1' : '0',
2018	Pde.u & RT_BIT_64(10) ? '1' : '0',
2019	Pde.u & RT_BIT_64(11) ? '1' : '0',
2020	Pde.u & X86_PDE_PAE_PG_MASK);
2021	if (pState->fDumpPageInfo)
2022	pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK, _4K);
2023	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pde.u);
2024	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2025
2026	if (cMaxDepth)
2027	{
2028	int rc2 = pgmR3DumpHierarchyGstPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK);
2029	if (rc2 < rc && RT_SUCCESS(rc))
2030	rc = rc2;
2031	}
2032	else
2033	pState->cLeaves++;
2034	}
2035	}
2036	}
2037
2038	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2039	return rc;
2040	}
2041
2042
2043	/**
2044	* Dumps a PAE shadow page directory pointer table.
2045	*
2046	* @returns VBox status code (VINF_SUCCESS).
2047	* @param pState The dumper state.
2048	* @param GCPhys The physical address of the table.
2049	* @param cMaxDepth The maximum depth.
2050	*/
2051	static int pgmR3DumpHierarchyGstPaePDPT(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, unsigned cMaxDepth)
2052	{
2053	/* Fend of addresses that are out of range in PAE mode - simplifies the code below. */
2054	if (!pState->fLme && pState->u64Address >= _4G)
2055	return VINF_SUCCESS;
2056
2057	PCX86PDPT pPDPT;
2058	PGMPAGEMAPLOCK Lock;
2059	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page directory pointer table", (void const **)&pPDPT, &Lock);
2060	if (RT_FAILURE(rc))
2061	return rc;
2062
2063	Assert(cMaxDepth > 0);
2064	cMaxDepth--;
2065
2066	uint32_t iFirst, iLast;
2067	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PDPT_SHIFT,
2068	pState->fLme ? X86_PG_AMD64_PDPE_ENTRIES : X86_PG_PAE_PDPE_ENTRIES,
2069	&iFirst, &iLast);
2070	for (uint32_t i = iFirst; i <= iLast; i++)
2071	{
2072	X86PDPE Pdpe = pPDPT->a[i];
2073	if (Pdpe.n.u1Present)
2074	{
2075	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PDPT_SHIFT);
2076	if (pState->fLme)
2077	{
2078	/** @todo Do 1G pages. */
2079	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX .. a p ? /
2080	"%016llx 1 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
2081	pState->u64Address,
2082	Pdpe.lm.u1Write ? 'W' : 'R',
2083	Pdpe.lm.u1User ? 'U' : 'S',
2084	Pdpe.lm.u1Accessed ? 'A' : '-',
2085	Pdpe.lm.u3Reserved & 1 ? '?' : '.', /* ignored */
2086	Pdpe.lm.u3Reserved & 4 ? '!' : '.', /* mbz */
2087	Pdpe.lm.u1WriteThru ? "WT" : "--",
2088	Pdpe.lm.u1CacheDisable ? "CD" : "--",
2089	Pdpe.lm.u3Reserved & 2 ? "!" : "..",/* mbz */
2090	Pdpe.lm.u1NoExecute ? "NX" : "--",
2091	Pdpe.u & RT_BIT_64(9) ? '1' : '0',
2092	Pdpe.u & RT_BIT_64(10) ? '1' : '0',
2093	Pdpe.u & RT_BIT_64(11) ? '1' : '0',
2094	Pdpe.u & X86_PDPE_PG_MASK);
2095	if (pState->fDumpPageInfo)
2096	pgmR3DumpHierarchyGstPageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK, _4K);
2097	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pdpe.u);
2098	}
2099	else
2100	{
2101	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX .. a p ? /
2102	"%08llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
2103	pState->u64Address,
2104	Pdpe.n.u2Reserved & 1 ? '!' : '.', /* mbz */
2105	Pdpe.n.u2Reserved & 2 ? '!' : '.', /* mbz */
2106	Pdpe.n.u4Reserved & 1 ? '!' : '.', /* mbz */
2107	Pdpe.n.u4Reserved & 2 ? '!' : '.', /* mbz */
2108	Pdpe.n.u4Reserved & 8 ? '!' : '.', /* mbz */
2109	Pdpe.n.u1WriteThru ? "WT" : "--",
2110	Pdpe.n.u1CacheDisable ? "CD" : "--",
2111	Pdpe.n.u4Reserved & 2 ? "!" : "..", /* mbz */
2112	Pdpe.lm.u1NoExecute ? "!!" : "..",/* mbz */
2113	Pdpe.u & RT_BIT_64(9) ? '1' : '0',
2114	Pdpe.u & RT_BIT_64(10) ? '1' : '0',
2115	Pdpe.u & RT_BIT_64(11) ? '1' : '0',
2116	Pdpe.u & X86_PDPE_PG_MASK);
2117	if (pState->fDumpPageInfo)
2118	pgmR3DumpHierarchyGstPageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK, _4K);
2119	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pdpe.u);
2120	}
2121	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2122
2123	if (cMaxDepth)
2124	{
2125	int rc2 = pgmR3DumpHierarchyGstPaePD(pState, Pdpe.u & X86_PDPE_PG_MASK, cMaxDepth);
2126	if (rc2 < rc && RT_SUCCESS(rc))
2127	rc = rc2;
2128	}
2129	else
2130	pState->cLeaves++;
2131	}
2132	}
2133
2134	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2135	return rc;
2136	}
2137
2138
2139	/**
2140	* Dumps a 32-bit shadow page table.
2141	*
2142	* @returns VBox status code (VINF_SUCCESS).
2143	* @param pVM Pointer to the VM.
2144	* @param GCPhys The physical address of the table.
2145	* @param cMaxDepth The maximum depth.
2146	*/
2147	static int pgmR3DumpHierarchyGstPaePML4(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS GCPhys, unsigned cMaxDepth)
2148	{
2149	PCX86PML4 pPML4;
2150	PGMPAGEMAPLOCK Lock;
2151	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page map level 4", (void const **)&pPML4, &Lock);
2152	if (RT_FAILURE(rc))
2153	return rc;
2154
2155	Assert(cMaxDepth);
2156	cMaxDepth--;
2157
2158	/*
2159	* This is a bit tricky as we're working on unsigned addresses while the
2160	* AMD64 spec uses signed tricks.
2161	*/
2162	uint32_t iFirst = (pState->u64FirstAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
2163	uint32_t iLast = (pState->u64LastAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
2164	if ( pState->u64LastAddress <= UINT64_C(0x00007fffffffffff)
2165	\|\| pState->u64FirstAddress >= UINT64_C(0xffff800000000000))
2166	{ /* Simple, nothing to adjust */ }
2167	else if (pState->u64FirstAddress <= UINT64_C(0x00007fffffffffff))
2168	iLast = X86_PG_AMD64_ENTRIES / 2 - 1;
2169	else if (pState->u64LastAddress >= UINT64_C(0xffff800000000000))
2170	iFirst = X86_PG_AMD64_ENTRIES / 2;
2171	else
2172	iFirst = X86_PG_AMD64_ENTRIES; /* neither address is canonical */
2173
2174	for (uint32_t i = iFirst; i <= iLast; i++)
2175	{
2176	X86PML4E Pml4e = pPML4->a[i];
2177	if (Pml4e.n.u1Present)
2178	{
2179	pState->u64Address = ((uint64_t)i << X86_PML4_SHIFT)
2180	\| (i >= RT_ELEMENTS(pPML4->a) / 2 ? UINT64_C(0xffff000000000000) : 0);
2181	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX 4M a p ? /
2182	"%016llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
2183	pState->u64Address,
2184	Pml4e.n.u1Write ? 'W' : 'R',
2185	Pml4e.n.u1User ? 'U' : 'S',
2186	Pml4e.n.u1Accessed ? 'A' : '-',
2187	Pml4e.n.u3Reserved & 1 ? '?' : '.', /* ignored */
2188	Pml4e.n.u3Reserved & 4 ? '!' : '.', /* mbz */
2189	Pml4e.n.u1WriteThru ? "WT" : "--",
2190	Pml4e.n.u1CacheDisable ? "CD" : "--",
2191	Pml4e.n.u3Reserved & 2 ? "!" : "..",/* mbz */
2192	Pml4e.n.u1NoExecute ? "NX" : "--",
2193	Pml4e.u & RT_BIT_64(9) ? '1' : '0',
2194	Pml4e.u & RT_BIT_64(10) ? '1' : '0',
2195	Pml4e.u & RT_BIT_64(11) ? '1' : '0',
2196	Pml4e.u & X86_PML4E_PG_MASK);
2197	if (pState->fDumpPageInfo)
2198	pgmR3DumpHierarchyGstPageInfo(pState, Pml4e.u & X86_PML4E_PG_MASK, _4K);
2199	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pml4e.u);
2200	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2201
2202	if (cMaxDepth)
2203	{
2204	int rc2 = pgmR3DumpHierarchyGstPaePDPT(pState, Pml4e.u & X86_PML4E_PG_MASK, cMaxDepth);
2205	if (rc2 < rc && RT_SUCCESS(rc))
2206	rc = rc2;
2207	}
2208	else
2209	pState->cLeaves++;
2210	}
2211	}
2212
2213	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2214	return rc;
2215	}
2216
2217
2218	/**
2219	* Dumps a 32-bit shadow page table.
2220	*
2221	* @returns VBox status code (VINF_SUCCESS).
2222	* @param pState The dumper state.
2223	* @param GCPhys The physical address of the table.
2224	*/
2225	static int pgmR3DumpHierarchyGst32BitPT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS GCPhys)
2226	{
2227	PCX86PT pPT;
2228	PGMPAGEMAPLOCK Lock;
2229	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page table", (void const **)&pPT, &Lock);
2230	if (RT_FAILURE(rc))
2231	return rc;
2232
2233	uint32_t iFirst, iLast;
2234	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
2235	for (uint32_t i = iFirst; i <= iLast; i++)
2236	{
2237	X86PTE Pte = pPT->a[i];
2238	if (Pte.n.u1Present)
2239	{
2240	pState->u64Address = u64BaseAddress + (i << X86_PT_SHIFT);
2241	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d /
2242	"%08llx 1 \| P %c %c %c %c %c %s %s %s .. 4K %c%c%c %08x",
2243	pState->u64Address,
2244	Pte.n.u1Write ? 'W' : 'R',
2245	Pte.n.u1User ? 'U' : 'S',
2246	Pte.n.u1Accessed ? 'A' : '-',
2247	Pte.n.u1Dirty ? 'D' : '-',
2248	Pte.n.u1Global ? 'G' : '-',
2249	Pte.n.u1WriteThru ? "WT" : "--",
2250	Pte.n.u1CacheDisable ? "CD" : "--",
2251	Pte.n.u1PAT ? "AT" : "--",
2252	Pte.u & RT_BIT_32(9) ? '1' : '0',
2253	Pte.u & RT_BIT_32(10) ? '1' : '0',
2254	Pte.u & RT_BIT_32(11) ? '1' : '0',
2255	Pte.u & X86_PDE_PG_MASK);
2256	if (pState->fDumpPageInfo)
2257	pgmR3DumpHierarchyGstPageInfo(pState, Pte.u & X86_PDE_PG_MASK, _4K);
2258	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2259	}
2260	}
2261
2262	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2263	return VINF_SUCCESS;
2264	}
2265
2266
2267	/**
2268	* Dumps a 32-bit shadow page directory and page tables.
2269	*
2270	* @returns VBox status code (VINF_SUCCESS).
2271	* @param pState The dumper state.
2272	* @param GCPhys The physical address of the table.
2273	* @param cMaxDepth The maximum depth.
2274	*/
2275	static int pgmR3DumpHierarchyGst32BitPD(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS GCPhys, unsigned cMaxDepth)
2276	{
2277	if (pState->u64Address >= _4G)
2278	return VINF_SUCCESS;
2279
2280	PCX86PD pPD;
2281	PGMPAGEMAPLOCK Lock;
2282	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page directory", (void const **)&pPD, &Lock);
2283	if (RT_FAILURE(rc))
2284	return rc;
2285
2286	Assert(cMaxDepth > 0);
2287	cMaxDepth--;
2288
2289	uint32_t iFirst, iLast;
2290	pgmR3DumpHierarchyCalcRange(pState, X86_PD_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
2291	for (uint32_t i = iFirst; i <= iLast; i++)
2292	{
2293	X86PDE Pde = pPD->a[i];
2294	if (Pde.n.u1Present)
2295	{
2296	pState->u64Address = (uint32_t)i << X86_PD_SHIFT;
2297	if (Pde.b.u1Size && pState->fPse)
2298	{
2299	uint64_t u64Phys = ((uint64_t)(Pde.u & X86_PDE4M_PG_HIGH_MASK) << X86_PDE4M_PG_HIGH_SHIFT)
2300	\| (Pde.u & X86_PDE4M_PG_MASK);
2301	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
2302	"%08llx 0 \| P %c %c %c %c %c %s %s %s .. 4M %c%c%c %08llx",
2303	pState->u64Address,
2304	Pde.b.u1Write ? 'W' : 'R',
2305	Pde.b.u1User ? 'U' : 'S',
2306	Pde.b.u1Accessed ? 'A' : '-',
2307	Pde.b.u1Dirty ? 'D' : '-',
2308	Pde.b.u1Global ? 'G' : '-',
2309	Pde.b.u1WriteThru ? "WT" : "--",
2310	Pde.b.u1CacheDisable ? "CD" : "--",
2311	Pde.b.u1PAT ? "AT" : "--",
2312	Pde.u & RT_BIT_32(9) ? '1' : '0',
2313	Pde.u & RT_BIT_32(10) ? '1' : '0',
2314	Pde.u & RT_BIT_32(11) ? '1' : '0',
2315	u64Phys);
2316	if (pState->fDumpPageInfo)
2317	pgmR3DumpHierarchyGstPageInfo(pState, u64Phys, _4M);
2318	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2319	pState->cLeaves++;
2320	}
2321	else
2322	{
2323	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
2324	"%08llx 0 \| P %c %c %c %c %c %s %s .. .. .. %c%c%c %08x",
2325	pState->u64Address,
2326	Pde.n.u1Write ? 'W' : 'R',
2327	Pde.n.u1User ? 'U' : 'S',
2328	Pde.n.u1Accessed ? 'A' : '-',
2329	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
2330	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
2331	Pde.n.u1WriteThru ? "WT" : "--",
2332	Pde.n.u1CacheDisable ? "CD" : "--",
2333	Pde.u & RT_BIT_32(9) ? '1' : '0',
2334	Pde.u & RT_BIT_32(10) ? '1' : '0',
2335	Pde.u & RT_BIT_32(11) ? '1' : '0',
2336	Pde.u & X86_PDE_PG_MASK);
2337	if (pState->fDumpPageInfo)
2338	pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE_PG_MASK, _4K);
2339	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2340
2341	if (cMaxDepth)
2342	{
2343	int rc2 = pgmR3DumpHierarchyGst32BitPT(pState, Pde.u & X86_PDE_PG_MASK);
2344	if (rc2 < rc && RT_SUCCESS(rc))
2345	rc = rc2;
2346	}
2347	else
2348	pState->cLeaves++;
2349	}
2350	}
2351	}
2352
2353	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2354	return rc;
2355	}
2356
2357
2358	/**
2359	* Internal worker that initiates the actual dump.
2360	*
2361	* @returns VBox status code.
2362	* @param pState The dumper state.
2363	* @param cr3 The CR3 value.
2364	* @param cMaxDepth The max depth.
2365	*/
2366	static int pgmR3DumpHierarchyGstDoIt(PPGMR3DUMPHIERARCHYSTATE pState, uint64_t cr3, unsigned cMaxDepth)
2367	{
2368	int rc;
2369	unsigned const cch = pState->cchAddress;
2370	uint64_t const cr3Mask = pState->fEpt ? X86_CR3_AMD64_PAGE_MASK
2371	: pState->fLme ? X86_CR3_AMD64_PAGE_MASK
2372	: pState->fPae ? X86_CR3_PAE_PAGE_MASK
2373	: X86_CR3_PAGE_MASK;
2374	if (pState->fPrintCr3)
2375	{
2376	const char * const pszMode = pState->fEpt ? "Extended Page Tables"
2377	: pState->fLme ? "Long Mode"
2378	: pState->fPae ? "PAE Mode"
2379	: pState->fPse ? "32-bit w/ PSE"
2380	: "32-bit";
2381	pState->pHlp->pfnPrintf(pState->pHlp, "cr3=%0*llx", cch, cr3);
2382	if (pState->fDumpPageInfo)
2383	pgmR3DumpHierarchyGstPageInfo(pState, cr3 & X86_CR3_AMD64_PAGE_MASK, _4K);
2384	pState->pHlp->pfnPrintf(pState->pHlp, " %s%s%s\n",
2385	pszMode,
2386	pState->fNp ? " + Nested Paging" : "",
2387	pState->fNxe ? " + NX" : "");
2388	}
2389
2390
2391	if (pState->fEpt)
2392	{
2393	if (pState->fPrintHeader)
2394	pState->pHlp->pfnPrintf(pState->pHlp,
2395	"%-*s R - Readable\n"
2396	"%-*s \| W - Writeable\n"
2397	"%-*s \| \| X - Executable\n"
2398	"%-*s \| \| \| EMT - EPT memory type\n"
2399	"%-*s \| \| \| \| PAT - Ignored PAT?\n"
2400	"%-*s \| \| \| \| \| AVL1 - 4 available bits\n"
2401	"%-*s \| \| \| \| \| \| AVL2 - 12 available bits\n"
2402	"%-*s Level \| \| \| \| \| \| \| page \n"
2403	/* xxxx n **** R W X EMT PAT AVL1 AVL2 xxxxxxxxxxxxx
2404	R W X 7 0 f fff 0123456701234567 */
2405	,
2406	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
2407
2408	pState->pHlp->pfnPrintf(pState->pHlp, "EPT dumping is not yet implemented, sorry.\n");
2409	/** @todo implemented EPT dumping. */
2410	rc = VERR_NOT_IMPLEMENTED;
2411	}
2412	else
2413	{
2414	if (pState->fPrintHeader)
2415	pState->pHlp->pfnPrintf(pState->pHlp,
2416	"%-*s P - Present\n"
2417	"%-*s \| R/W - Read (0) / Write (1)\n"
2418	"%-*s \| \| U/S - User (1) / Supervisor (0)\n"
2419	"%-*s \| \| \| A - Accessed\n"
2420	"%-*s \| \| \| \| D - Dirty\n"
2421	"%-*s \| \| \| \| \| G - Global\n"
2422	"%-*s \| \| \| \| \| \| WT - Write thru\n"
2423	"%-*s \| \| \| \| \| \| \| CD - Cache disable\n"
2424	"%-*s \| \| \| \| \| \| \| \| AT - Attribute table (PAT)\n"
2425	"%-*s \| \| \| \| \| \| \| \| \| NX - No execute (K8)\n"
2426	"%-*s \| \| \| \| \| \| \| \| \| \| 4K/4M/2M - Page size.\n"
2427	"%-*s \| \| \| \| \| \| \| \| \| \| \| AVL - 3 available bits.\n"
2428	"%-*s Level \| \| \| \| \| \| \| \| \| \| \| \| Page\n"
2429	/* xxxx n **** P R S A D G WT CD AT NX 4M AVL xxxxxxxxxxxxx
2430	- W U - - - -- -- -- -- -- 010 */
2431	,
2432	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "",
2433	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
2434	if (pState->fLme)
2435	rc = pgmR3DumpHierarchyGstPaePML4(pState, cr3 & cr3Mask, cMaxDepth);
2436	else if (pState->fPae)
2437	rc = pgmR3DumpHierarchyGstPaePDPT(pState, cr3 & cr3Mask, cMaxDepth);
2438	else
2439	rc = pgmR3DumpHierarchyGst32BitPD(pState, cr3 & cr3Mask, cMaxDepth);
2440	}
2441
2442	if (!pState->cLeaves)
2443	pState->pHlp->pfnPrintf(pState->pHlp, "not present\n");
2444	return rc;
2445	}
2446
2447
2448	/**
2449	* dbgfR3PagingDumpEx worker.
2450	*
2451	* @returns VBox status code.
2452	* @param pVM Pointer to the VM.
2453	* @param cr3 The CR3 register value.
2454	* @param fFlags The flags, DBGFPGDMP_FLAGS_XXX.
2455	* @param FirstAddr The start address.
2456	* @param LastAddr The address to stop after.
2457	* @param cMaxDepth The max depth.
2458	* @param pHlp The output callbacks. Defaults to log if NULL.
2459	*
2460	* @internal
2461	*/
2462	VMMR3_INT_DECL(int) PGMR3DumpHierarchyGst(PVM pVM, uint64_t cr3, uint32_t fFlags, RTGCPTR FirstAddr, RTGCPTR LastAddr,
2463	uint32_t cMaxDepth, PCDBGFINFOHLP pHlp)
2464	{
2465	/* Minimal validation as we're only supposed to service DBGF. */
2466	AssertReturn(~(fFlags & ~DBGFPGDMP_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
2467	AssertReturn(!(fFlags & (DBGFPGDMP_FLAGS_CURRENT_MODE \| DBGFPGDMP_FLAGS_CURRENT_CR3)), VERR_INVALID_PARAMETER);
2468	AssertReturn(fFlags & DBGFPGDMP_FLAGS_GUEST, VERR_INVALID_PARAMETER);
2469
2470	PGMR3DUMPHIERARCHYSTATE State;
2471	pgmR3DumpHierarchyInitState(&State, pVM, fFlags, FirstAddr, LastAddr, pHlp);
2472	return pgmR3DumpHierarchyGstDoIt(&State, cr3, cMaxDepth);
2473	}
2474

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source: vbox/trunk/src/VBox/VMM/VMMR3/PGMDbg.cpp@ 57329

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