PGMDbg.cpp@ 84909

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1	/* $Id: PGMDbg.cpp 82968 2020-02-04 10:35:17Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor - Debugger & Debugging APIs.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PGM
23	#include <VBox/vmm/pgm.h>
24	#include <VBox/vmm/stam.h>
25	#include "PGMInternal.h"
26	#include <VBox/vmm/vm.h>
27	#include <VBox/vmm/uvm.h>
28	#include "PGMInline.h"
29	#include <iprt/assert.h>
30	#include <iprt/asm.h>
31	#include <iprt/string.h>
32	#include <VBox/log.h>
33	#include <VBox/param.h>
34	#include <VBox/err.h>
35
36
37	/*********************************************************************************************************************************
38	* Defined Constants And Macros *
39	*********************************************************************************************************************************/
40	/** The max needle size that we will bother searching for
41	* This must not be more than half a page! */
42	#define MAX_NEEDLE_SIZE 256
43
44
45	/*********************************************************************************************************************************
46	* Structures and Typedefs *
47	*********************************************************************************************************************************/
48	/**
49	* State structure for the paging hierarchy dumpers.
50	*/
51	typedef struct PGMR3DUMPHIERARCHYSTATE
52	{
53	/** Pointer to the VM. */
54	PVM pVM;
55	/** Output helpers. */
56	PCDBGFINFOHLP pHlp;
57	/** Set if PSE, PAE or long mode is enabled. */
58	bool fPse;
59	/** Set if PAE or long mode is enabled. */
60	bool fPae;
61	/** Set if long mode is enabled. */
62	bool fLme;
63	/** Set if nested paging. */
64	bool fNp;
65	/** Set if EPT. */
66	bool fEpt;
67	/** Set if NXE is enabled. */
68	bool fNxe;
69	/** The number or chars the address needs. */
70	uint8_t cchAddress;
71	/** The last reserved bit. */
72	uint8_t uLastRsvdBit;
73	/** Dump the page info as well (shadow page summary / guest physical
74	* page summary). */
75	bool fDumpPageInfo;
76	/** Whether or not to print the header. */
77	bool fPrintHeader;
78	/** Whether to print the CR3 value */
79	bool fPrintCr3;
80	/** Padding*/
81	bool afReserved[5];
82	/** The current address. */
83	uint64_t u64Address;
84	/** The last address to dump structures for. */
85	uint64_t u64FirstAddress;
86	/** The last address to dump structures for. */
87	uint64_t u64LastAddress;
88	/** Mask with the high reserved bits set. */
89	uint64_t u64HighReservedBits;
90	/** The number of leaf entries that we've printed. */
91	uint64_t cLeaves;
92	} PGMR3DUMPHIERARCHYSTATE;
93	/** Pointer to the paging hierarchy dumper state. */
94	typedef PGMR3DUMPHIERARCHYSTATE *PPGMR3DUMPHIERARCHYSTATE;
95
96
97	/**
98	* Assembly scanning function.
99	*
100	* @returns Pointer to possible match or NULL.
101	* @param pvHaystack Pointer to what we search in.
102	* @param cbHaystack Number of bytes to search.
103	* @param pvNeedle Pointer to what we search for.
104	* @param cbNeedle Size of what we're searching for.
105	*/
106
107	typedef DECLCALLBACK(uint8_t const ) FNPGMR3DBGFIXEDMEMSCAN(void const pvHaystack, uint32_t cbHaystack,
108	void const *pvNeedle, size_t cbNeedle);
109	/** Pointer to an fixed size and step assembly scanner function. */
110	typedef FNPGMR3DBGFIXEDMEMSCAN *PFNPGMR3DBGFIXEDMEMSCAN;
111
112
113	/*********************************************************************************************************************************
114	* Internal Functions *
115	*********************************************************************************************************************************/
116	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan8Wide8Step(void const , uint32_t, void const *, size_t cbNeedle);
117	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan4Wide4Step(void const , uint32_t, void const *, size_t cbNeedle);
118	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan2Wide2Step(void const , uint32_t, void const *, size_t cbNeedle);
119	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan1Wide1Step(void const , uint32_t, void const *, size_t cbNeedle);
120	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan4Wide1Step(void const , uint32_t, void const *, size_t cbNeedle);
121	DECLASM(uint8_t const ) pgmR3DbgFixedMemScan8Wide1Step(void const , uint32_t, void const *, size_t cbNeedle);
122
123
124	/**
125	* Converts a R3 pointer to a GC physical address.
126	*
127	* Only for the debugger.
128	*
129	* @returns VBox status code.
130	* @retval VINF_SUCCESS on success, *pGCPhys is set.
131	* @retval VERR_INVALID_POINTER if the pointer is not within the GC physical memory.
132	*
133	* @param pUVM The user mode VM handle.
134	* @param R3Ptr The R3 pointer to convert.
135	* @param pGCPhys Where to store the GC physical address on success.
136	*/
137	VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys)
138	{
139	NOREF(pUVM); NOREF(R3Ptr);
140	*pGCPhys = NIL_RTGCPHYS;
141	return VERR_NOT_IMPLEMENTED;
142	}
143
144
145	/**
146	* Converts a R3 pointer to a HC physical address.
147	*
148	* Only for the debugger.
149	*
150	* @returns VBox status code.
151	* @retval VINF_SUCCESS on success, *pHCPhys is set.
152	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical page but has no physical backing.
153	* @retval VERR_INVALID_POINTER if the pointer is not within the GC physical memory.
154	*
155	* @param pUVM The user mode VM handle.
156	* @param R3Ptr The R3 pointer to convert.
157	* @param pHCPhys Where to store the HC physical address on success.
158	*/
159	VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys)
160	{
161	NOREF(pUVM); NOREF(R3Ptr);
162	*pHCPhys = NIL_RTHCPHYS;
163	return VERR_NOT_IMPLEMENTED;
164	}
165
166
167	/**
168	* Converts a HC physical address to a GC physical address.
169	*
170	* Only for the debugger.
171	*
172	* @returns VBox status code
173	* @retval VINF_SUCCESS on success, *pGCPhys is set.
174	* @retval VERR_INVALID_POINTER if the HC physical address is not within the GC physical memory.
175	*
176	* @param pUVM The user mode VM handle.
177	* @param HCPhys The HC physical address to convert.
178	* @param pGCPhys Where to store the GC physical address on success.
179	*/
180	VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PUVM pUVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys)
181	{
182	UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
183	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
184
185	/*
186	* Validate and adjust the input a bit.
187	*/
188	if (HCPhys == NIL_RTHCPHYS)
189	return VERR_INVALID_POINTER;
190	unsigned off = HCPhys & PAGE_OFFSET_MASK;
191	HCPhys &= X86_PTE_PAE_PG_MASK;
192	if (HCPhys == 0)
193	return VERR_INVALID_POINTER;
194
195	for (PPGMRAMRANGE pRam = pUVM->pVM->pgm.s.CTX_SUFF(pRamRangesX);
196	pRam;
197	pRam = pRam->CTX_SUFF(pNext))
198	{
199	uint32_t iPage = pRam->cb >> PAGE_SHIFT;
200	while (iPage-- > 0)
201	if (PGM_PAGE_GET_HCPHYS(&pRam->aPages[iPage]) == HCPhys)
202	{
203	*pGCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT) + off;
204	return VINF_SUCCESS;
205	}
206	}
207	return VERR_INVALID_POINTER;
208	}
209
210
211	/**
212	* Read physical memory API for the debugger, similar to
213	* PGMPhysSimpleReadGCPhys.
214	*
215	* @returns VBox status code.
216	*
217	* @param pVM The cross context VM structure.
218	* @param pvDst Where to store what's read.
219	* @param GCPhysSrc Where to start reading from.
220	* @param cb The number of bytes to attempt reading.
221	* @param fFlags Flags, MBZ.
222	* @param pcbRead For store the actual number of bytes read, pass NULL if
223	* partial reads are unwanted.
224	* @todo Unused?
225	*/
226	VMMR3_INT_DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t pcbRead)
227	{
228	/* validate */
229	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
230	AssertReturn(pVM, VERR_INVALID_PARAMETER);
231
232	/* try simple first. */
233	int rc = PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc, cb);
234	if (RT_SUCCESS(rc) \|\| !pcbRead)
235	return rc;
236
237	/* partial read that failed, chop it up in pages. */
238	*pcbRead = 0;
239	rc = VINF_SUCCESS;
240	while (cb > 0)
241	{
242	size_t cbChunk = PAGE_SIZE;
243	cbChunk -= GCPhysSrc & PAGE_OFFSET_MASK;
244	if (cbChunk > cb)
245	cbChunk = cb;
246
247	rc = PGMPhysSimpleReadGCPhys(pVM, pvDst, GCPhysSrc, cbChunk);
248
249	/* advance */
250	if (RT_FAILURE(rc))
251	break;
252	*pcbRead += cbChunk;
253	cb -= cbChunk;
254	GCPhysSrc += cbChunk;
255	pvDst = (uint8_t *)pvDst + cbChunk;
256	}
257
258	return *pcbRead && RT_FAILURE(rc) ? -rc : rc;
259	}
260
261
262	/**
263	* Write physical memory API for the debugger, similar to
264	* PGMPhysSimpleWriteGCPhys.
265	*
266	* @returns VBox status code.
267	*
268	* @param pVM The cross context VM structure.
269	* @param GCPhysDst Where to start writing.
270	* @param pvSrc What to write.
271	* @param cb The number of bytes to attempt writing.
272	* @param fFlags Flags, MBZ.
273	* @param pcbWritten For store the actual number of bytes written, pass NULL
274	* if partial writes are unwanted.
275	* @todo Unused?
276	*/
277	VMMR3_INT_DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void pvSrc, size_t cb, uint32_t fFlags, size_t pcbWritten)
278	{
279	/* validate */
280	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
281	AssertReturn(pVM, VERR_INVALID_PARAMETER);
282
283	/* try simple first. */
284	int rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysDst, pvSrc, cb);
285	if (RT_SUCCESS(rc) \|\| !pcbWritten)
286	return rc;
287
288	/* partial write that failed, chop it up in pages. */
289	*pcbWritten = 0;
290	rc = VINF_SUCCESS;
291	while (cb > 0)
292	{
293	size_t cbChunk = PAGE_SIZE;
294	cbChunk -= GCPhysDst & PAGE_OFFSET_MASK;
295	if (cbChunk > cb)
296	cbChunk = cb;
297
298	rc = PGMPhysSimpleWriteGCPhys(pVM, GCPhysDst, pvSrc, cbChunk);
299
300	/* advance */
301	if (RT_FAILURE(rc))
302	break;
303	*pcbWritten += cbChunk;
304	cb -= cbChunk;
305	GCPhysDst += cbChunk;
306	pvSrc = (uint8_t const *)pvSrc + cbChunk;
307	}
308
309	return *pcbWritten && RT_FAILURE(rc) ? -rc : rc;
310
311	}
312
313
314	/**
315	* Read virtual memory API for the debugger, similar to PGMPhysSimpleReadGCPtr.
316	*
317	* @returns VBox status code.
318	*
319	* @param pVM The cross context VM structure.
320	* @param pvDst Where to store what's read.
321	* @param GCPtrSrc Where to start reading from.
322	* @param cb The number of bytes to attempt reading.
323	* @param fFlags Flags, MBZ.
324	* @param pcbRead For store the actual number of bytes read, pass NULL if
325	* partial reads are unwanted.
326	* @todo Unused?
327	*/
328	VMMR3_INT_DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t pcbRead)
329	{
330	/* validate */
331	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
332	AssertReturn(pVM, VERR_INVALID_PARAMETER);
333
334	/** @todo SMP support! */
335	PVMCPU pVCpu = pVM->apCpusR3[0];
336
337	/** @todo deal with HMA */
338	/* try simple first. */
339	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCPtrSrc, cb);
340	if (RT_SUCCESS(rc) \|\| !pcbRead)
341	return rc;
342
343	/* partial read that failed, chop it up in pages. */
344	*pcbRead = 0;
345	rc = VINF_SUCCESS;
346	while (cb > 0)
347	{
348	size_t cbChunk = PAGE_SIZE;
349	cbChunk -= GCPtrSrc & PAGE_OFFSET_MASK;
350	if (cbChunk > cb)
351	cbChunk = cb;
352
353	rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCPtrSrc, cbChunk);
354
355	/* advance */
356	if (RT_FAILURE(rc))
357	break;
358	*pcbRead += cbChunk;
359	cb -= cbChunk;
360	GCPtrSrc += cbChunk;
361	pvDst = (uint8_t *)pvDst + cbChunk;
362	}
363
364	return *pcbRead && RT_FAILURE(rc) ? -rc : rc;
365
366	}
367
368
369	/**
370	* Write virtual memory API for the debugger, similar to
371	* PGMPhysSimpleWriteGCPtr.
372	*
373	* @returns VBox status code.
374	*
375	* @param pVM The cross context VM structure.
376	* @param GCPtrDst Where to start writing.
377	* @param pvSrc What to write.
378	* @param cb The number of bytes to attempt writing.
379	* @param fFlags Flags, MBZ.
380	* @param pcbWritten For store the actual number of bytes written, pass NULL
381	* if partial writes are unwanted.
382	* @todo Unused?
383	*/
384	VMMR3_INT_DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const pvSrc, size_t cb, uint32_t fFlags, size_t pcbWritten)
385	{
386	/* validate */
387	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
388	AssertReturn(pVM, VERR_INVALID_PARAMETER);
389
390	/** @todo SMP support! */
391	PVMCPU pVCpu = pVM->apCpusR3[0];
392
393	/** @todo deal with HMA */
394	/* try simple first. */
395	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cb);
396	if (RT_SUCCESS(rc) \|\| !pcbWritten)
397	return rc;
398
399	/* partial write that failed, chop it up in pages. */
400	*pcbWritten = 0;
401	rc = VINF_SUCCESS;
402	while (cb > 0)
403	{
404	size_t cbChunk = PAGE_SIZE;
405	cbChunk -= GCPtrDst & PAGE_OFFSET_MASK;
406	if (cbChunk > cb)
407	cbChunk = cb;
408
409	rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCPtrDst, pvSrc, cbChunk);
410
411	/* advance */
412	if (RT_FAILURE(rc))
413	break;
414	*pcbWritten += cbChunk;
415	cb -= cbChunk;
416	GCPtrDst += cbChunk;
417	pvSrc = (uint8_t const *)pvSrc + cbChunk;
418	}
419
420	return *pcbWritten && RT_FAILURE(rc) ? -rc : rc;
421
422	}
423
424
425	/**
426	* memchr() with alignment considerations.
427	*
428	* @returns Pointer to matching byte, NULL if none found.
429	* @param pb Where to search. Aligned.
430	* @param b What to search for.
431	* @param cb How much to search .
432	* @param uAlign The alignment restriction of the result.
433	*/
434	static const uint8_t pgmR3DbgAlignedMemChr(const uint8_t pb, uint8_t b, size_t cb, uint32_t uAlign)
435	{
436	const uint8_t *pbRet;
437	if (uAlign <= 32)
438	{
439	pbRet = (const uint8_t *)memchr(pb, b, cb);
440	if ((uintptr_t)pbRet & (uAlign - 1))
441	{
442	do
443	{
444	pbRet++;
445	size_t cbLeft = cb - (pbRet - pb);
446	if (!cbLeft)
447	{
448	pbRet = NULL;
449	break;
450	}
451	pbRet = (const uint8_t *)memchr(pbRet, b, cbLeft);
452	} while ((uintptr_t)pbRet & (uAlign - 1));
453	}
454	}
455	else
456	{
457	pbRet = NULL;
458	if (cb)
459	{
460	for (;;)
461	{
462	if (*pb == b)
463	{
464	pbRet = pb;
465	break;
466	}
467	if (cb <= uAlign)
468	break;
469	cb -= uAlign;
470	pb += uAlign;
471	}
472	}
473	}
474	return pbRet;
475	}
476
477
478	/**
479	* Scans a page for a byte string, keeping track of potential
480	* cross page matches.
481	*
482	* @returns true and *poff on match.
483	* false on mismatch.
484	* @param pbPage Pointer to the current page.
485	* @param poff Input: The offset into the page (aligned).
486	* Output: The page offset of the match on success.
487	* @param cb The number of bytes to search, starting of *poff.
488	* @param uAlign The needle alignment. This is of course less than a page.
489	* @param pabNeedle The byte string to search for.
490	* @param cbNeedle The length of the byte string.
491	* @param pfnFixedMemScan Pointer to assembly scan function, if available for
492	* the given needle and alignment combination.
493	* @param pabPrev The buffer that keeps track of a partial match that we
494	* bring over from the previous page. This buffer must be
495	* at least cbNeedle - 1 big.
496	* @param pcbPrev Input: The number of partial matching bytes from the previous page.
497	* Output: The number of partial matching bytes from this page.
498	* Initialize to 0 before the first call to this function.
499	*/
500	static bool pgmR3DbgScanPage(const uint8_t pbPage, int32_t poff, uint32_t cb, uint32_t uAlign,
501	const uint8_t *pabNeedle, size_t cbNeedle, PFNPGMR3DBGFIXEDMEMSCAN pfnFixedMemScan,
502	uint8_t pabPrev, size_t pcbPrev)
503	{
504	/*
505	* Try complete any partial match from the previous page.
506	*/
507	if (*pcbPrev > 0)
508	{
509	size_t cbPrev = *pcbPrev;
510	Assert(!*poff);
511	Assert(cbPrev < cbNeedle);
512	if (!memcmp(pbPage, pabNeedle + cbPrev, cbNeedle - cbPrev))
513	{
514	if (cbNeedle - cbPrev > cb)
515	return false;
516	*poff = -(int32_t)cbPrev;
517	return true;
518	}
519
520	/* check out the remainder of the previous page. */
521	const uint8_t *pb = pabPrev;
522	for (;;)
523	{
524	if (cbPrev <= uAlign)
525	break;
526	cbPrev -= uAlign;
527	pb = pgmR3DbgAlignedMemChr(pb + uAlign, *pabNeedle, cbPrev, uAlign);
528	if (!pb)
529	break;
530	cbPrev = *pcbPrev - (pb - pabPrev);
531	if ( !memcmp(pb + 1, &pabNeedle[1], cbPrev - 1)
532	&& !memcmp(pbPage, pabNeedle + cbPrev, cbNeedle - cbPrev))
533	{
534	if (cbNeedle - cbPrev > cb)
535	return false;
536	*poff = -(int32_t)cbPrev;
537	return true;
538	}
539	}
540
541	*pcbPrev = 0;
542	}
543
544	/*
545	* Match the body of the page.
546	*/
547	const uint8_t pb = pbPage + poff;
548	const uint8_t * const pbEnd = pb + cb;
549	for (;;)
550	{
551	AssertMsg(((uintptr_t)pb & (uAlign - 1)) == 0, ("%#p %#x\n", pb, uAlign));
552	if (pfnFixedMemScan)
553	pb = pfnFixedMemScan(pb, cb, pabNeedle, cbNeedle);
554	else
555	pb = pgmR3DbgAlignedMemChr(pb, *pabNeedle, cb, uAlign);
556	if (!pb)
557	break;
558	cb = pbEnd - pb;
559	if (cb >= cbNeedle)
560	{
561	/* match? */
562	if (!memcmp(pb + 1, &pabNeedle[1], cbNeedle - 1))
563	{
564	*poff = pb - pbPage;
565	return true;
566	}
567	}
568	else
569	{
570	/* partial match at the end of the page? */
571	if (!memcmp(pb + 1, &pabNeedle[1], cb - 1))
572	{
573	/* We're copying one byte more that we really need here, but wtf. */
574	memcpy(pabPrev, pb, cb);
575	*pcbPrev = cb;
576	return false;
577	}
578	}
579
580	/* no match, skip ahead. */
581	if (cb <= uAlign)
582	break;
583	pb += uAlign;
584	cb -= uAlign;
585	}
586
587	return false;
588	}
589
590
591	static void pgmR3DbgSelectMemScanFunction(PFNPGMR3DBGFIXEDMEMSCAN *ppfnMemScan, uint32_t GCPhysAlign, size_t cbNeedle)
592	{
593	*ppfnMemScan = NULL;
594	switch (GCPhysAlign)
595	{
596	case 1:
597	if (cbNeedle >= 8)
598	*ppfnMemScan = pgmR3DbgFixedMemScan8Wide1Step;
599	else if (cbNeedle >= 4)
600	*ppfnMemScan = pgmR3DbgFixedMemScan4Wide1Step;
601	else
602	*ppfnMemScan = pgmR3DbgFixedMemScan1Wide1Step;
603	break;
604	case 2:
605	if (cbNeedle >= 2)
606	*ppfnMemScan = pgmR3DbgFixedMemScan2Wide2Step;
607	break;
608	case 4:
609	if (cbNeedle >= 4)
610	*ppfnMemScan = pgmR3DbgFixedMemScan4Wide4Step;
611	break;
612	case 8:
613	if (cbNeedle >= 8)
614	*ppfnMemScan = pgmR3DbgFixedMemScan8Wide8Step;
615	break;
616	}
617	}
618
619
620
621	/**
622	* Scans guest physical memory for a byte string.
623	*
624	* @returns VBox status codes:
625	* @retval VINF_SUCCESS and *pGCPtrHit on success.
626	* @retval VERR_DBGF_MEM_NOT_FOUND if not found.
627	* @retval VERR_INVALID_POINTER if any of the pointer arguments are invalid.
628	* @retval VERR_INVALID_ARGUMENT if any other arguments are invalid.
629	*
630	* @param pVM The cross context VM structure.
631	* @param GCPhys Where to start searching.
632	* @param cbRange The number of bytes to search.
633	* @param GCPhysAlign The alignment of the needle. Must be a power of two
634	* and less or equal to 4GB.
635	* @param pabNeedle The byte string to search for.
636	* @param cbNeedle The length of the byte string. Max 256 bytes.
637	* @param pGCPhysHit Where to store the address of the first occurrence on success.
638	*/
639	VMMR3_INT_DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, RTGCPHYS GCPhysAlign,
640	const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit)
641	{
642	/*
643	* Validate and adjust the input a bit.
644	*/
645	if (!VALID_PTR(pGCPhysHit))
646	return VERR_INVALID_POINTER;
647	*pGCPhysHit = NIL_RTGCPHYS;
648
649	if ( !VALID_PTR(pabNeedle)
650	\|\| GCPhys == NIL_RTGCPHYS)
651	return VERR_INVALID_POINTER;
652	if (!cbNeedle)
653	return VERR_INVALID_PARAMETER;
654	if (cbNeedle > MAX_NEEDLE_SIZE)
655	return VERR_INVALID_PARAMETER;
656
657	if (!cbRange)
658	return VERR_DBGF_MEM_NOT_FOUND;
659	if (GCPhys + cbNeedle - 1 < GCPhys)
660	return VERR_DBGF_MEM_NOT_FOUND;
661
662	if (!GCPhysAlign)
663	return VERR_INVALID_PARAMETER;
664	if (GCPhysAlign > UINT32_MAX)
665	return VERR_NOT_POWER_OF_TWO;
666	if (GCPhysAlign & (GCPhysAlign - 1))
667	return VERR_INVALID_PARAMETER;
668
669	if (GCPhys & (GCPhysAlign - 1))
670	{
671	RTGCPHYS Adj = GCPhysAlign - (GCPhys & (GCPhysAlign - 1));
672	if ( cbRange <= Adj
673	\|\| GCPhys + Adj < GCPhys)
674	return VERR_DBGF_MEM_NOT_FOUND;
675	GCPhys += Adj;
676	cbRange -= Adj;
677	}
678
679	const bool fAllZero = ASMMemIsZero(pabNeedle, cbNeedle);
680	const uint32_t cIncPages = GCPhysAlign <= PAGE_SIZE
681	? 1
682	: GCPhysAlign >> PAGE_SHIFT;
683	const RTGCPHYS GCPhysLast = GCPhys + cbRange - 1 >= GCPhys
684	? GCPhys + cbRange - 1
685	: ~(RTGCPHYS)0;
686
687	PFNPGMR3DBGFIXEDMEMSCAN pfnMemScan;
688	pgmR3DbgSelectMemScanFunction(&pfnMemScan, (uint32_t)GCPhysAlign, cbNeedle);
689
690	/*
691	* Search the memory - ignore MMIO and zero pages, also don't
692	* bother to match across ranges.
693	*/
694	pgmLock(pVM);
695	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRangesX);
696	pRam;
697	pRam = pRam->CTX_SUFF(pNext))
698	{
699	/*
700	* If the search range starts prior to the current ram range record,
701	* adjust the search range and possibly conclude the search.
702	*/
703	RTGCPHYS off;
704	if (GCPhys < pRam->GCPhys)
705	{
706	if (GCPhysLast < pRam->GCPhys)
707	break;
708	GCPhys = pRam->GCPhys;
709	off = 0;
710	}
711	else
712	off = GCPhys - pRam->GCPhys;
713	if (off < pRam->cb)
714	{
715	/*
716	* Iterate the relevant pages.
717	*/
718	uint8_t abPrev[MAX_NEEDLE_SIZE];
719	size_t cbPrev = 0;
720	const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
721	uint32_t iPage = off >> PAGE_SHIFT;
722	uint32_t offPage = GCPhys & PAGE_OFFSET_MASK;
723	GCPhys &= ~(RTGCPHYS)PAGE_OFFSET_MASK;
724	for (;; offPage = 0)
725	{
726	PPGMPAGE pPage = &pRam->aPages[iPage];
727	if ( ( !PGM_PAGE_IS_ZERO(pPage)
728	\|\| fAllZero)
729	&& !PGM_PAGE_IS_MMIO_OR_ALIAS(pPage)
730	&& !PGM_PAGE_IS_BALLOONED(pPage))
731	{
732	void const *pvPage;
733	PGMPAGEMAPLOCK Lock;
734	int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, &pvPage, &Lock);
735	if (RT_SUCCESS(rc))
736	{
737	int32_t offHit = offPage;
738	bool fRc;
739	if (GCPhysAlign < PAGE_SIZE)
740	{
741	uint32_t cbSearch = (GCPhys ^ GCPhysLast) & ~(RTGCPHYS)PAGE_OFFSET_MASK
742	? PAGE_SIZE - (uint32_t)offPage
743	: (GCPhysLast & PAGE_OFFSET_MASK) + 1 - (uint32_t)offPage;
744	fRc = pgmR3DbgScanPage((uint8_t const *)pvPage, &offHit, cbSearch, (uint32_t)GCPhysAlign,
745	pabNeedle, cbNeedle, pfnMemScan, &abPrev[0], &cbPrev);
746	}
747	else
748	fRc = memcmp(pvPage, pabNeedle, cbNeedle) == 0
749	&& (GCPhysLast - GCPhys) >= cbNeedle;
750	PGMPhysReleasePageMappingLock(pVM, &Lock);
751	if (fRc)
752	{
753	*pGCPhysHit = GCPhys + offHit;
754	pgmUnlock(pVM);
755	return VINF_SUCCESS;
756	}
757	}
758	else
759	cbPrev = 0; /* ignore error. */
760	}
761	else
762	cbPrev = 0;
763
764	/* advance to the next page. */
765	GCPhys += (RTGCPHYS)cIncPages << PAGE_SHIFT;
766	if (GCPhys >= GCPhysLast) /* (may not always hit, but we're run out of ranges.) */
767	{
768	pgmUnlock(pVM);
769	return VERR_DBGF_MEM_NOT_FOUND;
770	}
771	iPage += cIncPages;
772	if ( iPage < cIncPages
773	\|\| iPage >= cPages)
774	break;
775	}
776	}
777	}
778	pgmUnlock(pVM);
779	return VERR_DBGF_MEM_NOT_FOUND;
780	}
781
782
783	/**
784	* Scans (guest) virtual memory for a byte string.
785	*
786	* @returns VBox status codes:
787	* @retval VINF_SUCCESS and *pGCPtrHit on success.
788	* @retval VERR_DBGF_MEM_NOT_FOUND if not found.
789	* @retval VERR_INVALID_POINTER if any of the pointer arguments are invalid.
790	* @retval VERR_INVALID_ARGUMENT if any other arguments are invalid.
791	*
792	* @param pVM The cross context VM structure.
793	* @param pVCpu The cross context virtual CPU structure of the CPU
794	* context to search from.
795	* @param GCPtr Where to start searching.
796	* @param GCPtrAlign The alignment of the needle. Must be a power of two
797	* and less or equal to 4GB.
798	* @param cbRange The number of bytes to search. Max 256 bytes.
799	* @param pabNeedle The byte string to search for.
800	* @param cbNeedle The length of the byte string.
801	* @param pGCPtrHit Where to store the address of the first occurrence on success.
802	*/
803	VMMR3_INT_DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, RTGCPTR GCPtrAlign,
804	const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPtrHit)
805	{
806	VMCPU_ASSERT_EMT(pVCpu);
807
808	/*
809	* Validate and adjust the input a bit.
810	*/
811	if (!VALID_PTR(pGCPtrHit))
812	return VERR_INVALID_POINTER;
813	*pGCPtrHit = 0;
814
815	if (!VALID_PTR(pabNeedle))
816	return VERR_INVALID_POINTER;
817	if (!cbNeedle)
818	return VERR_INVALID_PARAMETER;
819	if (cbNeedle > MAX_NEEDLE_SIZE)
820	return VERR_INVALID_PARAMETER;
821
822	if (!cbRange)
823	return VERR_DBGF_MEM_NOT_FOUND;
824	if (GCPtr + cbNeedle - 1 < GCPtr)
825	return VERR_DBGF_MEM_NOT_FOUND;
826
827	if (!GCPtrAlign)
828	return VERR_INVALID_PARAMETER;
829	if (GCPtrAlign > UINT32_MAX)
830	return VERR_NOT_POWER_OF_TWO;
831	if (GCPtrAlign & (GCPtrAlign - 1))
832	return VERR_INVALID_PARAMETER;
833
834	if (GCPtr & (GCPtrAlign - 1))
835	{
836	RTGCPTR Adj = GCPtrAlign - (GCPtr & (GCPtrAlign - 1));
837	if ( cbRange <= Adj
838	\|\| GCPtr + Adj < GCPtr)
839	return VERR_DBGF_MEM_NOT_FOUND;
840	GCPtr += Adj;
841	cbRange -= Adj;
842	}
843
844	/* Only paged protected mode or long mode here, use the physical scan for
845	the other modes. */
846	PGMMODE enmMode = PGMGetGuestMode(pVCpu);
847	AssertReturn(PGMMODE_WITH_PAGING(enmMode), VERR_PGM_NOT_USED_IN_MODE);
848
849	/*
850	* Search the memory - ignore MMIO, zero and not-present pages.
851	*/
852	const bool fAllZero = ASMMemIsZero(pabNeedle, cbNeedle);
853	RTGCPTR GCPtrMask = PGMMODE_IS_LONG_MODE(enmMode) ? UINT64_MAX : UINT32_MAX;
854	uint8_t abPrev[MAX_NEEDLE_SIZE];
855	size_t cbPrev = 0;
856	const uint32_t cIncPages = GCPtrAlign <= PAGE_SIZE
857	? 1
858	: GCPtrAlign >> PAGE_SHIFT;
859	const RTGCPTR GCPtrLast = GCPtr + cbRange - 1 >= GCPtr
860	? (GCPtr + cbRange - 1) & GCPtrMask
861	: GCPtrMask;
862	RTGCPTR cPages = (((GCPtrLast - GCPtr) + (GCPtr & PAGE_OFFSET_MASK)) >> PAGE_SHIFT) + 1;
863	uint32_t offPage = GCPtr & PAGE_OFFSET_MASK;
864	GCPtr &= ~(RTGCPTR)PAGE_OFFSET_MASK;
865
866	PFNPGMR3DBGFIXEDMEMSCAN pfnMemScan;
867	pgmR3DbgSelectMemScanFunction(&pfnMemScan, (uint32_t)GCPtrAlign, cbNeedle);
868
869	VMSTATE enmVMState = pVM->enmVMState;
870	uint32_t const cYieldCountDownReload = VMSTATE_IS_RUNNING(enmVMState) ? 4096 : 65536;
871	uint32_t cYieldCountDown = cYieldCountDownReload;
872	RTGCPHYS GCPhysPrev = NIL_RTGCPHYS;
873	bool fFullWalk = true;
874	PGMPTWALKGST Walk;
875	RT_ZERO(Walk);
876
877	pgmLock(pVM);
878	for (;; offPage = 0)
879	{
880	int rc;
881	if (fFullWalk)
882	rc = pgmGstPtWalk(pVCpu, GCPtr, &Walk);
883	else
884	rc = pgmGstPtWalkNext(pVCpu, GCPtr, &Walk);
885	if (RT_SUCCESS(rc) && Walk.u.Core.fSucceeded)
886	{
887	fFullWalk = false;
888
889	/* Skip if same page as previous one (W10 optimization). */
890	if ( Walk.u.Core.GCPhys != GCPhysPrev
891	\|\| cbPrev != 0)
892	{
893	PPGMPAGE pPage = pgmPhysGetPage(pVM, Walk.u.Core.GCPhys);
894	if ( pPage
895	&& ( !PGM_PAGE_IS_ZERO(pPage)
896	\|\| fAllZero)
897	&& !PGM_PAGE_IS_MMIO_OR_ALIAS(pPage)
898	&& !PGM_PAGE_IS_BALLOONED(pPage))
899	{
900	GCPhysPrev = Walk.u.Core.GCPhys;
901	void const *pvPage;
902	PGMPAGEMAPLOCK Lock;
903	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, Walk.u.Core.GCPhys, &pvPage, &Lock);
904	if (RT_SUCCESS(rc))
905	{
906	int32_t offHit = offPage;
907	bool fRc;
908	if (GCPtrAlign < PAGE_SIZE)
909	{
910	uint32_t cbSearch = cPages > 0
911	? PAGE_SIZE - (uint32_t)offPage
912	: (GCPtrLast & PAGE_OFFSET_MASK) + 1 - (uint32_t)offPage;
913	fRc = pgmR3DbgScanPage((uint8_t const *)pvPage, &offHit, cbSearch, (uint32_t)GCPtrAlign,
914	pabNeedle, cbNeedle, pfnMemScan, &abPrev[0], &cbPrev);
915	}
916	else
917	fRc = memcmp(pvPage, pabNeedle, cbNeedle) == 0
918	&& (GCPtrLast - GCPtr) >= cbNeedle;
919	PGMPhysReleasePageMappingLock(pVM, &Lock);
920	if (fRc)
921	{
922	*pGCPtrHit = GCPtr + offHit;
923	pgmUnlock(pVM);
924	return VINF_SUCCESS;
925	}
926	}
927	else
928	cbPrev = 0; /* ignore error. */
929	}
930	else
931	cbPrev = 0;
932	}
933	else
934	cbPrev = 0;
935	}
936	else
937	{
938	Assert(Walk.enmType != PGMPTWALKGSTTYPE_INVALID);
939	Assert(!Walk.u.Core.fSucceeded);
940	cbPrev = 0; /* ignore error. */
941
942	/*
943	* Try skip as much as possible. No need to figure out that a PDE
944	* is not present 512 times!
945	*/
946	uint64_t cPagesCanSkip;
947	switch (Walk.u.Core.uLevel)
948	{
949	case 1:
950	/* page level, use cIncPages */
951	cPagesCanSkip = 1;
952	break;
953	case 2:
954	if (Walk.enmType == PGMPTWALKGSTTYPE_32BIT)
955	{
956	cPagesCanSkip = X86_PG_ENTRIES - ((GCPtr >> X86_PT_SHIFT) & X86_PT_MASK);
957	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PD_SHIFT) - 1)));
958	}
959	else
960	{
961	cPagesCanSkip = X86_PG_PAE_ENTRIES - ((GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK);
962	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PD_PAE_SHIFT) - 1)));
963	}
964	break;
965	case 3:
966	cPagesCanSkip = (X86_PG_PAE_ENTRIES - ((GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK)) * X86_PG_PAE_ENTRIES
967	- ((GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK);
968	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PDPT_SHIFT) - 1)));
969	break;
970	case 4:
971	cPagesCanSkip = (X86_PG_PAE_ENTRIES - ((GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64))
972	* X86_PG_PAE_ENTRIES * X86_PG_PAE_ENTRIES
973	- ((((GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK)) * X86_PG_PAE_ENTRIES)
974	- (( GCPtr >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK);
975	Assert(!((GCPtr + ((RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT)) & (RT_BIT_64(X86_PML4_SHIFT) - 1)));
976	break;
977	case 8:
978	/* The CR3 value is bad, forget the whole search. */
979	cPagesCanSkip = cPages;
980	break;
981	default:
982	AssertMsgFailed(("%d\n", Walk.u.Core.uLevel));
983	cPagesCanSkip = 0;
984	break;
985	}
986	if (cPages <= cPagesCanSkip)
987	break;
988	fFullWalk = true;
989	if (cPagesCanSkip >= cIncPages)
990	{
991	cPages -= cPagesCanSkip;
992	GCPtr += (RTGCPTR)cPagesCanSkip << X86_PT_PAE_SHIFT;
993	continue;
994	}
995	}
996
997	/* advance to the next page. */
998	if (cPages <= cIncPages)
999	break;
1000	cPages -= cIncPages;
1001	GCPtr += (RTGCPTR)cIncPages << X86_PT_PAE_SHIFT;
1002
1003	/* Yield the PGM lock every now and then. */
1004	if (!--cYieldCountDown)
1005	{
1006	fFullWalk = PDMR3CritSectYield(pVM, &pVM->pgm.s.CritSectX);
1007	cYieldCountDown = cYieldCountDownReload;
1008	}
1009	}
1010	pgmUnlock(pVM);
1011	return VERR_DBGF_MEM_NOT_FOUND;
1012	}
1013
1014
1015	/**
1016	* Initializes the dumper state.
1017	*
1018	* @param pState The state to initialize.
1019	* @param pVM The cross context VM structure.
1020	* @param fFlags The flags.
1021	* @param u64FirstAddr The first address.
1022	* @param u64LastAddr The last address.
1023	* @param pHlp The output helpers.
1024	*/
1025	static void pgmR3DumpHierarchyInitState(PPGMR3DUMPHIERARCHYSTATE pState, PVM pVM, uint32_t fFlags,
1026	uint64_t u64FirstAddr, uint64_t u64LastAddr, PCDBGFINFOHLP pHlp)
1027	{
1028	pState->pVM = pVM;
1029	pState->pHlp = pHlp ? pHlp : DBGFR3InfoLogHlp();
1030	pState->fPse = !!(fFlags & (DBGFPGDMP_FLAGS_PSE \| DBGFPGDMP_FLAGS_PAE \| DBGFPGDMP_FLAGS_LME));
1031	pState->fPae = !!(fFlags & (DBGFPGDMP_FLAGS_PAE \| DBGFPGDMP_FLAGS_LME));
1032	pState->fLme = !!(fFlags & DBGFPGDMP_FLAGS_LME);
1033	pState->fNp = !!(fFlags & DBGFPGDMP_FLAGS_NP);
1034	pState->fEpt = !!(fFlags & DBGFPGDMP_FLAGS_EPT);
1035	pState->fNxe = !!(fFlags & DBGFPGDMP_FLAGS_NXE);
1036	pState->cchAddress = pState->fLme ? 16 : 8;
1037	pState->uLastRsvdBit = pState->fNxe ? 62 : 63;
1038	pState->fDumpPageInfo = !!(fFlags & DBGFPGDMP_FLAGS_PAGE_INFO);
1039	pState->fPrintHeader = !!(fFlags & DBGFPGDMP_FLAGS_HEADER);
1040	pState->fPrintCr3 = !!(fFlags & DBGFPGDMP_FLAGS_PRINT_CR3);
1041	pState->afReserved[0] = false;
1042	pState->afReserved[1] = false;
1043	pState->afReserved[2] = false;
1044	pState->afReserved[3] = false;
1045	pState->afReserved[4] = false;
1046	pState->u64Address = u64FirstAddr;
1047	pState->u64FirstAddress = u64FirstAddr;
1048	pState->u64LastAddress = u64LastAddr;
1049	pState->u64HighReservedBits = pState->uLastRsvdBit == 62 ? UINT64_C(0x7ff) << 52 : UINT64_C(0xfff) << 52;
1050	pState->cLeaves = 0;
1051	}
1052
1053
1054	/**
1055	* The simple way out, too tired to think of a more elegant solution.
1056	*
1057	* @returns The base address of this page table/directory/whatever.
1058	* @param pState The state where we get the current address.
1059	* @param cShift The shift count for the table entries.
1060	* @param cEntries The number of table entries.
1061	* @param piFirst Where to return the table index of the first
1062	* entry to dump.
1063	* @param piLast Where to return the table index of the last
1064	* entry.
1065	*/
1066	static uint64_t pgmR3DumpHierarchyCalcRange(PPGMR3DUMPHIERARCHYSTATE pState, uint32_t cShift, uint32_t cEntries,
1067	uint32_t piFirst, uint32_t piLast)
1068	{
1069	const uint64_t iBase = (pState->u64Address >> cShift) & ~(uint64_t)(cEntries - 1);
1070	const uint64_t iFirst = pState->u64FirstAddress >> cShift;
1071	const uint64_t iLast = pState->u64LastAddress >> cShift;
1072
1073	if ( iBase >= iFirst
1074	&& iBase + cEntries - 1 <= iLast)
1075	{
1076	/* full range. */
1077	*piFirst = 0;
1078	*piLast = cEntries - 1;
1079	}
1080	else if ( iBase + cEntries - 1 < iFirst
1081	\|\| iBase > iLast)
1082	{
1083	/* no match */
1084	*piFirst = cEntries;
1085	*piLast = 0;
1086	}
1087	else
1088	{
1089	/* partial overlap */
1090	*piFirst = iBase <= iFirst
1091	? iFirst - iBase
1092	: 0;
1093	*piLast = iBase + cEntries - 1 <= iLast
1094	? cEntries - 1
1095	: iLast - iBase;
1096	}
1097
1098	return iBase << cShift;
1099	}
1100
1101
1102	/**
1103	* Maps/finds the shadow page.
1104	*
1105	* @returns VBox status code.
1106	* @param pState The dumper state.
1107	* @param HCPhys The physical address of the shadow page.
1108	* @param pszDesc The description.
1109	* @param fIsMapping Set if it's a mapping.
1110	* @param ppv Where to return the pointer.
1111	*/
1112	static int pgmR3DumpHierarchyShwMapPage(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, const char *pszDesc,
1113	bool fIsMapping, void const **ppv)
1114	{
1115	void *pvPage;
1116	if (!fIsMapping)
1117	{
1118	PPGMPOOLPAGE pPoolPage = pgmPoolQueryPageForDbg(pState->pVM->pgm.s.pPoolR3, HCPhys);
1119	if (pPoolPage)
1120	{
1121	pState->pHlp->pfnPrintf(pState->pHlp, "%0*llx error! %s at HCPhys=%RHp was not found in the page pool!\n",
1122	pState->cchAddress, pState->u64Address, pszDesc, HCPhys);
1123	return VERR_PGM_POOL_GET_PAGE_FAILED;
1124	}
1125	pvPage = (uint8_t *)pPoolPage->pvPageR3 + (HCPhys & PAGE_OFFSET_MASK);
1126	}
1127	else
1128	{
1129	pvPage = NULL;
1130	#ifndef PGM_WITHOUT_MAPPINGS
1131	for (PPGMMAPPING pMap = pState->pVM->pgm.s.pMappingsR3; pMap; pMap = pMap->pNextR3)
1132	{
1133	uint64_t off = pState->u64Address - pMap->GCPtr;
1134	if (off < pMap->cb)
1135	{
1136	const int iPDE = (uint32_t)(off >> X86_PD_SHIFT);
1137	const int iSub = (int)((off >> X86_PD_PAE_SHIFT) & 1); /* MSC is a pain sometimes */
1138	if ((iSub ? pMap->aPTs[iPDE].HCPhysPaePT1 : pMap->aPTs[iPDE].HCPhysPaePT0) != HCPhys)
1139	pState->pHlp->pfnPrintf(pState->pHlp,
1140	"%0*llx error! Mapping error! PT %d has HCPhysPT=%RHp not %RHp is in the PD.\n",
1141	pState->cchAddress, pState->u64Address, iPDE,
1142	iSub ? pMap->aPTs[iPDE].HCPhysPaePT1 : pMap->aPTs[iPDE].HCPhysPaePT0, HCPhys);
1143	pvPage = &pMap->aPTs[iPDE].paPaePTsR3[iSub];
1144	break;
1145	}
1146	}
1147	#endif /* !PGM_WITHOUT_MAPPINGS */
1148	if (!pvPage)
1149	{
1150	pState->pHlp->pfnPrintf(pState->pHlp, "%0*llx error! PT mapping %s at HCPhys=%RHp was not found in the page pool!\n",
1151	pState->cchAddress, pState->u64Address, pszDesc, HCPhys);
1152	return VERR_INVALID_PARAMETER;
1153	}
1154	}
1155	*ppv = pvPage;
1156	return VINF_SUCCESS;
1157	}
1158
1159
1160	/**
1161	* Dumps the a shadow page summary or smth.
1162	*
1163	* @param pState The dumper state.
1164	* @param HCPhys The page address.
1165	*/
1166	static void pgmR3DumpHierarchyShwTablePageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys)
1167	{
1168	pgmLock(pState->pVM);
1169	char szPage[80];
1170	PPGMPOOLPAGE pPage = pgmPoolQueryPageForDbg(pState->pVM->pgm.s.CTX_SUFF(pPool), HCPhys);
1171	if (pPage)
1172	RTStrPrintf(szPage, sizeof(szPage), " idx=0i%u", pPage->idx);
1173	else
1174	{
1175	/* probably a mapping */
1176	strcpy(szPage, " not found");
1177	#ifndef PGM_WITHOUT_MAPPINGS
1178	for (PPGMMAPPING pMap = pState->pVM->pgm.s.pMappingsR3; pMap; pMap = pMap->pNextR3)
1179	{
1180	uint64_t off = pState->u64Address - pMap->GCPtr;
1181	if (off < pMap->cb)
1182	{
1183	const int iPDE = (uint32_t)(off >> X86_PD_SHIFT);
1184	if (pMap->aPTs[iPDE].HCPhysPT == HCPhys)
1185	RTStrPrintf(szPage, sizeof(szPage), " #%u: %s", iPDE, pMap->pszDesc);
1186	else if (pMap->aPTs[iPDE].HCPhysPaePT0 == HCPhys)
1187	RTStrPrintf(szPage, sizeof(szPage), " #%u/0: %s", iPDE, pMap->pszDesc);
1188	else if (pMap->aPTs[iPDE].HCPhysPaePT1 == HCPhys)
1189	RTStrPrintf(szPage, sizeof(szPage), " #%u/1: %s", iPDE, pMap->pszDesc);
1190	else
1191	continue;
1192	break;
1193	}
1194	}
1195	#endif /* !PGM_WITHOUT_MAPPINGS */
1196	}
1197	pgmUnlock(pState->pVM);
1198	pState->pHlp->pfnPrintf(pState->pHlp, "%s", szPage);
1199	}
1200
1201
1202	/**
1203	* Figures out which guest page this is and dumps a summary.
1204	*
1205	* @param pState The dumper state.
1206	* @param HCPhys The page address.
1207	* @param cbPage The page size.
1208	*/
1209	static void pgmR3DumpHierarchyShwGuestPageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, uint32_t cbPage)
1210	{
1211	char szPage[80];
1212	RTGCPHYS GCPhys;
1213	int rc = PGMR3DbgHCPhys2GCPhys(pState->pVM->pUVM, HCPhys, &GCPhys);
1214	if (RT_SUCCESS(rc))
1215	{
1216	pgmLock(pState->pVM);
1217	PCPGMPAGE pPage = pgmPhysGetPage(pState->pVM, GCPhys);
1218	if (pPage)
1219	RTStrPrintf(szPage, sizeof(szPage), "%R[pgmpage]", pPage);
1220	else
1221	strcpy(szPage, "not found");
1222	pgmUnlock(pState->pVM);
1223	pState->pHlp->pfnPrintf(pState->pHlp, " -> %RGp %s", GCPhys, szPage);
1224	}
1225	else
1226	{
1227	#ifndef PGM_WITHOUT_MAPPINGS
1228	/* check the heap */
1229	uint32_t cbAlloc;
1230	rc = MMR3HyperQueryInfoFromHCPhys(pState->pVM, HCPhys, szPage, sizeof(szPage), &cbAlloc);
1231	if (RT_SUCCESS(rc))
1232	pState->pHlp->pfnPrintf(pState->pHlp, " %s %#x bytes", szPage, cbAlloc);
1233	else
1234	#endif
1235	pState->pHlp->pfnPrintf(pState->pHlp, " not found");
1236	}
1237	NOREF(cbPage);
1238	}
1239
1240
1241	/**
1242	* Dumps a PAE shadow page table.
1243	*
1244	* @returns VBox status code (VINF_SUCCESS).
1245	* @param pState The dumper state.
1246	* @param HCPhys The page table address.
1247	* @param fIsMapping Whether it is a mapping.
1248	*/
1249	static int pgmR3DumpHierarchyShwPaePT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, bool fIsMapping)
1250	{
1251	PCPGMSHWPTPAE pPT;
1252	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page table", fIsMapping, (void const **)&pPT);
1253	if (RT_FAILURE(rc))
1254	return rc;
1255
1256	uint32_t iFirst, iLast;
1257	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1258	for (uint32_t i = iFirst; i <= iLast; i++)
1259	if (PGMSHWPTEPAE_GET_U(pPT->a[i]) & X86_PTE_P)
1260	{
1261	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PT_PAE_SHIFT);
1262	if (PGMSHWPTEPAE_IS_P(pPT->a[i]))
1263	{
1264	X86PTEPAE Pte;
1265	Pte.u = PGMSHWPTEPAE_GET_U(pPT->a[i]);
1266	pState->pHlp->pfnPrintf(pState->pHlp,
1267	pState->fLme /P R S A D G WT CD AT NX 4M a p ? /
1268	? "%016llx 3 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx"
1269	: "%08llx 2 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx",
1270	pState->u64Address,
1271	Pte.n.u1Write ? 'W' : 'R',
1272	Pte.n.u1User ? 'U' : 'S',
1273	Pte.n.u1Accessed ? 'A' : '-',
1274	Pte.n.u1Dirty ? 'D' : '-',
1275	Pte.n.u1Global ? 'G' : '-',
1276	Pte.n.u1WriteThru ? "WT" : "--",
1277	Pte.n.u1CacheDisable? "CD" : "--",
1278	Pte.n.u1PAT ? "AT" : "--",
1279	Pte.n.u1NoExecute ? "NX" : "--",
1280	Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
1281	Pte.u & RT_BIT(10) ? '1' : '0',
1282	Pte.u & PGM_PTFLAGS_CSAM_VALIDATED? 'v' : '-',
1283	Pte.u & X86_PTE_PAE_PG_MASK);
1284	if (pState->fDumpPageInfo)
1285	pgmR3DumpHierarchyShwGuestPageInfo(pState, Pte.u & X86_PTE_PAE_PG_MASK, _4K);
1286	if ((Pte.u >> 52) & 0x7ff)
1287	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx%s", (Pte.u >> 52) & 0x7ff, pState->fLme ? "" : "!");
1288	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1289	}
1290	else if ( (PGMSHWPTEPAE_GET_U(pPT->a[i]) & (pState->pVM->pgm.s.HCPhysInvMmioPg \| X86_PTE_PAE_MBZ_MASK_NO_NX))
1291	== (pState->pVM->pgm.s.HCPhysInvMmioPg \| X86_PTE_PAE_MBZ_MASK_NO_NX))
1292	pState->pHlp->pfnPrintf(pState->pHlp,
1293	pState->fLme
1294	? "%016llx 3 \| invalid / MMIO optimization\n"
1295	: "%08llx 2 \| invalid / MMIO optimization\n",
1296	pState->u64Address);
1297	else
1298	pState->pHlp->pfnPrintf(pState->pHlp,
1299	pState->fLme
1300	? "%016llx 3 \| invalid: %RX64\n"
1301	: "%08llx 2 \| invalid: %RX64\n",
1302	pState->u64Address, PGMSHWPTEPAE_GET_U(pPT->a[i]));
1303	pState->cLeaves++;
1304	}
1305	return VINF_SUCCESS;
1306	}
1307
1308
1309	/**
1310	* Dumps a PAE shadow page directory table.
1311	*
1312	* @returns VBox status code (VINF_SUCCESS).
1313	* @param pState The dumper state.
1314	* @param HCPhys The physical address of the page directory table.
1315	* @param cMaxDepth The maximum depth.
1316	*/
1317	static int pgmR3DumpHierarchyShwPaePD(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1318	{
1319	PCX86PDPAE pPD;
1320	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page directory", false, (void const **)&pPD);
1321	if (RT_FAILURE(rc))
1322	return rc;
1323
1324	Assert(cMaxDepth > 0);
1325	cMaxDepth--;
1326
1327	uint32_t iFirst, iLast;
1328	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PD_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1329	for (uint32_t i = iFirst; i <= iLast; i++)
1330	{
1331	X86PDEPAE Pde = pPD->a[i];
1332	if (Pde.n.u1Present)
1333	{
1334	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PD_PAE_SHIFT);
1335	if (Pde.b.u1Size)
1336	{
1337	pState->pHlp->pfnPrintf(pState->pHlp,
1338	pState->fLme /P R S A D G WT CD AT NX 2M a p ? phys/
1339	? "%016llx 2 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx"
1340	: "%08llx 1 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx",
1341	pState->u64Address,
1342	Pde.b.u1Write ? 'W' : 'R',
1343	Pde.b.u1User ? 'U' : 'S',
1344	Pde.b.u1Accessed ? 'A' : '-',
1345	Pde.b.u1Dirty ? 'D' : '-',
1346	Pde.b.u1Global ? 'G' : '-',
1347	Pde.b.u1WriteThru ? "WT" : "--",
1348	Pde.b.u1CacheDisable? "CD" : "--",
1349	Pde.b.u1PAT ? "AT" : "--",
1350	Pde.b.u1NoExecute ? "NX" : "--",
1351	Pde.u & PGM_PDFLAGS_BIG_PAGE ? 'b' : '-',
1352	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1353	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1354	Pde.u & X86_PDE2M_PAE_PG_MASK);
1355	if (pState->fDumpPageInfo)
1356	pgmR3DumpHierarchyShwGuestPageInfo(pState, Pde.u & X86_PDE2M_PAE_PG_MASK, _2M);
1357	if ((Pde.u >> 52) & 0x7ff)
1358	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx%s", (Pde.u >> 52) & 0x7ff, pState->fLme ? "" : "!");
1359	if ((Pde.u >> 13) & 0xff)
1360	pState->pHlp->pfnPrintf(pState->pHlp, " 20:13=%02llx%s", (Pde.u >> 13) & 0x0ff, pState->fLme ? "" : "!");
1361	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1362
1363	pState->cLeaves++;
1364	}
1365	else
1366	{
1367	pState->pHlp->pfnPrintf(pState->pHlp,
1368	pState->fLme /P R S A D G WT CD AT NX 4M a p ? phys /
1369	? "%016llx 2 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx"
1370	: "%08llx 1 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx",
1371	pState->u64Address,
1372	Pde.n.u1Write ? 'W' : 'R',
1373	Pde.n.u1User ? 'U' : 'S',
1374	Pde.n.u1Accessed ? 'A' : '-',
1375	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
1376	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
1377	Pde.n.u1WriteThru ? "WT" : "--",
1378	Pde.n.u1CacheDisable? "CD" : "--",
1379	Pde.n.u1NoExecute ? "NX" : "--",
1380	Pde.u & PGM_PDFLAGS_BIG_PAGE ? 'b' : '-',
1381	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1382	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1383	Pde.u & X86_PDE_PAE_PG_MASK);
1384	if (pState->fDumpPageInfo)
1385	pgmR3DumpHierarchyShwTablePageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK);
1386	if ((Pde.u >> 52) & 0x7ff)
1387	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx!", (Pde.u >> 52) & 0x7ff);
1388	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1389
1390	if (cMaxDepth)
1391	{
1392	int rc2 = pgmR3DumpHierarchyShwPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK, !!(Pde.u & PGM_PDFLAGS_MAPPING));
1393	if (rc2 < rc && RT_SUCCESS(rc))
1394	rc = rc2;
1395	}
1396	else
1397	pState->cLeaves++;
1398	}
1399	}
1400	}
1401	return rc;
1402	}
1403
1404
1405	/**
1406	* Dumps a PAE shadow page directory pointer table.
1407	*
1408	* @returns VBox status code (VINF_SUCCESS).
1409	* @param pState The dumper state.
1410	* @param HCPhys The physical address of the page directory pointer table.
1411	* @param cMaxDepth The maximum depth.
1412	*/
1413	static int pgmR3DumpHierarchyShwPaePDPT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1414	{
1415	/* Fend of addresses that are out of range in PAE mode - simplifies the code below. */
1416	if (!pState->fLme && pState->u64Address >= _4G)
1417	return VINF_SUCCESS;
1418
1419	PCX86PDPT pPDPT;
1420	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page directory pointer table", false, (void const **)&pPDPT);
1421	if (RT_FAILURE(rc))
1422	return rc;
1423
1424	Assert(cMaxDepth > 0);
1425	cMaxDepth--;
1426
1427	uint32_t iFirst, iLast;
1428	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PDPT_SHIFT,
1429	pState->fLme ? X86_PG_AMD64_PDPE_ENTRIES : X86_PG_PAE_PDPE_ENTRIES,
1430	&iFirst, &iLast);
1431	for (uint32_t i = iFirst; i <= iLast; i++)
1432	{
1433	X86PDPE Pdpe = pPDPT->a[i];
1434	if (Pdpe.n.u1Present)
1435	{
1436	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PDPT_SHIFT);
1437	if (pState->fLme)
1438	{
1439	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX .. a p ? /
1440	"%016llx 1 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
1441	pState->u64Address,
1442	Pdpe.lm.u1Write ? 'W' : 'R',
1443	Pdpe.lm.u1User ? 'U' : 'S',
1444	Pdpe.lm.u1Accessed ? 'A' : '-',
1445	Pdpe.lm.u3Reserved & 1? '?' : '.', /* ignored */
1446	Pdpe.lm.u3Reserved & 4? '!' : '.', /* mbz */
1447	Pdpe.lm.u1WriteThru ? "WT" : "--",
1448	Pdpe.lm.u1CacheDisable? "CD" : "--",
1449	Pdpe.lm.u3Reserved & 2? "!" : "..",/* mbz */
1450	Pdpe.lm.u1NoExecute ? "NX" : "--",
1451	Pdpe.u & RT_BIT(9) ? '1' : '0',
1452	Pdpe.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
1453	Pdpe.u & RT_BIT(11) ? '1' : '0',
1454	Pdpe.u & X86_PDPE_PG_MASK);
1455	if (pState->fDumpPageInfo)
1456	pgmR3DumpHierarchyShwTablePageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK);
1457	if ((Pdpe.u >> 52) & 0x7ff)
1458	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx", (Pdpe.u >> 52) & 0x7ff);
1459	}
1460	else
1461	{
1462	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX .. a p ? /
1463	"%08llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
1464	pState->u64Address,
1465	Pdpe.n.u2Reserved & 1? '!' : '.', /* mbz */
1466	Pdpe.n.u2Reserved & 2? '!' : '.', /* mbz */
1467	Pdpe.n.u4Reserved & 1? '!' : '.', /* mbz */
1468	Pdpe.n.u4Reserved & 2? '!' : '.', /* mbz */
1469	Pdpe.n.u4Reserved & 8? '!' : '.', /* mbz */
1470	Pdpe.n.u1WriteThru ? "WT" : "--",
1471	Pdpe.n.u1CacheDisable? "CD" : "--",
1472	Pdpe.n.u4Reserved & 2? "!" : "..",/* mbz */
1473	Pdpe.lm.u1NoExecute ? "!!" : "..",/* mbz */
1474	Pdpe.u & RT_BIT(9) ? '1' : '0',
1475	Pdpe.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
1476	Pdpe.u & RT_BIT(11) ? '1' : '0',
1477	Pdpe.u & X86_PDPE_PG_MASK);
1478	if (pState->fDumpPageInfo)
1479	pgmR3DumpHierarchyShwTablePageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK);
1480	if ((Pdpe.u >> 52) & 0xfff)
1481	pState->pHlp->pfnPrintf(pState->pHlp, " 63:52=%03llx!", (Pdpe.u >> 52) & 0xfff);
1482	}
1483	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1484
1485	if (cMaxDepth)
1486	{
1487	int rc2 = pgmR3DumpHierarchyShwPaePD(pState, Pdpe.u & X86_PDPE_PG_MASK, cMaxDepth);
1488	if (rc2 < rc && RT_SUCCESS(rc))
1489	rc = rc2;
1490	}
1491	else
1492	pState->cLeaves++;
1493	}
1494	}
1495	return rc;
1496	}
1497
1498
1499	/**
1500	* Dumps a 32-bit shadow page table.
1501	*
1502	* @returns VBox status code (VINF_SUCCESS).
1503	* @param pState The dumper state.
1504	* @param HCPhys The physical address of the table.
1505	* @param cMaxDepth The maximum depth.
1506	*/
1507	static int pgmR3DumpHierarchyShwPaePML4(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1508	{
1509	PCX86PML4 pPML4;
1510	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page map level 4", false, (void const **)&pPML4);
1511	if (RT_FAILURE(rc))
1512	return rc;
1513
1514	Assert(cMaxDepth);
1515	cMaxDepth--;
1516
1517	/*
1518	* This is a bit tricky as we're working on unsigned addresses while the
1519	* AMD64 spec uses signed tricks.
1520	*/
1521	uint32_t iFirst = (pState->u64FirstAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
1522	uint32_t iLast = (pState->u64LastAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
1523	if ( pState->u64LastAddress <= UINT64_C(0x00007fffffffffff)
1524	\|\| pState->u64FirstAddress >= UINT64_C(0xffff800000000000))
1525	{ /* Simple, nothing to adjust */ }
1526	else if (pState->u64FirstAddress <= UINT64_C(0x00007fffffffffff))
1527	iLast = X86_PG_AMD64_ENTRIES / 2 - 1;
1528	else if (pState->u64LastAddress >= UINT64_C(0xffff800000000000))
1529	iFirst = X86_PG_AMD64_ENTRIES / 2;
1530	else
1531	iFirst = X86_PG_AMD64_ENTRIES; /* neither address is canonical */
1532
1533	for (uint32_t i = iFirst; i <= iLast; i++)
1534	{
1535	X86PML4E Pml4e = pPML4->a[i];
1536	if (Pml4e.n.u1Present)
1537	{
1538	pState->u64Address = ((uint64_t)i << X86_PML4_SHIFT)
1539	\| (i >= RT_ELEMENTS(pPML4->a) / 2 ? UINT64_C(0xffff000000000000) : 0);
1540	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX 4M a p ? /
1541	"%016llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
1542	pState->u64Address,
1543	Pml4e.n.u1Write ? 'W' : 'R',
1544	Pml4e.n.u1User ? 'U' : 'S',
1545	Pml4e.n.u1Accessed ? 'A' : '-',
1546	Pml4e.n.u3Reserved & 1? '?' : '.', /* ignored */
1547	Pml4e.n.u3Reserved & 4? '!' : '.', /* mbz */
1548	Pml4e.n.u1WriteThru ? "WT" : "--",
1549	Pml4e.n.u1CacheDisable? "CD" : "--",
1550	Pml4e.n.u3Reserved & 2? "!" : "..",/* mbz */
1551	Pml4e.n.u1NoExecute ? "NX" : "--",
1552	Pml4e.u & RT_BIT(9) ? '1' : '0',
1553	Pml4e.u & PGM_PLXFLAGS_PERMANENT ? 'p' : '-',
1554	Pml4e.u & RT_BIT(11) ? '1' : '0',
1555	Pml4e.u & X86_PML4E_PG_MASK);
1556	if (pState->fDumpPageInfo)
1557	pgmR3DumpHierarchyShwTablePageInfo(pState, Pml4e.u & X86_PML4E_PG_MASK);
1558	if ((Pml4e.u >> 52) & 0x7ff)
1559	pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx!", (Pml4e.u >> 52) & 0x7ff);
1560	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1561
1562	if (cMaxDepth)
1563	{
1564	int rc2 = pgmR3DumpHierarchyShwPaePDPT(pState, Pml4e.u & X86_PML4E_PG_MASK, cMaxDepth);
1565	if (rc2 < rc && RT_SUCCESS(rc))
1566	rc = rc2;
1567	}
1568	else
1569	pState->cLeaves++;
1570	}
1571	}
1572	return rc;
1573	}
1574
1575
1576	/**
1577	* Dumps a 32-bit shadow page table.
1578	*
1579	* @returns VBox status code (VINF_SUCCESS).
1580	* @param pState The dumper state.
1581	* @param HCPhys The physical address of the table.
1582	* @param fMapping Set if it's a guest mapping.
1583	*/
1584	static int pgmR3DumpHierarchyShw32BitPT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, bool fMapping)
1585	{
1586	PCX86PT pPT;
1587	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page table", fMapping, (void const **)&pPT);
1588	if (RT_FAILURE(rc))
1589	return rc;
1590
1591	uint32_t iFirst, iLast;
1592	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
1593	for (uint32_t i = iFirst; i <= iLast; i++)
1594	{
1595	X86PTE Pte = pPT->a[i];
1596	if (Pte.n.u1Present)
1597	{
1598	pState->u64Address = u64BaseAddress + (i << X86_PT_SHIFT);
1599	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d /
1600	"%08llx 1 \| P %c %c %c %c %c %s %s %s .. 4K %c%c%c %08x",
1601	pState->u64Address,
1602	Pte.n.u1Write ? 'W' : 'R',
1603	Pte.n.u1User ? 'U' : 'S',
1604	Pte.n.u1Accessed ? 'A' : '-',
1605	Pte.n.u1Dirty ? 'D' : '-',
1606	Pte.n.u1Global ? 'G' : '-',
1607	Pte.n.u1WriteThru ? "WT" : "--",
1608	Pte.n.u1CacheDisable? "CD" : "--",
1609	Pte.n.u1PAT ? "AT" : "--",
1610	Pte.u & PGM_PTFLAGS_TRACK_DIRTY ? 'd' : '-',
1611	Pte.u & RT_BIT(10) ? '1' : '0',
1612	Pte.u & PGM_PTFLAGS_CSAM_VALIDATED ? 'v' : '-',
1613	Pte.u & X86_PDE_PG_MASK);
1614	if (pState->fDumpPageInfo)
1615	pgmR3DumpHierarchyShwGuestPageInfo(pState, Pte.u & X86_PDE_PG_MASK, _4K);
1616	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1617	}
1618	}
1619	return VINF_SUCCESS;
1620	}
1621
1622
1623	/**
1624	* Dumps a 32-bit shadow page directory and page tables.
1625	*
1626	* @returns VBox status code (VINF_SUCCESS).
1627	* @param pState The dumper state.
1628	* @param HCPhys The physical address of the table.
1629	* @param cMaxDepth The maximum depth.
1630	*/
1631	static int pgmR3DumpHierarchyShw32BitPD(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS HCPhys, unsigned cMaxDepth)
1632	{
1633	if (pState->u64Address >= _4G)
1634	return VINF_SUCCESS;
1635
1636	PCX86PD pPD;
1637	int rc = pgmR3DumpHierarchyShwMapPage(pState, HCPhys, "Page directory", false, (void const **)&pPD);
1638	if (RT_FAILURE(rc))
1639	return rc;
1640
1641	Assert(cMaxDepth > 0);
1642	cMaxDepth--;
1643
1644	uint32_t iFirst, iLast;
1645	pgmR3DumpHierarchyCalcRange(pState, X86_PD_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
1646	for (uint32_t i = iFirst; i <= iLast; i++)
1647	{
1648	X86PDE Pde = pPD->a[i];
1649	if (Pde.n.u1Present)
1650	{
1651	pState->u64Address = (uint32_t)i << X86_PD_SHIFT;
1652	if (Pde.b.u1Size && pState->fPse)
1653	{
1654	uint64_t u64Phys = ((uint64_t)(Pde.u & X86_PDE4M_PG_HIGH_MASK) << X86_PDE4M_PG_HIGH_SHIFT)
1655	\| (Pde.u & X86_PDE4M_PG_MASK);
1656	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
1657	"%08llx 0 \| P %c %c %c %c %c %s %s %s .. 4M %c%c%c %08llx",
1658	pState->u64Address,
1659	Pde.b.u1Write ? 'W' : 'R',
1660	Pde.b.u1User ? 'U' : 'S',
1661	Pde.b.u1Accessed ? 'A' : '-',
1662	Pde.b.u1Dirty ? 'D' : '-',
1663	Pde.b.u1Global ? 'G' : '-',
1664	Pde.b.u1WriteThru ? "WT" : "--",
1665	Pde.b.u1CacheDisable? "CD" : "--",
1666	Pde.b.u1PAT ? "AT" : "--",
1667	Pde.u & PGM_PDFLAGS_BIG_PAGE ? 'b' : '-',
1668	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1669	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1670	u64Phys);
1671	if (pState->fDumpPageInfo)
1672	pgmR3DumpHierarchyShwGuestPageInfo(pState, u64Phys, _4M);
1673	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1674	pState->cLeaves++;
1675	}
1676	else
1677	{
1678	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
1679	"%08llx 0 \| P %c %c %c %c %c %s %s .. .. 4K %c%c%c %08x",
1680	pState->u64Address,
1681	Pde.n.u1Write ? 'W' : 'R',
1682	Pde.n.u1User ? 'U' : 'S',
1683	Pde.n.u1Accessed ? 'A' : '-',
1684	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
1685	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
1686	Pde.n.u1WriteThru ? "WT" : "--",
1687	Pde.n.u1CacheDisable? "CD" : "--",
1688	Pde.u & PGM_PDFLAGS_BIG_PAGE ? 'b' : '-',
1689	Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-',
1690	Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-',
1691	Pde.u & X86_PDE_PG_MASK);
1692	if (pState->fDumpPageInfo)
1693	pgmR3DumpHierarchyShwTablePageInfo(pState, Pde.u & X86_PDE_PG_MASK);
1694	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1695
1696	if (cMaxDepth)
1697	{
1698	int rc2 = pgmR3DumpHierarchyShw32BitPT(pState, Pde.u & X86_PDE_PG_MASK, !!(Pde.u & PGM_PDFLAGS_MAPPING));
1699	if (rc2 < rc && RT_SUCCESS(rc))
1700	rc = rc2;
1701	}
1702	else
1703	pState->cLeaves++;
1704	}
1705	}
1706	}
1707
1708	return rc;
1709	}
1710
1711
1712	/**
1713	* Internal worker that initiates the actual dump.
1714	*
1715	* @returns VBox status code.
1716	* @param pState The dumper state.
1717	* @param cr3 The CR3 value.
1718	* @param cMaxDepth The max depth.
1719	*/
1720	static int pgmR3DumpHierarchyShwDoIt(PPGMR3DUMPHIERARCHYSTATE pState, uint64_t cr3, unsigned cMaxDepth)
1721	{
1722	int rc;
1723	unsigned const cch = pState->cchAddress;
1724	uint64_t const cr3Mask = pState->fEpt ? X86_CR3_AMD64_PAGE_MASK
1725	: pState->fLme ? X86_CR3_AMD64_PAGE_MASK
1726	: pState->fPae ? X86_CR3_PAE_PAGE_MASK
1727	: X86_CR3_PAGE_MASK;
1728	if (pState->fPrintCr3)
1729	{
1730	const char * const pszMode = pState->fEpt ? "Extended Page Tables"
1731	: pState->fLme ? "Long Mode"
1732	: pState->fPae ? "PAE Mode"
1733	: pState->fPse ? "32-bit w/ PSE"
1734	: "32-bit";
1735	pState->pHlp->pfnPrintf(pState->pHlp, "cr3=%0*llx", cch, cr3);
1736	if (pState->fDumpPageInfo)
1737	pgmR3DumpHierarchyShwTablePageInfo(pState, cr3 & X86_CR3_AMD64_PAGE_MASK);
1738	pState->pHlp->pfnPrintf(pState->pHlp, " %s%s%s\n",
1739	pszMode,
1740	pState->fNp ? " + Nested Paging" : "",
1741	pState->fNxe ? " + NX" : "");
1742	}
1743
1744
1745	if (pState->fEpt)
1746	{
1747	if (pState->fPrintHeader)
1748	pState->pHlp->pfnPrintf(pState->pHlp,
1749	"%-*s R - Readable\n"
1750	"%-*s \| W - Writeable\n"
1751	"%-*s \| \| X - Executable\n"
1752	"%-*s \| \| \| EMT - EPT memory type\n"
1753	"%-*s \| \| \| \| PAT - Ignored PAT?\n"
1754	"%-*s \| \| \| \| \| AVL1 - 4 available bits\n"
1755	"%-*s \| \| \| \| \| \| AVL2 - 12 available bits\n"
1756	"%-*s Level \| \| \| \| \| \| \| page \n"
1757	/* xxxx n **** R W X EMT PAT AVL1 AVL2 xxxxxxxxxxxxx
1758	R W X 7 0 f fff 0123456701234567 */
1759	,
1760	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
1761
1762	pState->pHlp->pfnPrintf(pState->pHlp, "EPT dumping is not yet implemented, sorry.\n");
1763	/** @todo implemented EPT dumping. */
1764	rc = VERR_NOT_IMPLEMENTED;
1765	}
1766	else
1767	{
1768	if (pState->fPrintHeader)
1769	pState->pHlp->pfnPrintf(pState->pHlp,
1770	"%-*s P - Present\n"
1771	"%-*s \| R/W - Read (0) / Write (1)\n"
1772	"%-*s \| \| U/S - User (1) / Supervisor (0)\n"
1773	"%-*s \| \| \| A - Accessed\n"
1774	"%-*s \| \| \| \| D - Dirty\n"
1775	"%-*s \| \| \| \| \| G - Global\n"
1776	"%-*s \| \| \| \| \| \| WT - Write thru\n"
1777	"%-*s \| \| \| \| \| \| \| CD - Cache disable\n"
1778	"%-*s \| \| \| \| \| \| \| \| AT - Attribute table (PAT)\n"
1779	"%-*s \| \| \| \| \| \| \| \| \| NX - No execute (K8)\n"
1780	"%-*s \| \| \| \| \| \| \| \| \| \| 4K/4M/2M - Page size.\n"
1781	"%-*s \| \| \| \| \| \| \| \| \| \| \| AVL - a=allocated; m=mapping; d=track dirty;\n"
1782	"%-*s \| \| \| \| \| \| \| \| \| \| \| \| p=permanent; v=validated;\n"
1783	"%-*s Level \| \| \| \| \| \| \| \| \| \| \| \| Page\n"
1784	/* xxxx n **** P R S A D G WT CD AT NX 4M AVL xxxxxxxxxxxxx
1785	- W U - - - -- -- -- -- -- 010 */
1786	,
1787	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "",
1788	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
1789	if (pState->fLme)
1790	rc = pgmR3DumpHierarchyShwPaePML4(pState, cr3 & cr3Mask, cMaxDepth);
1791	else if (pState->fPae)
1792	rc = pgmR3DumpHierarchyShwPaePDPT(pState, cr3 & cr3Mask, cMaxDepth);
1793	else
1794	rc = pgmR3DumpHierarchyShw32BitPD(pState, cr3 & cr3Mask, cMaxDepth);
1795	}
1796
1797	if (!pState->cLeaves)
1798	pState->pHlp->pfnPrintf(pState->pHlp, "not present\n");
1799	return rc;
1800	}
1801
1802
1803	/**
1804	* dbgfR3PagingDumpEx worker.
1805	*
1806	* @returns VBox status code.
1807	* @param pVM The cross context VM structure.
1808	* @param cr3 The CR3 register value.
1809	* @param fFlags The flags, DBGFPGDMP_FLAGS_XXX.
1810	* @param u64FirstAddr The start address.
1811	* @param u64LastAddr The address to stop after.
1812	* @param cMaxDepth The max depth.
1813	* @param pHlp The output callbacks. Defaults to log if NULL.
1814	*
1815	* @internal
1816	*/
1817	VMMR3_INT_DECL(int) PGMR3DumpHierarchyShw(PVM pVM, uint64_t cr3, uint32_t fFlags, uint64_t u64FirstAddr, uint64_t u64LastAddr,
1818	uint32_t cMaxDepth, PCDBGFINFOHLP pHlp)
1819	{
1820	/* Minimal validation as we're only supposed to service DBGF. */
1821	AssertReturn(~(fFlags & ~DBGFPGDMP_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
1822	AssertReturn(!(fFlags & (DBGFPGDMP_FLAGS_CURRENT_MODE \| DBGFPGDMP_FLAGS_CURRENT_CR3)), VERR_INVALID_PARAMETER);
1823	AssertReturn(fFlags & DBGFPGDMP_FLAGS_SHADOW, VERR_INVALID_PARAMETER);
1824
1825	PGMR3DUMPHIERARCHYSTATE State;
1826	pgmR3DumpHierarchyInitState(&State, pVM, fFlags, u64FirstAddr, u64LastAddr, pHlp);
1827	return pgmR3DumpHierarchyShwDoIt(&State, cr3, cMaxDepth);
1828	}
1829
1830
1831	/**
1832	* Dumps a page table hierarchy use only physical addresses and cr4/lm flags.
1833	*
1834	* @returns VBox status code (VINF_SUCCESS).
1835	* @param pVM The cross context VM structure.
1836	* @param cr3 The root of the hierarchy.
1837	* @param cr4 The cr4, only PAE and PSE is currently used.
1838	* @param fLongMode Set if long mode, false if not long mode.
1839	* @param cMaxDepth Number of levels to dump.
1840	* @param pHlp Pointer to the output functions.
1841	*
1842	* @deprecated Use DBGFR3PagingDumpEx.
1843	*/
1844	VMMR3DECL(int) PGMR3DumpHierarchyHC(PVM pVM, uint64_t cr3, uint64_t cr4, bool fLongMode, unsigned cMaxDepth, PCDBGFINFOHLP pHlp)
1845	{
1846	if (!cMaxDepth)
1847	return VINF_SUCCESS;
1848
1849	PVMCPU pVCpu = VMMGetCpu(pVM);
1850	if (!pVCpu)
1851	pVCpu = pVM->apCpusR3[0];
1852
1853	uint32_t fFlags = DBGFPGDMP_FLAGS_HEADER \| DBGFPGDMP_FLAGS_PRINT_CR3 \| DBGFPGDMP_FLAGS_PAGE_INFO \| DBGFPGDMP_FLAGS_SHADOW;
1854	fFlags \|= cr4 & (X86_CR4_PAE \| X86_CR4_PSE);
1855	if (fLongMode)
1856	fFlags \|= DBGFPGDMP_FLAGS_LME;
1857
1858	return DBGFR3PagingDumpEx(pVM->pUVM, pVCpu->idCpu, fFlags, cr3, 0, fLongMode ? UINT64_MAX : UINT32_MAX, cMaxDepth, pHlp);
1859	}
1860
1861
1862	/**
1863	* Maps the guest page.
1864	*
1865	* @returns VBox status code.
1866	* @param pState The dumper state.
1867	* @param GCPhys The physical address of the guest page.
1868	* @param pszDesc The description.
1869	* @param ppv Where to return the pointer.
1870	* @param pLock Where to return the mapping lock. Hand this to
1871	* PGMPhysReleasePageMappingLock when done.
1872	*/
1873	static int pgmR3DumpHierarchyGstMapPage(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, const char *pszDesc,
1874	void const **ppv, PPGMPAGEMAPLOCK pLock)
1875	{
1876	int rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, GCPhys, ppv, pLock);
1877	if (RT_FAILURE(rc))
1878	{
1879	pState->pHlp->pfnPrintf(pState->pHlp, "%0*llx error! Failed to map %s at GCPhys=%RGp: %Rrc!\n",
1880	pState->cchAddress, pState->u64Address, pszDesc, GCPhys, rc);
1881	return rc;
1882	}
1883	return VINF_SUCCESS;
1884	}
1885
1886
1887	/**
1888	* Figures out which guest page this is and dumps a summary.
1889	*
1890	* @param pState The dumper state.
1891	* @param GCPhys The page address.
1892	* @param cbPage The page size.
1893	*/
1894	static void pgmR3DumpHierarchyGstPageInfo(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, uint32_t cbPage)
1895	{
1896	char szPage[80];
1897	pgmLock(pState->pVM);
1898	PCPGMPAGE pPage = pgmPhysGetPage(pState->pVM, GCPhys);
1899	if (pPage)
1900	RTStrPrintf(szPage, sizeof(szPage), " %R[pgmpage]", pPage);
1901	else
1902	strcpy(szPage, " not found");
1903	pgmUnlock(pState->pVM);
1904	pState->pHlp->pfnPrintf(pState->pHlp, "%s", szPage);
1905	NOREF(cbPage);
1906	}
1907
1908
1909	/**
1910	* Checks the entry for reserved bits.
1911	*
1912	* @param pState The dumper state.
1913	* @param u64Entry The entry to check.
1914	*/
1915	static void pgmR3DumpHierarchyGstCheckReservedHighBits(PPGMR3DUMPHIERARCHYSTATE pState, uint64_t u64Entry)
1916	{
1917	uint32_t uRsvd = (u64Entry & pState->u64HighReservedBits) >> 52;
1918	if (uRsvd)
1919	pState->pHlp->pfnPrintf(pState->pHlp, " %u:52=%03x%s",
1920	pState->uLastRsvdBit, uRsvd, pState->fLme ? "" : "!");
1921	/** @todo check the valid physical bits as well. */
1922	}
1923
1924
1925	/**
1926	* Dumps a PAE shadow page table.
1927	*
1928	* @returns VBox status code (VINF_SUCCESS).
1929	* @param pState The dumper state.
1930	* @param GCPhys The page table address.
1931	*/
1932	static int pgmR3DumpHierarchyGstPaePT(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys)
1933	{
1934	PCX86PTPAE pPT;
1935	PGMPAGEMAPLOCK Lock;
1936	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page table", (void const **)&pPT, &Lock);
1937	if (RT_FAILURE(rc))
1938	return rc;
1939
1940	uint32_t iFirst, iLast;
1941	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
1942	for (uint32_t i = iFirst; i <= iLast; i++)
1943	{
1944	X86PTEPAE Pte = pPT->a[i];
1945	if (Pte.n.u1Present)
1946	{
1947	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PT_PAE_SHIFT);
1948	pState->pHlp->pfnPrintf(pState->pHlp,
1949	pState->fLme /P R S A D G WT CD AT NX 4M a p ? /
1950	? "%016llx 3 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx"
1951	: "%08llx 2 \| P %c %c %c %c %c %s %s %s %s 4K %c%c%c %016llx",
1952	pState->u64Address,
1953	Pte.n.u1Write ? 'W' : 'R',
1954	Pte.n.u1User ? 'U' : 'S',
1955	Pte.n.u1Accessed ? 'A' : '-',
1956	Pte.n.u1Dirty ? 'D' : '-',
1957	Pte.n.u1Global ? 'G' : '-',
1958	Pte.n.u1WriteThru ? "WT" : "--",
1959	Pte.n.u1CacheDisable? "CD" : "--",
1960	Pte.n.u1PAT ? "AT" : "--",
1961	Pte.n.u1NoExecute ? "NX" : "--",
1962	Pte.u & RT_BIT(9) ? '1' : '0',
1963	Pte.u & RT_BIT(10) ? '1' : '0',
1964	Pte.u & RT_BIT(11) ? '1' : '0',
1965	Pte.u & X86_PTE_PAE_PG_MASK);
1966	if (pState->fDumpPageInfo)
1967	pgmR3DumpHierarchyGstPageInfo(pState, Pte.u & X86_PTE_PAE_PG_MASK, _4K);
1968	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pte.u);
1969	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
1970	pState->cLeaves++;
1971	}
1972	}
1973
1974	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
1975	return VINF_SUCCESS;
1976	}
1977
1978
1979	/**
1980	* Dumps a PAE shadow page directory table.
1981	*
1982	* @returns VBox status code (VINF_SUCCESS).
1983	* @param pState The dumper state.
1984	* @param GCPhys The physical address of the table.
1985	* @param cMaxDepth The maximum depth.
1986	*/
1987	static int pgmR3DumpHierarchyGstPaePD(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, unsigned cMaxDepth)
1988	{
1989	PCX86PDPAE pPD;
1990	PGMPAGEMAPLOCK Lock;
1991	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page directory", (void const **)&pPD, &Lock);
1992	if (RT_FAILURE(rc))
1993	return rc;
1994
1995	Assert(cMaxDepth > 0);
1996	cMaxDepth--;
1997
1998	uint32_t iFirst, iLast;
1999	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PD_PAE_SHIFT, X86_PG_PAE_ENTRIES, &iFirst, &iLast);
2000	for (uint32_t i = iFirst; i <= iLast; i++)
2001	{
2002	X86PDEPAE Pde = pPD->a[i];
2003	if (Pde.n.u1Present)
2004	{
2005	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PD_PAE_SHIFT);
2006	if (Pde.b.u1Size)
2007	{
2008	pState->pHlp->pfnPrintf(pState->pHlp,
2009	pState->fLme /P R S A D G WT CD AT NX 2M a p ? phys/
2010	? "%016llx 2 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx"
2011	: "%08llx 1 \| P %c %c %c %c %c %s %s %s %s 2M %c%c%c %016llx",
2012	pState->u64Address,
2013	Pde.b.u1Write ? 'W' : 'R',
2014	Pde.b.u1User ? 'U' : 'S',
2015	Pde.b.u1Accessed ? 'A' : '-',
2016	Pde.b.u1Dirty ? 'D' : '-',
2017	Pde.b.u1Global ? 'G' : '-',
2018	Pde.b.u1WriteThru ? "WT" : "--",
2019	Pde.b.u1CacheDisable ? "CD" : "--",
2020	Pde.b.u1PAT ? "AT" : "--",
2021	Pde.b.u1NoExecute ? "NX" : "--",
2022	Pde.u & RT_BIT_64(9) ? '1' : '0',
2023	Pde.u & RT_BIT_64(10) ? '1' : '0',
2024	Pde.u & RT_BIT_64(11) ? '1' : '0',
2025	Pde.u & X86_PDE2M_PAE_PG_MASK);
2026	if (pState->fDumpPageInfo)
2027	pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE2M_PAE_PG_MASK, _2M);
2028	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pde.u);
2029	if ((Pde.u >> 13) & 0xff)
2030	pState->pHlp->pfnPrintf(pState->pHlp, " 20:13=%02llx%s", (Pde.u >> 13) & 0x0ff, pState->fLme ? "" : "!");
2031	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2032
2033	pState->cLeaves++;
2034	}
2035	else
2036	{
2037	pState->pHlp->pfnPrintf(pState->pHlp,
2038	pState->fLme /P R S A D G WT CD AT NX 4M a p ? phys /
2039	? "%016llx 2 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx"
2040	: "%08llx 1 \| P %c %c %c %c %c %s %s .. %s .. %c%c%c %016llx",
2041	pState->u64Address,
2042	Pde.n.u1Write ? 'W' : 'R',
2043	Pde.n.u1User ? 'U' : 'S',
2044	Pde.n.u1Accessed ? 'A' : '-',
2045	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
2046	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
2047	Pde.n.u1WriteThru ? "WT" : "--",
2048	Pde.n.u1CacheDisable ? "CD" : "--",
2049	Pde.n.u1NoExecute ? "NX" : "--",
2050	Pde.u & RT_BIT_64(9) ? '1' : '0',
2051	Pde.u & RT_BIT_64(10) ? '1' : '0',
2052	Pde.u & RT_BIT_64(11) ? '1' : '0',
2053	Pde.u & X86_PDE_PAE_PG_MASK);
2054	if (pState->fDumpPageInfo)
2055	pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK, _4K);
2056	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pde.u);
2057	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2058
2059	if (cMaxDepth)
2060	{
2061	int rc2 = pgmR3DumpHierarchyGstPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK);
2062	if (rc2 < rc && RT_SUCCESS(rc))
2063	rc = rc2;
2064	}
2065	else
2066	pState->cLeaves++;
2067	}
2068	}
2069	}
2070
2071	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2072	return rc;
2073	}
2074
2075
2076	/**
2077	* Dumps a PAE shadow page directory pointer table.
2078	*
2079	* @returns VBox status code (VINF_SUCCESS).
2080	* @param pState The dumper state.
2081	* @param GCPhys The physical address of the table.
2082	* @param cMaxDepth The maximum depth.
2083	*/
2084	static int pgmR3DumpHierarchyGstPaePDPT(PPGMR3DUMPHIERARCHYSTATE pState, RTGCPHYS GCPhys, unsigned cMaxDepth)
2085	{
2086	/* Fend of addresses that are out of range in PAE mode - simplifies the code below. */
2087	if (!pState->fLme && pState->u64Address >= _4G)
2088	return VINF_SUCCESS;
2089
2090	PCX86PDPT pPDPT;
2091	PGMPAGEMAPLOCK Lock;
2092	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page directory pointer table", (void const **)&pPDPT, &Lock);
2093	if (RT_FAILURE(rc))
2094	return rc;
2095
2096	Assert(cMaxDepth > 0);
2097	cMaxDepth--;
2098
2099	uint32_t iFirst, iLast;
2100	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PDPT_SHIFT,
2101	pState->fLme ? X86_PG_AMD64_PDPE_ENTRIES : X86_PG_PAE_PDPE_ENTRIES,
2102	&iFirst, &iLast);
2103	for (uint32_t i = iFirst; i <= iLast; i++)
2104	{
2105	X86PDPE Pdpe = pPDPT->a[i];
2106	if (Pdpe.n.u1Present)
2107	{
2108	pState->u64Address = u64BaseAddress + ((uint64_t)i << X86_PDPT_SHIFT);
2109	if (pState->fLme)
2110	{
2111	/** @todo Do 1G pages. */
2112	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX .. a p ? /
2113	"%016llx 1 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
2114	pState->u64Address,
2115	Pdpe.lm.u1Write ? 'W' : 'R',
2116	Pdpe.lm.u1User ? 'U' : 'S',
2117	Pdpe.lm.u1Accessed ? 'A' : '-',
2118	Pdpe.lm.u3Reserved & 1 ? '?' : '.', /* ignored */
2119	Pdpe.lm.u3Reserved & 4 ? '!' : '.', /* mbz */
2120	Pdpe.lm.u1WriteThru ? "WT" : "--",
2121	Pdpe.lm.u1CacheDisable ? "CD" : "--",
2122	Pdpe.lm.u3Reserved & 2 ? "!" : "..",/* mbz */
2123	Pdpe.lm.u1NoExecute ? "NX" : "--",
2124	Pdpe.u & RT_BIT_64(9) ? '1' : '0',
2125	Pdpe.u & RT_BIT_64(10) ? '1' : '0',
2126	Pdpe.u & RT_BIT_64(11) ? '1' : '0',
2127	Pdpe.u & X86_PDPE_PG_MASK);
2128	if (pState->fDumpPageInfo)
2129	pgmR3DumpHierarchyGstPageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK, _4K);
2130	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pdpe.u);
2131	}
2132	else
2133	{
2134	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX .. a p ? /
2135	"%08llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
2136	pState->u64Address,
2137	Pdpe.n.u2Reserved & 1 ? '!' : '.', /* mbz */
2138	Pdpe.n.u2Reserved & 2 ? '!' : '.', /* mbz */
2139	Pdpe.n.u4Reserved & 1 ? '!' : '.', /* mbz */
2140	Pdpe.n.u4Reserved & 2 ? '!' : '.', /* mbz */
2141	Pdpe.n.u4Reserved & 8 ? '!' : '.', /* mbz */
2142	Pdpe.n.u1WriteThru ? "WT" : "--",
2143	Pdpe.n.u1CacheDisable ? "CD" : "--",
2144	Pdpe.n.u4Reserved & 2 ? "!" : "..", /* mbz */
2145	Pdpe.lm.u1NoExecute ? "!!" : "..",/* mbz */
2146	Pdpe.u & RT_BIT_64(9) ? '1' : '0',
2147	Pdpe.u & RT_BIT_64(10) ? '1' : '0',
2148	Pdpe.u & RT_BIT_64(11) ? '1' : '0',
2149	Pdpe.u & X86_PDPE_PG_MASK);
2150	if (pState->fDumpPageInfo)
2151	pgmR3DumpHierarchyGstPageInfo(pState, Pdpe.u & X86_PDPE_PG_MASK, _4K);
2152	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pdpe.u);
2153	}
2154	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2155
2156	if (cMaxDepth)
2157	{
2158	int rc2 = pgmR3DumpHierarchyGstPaePD(pState, Pdpe.u & X86_PDPE_PG_MASK, cMaxDepth);
2159	if (rc2 < rc && RT_SUCCESS(rc))
2160	rc = rc2;
2161	}
2162	else
2163	pState->cLeaves++;
2164	}
2165	}
2166
2167	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2168	return rc;
2169	}
2170
2171
2172	/**
2173	* Dumps a 32-bit shadow page table.
2174	*
2175	* @returns VBox status code (VINF_SUCCESS).
2176	* @param pState The dumper state.
2177	* @param GCPhys The physical address of the table.
2178	* @param cMaxDepth The maximum depth.
2179	*/
2180	static int pgmR3DumpHierarchyGstPaePML4(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS GCPhys, unsigned cMaxDepth)
2181	{
2182	PCX86PML4 pPML4;
2183	PGMPAGEMAPLOCK Lock;
2184	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page map level 4", (void const **)&pPML4, &Lock);
2185	if (RT_FAILURE(rc))
2186	return rc;
2187
2188	Assert(cMaxDepth);
2189	cMaxDepth--;
2190
2191	/*
2192	* This is a bit tricky as we're working on unsigned addresses while the
2193	* AMD64 spec uses signed tricks.
2194	*/
2195	uint32_t iFirst = (pState->u64FirstAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
2196	uint32_t iLast = (pState->u64LastAddress >> X86_PML4_SHIFT) & X86_PML4_MASK;
2197	if ( pState->u64LastAddress <= UINT64_C(0x00007fffffffffff)
2198	\|\| pState->u64FirstAddress >= UINT64_C(0xffff800000000000))
2199	{ /* Simple, nothing to adjust */ }
2200	else if (pState->u64FirstAddress <= UINT64_C(0x00007fffffffffff))
2201	iLast = X86_PG_AMD64_ENTRIES / 2 - 1;
2202	else if (pState->u64LastAddress >= UINT64_C(0xffff800000000000))
2203	iFirst = X86_PG_AMD64_ENTRIES / 2;
2204	else
2205	iFirst = X86_PG_AMD64_ENTRIES; /* neither address is canonical */
2206
2207	for (uint32_t i = iFirst; i <= iLast; i++)
2208	{
2209	X86PML4E Pml4e = pPML4->a[i];
2210	if (Pml4e.n.u1Present)
2211	{
2212	pState->u64Address = ((uint64_t)i << X86_PML4_SHIFT)
2213	\| (i >= RT_ELEMENTS(pPML4->a) / 2 ? UINT64_C(0xffff000000000000) : 0);
2214	pState->pHlp->pfnPrintf(pState->pHlp, /P R S A D G WT CD AT NX 4M a p ? /
2215	"%016llx 0 \| P %c %c %c %c %c %s %s %s %s .. %c%c%c %016llx",
2216	pState->u64Address,
2217	Pml4e.n.u1Write ? 'W' : 'R',
2218	Pml4e.n.u1User ? 'U' : 'S',
2219	Pml4e.n.u1Accessed ? 'A' : '-',
2220	Pml4e.n.u3Reserved & 1 ? '?' : '.', /* ignored */
2221	Pml4e.n.u3Reserved & 4 ? '!' : '.', /* mbz */
2222	Pml4e.n.u1WriteThru ? "WT" : "--",
2223	Pml4e.n.u1CacheDisable ? "CD" : "--",
2224	Pml4e.n.u3Reserved & 2 ? "!" : "..",/* mbz */
2225	Pml4e.n.u1NoExecute ? "NX" : "--",
2226	Pml4e.u & RT_BIT_64(9) ? '1' : '0',
2227	Pml4e.u & RT_BIT_64(10) ? '1' : '0',
2228	Pml4e.u & RT_BIT_64(11) ? '1' : '0',
2229	Pml4e.u & X86_PML4E_PG_MASK);
2230	if (pState->fDumpPageInfo)
2231	pgmR3DumpHierarchyGstPageInfo(pState, Pml4e.u & X86_PML4E_PG_MASK, _4K);
2232	pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pml4e.u);
2233	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2234
2235	if (cMaxDepth)
2236	{
2237	int rc2 = pgmR3DumpHierarchyGstPaePDPT(pState, Pml4e.u & X86_PML4E_PG_MASK, cMaxDepth);
2238	if (rc2 < rc && RT_SUCCESS(rc))
2239	rc = rc2;
2240	}
2241	else
2242	pState->cLeaves++;
2243	}
2244	}
2245
2246	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2247	return rc;
2248	}
2249
2250
2251	/**
2252	* Dumps a 32-bit shadow page table.
2253	*
2254	* @returns VBox status code (VINF_SUCCESS).
2255	* @param pState The dumper state.
2256	* @param GCPhys The physical address of the table.
2257	*/
2258	static int pgmR3DumpHierarchyGst32BitPT(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS GCPhys)
2259	{
2260	PCX86PT pPT;
2261	PGMPAGEMAPLOCK Lock;
2262	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page table", (void const **)&pPT, &Lock);
2263	if (RT_FAILURE(rc))
2264	return rc;
2265
2266	uint32_t iFirst, iLast;
2267	uint64_t u64BaseAddress = pgmR3DumpHierarchyCalcRange(pState, X86_PT_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
2268	for (uint32_t i = iFirst; i <= iLast; i++)
2269	{
2270	X86PTE Pte = pPT->a[i];
2271	if (Pte.n.u1Present)
2272	{
2273	pState->u64Address = u64BaseAddress + (i << X86_PT_SHIFT);
2274	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d /
2275	"%08llx 1 \| P %c %c %c %c %c %s %s %s .. 4K %c%c%c %08x",
2276	pState->u64Address,
2277	Pte.n.u1Write ? 'W' : 'R',
2278	Pte.n.u1User ? 'U' : 'S',
2279	Pte.n.u1Accessed ? 'A' : '-',
2280	Pte.n.u1Dirty ? 'D' : '-',
2281	Pte.n.u1Global ? 'G' : '-',
2282	Pte.n.u1WriteThru ? "WT" : "--",
2283	Pte.n.u1CacheDisable ? "CD" : "--",
2284	Pte.n.u1PAT ? "AT" : "--",
2285	Pte.u & RT_BIT_32(9) ? '1' : '0',
2286	Pte.u & RT_BIT_32(10) ? '1' : '0',
2287	Pte.u & RT_BIT_32(11) ? '1' : '0',
2288	Pte.u & X86_PDE_PG_MASK);
2289	if (pState->fDumpPageInfo)
2290	pgmR3DumpHierarchyGstPageInfo(pState, Pte.u & X86_PDE_PG_MASK, _4K);
2291	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2292	}
2293	}
2294
2295	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2296	return VINF_SUCCESS;
2297	}
2298
2299
2300	/**
2301	* Dumps a 32-bit shadow page directory and page tables.
2302	*
2303	* @returns VBox status code (VINF_SUCCESS).
2304	* @param pState The dumper state.
2305	* @param GCPhys The physical address of the table.
2306	* @param cMaxDepth The maximum depth.
2307	*/
2308	static int pgmR3DumpHierarchyGst32BitPD(PPGMR3DUMPHIERARCHYSTATE pState, RTHCPHYS GCPhys, unsigned cMaxDepth)
2309	{
2310	if (pState->u64Address >= _4G)
2311	return VINF_SUCCESS;
2312
2313	PCX86PD pPD;
2314	PGMPAGEMAPLOCK Lock;
2315	int rc = pgmR3DumpHierarchyGstMapPage(pState, GCPhys, "Page directory", (void const **)&pPD, &Lock);
2316	if (RT_FAILURE(rc))
2317	return rc;
2318
2319	Assert(cMaxDepth > 0);
2320	cMaxDepth--;
2321
2322	uint32_t iFirst, iLast;
2323	pgmR3DumpHierarchyCalcRange(pState, X86_PD_SHIFT, X86_PG_ENTRIES, &iFirst, &iLast);
2324	for (uint32_t i = iFirst; i <= iLast; i++)
2325	{
2326	X86PDE Pde = pPD->a[i];
2327	if (Pde.n.u1Present)
2328	{
2329	pState->u64Address = (uint32_t)i << X86_PD_SHIFT;
2330	if (Pde.b.u1Size && pState->fPse)
2331	{
2332	uint64_t u64Phys = ((uint64_t)(Pde.u & X86_PDE4M_PG_HIGH_MASK) << X86_PDE4M_PG_HIGH_SHIFT)
2333	\| (Pde.u & X86_PDE4M_PG_MASK);
2334	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
2335	"%08llx 0 \| P %c %c %c %c %c %s %s %s .. 4M %c%c%c %08llx",
2336	pState->u64Address,
2337	Pde.b.u1Write ? 'W' : 'R',
2338	Pde.b.u1User ? 'U' : 'S',
2339	Pde.b.u1Accessed ? 'A' : '-',
2340	Pde.b.u1Dirty ? 'D' : '-',
2341	Pde.b.u1Global ? 'G' : '-',
2342	Pde.b.u1WriteThru ? "WT" : "--",
2343	Pde.b.u1CacheDisable ? "CD" : "--",
2344	Pde.b.u1PAT ? "AT" : "--",
2345	Pde.u & RT_BIT_32(9) ? '1' : '0',
2346	Pde.u & RT_BIT_32(10) ? '1' : '0',
2347	Pde.u & RT_BIT_32(11) ? '1' : '0',
2348	u64Phys);
2349	if (pState->fDumpPageInfo)
2350	pgmR3DumpHierarchyGstPageInfo(pState, u64Phys, _4M);
2351	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2352	pState->cLeaves++;
2353	}
2354	else
2355	{
2356	pState->pHlp->pfnPrintf(pState->pHlp,/P R S A D G WT CD AT NX 4M a m d phys /
2357	"%08llx 0 \| P %c %c %c %c %c %s %s .. .. .. %c%c%c %08x",
2358	pState->u64Address,
2359	Pde.n.u1Write ? 'W' : 'R',
2360	Pde.n.u1User ? 'U' : 'S',
2361	Pde.n.u1Accessed ? 'A' : '-',
2362	Pde.n.u1Reserved0 ? '?' : '.', /* ignored */
2363	Pde.n.u1Reserved1 ? '?' : '.', /* ignored */
2364	Pde.n.u1WriteThru ? "WT" : "--",
2365	Pde.n.u1CacheDisable ? "CD" : "--",
2366	Pde.u & RT_BIT_32(9) ? '1' : '0',
2367	Pde.u & RT_BIT_32(10) ? '1' : '0',
2368	Pde.u & RT_BIT_32(11) ? '1' : '0',
2369	Pde.u & X86_PDE_PG_MASK);
2370	if (pState->fDumpPageInfo)
2371	pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE_PG_MASK, _4K);
2372	pState->pHlp->pfnPrintf(pState->pHlp, "\n");
2373
2374	if (cMaxDepth)
2375	{
2376	int rc2 = pgmR3DumpHierarchyGst32BitPT(pState, Pde.u & X86_PDE_PG_MASK);
2377	if (rc2 < rc && RT_SUCCESS(rc))
2378	rc = rc2;
2379	}
2380	else
2381	pState->cLeaves++;
2382	}
2383	}
2384	}
2385
2386	PGMPhysReleasePageMappingLock(pState->pVM, &Lock);
2387	return rc;
2388	}
2389
2390
2391	/**
2392	* Internal worker that initiates the actual dump.
2393	*
2394	* @returns VBox status code.
2395	* @param pState The dumper state.
2396	* @param cr3 The CR3 value.
2397	* @param cMaxDepth The max depth.
2398	*/
2399	static int pgmR3DumpHierarchyGstDoIt(PPGMR3DUMPHIERARCHYSTATE pState, uint64_t cr3, unsigned cMaxDepth)
2400	{
2401	int rc;
2402	unsigned const cch = pState->cchAddress;
2403	uint64_t const cr3Mask = pState->fEpt ? X86_CR3_AMD64_PAGE_MASK
2404	: pState->fLme ? X86_CR3_AMD64_PAGE_MASK
2405	: pState->fPae ? X86_CR3_PAE_PAGE_MASK
2406	: X86_CR3_PAGE_MASK;
2407	if (pState->fPrintCr3)
2408	{
2409	const char * const pszMode = pState->fEpt ? "Extended Page Tables"
2410	: pState->fLme ? "Long Mode"
2411	: pState->fPae ? "PAE Mode"
2412	: pState->fPse ? "32-bit w/ PSE"
2413	: "32-bit";
2414	pState->pHlp->pfnPrintf(pState->pHlp, "cr3=%0*llx", cch, cr3);
2415	if (pState->fDumpPageInfo)
2416	pgmR3DumpHierarchyGstPageInfo(pState, cr3 & X86_CR3_AMD64_PAGE_MASK, _4K);
2417	pState->pHlp->pfnPrintf(pState->pHlp, " %s%s%s\n",
2418	pszMode,
2419	pState->fNp ? " + Nested Paging" : "",
2420	pState->fNxe ? " + NX" : "");
2421	}
2422
2423
2424	if (pState->fEpt)
2425	{
2426	if (pState->fPrintHeader)
2427	pState->pHlp->pfnPrintf(pState->pHlp,
2428	"%-*s R - Readable\n"
2429	"%-*s \| W - Writeable\n"
2430	"%-*s \| \| X - Executable\n"
2431	"%-*s \| \| \| EMT - EPT memory type\n"
2432	"%-*s \| \| \| \| PAT - Ignored PAT?\n"
2433	"%-*s \| \| \| \| \| AVL1 - 4 available bits\n"
2434	"%-*s \| \| \| \| \| \| AVL2 - 12 available bits\n"
2435	"%-*s Level \| \| \| \| \| \| \| page \n"
2436	/* xxxx n **** R W X EMT PAT AVL1 AVL2 xxxxxxxxxxxxx
2437	R W X 7 0 f fff 0123456701234567 */
2438	,
2439	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
2440
2441	pState->pHlp->pfnPrintf(pState->pHlp, "EPT dumping is not yet implemented, sorry.\n");
2442	/** @todo implemented EPT dumping. */
2443	rc = VERR_NOT_IMPLEMENTED;
2444	}
2445	else
2446	{
2447	if (pState->fPrintHeader)
2448	pState->pHlp->pfnPrintf(pState->pHlp,
2449	"%-*s P - Present\n"
2450	"%-*s \| R/W - Read (0) / Write (1)\n"
2451	"%-*s \| \| U/S - User (1) / Supervisor (0)\n"
2452	"%-*s \| \| \| A - Accessed\n"
2453	"%-*s \| \| \| \| D - Dirty\n"
2454	"%-*s \| \| \| \| \| G - Global\n"
2455	"%-*s \| \| \| \| \| \| WT - Write thru\n"
2456	"%-*s \| \| \| \| \| \| \| CD - Cache disable\n"
2457	"%-*s \| \| \| \| \| \| \| \| AT - Attribute table (PAT)\n"
2458	"%-*s \| \| \| \| \| \| \| \| \| NX - No execute (K8)\n"
2459	"%-*s \| \| \| \| \| \| \| \| \| \| 4K/4M/2M - Page size.\n"
2460	"%-*s \| \| \| \| \| \| \| \| \| \| \| AVL - 3 available bits.\n"
2461	"%-*s Level \| \| \| \| \| \| \| \| \| \| \| \| Page\n"
2462	/* xxxx n **** P R S A D G WT CD AT NX 4M AVL xxxxxxxxxxxxx
2463	- W U - - - -- -- -- -- -- 010 */
2464	,
2465	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "", cch, "",
2466	cch, "", cch, "", cch, "", cch, "", cch, "", cch, "Address");
2467	if (pState->fLme)
2468	rc = pgmR3DumpHierarchyGstPaePML4(pState, cr3 & cr3Mask, cMaxDepth);
2469	else if (pState->fPae)
2470	rc = pgmR3DumpHierarchyGstPaePDPT(pState, cr3 & cr3Mask, cMaxDepth);
2471	else
2472	rc = pgmR3DumpHierarchyGst32BitPD(pState, cr3 & cr3Mask, cMaxDepth);
2473	}
2474
2475	if (!pState->cLeaves)
2476	pState->pHlp->pfnPrintf(pState->pHlp, "not present\n");
2477	return rc;
2478	}
2479
2480
2481	/**
2482	* dbgfR3PagingDumpEx worker.
2483	*
2484	* @returns VBox status code.
2485	* @param pVM The cross context VM structure.
2486	* @param cr3 The CR3 register value.
2487	* @param fFlags The flags, DBGFPGDMP_FLAGS_XXX.
2488	* @param FirstAddr The start address.
2489	* @param LastAddr The address to stop after.
2490	* @param cMaxDepth The max depth.
2491	* @param pHlp The output callbacks. Defaults to log if NULL.
2492	*
2493	* @internal
2494	*/
2495	VMMR3_INT_DECL(int) PGMR3DumpHierarchyGst(PVM pVM, uint64_t cr3, uint32_t fFlags, RTGCPTR FirstAddr, RTGCPTR LastAddr,
2496	uint32_t cMaxDepth, PCDBGFINFOHLP pHlp)
2497	{
2498	/* Minimal validation as we're only supposed to service DBGF. */
2499	AssertReturn(~(fFlags & ~DBGFPGDMP_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER);
2500	AssertReturn(!(fFlags & (DBGFPGDMP_FLAGS_CURRENT_MODE \| DBGFPGDMP_FLAGS_CURRENT_CR3)), VERR_INVALID_PARAMETER);
2501	AssertReturn(fFlags & DBGFPGDMP_FLAGS_GUEST, VERR_INVALID_PARAMETER);
2502
2503	PGMR3DUMPHIERARCHYSTATE State;
2504	pgmR3DumpHierarchyInitState(&State, pVM, fFlags, FirstAddr, LastAddr, pHlp);
2505	return pgmR3DumpHierarchyGstDoIt(&State, cr3, cMaxDepth);
2506	}
2507
2508
2509	/**
2510	* For aiding with reset problems and similar.
2511	*
2512	* @param pVM The cross context VM handle.
2513	*/
2514	void pgmLogState(PVM pVM)
2515	{
2516	#if 0
2517	RTLogRelPrintf("\npgmLogState pgmLogState pgmLogState pgmLogState pgmLogState\n");
2518
2519	/*
2520	* Per CPU stuff.
2521	*/
2522	for (VMCPUID iCpu = 0; iCpu < pVM->cCpus; iCpu++)
2523	{
2524	PPGMCPU pPgmCpu = &pVM->aCpus[iCpu].pgm.s;
2525	RTLogRelPrintf("pgmLogState: CPU #%u\n", iCpu);
2526	# define LOG_PGMCPU_MEMBER(aFmt, aMember) RTLogRelPrintf(" %32s: %" aFmt "\n", #aMember, pPgmCpu->aMember)
2527	LOG_PGMCPU_MEMBER("#RX32", offVM);
2528	LOG_PGMCPU_MEMBER("#RX32", offVCpu);
2529	LOG_PGMCPU_MEMBER("#RX32", offPGM);
2530	LOG_PGMCPU_MEMBER("RGp", GCPhysA20Mask);
2531	LOG_PGMCPU_MEMBER("RTbool", fA20Enabled);
2532	LOG_PGMCPU_MEMBER("RTbool", fNoExecuteEnabled);
2533	LOG_PGMCPU_MEMBER("#RX32", fSyncFlags);
2534	LOG_PGMCPU_MEMBER("d", enmShadowMode);
2535	LOG_PGMCPU_MEMBER("d", enmGuestMode);
2536	LOG_PGMCPU_MEMBER("RGp", GCPhysCR3);
2537
2538	LOG_PGMCPU_MEMBER("p", pGst32BitPdR3);
2539	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
2540	LOG_PGMCPU_MEMBER("p", pGst32BitPdR0);
2541	# endif
2542	LOG_PGMCPU_MEMBER("RRv", pGst32BitPdRC);
2543	LOG_PGMCPU_MEMBER("#RX32", fGst32BitMbzBigPdeMask);
2544	LOG_PGMCPU_MEMBER("RTbool", fGst32BitPageSizeExtension);
2545
2546	LOG_PGMCPU_MEMBER("p", pGstPaePdptR3);
2547	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
2548	LOG_PGMCPU_MEMBER("p", pGstPaePdptR0);
2549	# endif
2550	LOG_PGMCPU_MEMBER("RRv", pGstPaePdptRC);
2551	LOG_PGMCPU_MEMBER("p", apGstPaePDsR3[0]);
2552	LOG_PGMCPU_MEMBER("p", apGstPaePDsR3[1]);
2553	LOG_PGMCPU_MEMBER("p", apGstPaePDsR3[2]);
2554	LOG_PGMCPU_MEMBER("p", apGstPaePDsR3[3]);
2555	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
2556	LOG_PGMCPU_MEMBER("p", apGstPaePDsR0[0]);
2557	LOG_PGMCPU_MEMBER("p", apGstPaePDsR0[1]);
2558	LOG_PGMCPU_MEMBER("p", apGstPaePDsR0[2]);
2559	LOG_PGMCPU_MEMBER("p", apGstPaePDsR0[3]);
2560	# endif
2561	LOG_PGMCPU_MEMBER("RRv", apGstPaePDsR0[0]);
2562	LOG_PGMCPU_MEMBER("RRv", apGstPaePDsR0[1]);
2563	LOG_PGMCPU_MEMBER("RRv", apGstPaePDsR0[2]);
2564	LOG_PGMCPU_MEMBER("RRv", apGstPaePDsR0[3]);
2565	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDs[0]);
2566	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDs[1]);
2567	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDs[2]);
2568	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDs[3]);
2569	LOG_PGMCPU_MEMBER("#RX64", aGstPaePdpeRegs[0].u);
2570	LOG_PGMCPU_MEMBER("#RX64", aGstPaePdpeRegs[1].u);
2571	LOG_PGMCPU_MEMBER("#RX64", aGstPaePdpeRegs[2].u);
2572	LOG_PGMCPU_MEMBER("#RX64", aGstPaePdpeRegs[3].u);
2573	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDsMonitored[0]);
2574	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDsMonitored[1]);
2575	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDsMonitored[2]);
2576	LOG_PGMCPU_MEMBER("RGp", aGCPhysGstPaePDsMonitored[3]);
2577	LOG_PGMCPU_MEMBER("#RX64", fGstPaeMbzPteMask);
2578	LOG_PGMCPU_MEMBER("#RX64", fGstPaeMbzPdeMask);
2579	LOG_PGMCPU_MEMBER("#RX64", fGstPaeMbzBigPdeMask);
2580	LOG_PGMCPU_MEMBER("#RX64", fGstPaeMbzBigPdeMask);
2581	LOG_PGMCPU_MEMBER("#RX64", fGstPaeMbzPdpeMask);
2582
2583	LOG_PGMCPU_MEMBER("p", pGstAmd64Pml4R3);
2584	# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
2585	LOG_PGMCPU_MEMBER("p", pGstAmd64Pml4R0);
2586	# endif
2587	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64MbzPteMask);
2588	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64MbzPdeMask);
2589	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64MbzBigPdeMask);
2590	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64MbzPdpeMask);
2591	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64MbzBigPdpeMask);
2592	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64MbzPml4eMask);
2593	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64ShadowedPdpeMask);
2594	LOG_PGMCPU_MEMBER("#RX64", fGstAmd64ShadowedPml4eMask);
2595	LOG_PGMCPU_MEMBER("#RX64", fGst64ShadowedPteMask);
2596	LOG_PGMCPU_MEMBER("#RX64", fGst64ShadowedPdeMask);
2597	LOG_PGMCPU_MEMBER("#RX64", fGst64ShadowedBigPdeMask);
2598	LOG_PGMCPU_MEMBER("#RX64", fGst64ShadowedBigPde4PteMask);
2599
2600	LOG_PGMCPU_MEMBER("p", pShwPageCR3R3);
2601	LOG_PGMCPU_MEMBER("p", pShwPageCR3R0);
2602	LOG_PGMCPU_MEMBER("RRv", pShwPageCR3RC);
2603
2604	LOG_PGMCPU_MEMBER("p", pfnR3ShwRelocate);
2605	LOG_PGMCPU_MEMBER("p", pfnR3ShwExit);
2606	LOG_PGMCPU_MEMBER("p", pfnR3ShwGetPage);
2607	LOG_PGMCPU_MEMBER("p", pfnR3ShwModifyPage);
2608	LOG_PGMCPU_MEMBER("p", pfnR0ShwGetPage);
2609	LOG_PGMCPU_MEMBER("p", pfnR0ShwModifyPage);
2610	LOG_PGMCPU_MEMBER("p", pfnR3GstRelocate);
2611	LOG_PGMCPU_MEMBER("p", pfnR3GstExit);
2612	LOG_PGMCPU_MEMBER("p", pfnR3GstGetPage);
2613	LOG_PGMCPU_MEMBER("p", pfnR3GstModifyPage);
2614	LOG_PGMCPU_MEMBER("p", pfnR0GstGetPage);
2615	LOG_PGMCPU_MEMBER("p", pfnR0GstModifyPage);
2616	LOG_PGMCPU_MEMBER("p", pfnR3BthRelocate);
2617	LOG_PGMCPU_MEMBER("p", pfnR3BthInvalidatePage);
2618	LOG_PGMCPU_MEMBER("p", pfnR3BthSyncCR3);
2619	LOG_PGMCPU_MEMBER("p", pfnR3BthPrefetchPage);
2620	LOG_PGMCPU_MEMBER("p", pfnR3BthMapCR3);
2621	LOG_PGMCPU_MEMBER("p", pfnR3BthUnmapCR3);
2622	LOG_PGMCPU_MEMBER("p", pfnR0BthMapCR3);
2623	LOG_PGMCPU_MEMBER("p", pfnR0BthUnmapCR3);
2624	LOG_PGMCPU_MEMBER("#RX64", cNetwareWp0Hacks);
2625	LOG_PGMCPU_MEMBER("#RX64", cPoolAccessHandler);
2626
2627	}
2628
2629	/*
2630	* PGM globals.
2631	*/
2632	RTLogRelPrintf("PGM globals\n");
2633	PPGM pPgm = &pVM->pgm.s;
2634	# define LOG_PGM_MEMBER(aFmt, aMember) RTLogRelPrintf(" %32s: %" aFmt "\n", #aMember, pPgm->aMember)
2635	LOG_PGM_MEMBER("#RX32", offVM);
2636	LOG_PGM_MEMBER("#RX32", offVCpuPGM);
2637	LOG_PGM_MEMBER("RTbool", fRamPreAlloc);
2638	LOG_PGM_MEMBER("RTbool", fPhysWriteMonitoringEngaged);
2639	LOG_PGM_MEMBER("RTbool", fLessThan52PhysicalAddressBits);
2640	LOG_PGM_MEMBER("RTbool", fNestedPaging);
2641	LOG_PGM_MEMBER("d", enmHostMode);
2642	LOG_PGM_MEMBER("RTbool", fNoMorePhysWrites);
2643	LOG_PGM_MEMBER("RTbool", fPageFusionAllowed);
2644	LOG_PGM_MEMBER("RTbool", fPciPassthrough);
2645	LOG_PGM_MEMBER("#x", cMmio2Regions);
2646	LOG_PGM_MEMBER("RTbool", fRestoreRomPagesOnReset);
2647	LOG_PGM_MEMBER("RTbool", fZeroRamPagesOnReset);
2648	LOG_PGM_MEMBER("RTbool", fFinalizedMappings);
2649	LOG_PGM_MEMBER("RTbool", fMappingsFixed);
2650	LOG_PGM_MEMBER("RTbool", fMappingsFixedRestored);
2651	LOG_PGM_MEMBER("%#x", cbMappingFixed);
2652	LOG_PGM_MEMBER("%#x", idRamRangesGen);
2653	LOG_PGM_MEMBER("#RGv", GCPtrMappingFixed);
2654	LOG_PGM_MEMBER("#RGv", GCPtrPrevRamRangeMapping);
2655	LOG_PGM_MEMBER("%#x", hRomPhysHandlerType);
2656	LOG_PGM_MEMBER("#RGp", GCPhys4MBPSEMask);
2657	LOG_PGM_MEMBER("#RGp", GCPhysInvAddrMask);
2658	LOG_PGM_MEMBER("p", apRamRangesTlbR3[0]);
2659	LOG_PGM_MEMBER("p", apRamRangesTlbR3[1]);
2660	LOG_PGM_MEMBER("p", apRamRangesTlbR3[2]);
2661	LOG_PGM_MEMBER("p", apRamRangesTlbR3[3]);
2662	LOG_PGM_MEMBER("p", apRamRangesTlbR3[4]);
2663	LOG_PGM_MEMBER("p", apRamRangesTlbR3[5]);
2664	LOG_PGM_MEMBER("p", apRamRangesTlbR3[6]);
2665	LOG_PGM_MEMBER("p", apRamRangesTlbR3[7]);
2666	LOG_PGM_MEMBER("p", pRamRangesXR3);
2667	LOG_PGM_MEMBER("p", pRamRangeTreeR3);
2668	LOG_PGM_MEMBER("p", pTreesR3);
2669	LOG_PGM_MEMBER("p", pLastPhysHandlerR3);
2670	LOG_PGM_MEMBER("p", pPoolR3);
2671	LOG_PGM_MEMBER("p", pMappingsR3);
2672	LOG_PGM_MEMBER("p", pRomRangesR3);
2673	LOG_PGM_MEMBER("p", pRegMmioRangesR3);
2674	LOG_PGM_MEMBER("p", paModeData);
2675	LOG_PGM_MEMBER("p", apMmio2RangesR3[0]);
2676	LOG_PGM_MEMBER("p", apMmio2RangesR3[1]);
2677	LOG_PGM_MEMBER("p", apMmio2RangesR3[2]);
2678	LOG_PGM_MEMBER("p", apMmio2RangesR3[3]);
2679	LOG_PGM_MEMBER("p", apMmio2RangesR3[4]);
2680	LOG_PGM_MEMBER("p", apMmio2RangesR3[5]);
2681	LOG_PGM_MEMBER("p", apRamRangesTlbR0[0]);
2682	LOG_PGM_MEMBER("p", apRamRangesTlbR0[1]);
2683	LOG_PGM_MEMBER("p", apRamRangesTlbR0[2]);
2684	LOG_PGM_MEMBER("p", apRamRangesTlbR0[3]);
2685	LOG_PGM_MEMBER("p", apRamRangesTlbR0[4]);
2686	LOG_PGM_MEMBER("p", apRamRangesTlbR0[5]);
2687	LOG_PGM_MEMBER("p", apRamRangesTlbR0[6]);
2688	LOG_PGM_MEMBER("p", apRamRangesTlbR0[7]);
2689	LOG_PGM_MEMBER("p", pRamRangesXR0);
2690	LOG_PGM_MEMBER("p", pRamRangeTreeR0);
2691	LOG_PGM_MEMBER("p", pTreesR0);
2692	LOG_PGM_MEMBER("p", pLastPhysHandlerR0);
2693	LOG_PGM_MEMBER("p", pPoolR0);
2694	LOG_PGM_MEMBER("p", pMappingsR0);
2695	LOG_PGM_MEMBER("p", pRomRangesR0);
2696	LOG_PGM_MEMBER("p", apMmio2RangesR0[0]);
2697	LOG_PGM_MEMBER("p", apMmio2RangesR0[1]);
2698	LOG_PGM_MEMBER("p", apMmio2RangesR0[2]);
2699	LOG_PGM_MEMBER("p", apMmio2RangesR0[3]);
2700	LOG_PGM_MEMBER("p", apMmio2RangesR0[4]);
2701	LOG_PGM_MEMBER("p", apMmio2RangesR0[5]);
2702	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[0]);
2703	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[1]);
2704	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[2]);
2705	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[3]);
2706	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[4]);
2707	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[5]);
2708	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[6]);
2709	LOG_PGM_MEMBER("RRv", apRamRangesTlbRC[7]);
2710	LOG_PGM_MEMBER("RRv", pRamRangesXRC);
2711	LOG_PGM_MEMBER("RRv", pRamRangeTreeRC);
2712	LOG_PGM_MEMBER("RRv", pTreesRC);
2713	LOG_PGM_MEMBER("RRv", pLastPhysHandlerRC);
2714	LOG_PGM_MEMBER("RRv", pPoolRC);
2715	LOG_PGM_MEMBER("RRv", pMappingsRC);
2716	LOG_PGM_MEMBER("RRv", pRomRangesRC);
2717	LOG_PGM_MEMBER("RRv", paDynPageMap32BitPTEsGC);
2718	LOG_PGM_MEMBER("RRv", paDynPageMapPaePTEsGC);
2719
2720	LOG_PGM_MEMBER("#RGv", GCPtrCR3Mapping);
2721	LOG_PGM_MEMBER("p", pInterPD);
2722	LOG_PGM_MEMBER("p", apInterPTs[0]);
2723	LOG_PGM_MEMBER("p", apInterPTs[1]);
2724	LOG_PGM_MEMBER("p", apInterPaePTs[0]);
2725	LOG_PGM_MEMBER("p", apInterPaePTs[1]);
2726	LOG_PGM_MEMBER("p", apInterPaePDs[0]);
2727	LOG_PGM_MEMBER("p", apInterPaePDs[1]);
2728	LOG_PGM_MEMBER("p", apInterPaePDs[2]);
2729	LOG_PGM_MEMBER("p", apInterPaePDs[3]);
2730	LOG_PGM_MEMBER("p", pInterPaePDPT);
2731	LOG_PGM_MEMBER("p", pInterPaePML4);
2732	LOG_PGM_MEMBER("p", pInterPaePDPT64);
2733	LOG_PGM_MEMBER("#RHp", HCPhysInterPD);
2734	LOG_PGM_MEMBER("#RHp", HCPhysInterPaePDPT);
2735	LOG_PGM_MEMBER("#RHp", HCPhysInterPaePML4);
2736	LOG_PGM_MEMBER("RRv", pbDynPageMapBaseGC);
2737	LOG_PGM_MEMBER("RRv", pRCDynMap);
2738	LOG_PGM_MEMBER("p", pvR0DynMapUsed);
2739	LOG_PGM_MEMBER("%#x", cDeprecatedPageLocks);
2740
2741	/**
2742	* Data associated with managing the ring-3 mappings of the allocation chunks.
2743	*/
2744	LOG_PGM_MEMBER("p", ChunkR3Map.pTree);
2745	//LOG_PGM_MEMBER(PGMCHUNKR3MAPTLB ChunkR3Map.Tlb);
2746	LOG_PGM_MEMBER("%#x", ChunkR3Map.c);
2747	LOG_PGM_MEMBER("%#x", ChunkR3Map.cMax);
2748	LOG_PGM_MEMBER("%#x", ChunkR3Map.iNow);
2749	//LOG_PGM_MEMBER(PGMPAGER3MAPTLB PhysTlbHC);
2750
2751	LOG_PGM_MEMBER("#RHp", HCPhysZeroPg);
2752	LOG_PGM_MEMBER("p", pvZeroPgR3);
2753	LOG_PGM_MEMBER("p", pvZeroPgR0);
2754	LOG_PGM_MEMBER("RRv", pvZeroPgRC);
2755	LOG_PGM_MEMBER("#RHp", HCPhysMmioPg);
2756	LOG_PGM_MEMBER("#RHp", HCPhysInvMmioPg);
2757	LOG_PGM_MEMBER("p", pvMmioPgR3);
2758	LOG_PGM_MEMBER("RTbool", fErrInjHandyPages);
2759
2760	/*
2761	* PGM page pool.
2762	*/
2763	PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
2764	RTLogRelPrintf("PGM Page Pool\n");
2765	# define LOG_PGMPOOL_MEMBER(aFmt, aMember) RTLogRelPrintf(" %32s: %" aFmt "\n", #aMember, pPool->aMember)
2766	LOG_PGMPOOL_MEMBER("p", pVMR3);
2767	LOG_PGMPOOL_MEMBER("p", pVMR0);
2768	LOG_PGMPOOL_MEMBER("RRv", pVMRC);
2769	LOG_PGMPOOL_MEMBER("#x", cMaxPages);
2770	LOG_PGMPOOL_MEMBER("#x", cCurPages);
2771	LOG_PGMPOOL_MEMBER("#x", iFreeHead);
2772	LOG_PGMPOOL_MEMBER("#x", u16Padding);
2773	LOG_PGMPOOL_MEMBER("#x", iUserFreeHead);
2774	LOG_PGMPOOL_MEMBER("#x", cMaxUsers);
2775	LOG_PGMPOOL_MEMBER("#x", cPresent);
2776	LOG_PGMPOOL_MEMBER("RRv", paUsersRC);
2777	LOG_PGMPOOL_MEMBER("p", paUsersR3);
2778	LOG_PGMPOOL_MEMBER("p", paUsersR0);
2779	LOG_PGMPOOL_MEMBER("#x", iPhysExtFreeHead);
2780	LOG_PGMPOOL_MEMBER("#x", cMaxPhysExts);
2781	LOG_PGMPOOL_MEMBER("RRv", paPhysExtsRC);
2782	LOG_PGMPOOL_MEMBER("p", paPhysExtsR3);
2783	LOG_PGMPOOL_MEMBER("p", paPhysExtsR0);
2784	for (uint32_t i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
2785	RTLogRelPrintf(" aiHash[%u]: %#x\n", i, pPool->aiHash[i]);
2786	LOG_PGMPOOL_MEMBER("#x", iAgeHead);
2787	LOG_PGMPOOL_MEMBER("#x", iAgeTail);
2788	LOG_PGMPOOL_MEMBER("RTbool", fCacheEnabled);
2789	LOG_PGMPOOL_MEMBER("RTbool", afPadding1[0]);
2790	LOG_PGMPOOL_MEMBER("RTbool", afPadding1[1]);
2791	LOG_PGMPOOL_MEMBER("RTbool", afPadding1[2]);
2792	LOG_PGMPOOL_MEMBER("#x", iModifiedHead);
2793	LOG_PGMPOOL_MEMBER("#x", cModifiedPages);
2794	LOG_PGMPOOL_MEMBER("#x", hAccessHandlerType);
2795	LOG_PGMPOOL_MEMBER("#x", idxFreeDirtyPage);
2796	LOG_PGMPOOL_MEMBER("#x", cDirtyPages);
2797	for (uint32_t i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++)
2798	RTLogRelPrintf(" aDirtyPages[%u].uIdx: %#x\n", i, pPool->aDirtyPages[i].uIdx);
2799	LOG_PGMPOOL_MEMBER("#x", cUsedPages);
2800	LOG_PGMPOOL_MEMBER("#x", HCPhysTree);
2801	for (uint32_t i = 0; i < pPool->cCurPages; i++)
2802	{
2803	PPGMPOOLPAGE pPage = &pPool->aPages[i];
2804	# define LOG_PAGE_MEMBER(aFmt, aMember) RTLogRelPrintf(" %3u:%-32s: %" aFmt "\n", i, #aMember, pPage->aMember)
2805	RTLogRelPrintf("%3u:%-32s: %p\n", i, "", pPage);
2806	LOG_PAGE_MEMBER("RHp", Core.Key);
2807	LOG_PAGE_MEMBER("p", pvPageR3);
2808	LOG_PAGE_MEMBER("RGp", GCPhys);
2809	LOG_PAGE_MEMBER("d", enmKind);
2810	LOG_PAGE_MEMBER("d", enmAccess);
2811	LOG_PAGE_MEMBER("RTbool", fA20Enabled);
2812	LOG_PAGE_MEMBER("RTbool", fZeroed);
2813	LOG_PAGE_MEMBER("RTbool", fSeenNonGlobal);
2814	LOG_PAGE_MEMBER("RTbool", fMonitored);
2815	LOG_PAGE_MEMBER("RTbool", fCached);
2816	LOG_PAGE_MEMBER("RTbool", fReusedFlushPending);
2817	LOG_PAGE_MEMBER("RTbool", fDirty);
2818	LOG_PAGE_MEMBER("RTbool", fPadding1);
2819	LOG_PAGE_MEMBER("RTbool", fPadding2);
2820	LOG_PAGE_MEMBER("#x", idx);
2821	LOG_PAGE_MEMBER("#x", iNext);
2822	LOG_PAGE_MEMBER("#x", iUserHead);
2823	LOG_PAGE_MEMBER("#x", cPresent);
2824	LOG_PAGE_MEMBER("#x", iFirstPresent);
2825	LOG_PAGE_MEMBER("#x", cModifications);
2826	LOG_PAGE_MEMBER("#x", iModifiedNext);
2827	LOG_PAGE_MEMBER("#x", iModifiedPrev);
2828	LOG_PAGE_MEMBER("#x", iMonitoredNext);
2829	LOG_PAGE_MEMBER("#x", iMonitoredPrev);
2830	LOG_PAGE_MEMBER("#x", iAgeNext);
2831	LOG_PAGE_MEMBER("#x", iAgePrev);
2832	LOG_PAGE_MEMBER("#x", idxDirtyEntry);
2833	LOG_PAGE_MEMBER("RGv", GCPtrLastAccessHandlerRip);
2834	LOG_PAGE_MEMBER("RGv", GCPtrLastAccessHandlerFault);
2835	LOG_PAGE_MEMBER("#RX64", cLastAccessHandler);
2836	LOG_PAGE_MEMBER("#RX32", cLocked);
2837	# ifdef VBOX_STRICT
2838	LOG_PAGE_MEMBER("RGv", GCPtrDirtyFault);
2839	# endif
2840	if ( pPage->enmKind == PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT
2841	\|\| pPage->enmKind == PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB
2842	\|\| pPage->enmKind == PGMPOOLKIND_32BIT_PD
2843	\|\| pPage->enmKind == PGMPOOLKIND_32BIT_PD_PHYS)
2844	{
2845	uint32_t const pu32Page = (uint32_t const )pPage->pvPageR3;
2846	for (uint32_t i = 0; i < 1024/2; i += 4)
2847	RTLogRelPrintf(" %#05x: %RX32 %RX32 %RX32 %RX32\n", i, pu32Page[i], pu32Page[i+1], pu32Page[i+2], pu32Page[i+3]);
2848	}
2849	else if ( pPage->enmKind != PGMPOOLKIND_FREE
2850	&& pPage->enmKind != PGMPOOLKIND_INVALID)
2851	{
2852	uint64_t const pu64Page = (uint64_t const )pPage->pvPageR3;
2853	for (uint32_t i = 0; i < 512/2; i += 2)
2854	RTLogRelPrintf(" %#05x: %RX64 %RX64\n", i, pu64Page[i], pu64Page[i+1]);
2855	}
2856	}
2857
2858	RTLogRelPrintf("pgmLogState pgmLogState pgmLogState pgmLogState pgmLogState\n\n");
2859	#else
2860	RT_NOREF(pVM);
2861	#endif
2862	}
2863

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source: vbox/trunk/src/VBox/VMM/VMMR3/PGMDbg.cpp@ 84909

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