PGMPhys.cpp@ 44397

Last change on this file since 44397 was 44347, checked in by vboxsync, 12 years ago
PGM,SSM,STAM: Changed APIs used by Main to take PUVM instead of PVM as the VM handle.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 166.9 KB

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1	/* $Id: PGMPhys.cpp 44347 2013-01-24 00:27:56Z vboxsync $ */
2	/** @file
3	* PGM - Page Manager and Monitor, Physical Memory Addressing.
4	*/
5
6	/*
7	* Copyright (C) 2006-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*******************************************************************************
20	* Header Files *
21	*******************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PGM_PHYS
23	#include <VBox/vmm/pgm.h>
24	#include <VBox/vmm/iom.h>
25	#include <VBox/vmm/mm.h>
26	#include <VBox/vmm/stam.h>
27	#ifdef VBOX_WITH_REM
28	# include <VBox/vmm/rem.h>
29	#endif
30	#include <VBox/vmm/pdmdev.h>
31	#include "PGMInternal.h"
32	#include <VBox/vmm/vm.h>
33	#include <VBox/vmm/uvm.h>
34	#include "PGMInline.h"
35	#include <VBox/sup.h>
36	#include <VBox/param.h>
37	#include <VBox/err.h>
38	#include <VBox/log.h>
39	#include <iprt/assert.h>
40	#include <iprt/alloc.h>
41	#include <iprt/asm.h>
42	#ifdef VBOX_STRICT
43	# include <iprt/crc.h>
44	#endif
45	#include <iprt/thread.h>
46	#include <iprt/string.h>
47	#include <iprt/system.h>
48
49
50	/*******************************************************************************
51	* Defined Constants And Macros *
52	*******************************************************************************/
53	/** The number of pages to free in one batch. */
54	#define PGMPHYS_FREE_PAGE_BATCH_SIZE 128
55
56
57	/*******************************************************************************
58	* Internal Functions *
59	*******************************************************************************/
60	static DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
61
62
63	/*
64	* PGMR3PhysReadU8-64
65	* PGMR3PhysWriteU8-64
66	*/
67	#define PGMPHYSFN_READNAME PGMR3PhysReadU8
68	#define PGMPHYSFN_WRITENAME PGMR3PhysWriteU8
69	#define PGMPHYS_DATASIZE 1
70	#define PGMPHYS_DATATYPE uint8_t
71	#include "PGMPhysRWTmpl.h"
72
73	#define PGMPHYSFN_READNAME PGMR3PhysReadU16
74	#define PGMPHYSFN_WRITENAME PGMR3PhysWriteU16
75	#define PGMPHYS_DATASIZE 2
76	#define PGMPHYS_DATATYPE uint16_t
77	#include "PGMPhysRWTmpl.h"
78
79	#define PGMPHYSFN_READNAME PGMR3PhysReadU32
80	#define PGMPHYSFN_WRITENAME PGMR3PhysWriteU32
81	#define PGMPHYS_DATASIZE 4
82	#define PGMPHYS_DATATYPE uint32_t
83	#include "PGMPhysRWTmpl.h"
84
85	#define PGMPHYSFN_READNAME PGMR3PhysReadU64
86	#define PGMPHYSFN_WRITENAME PGMR3PhysWriteU64
87	#define PGMPHYS_DATASIZE 8
88	#define PGMPHYS_DATATYPE uint64_t
89	#include "PGMPhysRWTmpl.h"
90
91
92	/**
93	* EMT worker for PGMR3PhysReadExternal.
94	*/
95	static DECLCALLBACK(int) pgmR3PhysReadExternalEMT(PVM pVM, PRTGCPHYS pGCPhys, void *pvBuf, size_t cbRead)
96	{
97	PGMPhysRead(pVM, *pGCPhys, pvBuf, cbRead);
98	return VINF_SUCCESS;
99	}
100
101
102	/**
103	* Read from physical memory, external users.
104	*
105	* @returns VBox status code.
106	* @retval VINF_SUCCESS.
107	*
108	* @param pVM Pointer to the VM.
109	* @param GCPhys Physical address to read from.
110	* @param pvBuf Where to read into.
111	* @param cbRead How many bytes to read.
112	*
113	* @thread Any but EMTs.
114	*/
115	VMMR3DECL(int) PGMR3PhysReadExternal(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
116	{
117	VM_ASSERT_OTHER_THREAD(pVM);
118
119	AssertMsgReturn(cbRead > 0, ("don't even think about reading zero bytes!\n"), VINF_SUCCESS);
120	LogFlow(("PGMR3PhysReadExternal: %RGp %d\n", GCPhys, cbRead));
121
122	pgmLock(pVM);
123
124	/*
125	* Copy loop on ram ranges.
126	*/
127	PPGMRAMRANGE pRam = pgmPhysGetRangeAtOrAbove(pVM, GCPhys);
128	for (;;)
129	{
130	/* Inside range or not? */
131	if (pRam && GCPhys >= pRam->GCPhys)
132	{
133	/*
134	* Must work our way thru this page by page.
135	*/
136	RTGCPHYS off = GCPhys - pRam->GCPhys;
137	while (off < pRam->cb)
138	{
139	unsigned iPage = off >> PAGE_SHIFT;
140	PPGMPAGE pPage = &pRam->aPages[iPage];
141
142	/*
143	* If the page has an ALL access handler, we'll have to
144	* delegate the job to EMT.
145	*/
146	if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage))
147	{
148	pgmUnlock(pVM);
149
150	return VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysReadExternalEMT, 4,
151	pVM, &GCPhys, pvBuf, cbRead);
152	}
153	Assert(!PGM_PAGE_IS_MMIO(pPage));
154
155	/*
156	* Simple stuff, go ahead.
157	*/
158	size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
159	if (cb > cbRead)
160	cb = cbRead;
161	PGMPAGEMAPLOCK PgMpLck;
162	const void *pvSrc;
163	int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, pRam->GCPhys + off, &pvSrc, &PgMpLck);
164	if (RT_SUCCESS(rc))
165	{
166	memcpy(pvBuf, pvSrc, cb);
167	pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck);
168	}
169	else
170	{
171	AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
172	pRam->GCPhys + off, pPage, rc));
173	memset(pvBuf, 0xff, cb);
174	}
175
176	/* next page */
177	if (cb >= cbRead)
178	{
179	pgmUnlock(pVM);
180	return VINF_SUCCESS;
181	}
182	cbRead -= cb;
183	off += cb;
184	GCPhys += cb;
185	pvBuf = (char *)pvBuf + cb;
186	} /* walk pages in ram range. */
187	}
188	else
189	{
190	LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
191
192	/*
193	* Unassigned address space.
194	*/
195	size_t cb = pRam ? pRam->GCPhys - GCPhys : ~(size_t)0;
196	if (cb >= cbRead)
197	{
198	memset(pvBuf, 0xff, cbRead);
199	break;
200	}
201	memset(pvBuf, 0xff, cb);
202
203	cbRead -= cb;
204	pvBuf = (char *)pvBuf + cb;
205	GCPhys += cb;
206	}
207
208	/* Advance range if necessary. */
209	while (pRam && GCPhys > pRam->GCPhysLast)
210	pRam = pRam->CTX_SUFF(pNext);
211	} /* Ram range walk */
212
213	pgmUnlock(pVM);
214
215	return VINF_SUCCESS;
216	}
217
218
219	/**
220	* EMT worker for PGMR3PhysWriteExternal.
221	*/
222	static DECLCALLBACK(int) pgmR3PhysWriteExternalEMT(PVM pVM, PRTGCPHYS pGCPhys, const void *pvBuf, size_t cbWrite)
223	{
224	/** @todo VERR_EM_NO_MEMORY */
225	PGMPhysWrite(pVM, *pGCPhys, pvBuf, cbWrite);
226	return VINF_SUCCESS;
227	}
228
229
230	/**
231	* Write to physical memory, external users.
232	*
233	* @returns VBox status code.
234	* @retval VINF_SUCCESS.
235	* @retval VERR_EM_NO_MEMORY.
236	*
237	* @param pVM Pointer to the VM.
238	* @param GCPhys Physical address to write to.
239	* @param pvBuf What to write.
240	* @param cbWrite How many bytes to write.
241	* @param pszWho Who is writing. For tracking down who is writing
242	* after we've saved the state.
243	*
244	* @thread Any but EMTs.
245	*/
246	VMMDECL(int) PGMR3PhysWriteExternal(PVM pVM, RTGCPHYS GCPhys, const void pvBuf, size_t cbWrite, const char pszWho)
247	{
248	VM_ASSERT_OTHER_THREAD(pVM);
249
250	AssertMsg(!pVM->pgm.s.fNoMorePhysWrites,
251	("Calling PGMR3PhysWriteExternal after pgmR3Save()! GCPhys=%RGp cbWrite=%#x pszWho=%s\n",
252	GCPhys, cbWrite, pszWho));
253	AssertMsgReturn(cbWrite > 0, ("don't even think about writing zero bytes!\n"), VINF_SUCCESS);
254	LogFlow(("PGMR3PhysWriteExternal: %RGp %d\n", GCPhys, cbWrite));
255
256	pgmLock(pVM);
257
258	/*
259	* Copy loop on ram ranges, stop when we hit something difficult.
260	*/
261	PPGMRAMRANGE pRam = pgmPhysGetRangeAtOrAbove(pVM, GCPhys);
262	for (;;)
263	{
264	/* Inside range or not? */
265	if (pRam && GCPhys >= pRam->GCPhys)
266	{
267	/*
268	* Must work our way thru this page by page.
269	*/
270	RTGCPTR off = GCPhys - pRam->GCPhys;
271	while (off < pRam->cb)
272	{
273	RTGCPTR iPage = off >> PAGE_SHIFT;
274	PPGMPAGE pPage = &pRam->aPages[iPage];
275
276	/*
277	* Is the page problematic, we have to do the work on the EMT.
278	*
279	* Allocating writable pages and access handlers are
280	* problematic, write monitored pages are simple and can be
281	* dealt with here.
282	*/
283	if ( PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)
284	\|\| PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED)
285	{
286	if ( PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_WRITE_MONITORED
287	&& !PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))
288	pgmPhysPageMakeWriteMonitoredWritable(pVM, pPage);
289	else
290	{
291	pgmUnlock(pVM);
292
293	return VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysWriteExternalEMT, 4,
294	pVM, &GCPhys, pvBuf, cbWrite);
295	}
296	}
297	Assert(!PGM_PAGE_IS_MMIO(pPage));
298
299	/*
300	* Simple stuff, go ahead.
301	*/
302	size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
303	if (cb > cbWrite)
304	cb = cbWrite;
305	PGMPAGEMAPLOCK PgMpLck;
306	void *pvDst;
307	int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pRam->GCPhys + off, &pvDst, &PgMpLck);
308	if (RT_SUCCESS(rc))
309	{
310	memcpy(pvDst, pvBuf, cb);
311	pgmPhysReleaseInternalPageMappingLock(pVM, &PgMpLck);
312	}
313	else
314	AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
315	pRam->GCPhys + off, pPage, rc));
316
317	/* next page */
318	if (cb >= cbWrite)
319	{
320	pgmUnlock(pVM);
321	return VINF_SUCCESS;
322	}
323
324	cbWrite -= cb;
325	off += cb;
326	GCPhys += cb;
327	pvBuf = (const char *)pvBuf + cb;
328	} /* walk pages in ram range */
329	}
330	else
331	{
332	/*
333	* Unassigned address space, skip it.
334	*/
335	if (!pRam)
336	break;
337	size_t cb = pRam->GCPhys - GCPhys;
338	if (cb >= cbWrite)
339	break;
340	cbWrite -= cb;
341	pvBuf = (const char *)pvBuf + cb;
342	GCPhys += cb;
343	}
344
345	/* Advance range if necessary. */
346	while (pRam && GCPhys > pRam->GCPhysLast)
347	pRam = pRam->CTX_SUFF(pNext);
348	} /* Ram range walk */
349
350	pgmUnlock(pVM);
351	return VINF_SUCCESS;
352	}
353
354
355	/**
356	* VMR3ReqCall worker for PGMR3PhysGCPhys2CCPtrExternal to make pages writable.
357	*
358	* @returns see PGMR3PhysGCPhys2CCPtrExternal
359	* @param pVM Pointer to the VM.
360	* @param pGCPhys Pointer to the guest physical address.
361	* @param ppv Where to store the mapping address.
362	* @param pLock Where to store the lock.
363	*/
364	static DECLCALLBACK(int) pgmR3PhysGCPhys2CCPtrDelegated(PVM pVM, PRTGCPHYS pGCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
365	{
366	/*
367	* Just hand it to PGMPhysGCPhys2CCPtr and check that it's not a page with
368	* an access handler after it succeeds.
369	*/
370	int rc = pgmLock(pVM);
371	AssertRCReturn(rc, rc);
372
373	rc = PGMPhysGCPhys2CCPtr(pVM, *pGCPhys, ppv, pLock);
374	if (RT_SUCCESS(rc))
375	{
376	PPGMPAGEMAPTLBE pTlbe;
377	int rc2 = pgmPhysPageQueryTlbe(pVM, *pGCPhys, &pTlbe);
378	AssertFatalRC(rc2);
379	PPGMPAGE pPage = pTlbe->pPage;
380	if (PGM_PAGE_IS_MMIO(pPage))
381	{
382	PGMPhysReleasePageMappingLock(pVM, pLock);
383	rc = VERR_PGM_PHYS_PAGE_RESERVED;
384	}
385	else if ( PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)
386	#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
387	\|\| pgmPoolIsDirtyPage(pVM, *pGCPhys)
388	#endif
389	)
390	{
391	/* We must flush any corresponding pgm pool page here, otherwise we'll
392	* not be informed about writes and keep bogus gst->shw mappings around.
393	*/
394	pgmPoolFlushPageByGCPhys(pVM, *pGCPhys);
395	Assert(!PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage));
396	/** @todo r=bird: return VERR_PGM_PHYS_PAGE_RESERVED here if it still has
397	* active handlers, see the PGMR3PhysGCPhys2CCPtrExternal docs. */
398	}
399	}
400
401	pgmUnlock(pVM);
402	return rc;
403	}
404
405
406	/**
407	* Requests the mapping of a guest page into ring-3, external threads.
408	*
409	* When you're done with the page, call PGMPhysReleasePageMappingLock() ASAP to
410	* release it.
411	*
412	* This API will assume your intention is to write to the page, and will
413	* therefore replace shared and zero pages. If you do not intend to modify the
414	* page, use the PGMR3PhysGCPhys2CCPtrReadOnlyExternal() API.
415	*
416	* @returns VBox status code.
417	* @retval VINF_SUCCESS on success.
418	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
419	* backing or if the page has any active access handlers. The caller
420	* must fall back on using PGMR3PhysWriteExternal.
421	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
422	*
423	* @param pVM Pointer to the VM.
424	* @param GCPhys The guest physical address of the page that should be mapped.
425	* @param ppv Where to store the address corresponding to GCPhys.
426	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
427	*
428	* @remark Avoid calling this API from within critical sections (other than the
429	* PGM one) because of the deadlock risk when we have to delegating the
430	* task to an EMT.
431	* @thread Any.
432	*/
433	VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrExternal(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
434	{
435	AssertPtr(ppv);
436	AssertPtr(pLock);
437
438	Assert(VM_IS_EMT(pVM) \|\| !PGMIsLockOwner(pVM));
439
440	int rc = pgmLock(pVM);
441	AssertRCReturn(rc, rc);
442
443	/*
444	* Query the Physical TLB entry for the page (may fail).
445	*/
446	PPGMPAGEMAPTLBE pTlbe;
447	rc = pgmPhysPageQueryTlbe(pVM, GCPhys, &pTlbe);
448	if (RT_SUCCESS(rc))
449	{
450	PPGMPAGE pPage = pTlbe->pPage;
451	if (PGM_PAGE_IS_MMIO(pPage))
452	rc = VERR_PGM_PHYS_PAGE_RESERVED;
453	else
454	{
455	/*
456	* If the page is shared, the zero page, or being write monitored
457	* it must be converted to an page that's writable if possible.
458	* We can only deal with write monitored pages here, the rest have
459	* to be on an EMT.
460	*/
461	if ( PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)
462	\|\| PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED
463	#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
464	\|\| pgmPoolIsDirtyPage(pVM, GCPhys)
465	#endif
466	)
467	{
468	if ( PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_WRITE_MONITORED
469	&& !PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage)
470	#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
471	&& !pgmPoolIsDirtyPage(pVM, GCPhys)
472	#endif
473	)
474	pgmPhysPageMakeWriteMonitoredWritable(pVM, pPage);
475	else
476	{
477	pgmUnlock(pVM);
478
479	return VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)pgmR3PhysGCPhys2CCPtrDelegated, 4,
480	pVM, &GCPhys, ppv, pLock);
481	}
482	}
483
484	/*
485	* Now, just perform the locking and calculate the return address.
486	*/
487	PPGMPAGEMAP pMap = pTlbe->pMap;
488	if (pMap)
489	pMap->cRefs++;
490
491	unsigned cLocks = PGM_PAGE_GET_WRITE_LOCKS(pPage);
492	if (RT_LIKELY(cLocks < PGM_PAGE_MAX_LOCKS - 1))
493	{
494	if (cLocks == 0)
495	pVM->pgm.s.cWriteLockedPages++;
496	PGM_PAGE_INC_WRITE_LOCKS(pPage);
497	}
498	else if (cLocks != PGM_PAGE_GET_WRITE_LOCKS(pPage))
499	{
500	PGM_PAGE_INC_WRITE_LOCKS(pPage);
501	AssertMsgFailed(("%RGp / %R[pgmpage] is entering permanent write locked state!\n", GCPhys, pPage));
502	if (pMap)
503	pMap->cRefs++; /* Extra ref to prevent it from going away. */
504	}
505
506	ppv = (void )((uintptr_t)pTlbe->pv \| (uintptr_t)(GCPhys & PAGE_OFFSET_MASK));
507	pLock->uPageAndType = (uintptr_t)pPage \| PGMPAGEMAPLOCK_TYPE_WRITE;
508	pLock->pvMap = pMap;
509	}
510	}
511
512	pgmUnlock(pVM);
513	return rc;
514	}
515
516
517	/**
518	* Requests the mapping of a guest page into ring-3, external threads.
519	*
520	* When you're done with the page, call PGMPhysReleasePageMappingLock() ASAP to
521	* release it.
522	*
523	* @returns VBox status code.
524	* @retval VINF_SUCCESS on success.
525	* @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
526	* backing or if the page as an active ALL access handler. The caller
527	* must fall back on using PGMPhysRead.
528	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
529	*
530	* @param pVM Pointer to the VM.
531	* @param GCPhys The guest physical address of the page that should be mapped.
532	* @param ppv Where to store the address corresponding to GCPhys.
533	* @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
534	*
535	* @remark Avoid calling this API from within critical sections (other than
536	* the PGM one) because of the deadlock risk.
537	* @thread Any.
538	*/
539	VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
540	{
541	int rc = pgmLock(pVM);
542	AssertRCReturn(rc, rc);
543
544	/*
545	* Query the Physical TLB entry for the page (may fail).
546	*/
547	PPGMPAGEMAPTLBE pTlbe;
548	rc = pgmPhysPageQueryTlbe(pVM, GCPhys, &pTlbe);
549	if (RT_SUCCESS(rc))
550	{
551	PPGMPAGE pPage = pTlbe->pPage;
552	#if 1
553	/* MMIO pages doesn't have any readable backing. */
554	if (PGM_PAGE_IS_MMIO(pPage))
555	rc = VERR_PGM_PHYS_PAGE_RESERVED;
556	#else
557	if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage))
558	rc = VERR_PGM_PHYS_PAGE_RESERVED;
559	#endif
560	else
561	{
562	/*
563	* Now, just perform the locking and calculate the return address.
564	*/
565	PPGMPAGEMAP pMap = pTlbe->pMap;
566	if (pMap)
567	pMap->cRefs++;
568
569	unsigned cLocks = PGM_PAGE_GET_READ_LOCKS(pPage);
570	if (RT_LIKELY(cLocks < PGM_PAGE_MAX_LOCKS - 1))
571	{
572	if (cLocks == 0)
573	pVM->pgm.s.cReadLockedPages++;
574	PGM_PAGE_INC_READ_LOCKS(pPage);
575	}
576	else if (cLocks != PGM_PAGE_GET_READ_LOCKS(pPage))
577	{
578	PGM_PAGE_INC_READ_LOCKS(pPage);
579	AssertMsgFailed(("%RGp / %R[pgmpage] is entering permanent readonly locked state!\n", GCPhys, pPage));
580	if (pMap)
581	pMap->cRefs++; /* Extra ref to prevent it from going away. */
582	}
583
584	ppv = (void )((uintptr_t)pTlbe->pv \| (uintptr_t)(GCPhys & PAGE_OFFSET_MASK));
585	pLock->uPageAndType = (uintptr_t)pPage \| PGMPAGEMAPLOCK_TYPE_READ;
586	pLock->pvMap = pMap;
587	}
588	}
589
590	pgmUnlock(pVM);
591	return rc;
592	}
593
594
595	#define MAKE_LEAF(a_pNode) \
596	do { \
597	(a_pNode)->pLeftR3 = NIL_RTR3PTR; \
598	(a_pNode)->pRightR3 = NIL_RTR3PTR; \
599	(a_pNode)->pLeftR0 = NIL_RTR0PTR; \
600	(a_pNode)->pRightR0 = NIL_RTR0PTR; \
601	(a_pNode)->pLeftRC = NIL_RTRCPTR; \
602	(a_pNode)->pRightRC = NIL_RTRCPTR; \
603	} while (0)
604
605	#define INSERT_LEFT(a_pParent, a_pNode) \
606	do { \
607	(a_pParent)->pLeftR3 = (a_pNode); \
608	(a_pParent)->pLeftR0 = (a_pNode)->pSelfR0; \
609	(a_pParent)->pLeftRC = (a_pNode)->pSelfRC; \
610	} while (0)
611	#define INSERT_RIGHT(a_pParent, a_pNode) \
612	do { \
613	(a_pParent)->pRightR3 = (a_pNode); \
614	(a_pParent)->pRightR0 = (a_pNode)->pSelfR0; \
615	(a_pParent)->pRightRC = (a_pNode)->pSelfRC; \
616	} while (0)
617
618
619	/**
620	* Recursive tree builder.
621	*
622	* @param ppRam Pointer to the iterator variable.
623	* @param iHeight The hight about normal leaf nodes. Inserts a leaf
624	* node if 0.
625	*/
626	static PPGMRAMRANGE pgmR3PhysRebuildRamRangeSearchTreesRecursively(PPGMRAMRANGE *ppRam, int iDepth)
627	{
628	PPGMRAMRANGE pRam;
629	if (iDepth <= 0)
630	{
631	/*
632	* Leaf node.
633	*/
634	pRam = *ppRam;
635	if (pRam)
636	{
637	*ppRam = pRam->pNextR3;
638	MAKE_LEAF(pRam);
639	}
640	}
641	else
642	{
643
644	/*
645	* Intermediate node.
646	*/
647	PPGMRAMRANGE pLeft = pgmR3PhysRebuildRamRangeSearchTreesRecursively(ppRam, iDepth - 1);
648
649	pRam = *ppRam;
650	if (!pRam)
651	return pLeft;
652	*ppRam = pRam->pNextR3;
653	MAKE_LEAF(pRam);
654	INSERT_LEFT(pRam, pLeft);
655
656	PPGMRAMRANGE pRight = pgmR3PhysRebuildRamRangeSearchTreesRecursively(ppRam, iDepth - 1);
657	if (pRight)
658	INSERT_RIGHT(pRam, pRight);
659	}
660	return pRam;
661	}
662
663
664	/**
665	* Rebuilds the RAM range search trees.
666	*
667	* @param pVM Pointer to the VM.
668	*/
669	static void pgmR3PhysRebuildRamRangeSearchTrees(PVM pVM)
670	{
671
672	/*
673	* Create the reasonably balanced tree in a sequential fashion.
674	* For simplicity (laziness) we use standard recursion here.
675	*/
676	int iDepth = 0;
677	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
678	PPGMRAMRANGE pRoot = pgmR3PhysRebuildRamRangeSearchTreesRecursively(&pRam, 0);
679	while (pRam)
680	{
681	PPGMRAMRANGE pLeft = pRoot;
682
683	pRoot = pRam;
684	pRam = pRam->pNextR3;
685	MAKE_LEAF(pRoot);
686	INSERT_LEFT(pRoot, pLeft);
687
688	PPGMRAMRANGE pRight = pgmR3PhysRebuildRamRangeSearchTreesRecursively(&pRam, iDepth);
689	if (pRight)
690	INSERT_RIGHT(pRoot, pRight);
691	/** @todo else: rotate the tree. */
692
693	iDepth++;
694	}
695
696	pVM->pgm.s.pRamRangeTreeR3 = pRoot;
697	pVM->pgm.s.pRamRangeTreeR0 = pRoot ? pRoot->pSelfR0 : NIL_RTR0PTR;
698	pVM->pgm.s.pRamRangeTreeRC = pRoot ? pRoot->pSelfRC : NIL_RTRCPTR;
699
700	#ifdef VBOX_STRICT
701	/*
702	* Verify that the above code works.
703	*/
704	unsigned cRanges = 0;
705	for (pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3)
706	cRanges++;
707	Assert(cRanges > 0);
708
709	unsigned cMaxDepth = ASMBitLastSetU32(cRanges);
710	if ((1U << cMaxDepth) < cRanges)
711	cMaxDepth++;
712
713	for (pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3)
714	{
715	unsigned cDepth = 0;
716	PPGMRAMRANGE pRam2 = pVM->pgm.s.pRamRangeTreeR3;
717	for (;;)
718	{
719	if (pRam == pRam2)
720	break;
721	Assert(pRam2);
722	if (pRam->GCPhys < pRam2->GCPhys)
723	pRam2 = pRam2->pLeftR3;
724	else
725	pRam2 = pRam2->pRightR3;
726	}
727	AssertMsg(cDepth <= cMaxDepth, ("cDepth=%d cMaxDepth=%d\n", cDepth, cMaxDepth));
728	}
729	#endif /* VBOX_STRICT */
730	}
731
732	#undef MAKE_LEAF
733	#undef INSERT_LEFT
734	#undef INSERT_RIGHT
735
736	/**
737	* Relinks the RAM ranges using the pSelfRC and pSelfR0 pointers.
738	*
739	* Called when anything was relocated.
740	*
741	* @param pVM Pointer to the VM.
742	*/
743	void pgmR3PhysRelinkRamRanges(PVM pVM)
744	{
745	PPGMRAMRANGE pCur;
746
747	#ifdef VBOX_STRICT
748	for (pCur = pVM->pgm.s.pRamRangesXR3; pCur; pCur = pCur->pNextR3)
749	{
750	Assert((pCur->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) \|\| pCur->pSelfR0 == MMHyperCCToR0(pVM, pCur));
751	Assert((pCur->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) \|\| pCur->pSelfRC == MMHyperCCToRC(pVM, pCur));
752	Assert((pCur->GCPhys & PAGE_OFFSET_MASK) == 0);
753	Assert((pCur->GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
754	Assert((pCur->cb & PAGE_OFFSET_MASK) == 0);
755	Assert(pCur->cb == pCur->GCPhysLast - pCur->GCPhys + 1);
756	for (PPGMRAMRANGE pCur2 = pVM->pgm.s.pRamRangesXR3; pCur2; pCur2 = pCur2->pNextR3)
757	Assert( pCur2 == pCur
758	\|\| strcmp(pCur2->pszDesc, pCur->pszDesc)); /** @todo fix MMIO ranges!! */
759	}
760	#endif
761
762	pCur = pVM->pgm.s.pRamRangesXR3;
763	if (pCur)
764	{
765	pVM->pgm.s.pRamRangesXR0 = pCur->pSelfR0;
766	pVM->pgm.s.pRamRangesXRC = pCur->pSelfRC;
767
768	for (; pCur->pNextR3; pCur = pCur->pNextR3)
769	{
770	pCur->pNextR0 = pCur->pNextR3->pSelfR0;
771	pCur->pNextRC = pCur->pNextR3->pSelfRC;
772	}
773
774	Assert(pCur->pNextR0 == NIL_RTR0PTR);
775	Assert(pCur->pNextRC == NIL_RTRCPTR);
776	}
777	else
778	{
779	Assert(pVM->pgm.s.pRamRangesXR0 == NIL_RTR0PTR);
780	Assert(pVM->pgm.s.pRamRangesXRC == NIL_RTRCPTR);
781	}
782	ASMAtomicIncU32(&pVM->pgm.s.idRamRangesGen);
783
784	pgmR3PhysRebuildRamRangeSearchTrees(pVM);
785	}
786
787
788	/**
789	* Links a new RAM range into the list.
790	*
791	* @param pVM Pointer to the VM.
792	* @param pNew Pointer to the new list entry.
793	* @param pPrev Pointer to the previous list entry. If NULL, insert as head.
794	*/
795	static void pgmR3PhysLinkRamRange(PVM pVM, PPGMRAMRANGE pNew, PPGMRAMRANGE pPrev)
796	{
797	AssertMsg(pNew->pszDesc, ("%RGp-%RGp\n", pNew->GCPhys, pNew->GCPhysLast));
798	Assert((pNew->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) \|\| pNew->pSelfR0 == MMHyperCCToR0(pVM, pNew));
799	Assert((pNew->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) \|\| pNew->pSelfRC == MMHyperCCToRC(pVM, pNew));
800
801	pgmLock(pVM);
802
803	PPGMRAMRANGE pRam = pPrev ? pPrev->pNextR3 : pVM->pgm.s.pRamRangesXR3;
804	pNew->pNextR3 = pRam;
805	pNew->pNextR0 = pRam ? pRam->pSelfR0 : NIL_RTR0PTR;
806	pNew->pNextRC = pRam ? pRam->pSelfRC : NIL_RTRCPTR;
807
808	if (pPrev)
809	{
810	pPrev->pNextR3 = pNew;
811	pPrev->pNextR0 = pNew->pSelfR0;
812	pPrev->pNextRC = pNew->pSelfRC;
813	}
814	else
815	{
816	pVM->pgm.s.pRamRangesXR3 = pNew;
817	pVM->pgm.s.pRamRangesXR0 = pNew->pSelfR0;
818	pVM->pgm.s.pRamRangesXRC = pNew->pSelfRC;
819	}
820	ASMAtomicIncU32(&pVM->pgm.s.idRamRangesGen);
821
822	pgmR3PhysRebuildRamRangeSearchTrees(pVM);
823	pgmUnlock(pVM);
824	}
825
826
827	/**
828	* Unlink an existing RAM range from the list.
829	*
830	* @param pVM Pointer to the VM.
831	* @param pRam Pointer to the new list entry.
832	* @param pPrev Pointer to the previous list entry. If NULL, insert as head.
833	*/
834	static void pgmR3PhysUnlinkRamRange2(PVM pVM, PPGMRAMRANGE pRam, PPGMRAMRANGE pPrev)
835	{
836	Assert(pPrev ? pPrev->pNextR3 == pRam : pVM->pgm.s.pRamRangesXR3 == pRam);
837	Assert((pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) \|\| pRam->pSelfR0 == MMHyperCCToR0(pVM, pRam));
838	Assert((pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING) \|\| pRam->pSelfRC == MMHyperCCToRC(pVM, pRam));
839
840	pgmLock(pVM);
841
842	PPGMRAMRANGE pNext = pRam->pNextR3;
843	if (pPrev)
844	{
845	pPrev->pNextR3 = pNext;
846	pPrev->pNextR0 = pNext ? pNext->pSelfR0 : NIL_RTR0PTR;
847	pPrev->pNextRC = pNext ? pNext->pSelfRC : NIL_RTRCPTR;
848	}
849	else
850	{
851	Assert(pVM->pgm.s.pRamRangesXR3 == pRam);
852	pVM->pgm.s.pRamRangesXR3 = pNext;
853	pVM->pgm.s.pRamRangesXR0 = pNext ? pNext->pSelfR0 : NIL_RTR0PTR;
854	pVM->pgm.s.pRamRangesXRC = pNext ? pNext->pSelfRC : NIL_RTRCPTR;
855	}
856	ASMAtomicIncU32(&pVM->pgm.s.idRamRangesGen);
857
858	pgmR3PhysRebuildRamRangeSearchTrees(pVM);
859	pgmUnlock(pVM);
860	}
861
862
863	/**
864	* Unlink an existing RAM range from the list.
865	*
866	* @param pVM Pointer to the VM.
867	* @param pRam Pointer to the new list entry.
868	*/
869	static void pgmR3PhysUnlinkRamRange(PVM pVM, PPGMRAMRANGE pRam)
870	{
871	pgmLock(pVM);
872
873	/* find prev. */
874	PPGMRAMRANGE pPrev = NULL;
875	PPGMRAMRANGE pCur = pVM->pgm.s.pRamRangesXR3;
876	while (pCur != pRam)
877	{
878	pPrev = pCur;
879	pCur = pCur->pNextR3;
880	}
881	AssertFatal(pCur);
882
883	pgmR3PhysUnlinkRamRange2(pVM, pRam, pPrev);
884	pgmUnlock(pVM);
885	}
886
887
888	/**
889	* Frees a range of pages, replacing them with ZERO pages of the specified type.
890	*
891	* @returns VBox status code.
892	* @param pVM Pointer to the VM.
893	* @param pRam The RAM range in which the pages resides.
894	* @param GCPhys The address of the first page.
895	* @param GCPhysLast The address of the last page.
896	* @param uType The page type to replace then with.
897	*/
898	static int pgmR3PhysFreePageRange(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, uint8_t uType)
899	{
900	PGM_LOCK_ASSERT_OWNER(pVM);
901	uint32_t cPendingPages = 0;
902	PGMMFREEPAGESREQ pReq;
903	int rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
904	AssertLogRelRCReturn(rc, rc);
905
906	/* Iterate the pages. */
907	PPGMPAGE pPageDst = &pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
908	uint32_t cPagesLeft = ((GCPhysLast - GCPhys) >> PAGE_SHIFT) + 1;
909	while (cPagesLeft-- > 0)
910	{
911	rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPageDst, GCPhys);
912	AssertLogRelRCReturn(rc, rc); /* We're done for if this goes wrong. */
913
914	PGM_PAGE_SET_TYPE(pVM, pPageDst, uType);
915
916	GCPhys += PAGE_SIZE;
917	pPageDst++;
918	}
919
920	if (cPendingPages)
921	{
922	rc = GMMR3FreePagesPerform(pVM, pReq, cPendingPages);
923	AssertLogRelRCReturn(rc, rc);
924	}
925	GMMR3FreePagesCleanup(pReq);
926
927	return rc;
928	}
929
930	#if HC_ARCH_BITS == 64 && (defined(RT_OS_WINDOWS) \|\| defined(RT_OS_SOLARIS) \|\| defined(RT_OS_LINUX) \|\| defined(RT_OS_FREEBSD))
931
932	/**
933	* Rendezvous callback used by PGMR3ChangeMemBalloon that changes the memory balloon size
934	*
935	* This is only called on one of the EMTs while the other ones are waiting for
936	* it to complete this function.
937	*
938	* @returns VINF_SUCCESS (VBox strict status code).
939	* @param pVM Pointer to the VM.
940	* @param pVCpu The VMCPU for the EMT we're being called on. Unused.
941	* @param pvUser User parameter
942	*/
943	static DECLCALLBACK(VBOXSTRICTRC) pgmR3PhysChangeMemBalloonRendezvous(PVM pVM, PVMCPU pVCpu, void *pvUser)
944	{
945	uintptr_t paUser = (uintptr_t )pvUser;
946	bool fInflate = !!paUser[0];
947	unsigned cPages = paUser[1];
948	RTGCPHYS paPhysPage = (RTGCPHYS )paUser[2];
949	uint32_t cPendingPages = 0;
950	PGMMFREEPAGESREQ pReq;
951	int rc;
952
953	Log(("pgmR3PhysChangeMemBalloonRendezvous: %s %x pages\n", (fInflate) ? "inflate" : "deflate", cPages));
954	pgmLock(pVM);
955
956	if (fInflate)
957	{
958	/* Flush the PGM pool cache as we might have stale references to pages that we just freed. */
959	pgmR3PoolClearAllRendezvous(pVM, pVCpu, NULL);
960
961	/* Replace pages with ZERO pages. */
962	rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
963	if (RT_FAILURE(rc))
964	{
965	pgmUnlock(pVM);
966	AssertLogRelRC(rc);
967	return rc;
968	}
969
970	/* Iterate the pages. */
971	for (unsigned i = 0; i < cPages; i++)
972	{
973	PPGMPAGE pPage = pgmPhysGetPage(pVM, paPhysPage[i]);
974	if ( pPage == NULL
975	\|\| PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_RAM)
976	{
977	Log(("pgmR3PhysChangeMemBalloonRendezvous: invalid physical page %RGp pPage->u3Type=%d\n", paPhysPage[i], pPage ? PGM_PAGE_GET_TYPE(pPage) : 0));
978	break;
979	}
980
981	LogFlow(("balloon page: %RGp\n", paPhysPage[i]));
982
983	/* Flush the shadow PT if this page was previously used as a guest page table. */
984	pgmPoolFlushPageByGCPhys(pVM, paPhysPage[i]);
985
986	rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPage, paPhysPage[i]);
987	if (RT_FAILURE(rc))
988	{
989	pgmUnlock(pVM);
990	AssertLogRelRC(rc);
991	return rc;
992	}
993	Assert(PGM_PAGE_IS_ZERO(pPage));
994	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_BALLOONED);
995	}
996
997	if (cPendingPages)
998	{
999	rc = GMMR3FreePagesPerform(pVM, pReq, cPendingPages);
1000	if (RT_FAILURE(rc))
1001	{
1002	pgmUnlock(pVM);
1003	AssertLogRelRC(rc);
1004	return rc;
1005	}
1006	}
1007	GMMR3FreePagesCleanup(pReq);
1008	}
1009	else
1010	{
1011	/* Iterate the pages. */
1012	for (unsigned i = 0; i < cPages; i++)
1013	{
1014	PPGMPAGE pPage = pgmPhysGetPage(pVM, paPhysPage[i]);
1015	AssertBreak(pPage && PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM);
1016
1017	LogFlow(("Free ballooned page: %RGp\n", paPhysPage[i]));
1018
1019	Assert(PGM_PAGE_IS_BALLOONED(pPage));
1020
1021	/* Change back to zero page. */
1022	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
1023	}
1024
1025	/* Note that we currently do not map any ballooned pages in our shadow page tables, so no need to flush the pgm pool. */
1026	}
1027
1028	/* Notify GMM about the balloon change. */
1029	rc = GMMR3BalloonedPages(pVM, (fInflate) ? GMMBALLOONACTION_INFLATE : GMMBALLOONACTION_DEFLATE, cPages);
1030	if (RT_SUCCESS(rc))
1031	{
1032	if (!fInflate)
1033	{
1034	Assert(pVM->pgm.s.cBalloonedPages >= cPages);
1035	pVM->pgm.s.cBalloonedPages -= cPages;
1036	}
1037	else
1038	pVM->pgm.s.cBalloonedPages += cPages;
1039	}
1040
1041	pgmUnlock(pVM);
1042
1043	/* Flush the recompiler's TLB as well. */
1044	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1045	CPUMSetChangedFlags(&pVM->aCpus[i], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
1046
1047	AssertLogRelRC(rc);
1048	return rc;
1049	}
1050
1051
1052	/**
1053	* Frees a range of ram pages, replacing them with ZERO pages; helper for PGMR3PhysFreeRamPages
1054	*
1055	* @returns VBox status code.
1056	* @param pVM Pointer to the VM.
1057	* @param fInflate Inflate or deflate memory balloon
1058	* @param cPages Number of pages to free
1059	* @param paPhysPage Array of guest physical addresses
1060	*/
1061	static DECLCALLBACK(void) pgmR3PhysChangeMemBalloonHelper(PVM pVM, bool fInflate, unsigned cPages, RTGCPHYS *paPhysPage)
1062	{
1063	uintptr_t paUser[3];
1064
1065	paUser[0] = fInflate;
1066	paUser[1] = cPages;
1067	paUser[2] = (uintptr_t)paPhysPage;
1068	int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PhysChangeMemBalloonRendezvous, (void *)paUser);
1069	AssertRC(rc);
1070
1071	/* Made a copy in PGMR3PhysFreeRamPages; free it here. */
1072	RTMemFree(paPhysPage);
1073	}
1074
1075	#endif /* 64-bit host && (Windows \|\| Solaris \|\| Linux \|\| FreeBSD) */
1076
1077	/**
1078	* Inflate or deflate a memory balloon
1079	*
1080	* @returns VBox status code.
1081	* @param pVM Pointer to the VM.
1082	* @param fInflate Inflate or deflate memory balloon
1083	* @param cPages Number of pages to free
1084	* @param paPhysPage Array of guest physical addresses
1085	*/
1086	VMMR3DECL(int) PGMR3PhysChangeMemBalloon(PVM pVM, bool fInflate, unsigned cPages, RTGCPHYS *paPhysPage)
1087	{
1088	/* This must match GMMR0Init; currently we only support memory ballooning on all 64-bit hosts except Mac OS X */
1089	#if HC_ARCH_BITS == 64 && (defined(RT_OS_WINDOWS) \|\| defined(RT_OS_SOLARIS) \|\| defined(RT_OS_LINUX) \|\| defined(RT_OS_FREEBSD))
1090	int rc;
1091
1092	/* Older additions (ancient non-functioning balloon code) pass wrong physical addresses. */
1093	AssertReturn(!(paPhysPage[0] & 0xfff), VERR_INVALID_PARAMETER);
1094
1095	/* We own the IOM lock here and could cause a deadlock by waiting for another VCPU that is blocking on the IOM lock.
1096	* In the SMP case we post a request packet to postpone the job.
1097	*/
1098	if (pVM->cCpus > 1)
1099	{
1100	unsigned cbPhysPage = cPages * sizeof(paPhysPage[0]);
1101	RTGCPHYS paPhysPageCopy = (RTGCPHYS )RTMemAlloc(cbPhysPage);
1102	AssertReturn(paPhysPageCopy, VERR_NO_MEMORY);
1103
1104	memcpy(paPhysPageCopy, paPhysPage, cbPhysPage);
1105
1106	rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pgmR3PhysChangeMemBalloonHelper, 4, pVM, fInflate, cPages, paPhysPageCopy);
1107	AssertRC(rc);
1108	}
1109	else
1110	{
1111	uintptr_t paUser[3];
1112
1113	paUser[0] = fInflate;
1114	paUser[1] = cPages;
1115	paUser[2] = (uintptr_t)paPhysPage;
1116	rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PhysChangeMemBalloonRendezvous, (void *)paUser);
1117	AssertRC(rc);
1118	}
1119	return rc;
1120
1121	#else
1122	NOREF(pVM); NOREF(fInflate); NOREF(cPages); NOREF(paPhysPage);
1123	return VERR_NOT_IMPLEMENTED;
1124	#endif
1125	}
1126
1127
1128	/**
1129	* Rendezvous callback used by PGMR3WriteProtectRAM that write protects all
1130	* physical RAM.
1131	*
1132	* This is only called on one of the EMTs while the other ones are waiting for
1133	* it to complete this function.
1134	*
1135	* @returns VINF_SUCCESS (VBox strict status code).
1136	* @param pVM Pointer to the VM.
1137	* @param pVCpu The VMCPU for the EMT we're being called on. Unused.
1138	* @param pvUser User parameter, unused.
1139	*/
1140	static DECLCALLBACK(VBOXSTRICTRC) pgmR3PhysWriteProtectRAMRendezvous(PVM pVM, PVMCPU pVCpu, void *pvUser)
1141	{
1142	int rc = VINF_SUCCESS;
1143	NOREF(pvUser); NOREF(pVCpu);
1144
1145	pgmLock(pVM);
1146	#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
1147	pgmPoolResetDirtyPages(pVM);
1148	#endif
1149
1150	/** @todo pointless to write protect the physical page pointed to by RSP. */
1151
1152	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRangesX);
1153	pRam;
1154	pRam = pRam->CTX_SUFF(pNext))
1155	{
1156	uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1157	for (uint32_t iPage = 0; iPage < cPages; iPage++)
1158	{
1159	PPGMPAGE pPage = &pRam->aPages[iPage];
1160	PGMPAGETYPE enmPageType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
1161
1162	if ( RT_LIKELY(enmPageType == PGMPAGETYPE_RAM)
1163	\|\| enmPageType == PGMPAGETYPE_MMIO2)
1164	{
1165	/*
1166	* A RAM page.
1167	*/
1168	switch (PGM_PAGE_GET_STATE(pPage))
1169	{
1170	case PGM_PAGE_STATE_ALLOCATED:
1171	/** @todo Optimize this: Don't always re-enable write
1172	* monitoring if the page is known to be very busy. */
1173	if (PGM_PAGE_IS_WRITTEN_TO(pPage))
1174	{
1175	PGM_PAGE_CLEAR_WRITTEN_TO(pVM, pPage);
1176	/* Remember this dirty page for the next (memory) sync. */
1177	PGM_PAGE_SET_FT_DIRTY(pPage);
1178	}
1179
1180	pgmPhysPageWriteMonitor(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT));
1181	break;
1182
1183	case PGM_PAGE_STATE_SHARED:
1184	AssertFailed();
1185	break;
1186
1187	case PGM_PAGE_STATE_WRITE_MONITORED: /* nothing to change. */
1188	default:
1189	break;
1190	}
1191	}
1192	}
1193	}
1194	pgmR3PoolWriteProtectPages(pVM);
1195	PGM_INVL_ALL_VCPU_TLBS(pVM);
1196	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1197	CPUMSetChangedFlags(&pVM->aCpus[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
1198
1199	pgmUnlock(pVM);
1200	return rc;
1201	}
1202
1203	/**
1204	* Protect all physical RAM to monitor writes
1205	*
1206	* @returns VBox status code.
1207	* @param pVM Pointer to the VM.
1208	*/
1209	VMMR3DECL(int) PGMR3PhysWriteProtectRAM(PVM pVM)
1210	{
1211	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
1212
1213	int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PhysWriteProtectRAMRendezvous, NULL);
1214	AssertRC(rc);
1215	return rc;
1216	}
1217
1218	/**
1219	* Enumerate all dirty FT pages.
1220	*
1221	* @returns VBox status code.
1222	* @param pVM Pointer to the VM.
1223	* @param pfnEnum Enumerate callback handler.
1224	* @param pvUser Enumerate callback handler parameter.
1225	*/
1226	VMMR3DECL(int) PGMR3PhysEnumDirtyFTPages(PVM pVM, PFNPGMENUMDIRTYFTPAGES pfnEnum, void *pvUser)
1227	{
1228	int rc = VINF_SUCCESS;
1229
1230	pgmLock(pVM);
1231	for (PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRangesX);
1232	pRam;
1233	pRam = pRam->CTX_SUFF(pNext))
1234	{
1235	uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1236	for (uint32_t iPage = 0; iPage < cPages; iPage++)
1237	{
1238	PPGMPAGE pPage = &pRam->aPages[iPage];
1239	PGMPAGETYPE enmPageType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
1240
1241	if ( RT_LIKELY(enmPageType == PGMPAGETYPE_RAM)
1242	\|\| enmPageType == PGMPAGETYPE_MMIO2)
1243	{
1244	/*
1245	* A RAM page.
1246	*/
1247	switch (PGM_PAGE_GET_STATE(pPage))
1248	{
1249	case PGM_PAGE_STATE_ALLOCATED:
1250	case PGM_PAGE_STATE_WRITE_MONITORED:
1251	if ( !PGM_PAGE_IS_WRITTEN_TO(pPage) /* not very recently updated? */
1252	&& PGM_PAGE_IS_FT_DIRTY(pPage))
1253	{
1254	unsigned cbPageRange = PAGE_SIZE;
1255	unsigned iPageClean = iPage + 1;
1256	RTGCPHYS GCPhysPage = pRam->GCPhys + iPage * PAGE_SIZE;
1257	uint8_t *pu8Page = NULL;
1258	PGMPAGEMAPLOCK Lock;
1259
1260	/* Find the next clean page, so we can merge adjacent dirty pages. */
1261	for (; iPageClean < cPages; iPageClean++)
1262	{
1263	PPGMPAGE pPageNext = &pRam->aPages[iPageClean];
1264	if ( RT_UNLIKELY(PGM_PAGE_GET_TYPE(pPageNext) != PGMPAGETYPE_RAM)
1265	\|\| PGM_PAGE_GET_STATE(pPageNext) != PGM_PAGE_STATE_ALLOCATED
1266	\|\| PGM_PAGE_IS_WRITTEN_TO(pPageNext)
1267	\|\| !PGM_PAGE_IS_FT_DIRTY(pPageNext)
1268	/* Crossing a chunk boundary? */
1269	\|\| (GCPhysPage & GMM_PAGEID_IDX_MASK) != ((GCPhysPage + cbPageRange) & GMM_PAGEID_IDX_MASK)
1270	)
1271	break;
1272
1273	cbPageRange += PAGE_SIZE;
1274	}
1275
1276	rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysPage, (const void **)&pu8Page, &Lock);
1277	if (RT_SUCCESS(rc))
1278	{
1279	/** @todo this is risky; the range might be changed, but little choice as the sync
1280	* costs a lot of time. */
1281	pgmUnlock(pVM);
1282	pfnEnum(pVM, GCPhysPage, pu8Page, cbPageRange, pvUser);
1283	pgmLock(pVM);
1284	PGMPhysReleasePageMappingLock(pVM, &Lock);
1285	}
1286
1287	for (iPage; iPage < iPageClean; iPage++)
1288	PGM_PAGE_CLEAR_FT_DIRTY(&pRam->aPages[iPage]);
1289
1290	iPage = iPageClean - 1;
1291	}
1292	break;
1293	}
1294	}
1295	}
1296	}
1297	pgmUnlock(pVM);
1298	return rc;
1299	}
1300
1301
1302	/**
1303	* Gets the number of ram ranges.
1304	*
1305	* @returns Number of ram ranges. Returns UINT32_MAX if @a pVM is invalid.
1306	* @param pVM Pointer to the VM.
1307	*/
1308	VMMR3DECL(uint32_t) PGMR3PhysGetRamRangeCount(PVM pVM)
1309	{
1310	VM_ASSERT_VALID_EXT_RETURN(pVM, UINT32_MAX);
1311
1312	pgmLock(pVM);
1313	uint32_t cRamRanges = 0;
1314	for (PPGMRAMRANGE pCur = pVM->pgm.s.CTX_SUFF(pRamRangesX); pCur; pCur = pCur->CTX_SUFF(pNext))
1315	cRamRanges++;
1316	pgmUnlock(pVM);
1317	return cRamRanges;
1318	}
1319
1320
1321	/**
1322	* Get information about a range.
1323	*
1324	* @returns VINF_SUCCESS or VERR_OUT_OF_RANGE.
1325	* @param pVM Pointer to the VM.
1326	* @param iRange The ordinal of the range.
1327	* @param pGCPhysStart Where to return the start of the range. Optional.
1328	* @param pGCPhysLast Where to return the address of the last byte in the
1329	* range. Optional.
1330	* @param pfIsMmio Where to indicate that this is a pure MMIO range.
1331	* Optional.
1332	*/
1333	VMMR3DECL(int) PGMR3PhysGetRange(PVM pVM, uint32_t iRange, PRTGCPHYS pGCPhysStart, PRTGCPHYS pGCPhysLast,
1334	const char *ppszDesc, bool pfIsMmio)
1335	{
1336	VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1337
1338	pgmLock(pVM);
1339	uint32_t iCurRange = 0;
1340	for (PPGMRAMRANGE pCur = pVM->pgm.s.CTX_SUFF(pRamRangesX); pCur; pCur = pCur->CTX_SUFF(pNext), iCurRange++)
1341	if (iCurRange == iRange)
1342	{
1343	if (pGCPhysStart)
1344	*pGCPhysStart = pCur->GCPhys;
1345	if (pGCPhysLast)
1346	*pGCPhysLast = pCur->GCPhysLast;
1347	if (ppszDesc)
1348	*ppszDesc = pCur->pszDesc;
1349	if (pfIsMmio)
1350	*pfIsMmio = !!(pCur->fFlags & PGM_RAM_RANGE_FLAGS_AD_HOC_MMIO);
1351
1352	pgmUnlock(pVM);
1353	return VINF_SUCCESS;
1354	}
1355	pgmUnlock(pVM);
1356	return VERR_OUT_OF_RANGE;
1357	}
1358
1359
1360	/**
1361	* Query the amount of free memory inside VMMR0
1362	*
1363	* @returns VBox status code.
1364	* @param pUVM The user mode VM handle.
1365	* @param pcbAllocMem Where to return the amount of memory allocated
1366	* by VMs.
1367	* @param pcbFreeMem Where to return the amount of memory that is
1368	* allocated from the host but not currently used
1369	* by any VMs.
1370	* @param pcbBallonedMem Where to return the sum of memory that is
1371	* currently ballooned by the VMs.
1372	* @param pcbSharedMem Where to return the amount of memory that is
1373	* currently shared.
1374	*/
1375	VMMR3DECL(int) PGMR3QueryGlobalMemoryStats(PUVM pUVM, uint64_t pcbAllocMem, uint64_t pcbFreeMem,
1376	uint64_t pcbBallonedMem, uint64_t pcbSharedMem)
1377	{
1378	UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1379	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, VERR_INVALID_VM_HANDLE);
1380
1381	uint64_t cAllocPages = 0;
1382	uint64_t cFreePages = 0;
1383	uint64_t cBalloonPages = 0;
1384	uint64_t cSharedPages = 0;
1385	int rc = GMMR3QueryHypervisorMemoryStats(pUVM->pVM, &cAllocPages, &cFreePages, &cBalloonPages, &cSharedPages);
1386	AssertRCReturn(rc, rc);
1387
1388	if (pcbAllocMem)
1389	pcbAllocMem = cAllocPages _4K;
1390
1391	if (pcbFreeMem)
1392	pcbFreeMem = cFreePages _4K;
1393
1394	if (pcbBallonedMem)
1395	pcbBallonedMem = cBalloonPages _4K;
1396
1397	if (pcbSharedMem)
1398	pcbSharedMem = cSharedPages _4K;
1399
1400	Log(("PGMR3QueryVMMMemoryStats: all=%llx free=%llx ballooned=%llx shared=%llx\n",
1401	cAllocPages, cFreePages, cBalloonPages, cSharedPages));
1402	return VINF_SUCCESS;
1403	}
1404
1405
1406	/**
1407	* Query memory stats for the VM.
1408	*
1409	* @returns VBox status code.
1410	* @param pUVM The user mode VM handle.
1411	* @param pcbTotalMem Where to return total amount memory the VM may
1412	* possibly use.
1413	* @param pcbPrivateMem Where to return the amount of private memory
1414	* currently allocated.
1415	* @param pcbSharedMem Where to return the amount of actually shared
1416	* memory currently used by the VM.
1417	* @param pcbZeroMem Where to return the amount of memory backed by
1418	* zero pages.
1419	*
1420	* @remarks The total mem is normally larger than the sum of the three
1421	* components. There are two reasons for this, first the amount of
1422	* shared memory is what we're sure is shared instead of what could
1423	* possibly be shared with someone. Secondly, because the total may
1424	* include some pure MMIO pages that doesn't go into any of the three
1425	* sub-counts.
1426	*
1427	* @todo Why do we return reused shared pages instead of anything that could
1428	* potentially be shared? Doesn't this mean the first VM gets a much
1429	* lower number of shared pages?
1430	*/
1431	VMMR3DECL(int) PGMR3QueryMemoryStats(PUVM pUVM, uint64_t pcbTotalMem, uint64_t pcbPrivateMem,
1432	uint64_t pcbSharedMem, uint64_t pcbZeroMem)
1433	{
1434	UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
1435	PVM pVM = pUVM->pVM;
1436	VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1437
1438	if (pcbTotalMem)
1439	pcbTotalMem = (uint64_t)pVM->pgm.s.cAllPages PAGE_SIZE;
1440
1441	if (pcbPrivateMem)
1442	pcbPrivateMem = (uint64_t)pVM->pgm.s.cPrivatePages PAGE_SIZE;
1443
1444	if (pcbSharedMem)
1445	pcbSharedMem = (uint64_t)pVM->pgm.s.cReusedSharedPages PAGE_SIZE;
1446
1447	if (pcbZeroMem)
1448	pcbZeroMem = (uint64_t)pVM->pgm.s.cZeroPages PAGE_SIZE;
1449
1450	Log(("PGMR3QueryMemoryStats: all=%x private=%x reused=%x zero=%x\n", pVM->pgm.s.cAllPages, pVM->pgm.s.cPrivatePages, pVM->pgm.s.cReusedSharedPages, pVM->pgm.s.cZeroPages));
1451	return VINF_SUCCESS;
1452	}
1453
1454
1455	/**
1456	* PGMR3PhysRegisterRam worker that initializes and links a RAM range.
1457	*
1458	* @param pVM Pointer to the VM.
1459	* @param pNew The new RAM range.
1460	* @param GCPhys The address of the RAM range.
1461	* @param GCPhysLast The last address of the RAM range.
1462	* @param RCPtrNew The RC address if the range is floating. NIL_RTRCPTR
1463	* if in HMA.
1464	* @param R0PtrNew Ditto for R0.
1465	* @param pszDesc The description.
1466	* @param pPrev The previous RAM range (for linking).
1467	*/
1468	static void pgmR3PhysInitAndLinkRamRange(PVM pVM, PPGMRAMRANGE pNew, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
1469	RTRCPTR RCPtrNew, RTR0PTR R0PtrNew, const char *pszDesc, PPGMRAMRANGE pPrev)
1470	{
1471	/*
1472	* Initialize the range.
1473	*/
1474	pNew->pSelfR0 = R0PtrNew != NIL_RTR0PTR ? R0PtrNew : MMHyperCCToR0(pVM, pNew);
1475	pNew->pSelfRC = RCPtrNew != NIL_RTRCPTR ? RCPtrNew : MMHyperCCToRC(pVM, pNew);
1476	pNew->GCPhys = GCPhys;
1477	pNew->GCPhysLast = GCPhysLast;
1478	pNew->cb = GCPhysLast - GCPhys + 1;
1479	pNew->pszDesc = pszDesc;
1480	pNew->fFlags = RCPtrNew != NIL_RTRCPTR ? PGM_RAM_RANGE_FLAGS_FLOATING : 0;
1481	pNew->pvR3 = NULL;
1482	pNew->paLSPages = NULL;
1483
1484	uint32_t const cPages = pNew->cb >> PAGE_SHIFT;
1485	RTGCPHYS iPage = cPages;
1486	while (iPage-- > 0)
1487	PGM_PAGE_INIT_ZERO(&pNew->aPages[iPage], pVM, PGMPAGETYPE_RAM);
1488
1489	/* Update the page count stats. */
1490	pVM->pgm.s.cZeroPages += cPages;
1491	pVM->pgm.s.cAllPages += cPages;
1492
1493	/*
1494	* Link it.
1495	*/
1496	pgmR3PhysLinkRamRange(pVM, pNew, pPrev);
1497	}
1498
1499
1500	/**
1501	* Relocate a floating RAM range.
1502	*
1503	* @copydoc FNPGMRELOCATE.
1504	*/
1505	static DECLCALLBACK(bool) pgmR3PhysRamRangeRelocate(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser)
1506	{
1507	PPGMRAMRANGE pRam = (PPGMRAMRANGE)pvUser;
1508	Assert(pRam->fFlags & PGM_RAM_RANGE_FLAGS_FLOATING);
1509	Assert(pRam->pSelfRC == GCPtrOld + PAGE_SIZE);
1510
1511	switch (enmMode)
1512	{
1513	case PGMRELOCATECALL_SUGGEST:
1514	return true;
1515
1516	case PGMRELOCATECALL_RELOCATE:
1517	{
1518	/*
1519	* Update myself, then relink all the ranges and flush the RC TLB.
1520	*/
1521	pgmLock(pVM);
1522
1523	pRam->pSelfRC = (RTRCPTR)(GCPtrNew + PAGE_SIZE);
1524
1525	pgmR3PhysRelinkRamRanges(pVM);
1526	for (unsigned i = 0; i < PGM_RAMRANGE_TLB_ENTRIES; i++)
1527	pVM->pgm.s.apRamRangesTlbRC[i] = NIL_RTRCPTR;
1528
1529	pgmUnlock(pVM);
1530	return true;
1531	}
1532
1533	default:
1534	AssertFailedReturn(false);
1535	}
1536	}
1537
1538
1539	/**
1540	* PGMR3PhysRegisterRam worker that registers a high chunk.
1541	*
1542	* @returns VBox status code.
1543	* @param pVM Pointer to the VM.
1544	* @param GCPhys The address of the RAM.
1545	* @param cRamPages The number of RAM pages to register.
1546	* @param cbChunk The size of the PGMRAMRANGE guest mapping.
1547	* @param iChunk The chunk number.
1548	* @param pszDesc The RAM range description.
1549	* @param ppPrev Previous RAM range pointer. In/Out.
1550	*/
1551	static int pgmR3PhysRegisterHighRamChunk(PVM pVM, RTGCPHYS GCPhys, uint32_t cRamPages,
1552	uint32_t cbChunk, uint32_t iChunk, const char *pszDesc,
1553	PPGMRAMRANGE *ppPrev)
1554	{
1555	const char *pszDescChunk = iChunk == 0
1556	? pszDesc
1557	: MMR3HeapAPrintf(pVM, MM_TAG_PGM_PHYS, "%s (#%u)", pszDesc, iChunk + 1);
1558	AssertReturn(pszDescChunk, VERR_NO_MEMORY);
1559
1560	/*
1561	* Allocate memory for the new chunk.
1562	*/
1563	size_t const cChunkPages = RT_ALIGN_Z(RT_UOFFSETOF(PGMRAMRANGE, aPages[cRamPages]), PAGE_SIZE) >> PAGE_SHIFT;
1564	PSUPPAGE paChunkPages = (PSUPPAGE)RTMemTmpAllocZ(sizeof(SUPPAGE) * cChunkPages);
1565	AssertReturn(paChunkPages, VERR_NO_TMP_MEMORY);
1566	RTR0PTR R0PtrChunk = NIL_RTR0PTR;
1567	void *pvChunk = NULL;
1568	int rc = SUPR3PageAllocEx(cChunkPages, 0 /fFlags/, &pvChunk,
1569	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
1570	VMMIsHwVirtExtForced(pVM) ? &R0PtrChunk : NULL,
1571	#else
1572	NULL,
1573	#endif
1574	paChunkPages);
1575	if (RT_SUCCESS(rc))
1576	{
1577	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
1578	if (!VMMIsHwVirtExtForced(pVM))
1579	R0PtrChunk = NIL_RTR0PTR;
1580	#else
1581	R0PtrChunk = (uintptr_t)pvChunk;
1582	#endif
1583	memset(pvChunk, 0, cChunkPages << PAGE_SHIFT);
1584
1585	PPGMRAMRANGE pNew = (PPGMRAMRANGE)pvChunk;
1586
1587	/*
1588	* Create a mapping and map the pages into it.
1589	* We push these in below the HMA.
1590	*/
1591	RTGCPTR GCPtrChunkMap = pVM->pgm.s.GCPtrPrevRamRangeMapping - cbChunk;
1592	rc = PGMR3MapPT(pVM, GCPtrChunkMap, cbChunk, 0 /fFlags/, pgmR3PhysRamRangeRelocate, pNew, pszDescChunk);
1593	if (RT_SUCCESS(rc))
1594	{
1595	pVM->pgm.s.GCPtrPrevRamRangeMapping = GCPtrChunkMap;
1596
1597	RTGCPTR const GCPtrChunk = GCPtrChunkMap + PAGE_SIZE;
1598	RTGCPTR GCPtrPage = GCPtrChunk;
1599	for (uint32_t iPage = 0; iPage < cChunkPages && RT_SUCCESS(rc); iPage++, GCPtrPage += PAGE_SIZE)
1600	rc = PGMMap(pVM, GCPtrPage, paChunkPages[iPage].Phys, PAGE_SIZE, 0);
1601	if (RT_SUCCESS(rc))
1602	{
1603	/*
1604	* Ok, init and link the range.
1605	*/
1606	pgmR3PhysInitAndLinkRamRange(pVM, pNew, GCPhys, GCPhys + ((RTGCPHYS)cRamPages << PAGE_SHIFT) - 1,
1607	(RTRCPTR)GCPtrChunk, R0PtrChunk, pszDescChunk, *ppPrev);
1608	*ppPrev = pNew;
1609	}
1610	}
1611
1612	if (RT_FAILURE(rc))
1613	SUPR3PageFreeEx(pvChunk, cChunkPages);
1614	}
1615
1616	RTMemTmpFree(paChunkPages);
1617	return rc;
1618	}
1619
1620
1621	/**
1622	* Sets up a range RAM.
1623	*
1624	* This will check for conflicting registrations, make a resource
1625	* reservation for the memory (with GMM), and setup the per-page
1626	* tracking structures (PGMPAGE).
1627	*
1628	* @returns VBox status code.
1629	* @param pVM Pointer to the VM.
1630	* @param GCPhys The physical address of the RAM.
1631	* @param cb The size of the RAM.
1632	* @param pszDesc The description - not copied, so, don't free or change it.
1633	*/
1634	VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc)
1635	{
1636	/*
1637	* Validate input.
1638	*/
1639	Log(("PGMR3PhysRegisterRam: GCPhys=%RGp cb=%RGp pszDesc=%s\n", GCPhys, cb, pszDesc));
1640	AssertReturn(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys, VERR_INVALID_PARAMETER);
1641	AssertReturn(RT_ALIGN_T(cb, PAGE_SIZE, RTGCPHYS) == cb, VERR_INVALID_PARAMETER);
1642	AssertReturn(cb > 0, VERR_INVALID_PARAMETER);
1643	RTGCPHYS GCPhysLast = GCPhys + (cb - 1);
1644	AssertMsgReturn(GCPhysLast > GCPhys, ("The range wraps! GCPhys=%RGp cb=%RGp\n", GCPhys, cb), VERR_INVALID_PARAMETER);
1645	AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
1646	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
1647
1648	pgmLock(pVM);
1649
1650	/*
1651	* Find range location and check for conflicts.
1652	* (We don't lock here because the locking by EMT is only required on update.)
1653	*/
1654	PPGMRAMRANGE pPrev = NULL;
1655	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
1656	while (pRam && GCPhysLast >= pRam->GCPhys)
1657	{
1658	if ( GCPhysLast >= pRam->GCPhys
1659	&& GCPhys <= pRam->GCPhysLast)
1660	AssertLogRelMsgFailedReturn(("%RGp-%RGp (%s) conflicts with existing %RGp-%RGp (%s)\n",
1661	GCPhys, GCPhysLast, pszDesc,
1662	pRam->GCPhys, pRam->GCPhysLast, pRam->pszDesc),
1663	VERR_PGM_RAM_CONFLICT);
1664
1665	/* next */
1666	pPrev = pRam;
1667	pRam = pRam->pNextR3;
1668	}
1669
1670	/*
1671	* Register it with GMM (the API bitches).
1672	*/
1673	const RTGCPHYS cPages = cb >> PAGE_SHIFT;
1674	int rc = MMR3IncreaseBaseReservation(pVM, cPages);
1675	if (RT_FAILURE(rc))
1676	{
1677	pgmUnlock(pVM);
1678	return rc;
1679	}
1680
1681	if ( GCPhys >= _4G
1682	&& cPages > 256)
1683	{
1684	/*
1685	* The PGMRAMRANGE structures for the high memory can get very big.
1686	* In order to avoid SUPR3PageAllocEx allocation failures due to the
1687	* allocation size limit there and also to avoid being unable to find
1688	* guest mapping space for them, we split this memory up into 4MB in
1689	* (potential) raw-mode configs and 16MB chunks in forced AMD-V/VT-x
1690	* mode.
1691	*
1692	* The first and last page of each mapping are guard pages and marked
1693	* not-present. So, we've got 4186112 and 16769024 bytes available for
1694	* the PGMRAMRANGE structure.
1695	*
1696	* Note! The sizes used here will influence the saved state.
1697	*/
1698	uint32_t cbChunk;
1699	uint32_t cPagesPerChunk;
1700	if (VMMIsHwVirtExtForced(pVM))
1701	{
1702	cbChunk = 16U*_1M;
1703	cPagesPerChunk = 1048048; /* max ~1048059 */
1704	AssertCompile(sizeof(PGMRAMRANGE) + sizeof(PGMPAGE) * 1048048 < 16U_1M - PAGE_SIZE 2);
1705	}
1706	else
1707	{
1708	cbChunk = 4U*_1M;
1709	cPagesPerChunk = 261616; /* max ~261627 */
1710	AssertCompile(sizeof(PGMRAMRANGE) + sizeof(PGMPAGE) * 261616 < 4U_1M - PAGE_SIZE 2);
1711	}
1712	AssertRelease(RT_UOFFSETOF(PGMRAMRANGE, aPages[cPagesPerChunk]) + PAGE_SIZE * 2 <= cbChunk);
1713
1714	RTGCPHYS cPagesLeft = cPages;
1715	RTGCPHYS GCPhysChunk = GCPhys;
1716	uint32_t iChunk = 0;
1717	while (cPagesLeft > 0)
1718	{
1719	uint32_t cPagesInChunk = cPagesLeft;
1720	if (cPagesInChunk > cPagesPerChunk)
1721	cPagesInChunk = cPagesPerChunk;
1722
1723	rc = pgmR3PhysRegisterHighRamChunk(pVM, GCPhysChunk, cPagesInChunk, cbChunk, iChunk, pszDesc, &pPrev);
1724	AssertRCReturn(rc, rc);
1725
1726	/* advance */
1727	GCPhysChunk += (RTGCPHYS)cPagesInChunk << PAGE_SHIFT;
1728	cPagesLeft -= cPagesInChunk;
1729	iChunk++;
1730	}
1731	}
1732	else
1733	{
1734	/*
1735	* Allocate, initialize and link the new RAM range.
1736	*/
1737	const size_t cbRamRange = RT_OFFSETOF(PGMRAMRANGE, aPages[cPages]);
1738	PPGMRAMRANGE pNew;
1739	rc = MMR3HyperAllocOnceNoRel(pVM, cbRamRange, 0, MM_TAG_PGM_PHYS, (void **)&pNew);
1740	AssertLogRelMsgRCReturn(rc, ("cbRamRange=%zu\n", cbRamRange), rc);
1741
1742	pgmR3PhysInitAndLinkRamRange(pVM, pNew, GCPhys, GCPhysLast, NIL_RTRCPTR, NIL_RTR0PTR, pszDesc, pPrev);
1743	}
1744	pgmPhysInvalidatePageMapTLB(pVM);
1745	pgmUnlock(pVM);
1746
1747	#ifdef VBOX_WITH_REM
1748	/*
1749	* Notify REM.
1750	*/
1751	REMR3NotifyPhysRamRegister(pVM, GCPhys, cb, REM_NOTIFY_PHYS_RAM_FLAGS_RAM);
1752	#endif
1753
1754	return VINF_SUCCESS;
1755	}
1756
1757
1758	/**
1759	* Worker called by PGMR3InitFinalize if we're configured to pre-allocate RAM.
1760	*
1761	* We do this late in the init process so that all the ROM and MMIO ranges have
1762	* been registered already and we don't go wasting memory on them.
1763	*
1764	* @returns VBox status code.
1765	*
1766	* @param pVM Pointer to the VM.
1767	*/
1768	int pgmR3PhysRamPreAllocate(PVM pVM)
1769	{
1770	Assert(pVM->pgm.s.fRamPreAlloc);
1771	Log(("pgmR3PhysRamPreAllocate: enter\n"));
1772
1773	/*
1774	* Walk the RAM ranges and allocate all RAM pages, halt at
1775	* the first allocation error.
1776	*/
1777	uint64_t cPages = 0;
1778	uint64_t NanoTS = RTTimeNanoTS();
1779	pgmLock(pVM);
1780	for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3)
1781	{
1782	PPGMPAGE pPage = &pRam->aPages[0];
1783	RTGCPHYS GCPhys = pRam->GCPhys;
1784	uint32_t cLeft = pRam->cb >> PAGE_SHIFT;
1785	while (cLeft-- > 0)
1786	{
1787	if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM)
1788	{
1789	switch (PGM_PAGE_GET_STATE(pPage))
1790	{
1791	case PGM_PAGE_STATE_ZERO:
1792	{
1793	int rc = pgmPhysAllocPage(pVM, pPage, GCPhys);
1794	if (RT_FAILURE(rc))
1795	{
1796	LogRel(("PGM: RAM Pre-allocation failed at %RGp (in %s) with rc=%Rrc\n", GCPhys, pRam->pszDesc, rc));
1797	pgmUnlock(pVM);
1798	return rc;
1799	}
1800	cPages++;
1801	break;
1802	}
1803
1804	case PGM_PAGE_STATE_BALLOONED:
1805	case PGM_PAGE_STATE_ALLOCATED:
1806	case PGM_PAGE_STATE_WRITE_MONITORED:
1807	case PGM_PAGE_STATE_SHARED:
1808	/* nothing to do here. */
1809	break;
1810	}
1811	}
1812
1813	/* next */
1814	pPage++;
1815	GCPhys += PAGE_SIZE;
1816	}
1817	}
1818	pgmUnlock(pVM);
1819	NanoTS = RTTimeNanoTS() - NanoTS;
1820
1821	LogRel(("PGM: Pre-allocated %llu pages in %llu ms\n", cPages, NanoTS / 1000000));
1822	Log(("pgmR3PhysRamPreAllocate: returns VINF_SUCCESS\n"));
1823	return VINF_SUCCESS;
1824	}
1825
1826
1827	/**
1828	* Checks shared page checksums.
1829	*
1830	* @param pVM Pointer to the shared VM structure.
1831	*/
1832	void pgmR3PhysAssertSharedPageChecksums(PVM pVM)
1833	{
1834	#ifdef VBOX_STRICT
1835	pgmLock(pVM);
1836
1837	if (pVM->pgm.s.cSharedPages > 0)
1838	{
1839	/*
1840	* Walk the ram ranges.
1841	*/
1842	for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3)
1843	{
1844	uint32_t iPage = pRam->cb >> PAGE_SHIFT;
1845	AssertMsg(((RTGCPHYS)iPage << PAGE_SHIFT) == pRam->cb, ("%RGp %RGp\n", (RTGCPHYS)iPage << PAGE_SHIFT, pRam->cb));
1846
1847	while (iPage-- > 0)
1848	{
1849	PPGMPAGE pPage = &pRam->aPages[iPage];
1850	if (PGM_PAGE_IS_SHARED(pPage))
1851	{
1852	uint32_t u32Checksum = pPage->s.u2Unused0 \| ((uint32_t)pPage->s.u2Unused1 << 8);
1853	if (!u32Checksum)
1854	{
1855	RTGCPHYS GCPhysPage = pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT);
1856	void const *pvPage;
1857	int rc = pgmPhysPageMapReadOnly(pVM, pPage, GCPhysPage, &pvPage);
1858	if (RT_SUCCESS(rc))
1859	{
1860	uint32_t u32Checksum2 = RTCrc32(pvPage, PAGE_SIZE);
1861	# if 0
1862	AssertMsg((u32Checksum2 & UINT32_C(0x00000303)) == u32Checksum, ("GCPhysPage=%RGp\n", GCPhysPage));
1863	# else
1864	if ((u32Checksum2 & UINT32_C(0x00000303)) == u32Checksum)
1865	LogFlow(("shpg %#x @ %RGp %#x [OK]\n", PGM_PAGE_GET_PAGEID(pPage), GCPhysPage, u32Checksum2));
1866	else
1867	AssertMsgFailed(("shpg %#x @ %RGp %#x\n", PGM_PAGE_GET_PAGEID(pPage), GCPhysPage, u32Checksum2));
1868	# endif
1869	}
1870	else
1871	AssertRC(rc);
1872	}
1873	}
1874
1875	} /* for each page */
1876
1877	} /* for each ram range */
1878	}
1879
1880	pgmUnlock(pVM);
1881	#endif /* VBOX_STRICT */
1882	NOREF(pVM);
1883	}
1884
1885
1886	/**
1887	* Resets (zeros) the RAM.
1888	*
1889	* ASSUMES that the caller owns the PGM lock.
1890	*
1891	* @returns VBox status code.
1892	* @param pVM Pointer to the VM.
1893	*/
1894	int pgmR3PhysRamReset(PVM pVM)
1895	{
1896	PGM_LOCK_ASSERT_OWNER(pVM);
1897
1898	/* Reset the memory balloon. */
1899	int rc = GMMR3BalloonedPages(pVM, GMMBALLOONACTION_RESET, 0);
1900	AssertRC(rc);
1901
1902	#ifdef VBOX_WITH_PAGE_SHARING
1903	/* Clear all registered shared modules. */
1904	pgmR3PhysAssertSharedPageChecksums(pVM);
1905	rc = GMMR3ResetSharedModules(pVM);
1906	AssertRC(rc);
1907	#endif
1908	/* Reset counters. */
1909	pVM->pgm.s.cReusedSharedPages = 0;
1910	pVM->pgm.s.cBalloonedPages = 0;
1911
1912	/*
1913	* We batch up pages that should be freed instead of calling GMM for
1914	* each and every one of them.
1915	*/
1916	uint32_t cPendingPages = 0;
1917	PGMMFREEPAGESREQ pReq;
1918	rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
1919	AssertLogRelRCReturn(rc, rc);
1920
1921	/*
1922	* Walk the ram ranges.
1923	*/
1924	for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3)
1925	{
1926	uint32_t iPage = pRam->cb >> PAGE_SHIFT;
1927	AssertMsg(((RTGCPHYS)iPage << PAGE_SHIFT) == pRam->cb, ("%RGp %RGp\n", (RTGCPHYS)iPage << PAGE_SHIFT, pRam->cb));
1928
1929	#ifndef NO_RAM_RESET
1930	if (!pVM->pgm.s.fRamPreAlloc)
1931	#else
1932	if (0)
1933	#endif
1934	{
1935	/* Replace all RAM pages by ZERO pages. */
1936	while (iPage-- > 0)
1937	{
1938	PPGMPAGE pPage = &pRam->aPages[iPage];
1939	switch (PGM_PAGE_GET_TYPE(pPage))
1940	{
1941	case PGMPAGETYPE_RAM:
1942	/* Do not replace pages part of a 2 MB continuous range
1943	with zero pages, but zero them instead. */
1944	if ( PGM_PAGE_GET_PDE_TYPE(pPage) == PGM_PAGE_PDE_TYPE_PDE
1945	\|\| PGM_PAGE_GET_PDE_TYPE(pPage) == PGM_PAGE_PDE_TYPE_PDE_DISABLED)
1946	{
1947	void *pvPage;
1948	rc = pgmPhysPageMap(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), &pvPage);
1949	AssertLogRelRCReturn(rc, rc);
1950	ASMMemZeroPage(pvPage);
1951	}
1952	else if (PGM_PAGE_IS_BALLOONED(pPage))
1953	{
1954	/* Turn into a zero page; the balloon status is lost when the VM reboots. */
1955	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
1956	}
1957	else if (!PGM_PAGE_IS_ZERO(pPage))
1958	{
1959	rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT));
1960	AssertLogRelRCReturn(rc, rc);
1961	}
1962	break;
1963
1964	case PGMPAGETYPE_MMIO2_ALIAS_MMIO:
1965	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT),
1966	true /fDoAccounting/);
1967	break;
1968
1969	case PGMPAGETYPE_MMIO2:
1970	case PGMPAGETYPE_ROM_SHADOW: /* handled by pgmR3PhysRomReset. */
1971	case PGMPAGETYPE_ROM:
1972	case PGMPAGETYPE_MMIO:
1973	break;
1974	default:
1975	AssertFailed();
1976	}
1977	} /* for each page */
1978	}
1979	else
1980	{
1981	/* Zero the memory. */
1982	while (iPage-- > 0)
1983	{
1984	PPGMPAGE pPage = &pRam->aPages[iPage];
1985	switch (PGM_PAGE_GET_TYPE(pPage))
1986	{
1987	case PGMPAGETYPE_RAM:
1988	switch (PGM_PAGE_GET_STATE(pPage))
1989	{
1990	case PGM_PAGE_STATE_ZERO:
1991	break;
1992
1993	case PGM_PAGE_STATE_BALLOONED:
1994	/* Turn into a zero page; the balloon status is lost when the VM reboots. */
1995	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
1996	break;
1997
1998	case PGM_PAGE_STATE_SHARED:
1999	case PGM_PAGE_STATE_WRITE_MONITORED:
2000	rc = pgmPhysPageMakeWritable(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT));
2001	AssertLogRelRCReturn(rc, rc);
2002	/* no break */
2003
2004	case PGM_PAGE_STATE_ALLOCATED:
2005	{
2006	void *pvPage;
2007	rc = pgmPhysPageMap(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), &pvPage);
2008	AssertLogRelRCReturn(rc, rc);
2009	#ifndef NO_RAM_RESET
2010	ASMMemZeroPage(pvPage);
2011	#endif
2012	break;
2013	}
2014	}
2015	break;
2016
2017	case PGMPAGETYPE_MMIO2_ALIAS_MMIO:
2018	pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT),
2019	true /fDoAccounting/);
2020	break;
2021
2022	case PGMPAGETYPE_MMIO2:
2023	case PGMPAGETYPE_ROM_SHADOW:
2024	case PGMPAGETYPE_ROM:
2025	case PGMPAGETYPE_MMIO:
2026	break;
2027	default:
2028	AssertFailed();
2029
2030	}
2031	} /* for each page */
2032	}
2033
2034	}
2035
2036	/*
2037	* Finish off any pages pending freeing.
2038	*/
2039	if (cPendingPages)
2040	{
2041	rc = GMMR3FreePagesPerform(pVM, pReq, cPendingPages);
2042	AssertLogRelRCReturn(rc, rc);
2043	}
2044	GMMR3FreePagesCleanup(pReq);
2045
2046	return VINF_SUCCESS;
2047	}
2048
2049
2050	/**
2051	* Frees all RAM during VM termination
2052	*
2053	* ASSUMES that the caller owns the PGM lock.
2054	*
2055	* @returns VBox status code.
2056	* @param pVM Pointer to the VM.
2057	*/
2058	int pgmR3PhysRamTerm(PVM pVM)
2059	{
2060	PGM_LOCK_ASSERT_OWNER(pVM);
2061
2062	/* Reset the memory balloon. */
2063	int rc = GMMR3BalloonedPages(pVM, GMMBALLOONACTION_RESET, 0);
2064	AssertRC(rc);
2065
2066	#ifdef VBOX_WITH_PAGE_SHARING
2067	/*
2068	* Clear all registered shared modules.
2069	*/
2070	pgmR3PhysAssertSharedPageChecksums(pVM);
2071	rc = GMMR3ResetSharedModules(pVM);
2072	AssertRC(rc);
2073
2074	/*
2075	* Flush the handy pages updates to make sure no shared pages are hiding
2076	* in there. (No unlikely if the VM shuts down, apparently.)
2077	*/
2078	rc = VMMR3CallR0(pVM, VMMR0_DO_PGM_FLUSH_HANDY_PAGES, 0, NULL);
2079	#endif
2080
2081	/*
2082	* We batch up pages that should be freed instead of calling GMM for
2083	* each and every one of them.
2084	*/
2085	uint32_t cPendingPages = 0;
2086	PGMMFREEPAGESREQ pReq;
2087	rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
2088	AssertLogRelRCReturn(rc, rc);
2089
2090	/*
2091	* Walk the ram ranges.
2092	*/
2093	for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3; pRam; pRam = pRam->pNextR3)
2094	{
2095	uint32_t iPage = pRam->cb >> PAGE_SHIFT;
2096	AssertMsg(((RTGCPHYS)iPage << PAGE_SHIFT) == pRam->cb, ("%RGp %RGp\n", (RTGCPHYS)iPage << PAGE_SHIFT, pRam->cb));
2097
2098	while (iPage-- > 0)
2099	{
2100	PPGMPAGE pPage = &pRam->aPages[iPage];
2101	switch (PGM_PAGE_GET_TYPE(pPage))
2102	{
2103	case PGMPAGETYPE_RAM:
2104	/* Free all shared pages. Private pages are automatically freed during GMM VM cleanup. */
2105	/** @todo change this to explicitly free private pages here. */
2106	if (PGM_PAGE_IS_SHARED(pPage))
2107	{
2108	rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPage, pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT));
2109	AssertLogRelRCReturn(rc, rc);
2110	}
2111	break;
2112
2113	case PGMPAGETYPE_MMIO2_ALIAS_MMIO:
2114	case PGMPAGETYPE_MMIO2:
2115	case PGMPAGETYPE_ROM_SHADOW: /* handled by pgmR3PhysRomReset. */
2116	case PGMPAGETYPE_ROM:
2117	case PGMPAGETYPE_MMIO:
2118	break;
2119	default:
2120	AssertFailed();
2121	}
2122	} /* for each page */
2123	}
2124
2125	/*
2126	* Finish off any pages pending freeing.
2127	*/
2128	if (cPendingPages)
2129	{
2130	rc = GMMR3FreePagesPerform(pVM, pReq, cPendingPages);
2131	AssertLogRelRCReturn(rc, rc);
2132	}
2133	GMMR3FreePagesCleanup(pReq);
2134	return VINF_SUCCESS;
2135	}
2136
2137	/**
2138	* This is the interface IOM is using to register an MMIO region.
2139	*
2140	* It will check for conflicts and ensure that a RAM range structure
2141	* is present before calling the PGMR3HandlerPhysicalRegister API to
2142	* register the callbacks.
2143	*
2144	* @returns VBox status code.
2145	*
2146	* @param pVM Pointer to the VM.
2147	* @param GCPhys The start of the MMIO region.
2148	* @param cb The size of the MMIO region.
2149	* @param pfnHandlerR3 The address of the ring-3 handler. (IOMR3MMIOHandler)
2150	* @param pvUserR3 The user argument for R3.
2151	* @param pfnHandlerR0 The address of the ring-0 handler. (IOMMMIOHandler)
2152	* @param pvUserR0 The user argument for R0.
2153	* @param pfnHandlerRC The address of the RC handler. (IOMMMIOHandler)
2154	* @param pvUserRC The user argument for RC.
2155	* @param pszDesc The description of the MMIO region.
2156	*/
2157	VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb,
2158	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
2159	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
2160	RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
2161	R3PTRTYPE(const char *) pszDesc)
2162	{
2163	/*
2164	* Assert on some assumption.
2165	*/
2166	VM_ASSERT_EMT(pVM);
2167	AssertReturn(!(cb & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
2168	AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
2169	AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
2170	AssertReturn(*pszDesc, VERR_INVALID_PARAMETER);
2171
2172	int rc = pgmLock(pVM);
2173	AssertRCReturn(rc, rc);
2174
2175	/*
2176	* Make sure there's a RAM range structure for the region.
2177	*/
2178	RTGCPHYS GCPhysLast = GCPhys + (cb - 1);
2179	bool fRamExists = false;
2180	PPGMRAMRANGE pRamPrev = NULL;
2181	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
2182	while (pRam && GCPhysLast >= pRam->GCPhys)
2183	{
2184	if ( GCPhysLast >= pRam->GCPhys
2185	&& GCPhys <= pRam->GCPhysLast)
2186	{
2187	/* Simplification: all within the same range. */
2188	AssertLogRelMsgReturnStmt( GCPhys >= pRam->GCPhys
2189	&& GCPhysLast <= pRam->GCPhysLast,
2190	("%RGp-%RGp (MMIO/%s) falls partly outside %RGp-%RGp (%s)\n",
2191	GCPhys, GCPhysLast, pszDesc,
2192	pRam->GCPhys, pRam->GCPhysLast, pRam->pszDesc),
2193	pgmUnlock(pVM),
2194	VERR_PGM_RAM_CONFLICT);
2195
2196	/* Check that it's all RAM or MMIO pages. */
2197	PCPGMPAGE pPage = &pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
2198	uint32_t cLeft = cb >> PAGE_SHIFT;
2199	while (cLeft-- > 0)
2200	{
2201	AssertLogRelMsgReturnStmt( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM
2202	\|\| PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO,
2203	("%RGp-%RGp (MMIO/%s): %RGp is not a RAM or MMIO page - type=%d desc=%s\n",
2204	GCPhys, GCPhysLast, pszDesc, PGM_PAGE_GET_TYPE(pPage), pRam->pszDesc),
2205	pgmUnlock(pVM),
2206	VERR_PGM_RAM_CONFLICT);
2207	pPage++;
2208	}
2209
2210	/* Looks good. */
2211	fRamExists = true;
2212	break;
2213	}
2214
2215	/* next */
2216	pRamPrev = pRam;
2217	pRam = pRam->pNextR3;
2218	}
2219	PPGMRAMRANGE pNew;
2220	if (fRamExists)
2221	{
2222	pNew = NULL;
2223
2224	/*
2225	* Make all the pages in the range MMIO/ZERO pages, freeing any
2226	* RAM pages currently mapped here. This might not be 100% correct
2227	* for PCI memory, but we're doing the same thing for MMIO2 pages.
2228	*/
2229	rc = pgmR3PhysFreePageRange(pVM, pRam, GCPhys, GCPhysLast, PGMPAGETYPE_MMIO);
2230	AssertRCReturnStmt(rc, pgmUnlock(pVM), rc);
2231
2232	/* Force a PGM pool flush as guest ram references have been changed. */
2233	/** @todo not entirely SMP safe; assuming for now the guest takes
2234	* care of this internally (not touch mapped mmio while changing the
2235	* mapping). */
2236	PVMCPU pVCpu = VMMGetCpu(pVM);
2237	pVCpu->pgm.s.fSyncFlags \|= PGM_SYNC_CLEAR_PGM_POOL;
2238	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2239	}
2240	else
2241	{
2242
2243	/*
2244	* No RAM range, insert an ad hoc one.
2245	*
2246	* Note that we don't have to tell REM about this range because
2247	* PGMHandlerPhysicalRegisterEx will do that for us.
2248	*/
2249	Log(("PGMR3PhysMMIORegister: Adding ad hoc MMIO range for %RGp-%RGp %s\n", GCPhys, GCPhysLast, pszDesc));
2250
2251	const uint32_t cPages = cb >> PAGE_SHIFT;
2252	const size_t cbRamRange = RT_OFFSETOF(PGMRAMRANGE, aPages[cPages]);
2253	rc = MMHyperAlloc(pVM, RT_OFFSETOF(PGMRAMRANGE, aPages[cPages]), 16, MM_TAG_PGM_PHYS, (void **)&pNew);
2254	AssertLogRelMsgRCReturnStmt(rc, ("cbRamRange=%zu\n", cbRamRange), pgmUnlock(pVM), rc);
2255
2256	/* Initialize the range. */
2257	pNew->pSelfR0 = MMHyperCCToR0(pVM, pNew);
2258	pNew->pSelfRC = MMHyperCCToRC(pVM, pNew);
2259	pNew->GCPhys = GCPhys;
2260	pNew->GCPhysLast = GCPhysLast;
2261	pNew->cb = cb;
2262	pNew->pszDesc = pszDesc;
2263	pNew->fFlags = PGM_RAM_RANGE_FLAGS_AD_HOC_MMIO;
2264	pNew->pvR3 = NULL;
2265	pNew->paLSPages = NULL;
2266
2267	uint32_t iPage = cPages;
2268	while (iPage-- > 0)
2269	PGM_PAGE_INIT_ZERO(&pNew->aPages[iPage], pVM, PGMPAGETYPE_MMIO);
2270	Assert(PGM_PAGE_GET_TYPE(&pNew->aPages[0]) == PGMPAGETYPE_MMIO);
2271
2272	/* update the page count stats. */
2273	pVM->pgm.s.cPureMmioPages += cPages;
2274	pVM->pgm.s.cAllPages += cPages;
2275
2276	/* link it */
2277	pgmR3PhysLinkRamRange(pVM, pNew, pRamPrev);
2278	}
2279
2280	/*
2281	* Register the access handler.
2282	*/
2283	rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_MMIO, GCPhys, GCPhysLast,
2284	pfnHandlerR3, pvUserR3,
2285	pfnHandlerR0, pvUserR0,
2286	pfnHandlerRC, pvUserRC, pszDesc);
2287	if ( RT_FAILURE(rc)
2288	&& !fRamExists)
2289	{
2290	pVM->pgm.s.cPureMmioPages -= cb >> PAGE_SHIFT;
2291	pVM->pgm.s.cAllPages -= cb >> PAGE_SHIFT;
2292
2293	/* remove the ad hoc range. */
2294	pgmR3PhysUnlinkRamRange2(pVM, pNew, pRamPrev);
2295	pNew->cb = pNew->GCPhys = pNew->GCPhysLast = NIL_RTGCPHYS;
2296	MMHyperFree(pVM, pRam);
2297	}
2298	pgmPhysInvalidatePageMapTLB(pVM);
2299
2300	pgmUnlock(pVM);
2301	return rc;
2302	}
2303
2304
2305	/**
2306	* This is the interface IOM is using to register an MMIO region.
2307	*
2308	* It will take care of calling PGMHandlerPhysicalDeregister and clean up
2309	* any ad hoc PGMRAMRANGE left behind.
2310	*
2311	* @returns VBox status code.
2312	* @param pVM Pointer to the VM.
2313	* @param GCPhys The start of the MMIO region.
2314	* @param cb The size of the MMIO region.
2315	*/
2316	VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb)
2317	{
2318	VM_ASSERT_EMT(pVM);
2319
2320	int rc = pgmLock(pVM);
2321	AssertRCReturn(rc, rc);
2322
2323	/*
2324	* First deregister the handler, then check if we should remove the ram range.
2325	*/
2326	rc = PGMHandlerPhysicalDeregister(pVM, GCPhys);
2327	if (RT_SUCCESS(rc))
2328	{
2329	RTGCPHYS GCPhysLast = GCPhys + (cb - 1);
2330	PPGMRAMRANGE pRamPrev = NULL;
2331	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
2332	while (pRam && GCPhysLast >= pRam->GCPhys)
2333	{
2334	/** @todo We're being a bit too careful here. rewrite. */
2335	if ( GCPhysLast == pRam->GCPhysLast
2336	&& GCPhys == pRam->GCPhys)
2337	{
2338	Assert(pRam->cb == cb);
2339
2340	/*
2341	* See if all the pages are dead MMIO pages.
2342	*/
2343	uint32_t const cPages = cb >> PAGE_SHIFT;
2344	bool fAllMMIO = true;
2345	uint32_t iPage = 0;
2346	uint32_t cLeft = cPages;
2347	while (cLeft-- > 0)
2348	{
2349	PPGMPAGE pPage = &pRam->aPages[iPage];
2350	if ( PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO
2351	/\|\| not-out-of-action later /)
2352	{
2353	fAllMMIO = false;
2354	Assert(PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO2_ALIAS_MMIO);
2355	AssertMsgFailed(("%RGp %R[pgmpage]\n", pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), pPage));
2356	break;
2357	}
2358	Assert(PGM_PAGE_IS_ZERO(pPage));
2359	pPage++;
2360	}
2361	if (fAllMMIO)
2362	{
2363	/*
2364	* Ad-hoc range, unlink and free it.
2365	*/
2366	Log(("PGMR3PhysMMIODeregister: Freeing ad hoc MMIO range for %RGp-%RGp %s\n",
2367	GCPhys, GCPhysLast, pRam->pszDesc));
2368
2369	pVM->pgm.s.cAllPages -= cPages;
2370	pVM->pgm.s.cPureMmioPages -= cPages;
2371
2372	pgmR3PhysUnlinkRamRange2(pVM, pRam, pRamPrev);
2373	pRam->cb = pRam->GCPhys = pRam->GCPhysLast = NIL_RTGCPHYS;
2374	MMHyperFree(pVM, pRam);
2375	break;
2376	}
2377	}
2378
2379	/*
2380	* Range match? It will all be within one range (see PGMAllHandler.cpp).
2381	*/
2382	if ( GCPhysLast >= pRam->GCPhys
2383	&& GCPhys <= pRam->GCPhysLast)
2384	{
2385	Assert(GCPhys >= pRam->GCPhys);
2386	Assert(GCPhysLast <= pRam->GCPhysLast);
2387
2388	/*
2389	* Turn the pages back into RAM pages.
2390	*/
2391	uint32_t iPage = (GCPhys - pRam->GCPhys) >> PAGE_SHIFT;
2392	uint32_t cLeft = cb >> PAGE_SHIFT;
2393	while (cLeft--)
2394	{
2395	PPGMPAGE pPage = &pRam->aPages[iPage];
2396	AssertMsg(PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), pPage));
2397	AssertMsg(PGM_PAGE_IS_ZERO(pPage), ("%RGp %R[pgmpage]\n", pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), pPage));
2398	if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO)
2399	PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_RAM);
2400	}
2401	break;
2402	}
2403
2404	/* next */
2405	pRamPrev = pRam;
2406	pRam = pRam->pNextR3;
2407	}
2408	}
2409
2410	/* Force a PGM pool flush as guest ram references have been changed. */
2411	/** @todo Not entirely SMP safe; assuming for now the guest takes care of
2412	* this internally (not touch mapped mmio while changing the mapping). */
2413	PVMCPU pVCpu = VMMGetCpu(pVM);
2414	pVCpu->pgm.s.fSyncFlags \|= PGM_SYNC_CLEAR_PGM_POOL;
2415	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2416
2417	pgmPhysInvalidatePageMapTLB(pVM);
2418	pgmPhysInvalidRamRangeTlbs(pVM);
2419	pgmUnlock(pVM);
2420	return rc;
2421	}
2422
2423
2424	/**
2425	* Locate a MMIO2 range.
2426	*
2427	* @returns Pointer to the MMIO2 range.
2428	* @param pVM Pointer to the VM.
2429	* @param pDevIns The device instance owning the region.
2430	* @param iRegion The region.
2431	*/
2432	DECLINLINE(PPGMMMIO2RANGE) pgmR3PhysMMIO2Find(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion)
2433	{
2434	/*
2435	* Search the list.
2436	*/
2437	for (PPGMMMIO2RANGE pCur = pVM->pgm.s.pMmio2RangesR3; pCur; pCur = pCur->pNextR3)
2438	if ( pCur->pDevInsR3 == pDevIns
2439	&& pCur->iRegion == iRegion)
2440	return pCur;
2441	return NULL;
2442	}
2443
2444
2445	/**
2446	* Allocate and register an MMIO2 region.
2447	*
2448	* As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's RAM
2449	* associated with a device. It is also non-shared memory with a permanent
2450	* ring-3 mapping and page backing (presently).
2451	*
2452	* A MMIO2 range may overlap with base memory if a lot of RAM is configured for
2453	* the VM, in which case we'll drop the base memory pages. Presently we will
2454	* make no attempt to preserve anything that happens to be present in the base
2455	* memory that is replaced, this is of course incorrectly but it's too much
2456	* effort.
2457	*
2458	* @returns VBox status code.
2459	* @retval VINF_SUCCESS on success, *ppv pointing to the R3 mapping of the
2460	* memory.
2461	* @retval VERR_ALREADY_EXISTS if the region already exists.
2462	*
2463	* @param pVM Pointer to the VM.
2464	* @param pDevIns The device instance owning the region.
2465	* @param iRegion The region number. If the MMIO2 memory is a PCI
2466	* I/O region this number has to be the number of that
2467	* region. Otherwise it can be any number safe
2468	* UINT8_MAX.
2469	* @param cb The size of the region. Must be page aligned.
2470	* @param fFlags Reserved for future use, must be zero.
2471	* @param ppv Where to store the pointer to the ring-3 mapping of
2472	* the memory.
2473	* @param pszDesc The description.
2474	*/
2475	VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2476	{
2477	/*
2478	* Validate input.
2479	*/
2480	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
2481	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
2482	AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
2483	AssertPtrReturn(ppv, VERR_INVALID_POINTER);
2484	AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
2485	AssertReturn(*pszDesc, VERR_INVALID_PARAMETER);
2486	AssertReturn(pgmR3PhysMMIO2Find(pVM, pDevIns, iRegion) == NULL, VERR_ALREADY_EXISTS);
2487	AssertReturn(!(cb & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
2488	AssertReturn(cb, VERR_INVALID_PARAMETER);
2489	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2490
2491	const uint32_t cPages = cb >> PAGE_SHIFT;
2492	AssertLogRelReturn(((RTGCPHYS)cPages << PAGE_SHIFT) == cb, VERR_INVALID_PARAMETER);
2493	AssertLogRelReturn(cPages <= INT32_MAX / 2, VERR_NO_MEMORY);
2494
2495	/*
2496	* For the 2nd+ instance, mangle the description string so it's unique.
2497	*/
2498	if (pDevIns->iInstance > 0) /** @todo Move to PDMDevHlp.cpp and use a real string cache. */
2499	{
2500	pszDesc = MMR3HeapAPrintf(pVM, MM_TAG_PGM_PHYS, "%s [%u]", pszDesc, pDevIns->iInstance);
2501	if (!pszDesc)
2502	return VERR_NO_MEMORY;
2503	}
2504
2505	/*
2506	* Try reserve and allocate the backing memory first as this is what is
2507	* most likely to fail.
2508	*/
2509	int rc = MMR3AdjustFixedReservation(pVM, cPages, pszDesc);
2510	if (RT_SUCCESS(rc))
2511	{
2512	void *pvPages;
2513	PSUPPAGE paPages = (PSUPPAGE)RTMemTmpAlloc(cPages * sizeof(SUPPAGE));
2514	if (RT_SUCCESS(rc))
2515	rc = SUPR3PageAllocEx(cPages, 0 /fFlags/, &pvPages, NULL /pR0Ptr/, paPages);
2516	if (RT_SUCCESS(rc))
2517	{
2518	memset(pvPages, 0, cPages * PAGE_SIZE);
2519
2520	/*
2521	* Create the MMIO2 range record for it.
2522	*/
2523	const size_t cbRange = RT_OFFSETOF(PGMMMIO2RANGE, RamRange.aPages[cPages]);
2524	PPGMMMIO2RANGE pNew;
2525	rc = MMR3HyperAllocOnceNoRel(pVM, cbRange, 0, MM_TAG_PGM_PHYS, (void **)&pNew);
2526	AssertLogRelMsgRC(rc, ("cbRamRange=%zu\n", cbRange));
2527	if (RT_SUCCESS(rc))
2528	{
2529	pNew->pDevInsR3 = pDevIns;
2530	pNew->pvR3 = pvPages;
2531	//pNew->pNext = NULL;
2532	//pNew->fMapped = false;
2533	//pNew->fOverlapping = false;
2534	pNew->iRegion = iRegion;
2535	pNew->idSavedState = UINT8_MAX;
2536	pNew->RamRange.pSelfR0 = MMHyperCCToR0(pVM, &pNew->RamRange);
2537	pNew->RamRange.pSelfRC = MMHyperCCToRC(pVM, &pNew->RamRange);
2538	pNew->RamRange.GCPhys = NIL_RTGCPHYS;
2539	pNew->RamRange.GCPhysLast = NIL_RTGCPHYS;
2540	pNew->RamRange.pszDesc = pszDesc;
2541	pNew->RamRange.cb = cb;
2542	pNew->RamRange.fFlags = PGM_RAM_RANGE_FLAGS_AD_HOC_MMIO2;
2543	pNew->RamRange.pvR3 = pvPages;
2544	//pNew->RamRange.paLSPages = NULL;
2545
2546	uint32_t iPage = cPages;
2547	while (iPage-- > 0)
2548	{
2549	PGM_PAGE_INIT(&pNew->RamRange.aPages[iPage],
2550	paPages[iPage].Phys, NIL_GMM_PAGEID,
2551	PGMPAGETYPE_MMIO2, PGM_PAGE_STATE_ALLOCATED);
2552	}
2553
2554	/* update page count stats */
2555	pVM->pgm.s.cAllPages += cPages;
2556	pVM->pgm.s.cPrivatePages += cPages;
2557
2558	/*
2559	* Link it into the list.
2560	* Since there is no particular order, just push it.
2561	*/
2562	pgmLock(pVM);
2563	pNew->pNextR3 = pVM->pgm.s.pMmio2RangesR3;
2564	pVM->pgm.s.pMmio2RangesR3 = pNew;
2565	pgmUnlock(pVM);
2566
2567	*ppv = pvPages;
2568	RTMemTmpFree(paPages);
2569	pgmPhysInvalidatePageMapTLB(pVM);
2570	return VINF_SUCCESS;
2571	}
2572
2573	SUPR3PageFreeEx(pvPages, cPages);
2574	}
2575	RTMemTmpFree(paPages);
2576	MMR3AdjustFixedReservation(pVM, -(int32_t)cPages, pszDesc);
2577	}
2578	if (pDevIns->iInstance > 0)
2579	MMR3HeapFree((void *)pszDesc);
2580	return rc;
2581	}
2582
2583
2584	/**
2585	* Deregisters and frees an MMIO2 region.
2586	*
2587	* Any physical (and virtual) access handlers registered for the region must
2588	* be deregistered before calling this function.
2589	*
2590	* @returns VBox status code.
2591	* @param pVM Pointer to the VM.
2592	* @param pDevIns The device instance owning the region.
2593	* @param iRegion The region. If it's UINT32_MAX it'll be a wildcard match.
2594	*/
2595	VMMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion)
2596	{
2597	/*
2598	* Validate input.
2599	*/
2600	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
2601	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
2602	AssertReturn(iRegion <= UINT8_MAX \|\| iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2603
2604	pgmLock(pVM);
2605	int rc = VINF_SUCCESS;
2606	unsigned cFound = 0;
2607	PPGMMMIO2RANGE pPrev = NULL;
2608	PPGMMMIO2RANGE pCur = pVM->pgm.s.pMmio2RangesR3;
2609	while (pCur)
2610	{
2611	if ( pCur->pDevInsR3 == pDevIns
2612	&& ( iRegion == UINT32_MAX
2613	\|\| pCur->iRegion == iRegion))
2614	{
2615	cFound++;
2616
2617	/*
2618	* Unmap it if it's mapped.
2619	*/
2620	if (pCur->fMapped)
2621	{
2622	int rc2 = PGMR3PhysMMIO2Unmap(pVM, pCur->pDevInsR3, pCur->iRegion, pCur->RamRange.GCPhys);
2623	AssertRC(rc2);
2624	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
2625	rc = rc2;
2626	}
2627
2628	/*
2629	* Unlink it
2630	*/
2631	PPGMMMIO2RANGE pNext = pCur->pNextR3;
2632	if (pPrev)
2633	pPrev->pNextR3 = pNext;
2634	else
2635	pVM->pgm.s.pMmio2RangesR3 = pNext;
2636	pCur->pNextR3 = NULL;
2637
2638	/*
2639	* Free the memory.
2640	*/
2641	int rc2 = SUPR3PageFreeEx(pCur->pvR3, pCur->RamRange.cb >> PAGE_SHIFT);
2642	AssertRC(rc2);
2643	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
2644	rc = rc2;
2645
2646	uint32_t const cPages = pCur->RamRange.cb >> PAGE_SHIFT;
2647	rc2 = MMR3AdjustFixedReservation(pVM, -(int32_t)cPages, pCur->RamRange.pszDesc);
2648	AssertRC(rc2);
2649	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
2650	rc = rc2;
2651
2652	/* we're leaking hyper memory here if done at runtime. */
2653	#ifdef VBOX_STRICT
2654	VMSTATE const enmState = VMR3GetState(pVM);
2655	AssertMsg( enmState == VMSTATE_POWERING_OFF
2656	\|\| enmState == VMSTATE_POWERING_OFF_LS
2657	\|\| enmState == VMSTATE_OFF
2658	\|\| enmState == VMSTATE_OFF_LS
2659	\|\| enmState == VMSTATE_DESTROYING
2660	\|\| enmState == VMSTATE_TERMINATED
2661	\|\| enmState == VMSTATE_CREATING
2662	, ("%s\n", VMR3GetStateName(enmState)));
2663	#endif
2664	/*rc = MMHyperFree(pVM, pCur);
2665	AssertRCReturn(rc, rc); - not safe, see the alloc call. */
2666
2667
2668	/* update page count stats */
2669	pVM->pgm.s.cAllPages -= cPages;
2670	pVM->pgm.s.cPrivatePages -= cPages;
2671
2672	/* next */
2673	pCur = pNext;
2674	}
2675	else
2676	{
2677	pPrev = pCur;
2678	pCur = pCur->pNextR3;
2679	}
2680	}
2681	pgmPhysInvalidatePageMapTLB(pVM);
2682	pgmUnlock(pVM);
2683	return !cFound && iRegion != UINT32_MAX ? VERR_NOT_FOUND : rc;
2684	}
2685
2686
2687	/**
2688	* Maps a MMIO2 region.
2689	*
2690	* This is done when a guest / the bios / state loading changes the
2691	* PCI config. The replacing of base memory has the same restrictions
2692	* as during registration, of course.
2693	*
2694	* @returns VBox status code.
2695	*
2696	* @param pVM Pointer to the VM.
2697	* @param pDevIns The device instance owning the region.
2698	*/
2699	VMMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2700	{
2701	/*
2702	* Validate input
2703	*/
2704	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
2705	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
2706	AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
2707	AssertReturn(GCPhys != NIL_RTGCPHYS, VERR_INVALID_PARAMETER);
2708	AssertReturn(GCPhys != 0, VERR_INVALID_PARAMETER);
2709	AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
2710
2711	PPGMMMIO2RANGE pCur = pgmR3PhysMMIO2Find(pVM, pDevIns, iRegion);
2712	AssertReturn(pCur, VERR_NOT_FOUND);
2713	AssertReturn(!pCur->fMapped, VERR_WRONG_ORDER);
2714	Assert(pCur->RamRange.GCPhys == NIL_RTGCPHYS);
2715	Assert(pCur->RamRange.GCPhysLast == NIL_RTGCPHYS);
2716
2717	const RTGCPHYS GCPhysLast = GCPhys + pCur->RamRange.cb - 1;
2718	AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);
2719
2720	/*
2721	* Find our location in the ram range list, checking for
2722	* restriction we don't bother implementing yet (partially overlapping).
2723	*/
2724	bool fRamExists = false;
2725	PPGMRAMRANGE pRamPrev = NULL;
2726	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
2727	while (pRam && GCPhysLast >= pRam->GCPhys)
2728	{
2729	if ( GCPhys <= pRam->GCPhysLast
2730	&& GCPhysLast >= pRam->GCPhys)
2731	{
2732	/* completely within? */
2733	AssertLogRelMsgReturn( GCPhys >= pRam->GCPhys
2734	&& GCPhysLast <= pRam->GCPhysLast,
2735	("%RGp-%RGp (MMIO2/%s) falls partly outside %RGp-%RGp (%s)\n",
2736	GCPhys, GCPhysLast, pCur->RamRange.pszDesc,
2737	pRam->GCPhys, pRam->GCPhysLast, pRam->pszDesc),
2738	VERR_PGM_RAM_CONFLICT);
2739	fRamExists = true;
2740	break;
2741	}
2742
2743	/* next */
2744	pRamPrev = pRam;
2745	pRam = pRam->pNextR3;
2746	}
2747	if (fRamExists)
2748	{
2749	PPGMPAGE pPage = &pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
2750	uint32_t cPagesLeft = pCur->RamRange.cb >> PAGE_SHIFT;
2751	while (cPagesLeft-- > 0)
2752	{
2753	AssertLogRelMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM,
2754	("%RGp isn't a RAM page (%d) - mapping %RGp-%RGp (MMIO2/%s).\n",
2755	GCPhys, PGM_PAGE_GET_TYPE(pPage), GCPhys, GCPhysLast, pCur->RamRange.pszDesc),
2756	VERR_PGM_RAM_CONFLICT);
2757	pPage++;
2758	}
2759	}
2760	Log(("PGMR3PhysMMIO2Map: %RGp-%RGp fRamExists=%RTbool %s\n",
2761	GCPhys, GCPhysLast, fRamExists, pCur->RamRange.pszDesc));
2762
2763	/*
2764	* Make the changes.
2765	*/
2766	pgmLock(pVM);
2767
2768	pCur->RamRange.GCPhys = GCPhys;
2769	pCur->RamRange.GCPhysLast = GCPhysLast;
2770	pCur->fMapped = true;
2771	pCur->fOverlapping = fRamExists;
2772
2773	if (fRamExists)
2774	{
2775	/** @todo use pgmR3PhysFreePageRange here. */
2776	uint32_t cPendingPages = 0;
2777	PGMMFREEPAGESREQ pReq;
2778	int rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
2779	AssertLogRelRCReturn(rc, rc);
2780
2781	/* replace the pages, freeing all present RAM pages. */
2782	PPGMPAGE pPageSrc = &pCur->RamRange.aPages[0];
2783	PPGMPAGE pPageDst = &pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
2784	uint32_t cPagesLeft = pCur->RamRange.cb >> PAGE_SHIFT;
2785	while (cPagesLeft-- > 0)
2786	{
2787	rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, pPageDst, GCPhys);
2788	AssertLogRelRCReturn(rc, rc); /* We're done for if this goes wrong. */
2789
2790	RTHCPHYS const HCPhys = PGM_PAGE_GET_HCPHYS(pPageSrc);
2791	PGM_PAGE_SET_HCPHYS(pVM, pPageDst, HCPhys);
2792	PGM_PAGE_SET_TYPE(pVM, pPageDst, PGMPAGETYPE_MMIO2);
2793	PGM_PAGE_SET_STATE(pVM, pPageDst, PGM_PAGE_STATE_ALLOCATED);
2794	PGM_PAGE_SET_PDE_TYPE(pVM, pPageDst, PGM_PAGE_PDE_TYPE_DONTCARE);
2795	PGM_PAGE_SET_PTE_INDEX(pVM, pPageDst, 0);
2796	PGM_PAGE_SET_TRACKING(pVM, pPageDst, 0);
2797
2798	pVM->pgm.s.cZeroPages--;
2799	GCPhys += PAGE_SIZE;
2800	pPageSrc++;
2801	pPageDst++;
2802	}
2803
2804	/* Flush physical page map TLB. */
2805	pgmPhysInvalidatePageMapTLB(pVM);
2806
2807	if (cPendingPages)
2808	{
2809	rc = GMMR3FreePagesPerform(pVM, pReq, cPendingPages);
2810	AssertLogRelRCReturn(rc, rc);
2811	}
2812	GMMR3FreePagesCleanup(pReq);
2813
2814	/* Force a PGM pool flush as guest ram references have been changed. */
2815	/** @todo not entirely SMP safe; assuming for now the guest takes care of
2816	* this internally (not touch mapped mmio while changing the mapping). */
2817	PVMCPU pVCpu = VMMGetCpu(pVM);
2818	pVCpu->pgm.s.fSyncFlags \|= PGM_SYNC_CLEAR_PGM_POOL;
2819	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2820
2821	pgmUnlock(pVM);
2822	}
2823	else
2824	{
2825	RTGCPHYS cb = pCur->RamRange.cb;
2826
2827	/* Clear the tracking data of pages we're going to reactivate. */
2828	PPGMPAGE pPageSrc = &pCur->RamRange.aPages[0];
2829	uint32_t cPagesLeft = pCur->RamRange.cb >> PAGE_SHIFT;
2830	while (cPagesLeft-- > 0)
2831	{
2832	PGM_PAGE_SET_TRACKING(pVM, pPageSrc, 0);
2833	PGM_PAGE_SET_PTE_INDEX(pVM, pPageSrc, 0);
2834	pPageSrc++;
2835	}
2836
2837	/* link in the ram range */
2838	pgmR3PhysLinkRamRange(pVM, &pCur->RamRange, pRamPrev);
2839	pgmUnlock(pVM);
2840
2841	#ifdef VBOX_WITH_REM
2842	REMR3NotifyPhysRamRegister(pVM, GCPhys, cb, REM_NOTIFY_PHYS_RAM_FLAGS_MMIO2);
2843	#endif
2844	}
2845
2846	pgmPhysInvalidatePageMapTLB(pVM);
2847	return VINF_SUCCESS;
2848	}
2849
2850
2851	/**
2852	* Unmaps a MMIO2 region.
2853	*
2854	* This is done when a guest / the bios / state loading changes the
2855	* PCI config. The replacing of base memory has the same restrictions
2856	* as during registration, of course.
2857	*/
2858	VMMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2859	{
2860	/*
2861	* Validate input
2862	*/
2863	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
2864	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
2865	AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
2866	AssertReturn(GCPhys != NIL_RTGCPHYS, VERR_INVALID_PARAMETER);
2867	AssertReturn(GCPhys != 0, VERR_INVALID_PARAMETER);
2868	AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
2869
2870	PPGMMMIO2RANGE pCur = pgmR3PhysMMIO2Find(pVM, pDevIns, iRegion);
2871	AssertReturn(pCur, VERR_NOT_FOUND);
2872	AssertReturn(pCur->fMapped, VERR_WRONG_ORDER);
2873	AssertReturn(pCur->RamRange.GCPhys == GCPhys, VERR_INVALID_PARAMETER);
2874	Assert(pCur->RamRange.GCPhysLast != NIL_RTGCPHYS);
2875
2876	Log(("PGMR3PhysMMIO2Unmap: %RGp-%RGp %s\n",
2877	pCur->RamRange.GCPhys, pCur->RamRange.GCPhysLast, pCur->RamRange.pszDesc));
2878
2879	/*
2880	* Unmap it.
2881	*/
2882	pgmLock(pVM);
2883
2884	#ifdef VBOX_WITH_REM
2885	RTGCPHYS GCPhysRangeREM;
2886	RTGCPHYS cbRangeREM;
2887	bool fInformREM;
2888	#endif
2889	if (pCur->fOverlapping)
2890	{
2891	/* Restore the RAM pages we've replaced. */
2892	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
2893	while (pRam->GCPhys > pCur->RamRange.GCPhysLast)
2894	pRam = pRam->pNextR3;
2895
2896	PPGMPAGE pPageDst = &pRam->aPages[(pCur->RamRange.GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
2897	uint32_t cPagesLeft = pCur->RamRange.cb >> PAGE_SHIFT;
2898	while (cPagesLeft-- > 0)
2899	{
2900	PGM_PAGE_INIT_ZERO(pPageDst, pVM, PGMPAGETYPE_RAM);
2901	pVM->pgm.s.cZeroPages++;
2902	pPageDst++;
2903	}
2904
2905	/* Flush physical page map TLB. */
2906	pgmPhysInvalidatePageMapTLB(pVM);
2907	#ifdef VBOX_WITH_REM
2908	GCPhysRangeREM = NIL_RTGCPHYS; /* shuts up gcc */
2909	cbRangeREM = RTGCPHYS_MAX; /* ditto */
2910	fInformREM = false;
2911	#endif
2912	}
2913	else
2914	{
2915	#ifdef VBOX_WITH_REM
2916	GCPhysRangeREM = pCur->RamRange.GCPhys;
2917	cbRangeREM = pCur->RamRange.cb;
2918	fInformREM = true;
2919	#endif
2920	pgmR3PhysUnlinkRamRange(pVM, &pCur->RamRange);
2921	}
2922
2923	pCur->RamRange.GCPhys = NIL_RTGCPHYS;
2924	pCur->RamRange.GCPhysLast = NIL_RTGCPHYS;
2925	pCur->fOverlapping = false;
2926	pCur->fMapped = false;
2927
2928	/* Force a PGM pool flush as guest ram references have been changed. */
2929	/** @todo not entirely SMP safe; assuming for now the guest takes care
2930	* of this internally (not touch mapped mmio while changing the
2931	* mapping). */
2932	PVMCPU pVCpu = VMMGetCpu(pVM);
2933	pVCpu->pgm.s.fSyncFlags \|= PGM_SYNC_CLEAR_PGM_POOL;
2934	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
2935
2936	pgmPhysInvalidatePageMapTLB(pVM);
2937	pgmPhysInvalidRamRangeTlbs(pVM);
2938	pgmUnlock(pVM);
2939
2940	#ifdef VBOX_WITH_REM
2941	if (fInformREM)
2942	REMR3NotifyPhysRamDeregister(pVM, GCPhysRangeREM, cbRangeREM);
2943	#endif
2944
2945	return VINF_SUCCESS;
2946	}
2947
2948
2949	/**
2950	* Checks if the given address is an MMIO2 base address or not.
2951	*
2952	* @returns true/false accordingly.
2953	* @param pVM Pointer to the VM.
2954	* @param pDevIns The owner of the memory, optional.
2955	* @param GCPhys The address to check.
2956	*/
2957	VMMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2958	{
2959	/*
2960	* Validate input
2961	*/
2962	VM_ASSERT_EMT_RETURN(pVM, false);
2963	AssertPtrReturn(pDevIns, false);
2964	AssertReturn(GCPhys != NIL_RTGCPHYS, false);
2965	AssertReturn(GCPhys != 0, false);
2966	AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), false);
2967
2968	/*
2969	* Search the list.
2970	*/
2971	pgmLock(pVM);
2972	for (PPGMMMIO2RANGE pCur = pVM->pgm.s.pMmio2RangesR3; pCur; pCur = pCur->pNextR3)
2973	if (pCur->RamRange.GCPhys == GCPhys)
2974	{
2975	Assert(pCur->fMapped);
2976	pgmUnlock(pVM);
2977	return true;
2978	}
2979	pgmUnlock(pVM);
2980	return false;
2981	}
2982
2983
2984	/**
2985	* Gets the HC physical address of a page in the MMIO2 region.
2986	*
2987	* This is API is intended for MMHyper and shouldn't be called
2988	* by anyone else...
2989	*
2990	* @returns VBox status code.
2991	* @param pVM Pointer to the VM.
2992	* @param pDevIns The owner of the memory, optional.
2993	* @param iRegion The region.
2994	* @param off The page expressed an offset into the MMIO2 region.
2995	* @param pHCPhys Where to store the result.
2996	*/
2997	VMMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys)
2998	{
2999	/*
3000	* Validate input
3001	*/
3002	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
3003	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
3004	AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
3005
3006	pgmLock(pVM);
3007	PPGMMMIO2RANGE pCur = pgmR3PhysMMIO2Find(pVM, pDevIns, iRegion);
3008	AssertReturn(pCur, VERR_NOT_FOUND);
3009	AssertReturn(off < pCur->RamRange.cb, VERR_INVALID_PARAMETER);
3010
3011	PCPGMPAGE pPage = &pCur->RamRange.aPages[off >> PAGE_SHIFT];
3012	*pHCPhys = PGM_PAGE_GET_HCPHYS(pPage);
3013	pgmUnlock(pVM);
3014	return VINF_SUCCESS;
3015	}
3016
3017
3018	/**
3019	* Maps a portion of an MMIO2 region into kernel space (host).
3020	*
3021	* The kernel mapping will become invalid when the MMIO2 memory is deregistered
3022	* or the VM is terminated.
3023	*
3024	* @return VBox status code.
3025	*
3026	* @param pVM Pointer to the VM.
3027	* @param pDevIns The device owning the MMIO2 memory.
3028	* @param iRegion The region.
3029	* @param off The offset into the region. Must be page aligned.
3030	* @param cb The number of bytes to map. Must be page aligned.
3031	* @param pszDesc Mapping description.
3032	* @param pR0Ptr Where to store the R0 address.
3033	*/
3034	VMMR3DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3035	const char *pszDesc, PRTR0PTR pR0Ptr)
3036	{
3037	/*
3038	* Validate input.
3039	*/
3040	VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
3041	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
3042	AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
3043
3044	PPGMMMIO2RANGE pCur = pgmR3PhysMMIO2Find(pVM, pDevIns, iRegion);
3045	AssertReturn(pCur, VERR_NOT_FOUND);
3046	AssertReturn(off < pCur->RamRange.cb, VERR_INVALID_PARAMETER);
3047	AssertReturn(cb <= pCur->RamRange.cb, VERR_INVALID_PARAMETER);
3048	AssertReturn(off + cb <= pCur->RamRange.cb, VERR_INVALID_PARAMETER);
3049	NOREF(pszDesc);
3050
3051	/*
3052	* Pass the request on to the support library/driver.
3053	*/
3054	int rc = SUPR3PageMapKernel(pCur->pvR3, off, cb, 0, pR0Ptr);
3055
3056	return rc;
3057	}
3058
3059
3060	/**
3061	* Worker for PGMR3PhysRomRegister.
3062	*
3063	* This is here to simplify lock management, i.e. the caller does all the
3064	* locking and we can simply return without needing to remember to unlock
3065	* anything first.
3066	*
3067	* @returns VBox status.
3068	* @param pVM Pointer to the VM.
3069	* @param pDevIns The device instance owning the ROM.
3070	* @param GCPhys First physical address in the range.
3071	* Must be page aligned!
3072	* @param cb The size of the range (in bytes).
3073	* Must be page aligned!
3074	* @param pvBinary Pointer to the binary data backing the ROM image.
3075	* @param cbBinary The size of the binary data pvBinary points to.
3076	* This must be less or equal to @a cb.
3077	* @param fFlags Mask of flags. PGMPHYS_ROM_FLAGS_SHADOWED
3078	* and/or PGMPHYS_ROM_FLAGS_PERMANENT_BINARY.
3079	* @param pszDesc Pointer to description string. This must not be freed.
3080	*/
3081	static int pgmR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
3082	const void pvBinary, uint32_t cbBinary, uint32_t fFlags, const char pszDesc)
3083	{
3084	/*
3085	* Validate input.
3086	*/
3087	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
3088	AssertReturn(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys, VERR_INVALID_PARAMETER);
3089	AssertReturn(RT_ALIGN_T(cb, PAGE_SIZE, RTGCPHYS) == cb, VERR_INVALID_PARAMETER);
3090	RTGCPHYS GCPhysLast = GCPhys + (cb - 1);
3091	AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);
3092	AssertPtrReturn(pvBinary, VERR_INVALID_PARAMETER);
3093	AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
3094	AssertReturn(!(fFlags & ~(PGMPHYS_ROM_FLAGS_SHADOWED \| PGMPHYS_ROM_FLAGS_PERMANENT_BINARY)), VERR_INVALID_PARAMETER);
3095	VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
3096
3097	const uint32_t cPages = cb >> PAGE_SHIFT;
3098
3099	/*
3100	* Find the ROM location in the ROM list first.
3101	*/
3102	PPGMROMRANGE pRomPrev = NULL;
3103	PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3;
3104	while (pRom && GCPhysLast >= pRom->GCPhys)
3105	{
3106	if ( GCPhys <= pRom->GCPhysLast
3107	&& GCPhysLast >= pRom->GCPhys)
3108	AssertLogRelMsgFailedReturn(("%RGp-%RGp (%s) conflicts with existing %RGp-%RGp (%s)\n",
3109	GCPhys, GCPhysLast, pszDesc,
3110	pRom->GCPhys, pRom->GCPhysLast, pRom->pszDesc),
3111	VERR_PGM_RAM_CONFLICT);
3112	/* next */
3113	pRomPrev = pRom;
3114	pRom = pRom->pNextR3;
3115	}
3116
3117	/*
3118	* Find the RAM location and check for conflicts.
3119	*
3120	* Conflict detection is a bit different than for RAM
3121	* registration since a ROM can be located within a RAM
3122	* range. So, what we have to check for is other memory
3123	* types (other than RAM that is) and that we don't span
3124	* more than one RAM range (layz).
3125	*/
3126	bool fRamExists = false;
3127	PPGMRAMRANGE pRamPrev = NULL;
3128	PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
3129	while (pRam && GCPhysLast >= pRam->GCPhys)
3130	{
3131	if ( GCPhys <= pRam->GCPhysLast
3132	&& GCPhysLast >= pRam->GCPhys)
3133	{
3134	/* completely within? */
3135	AssertLogRelMsgReturn( GCPhys >= pRam->GCPhys
3136	&& GCPhysLast <= pRam->GCPhysLast,
3137	("%RGp-%RGp (%s) falls partly outside %RGp-%RGp (%s)\n",
3138	GCPhys, GCPhysLast, pszDesc,
3139	pRam->GCPhys, pRam->GCPhysLast, pRam->pszDesc),
3140	VERR_PGM_RAM_CONFLICT);
3141	fRamExists = true;
3142	break;
3143	}
3144
3145	/* next */
3146	pRamPrev = pRam;
3147	pRam = pRam->pNextR3;
3148	}
3149	if (fRamExists)
3150	{
3151	PPGMPAGE pPage = &pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
3152	uint32_t cPagesLeft = cPages;
3153	while (cPagesLeft-- > 0)
3154	{
3155	AssertLogRelMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM,
3156	("%RGp (%R[pgmpage]) isn't a RAM page - registering %RGp-%RGp (%s).\n",
3157	pRam->GCPhys + ((RTGCPHYS)(uintptr_t)(pPage - &pRam->aPages[0]) << PAGE_SHIFT),
3158	pPage, GCPhys, GCPhysLast, pszDesc), VERR_PGM_RAM_CONFLICT);
3159	Assert(PGM_PAGE_IS_ZERO(pPage));
3160	pPage++;
3161	}
3162	}
3163
3164	/*
3165	* Update the base memory reservation if necessary.
3166	*/
3167	uint32_t cExtraBaseCost = fRamExists ? 0 : cPages;
3168	if (fFlags & PGMPHYS_ROM_FLAGS_SHADOWED)
3169	cExtraBaseCost += cPages;
3170	if (cExtraBaseCost)
3171	{
3172	int rc = MMR3IncreaseBaseReservation(pVM, cExtraBaseCost);
3173	if (RT_FAILURE(rc))
3174	return rc;
3175	}
3176
3177	/*
3178	* Allocate memory for the virgin copy of the RAM.
3179	*/
3180	PGMMALLOCATEPAGESREQ pReq;
3181	int rc = GMMR3AllocatePagesPrepare(pVM, &pReq, cPages, GMMACCOUNT_BASE);
3182	AssertRCReturn(rc, rc);
3183
3184	for (uint32_t iPage = 0; iPage < cPages; iPage++)
3185	{
3186	pReq->aPages[iPage].HCPhysGCPhys = GCPhys + (iPage << PAGE_SHIFT);
3187	pReq->aPages[iPage].idPage = NIL_GMM_PAGEID;
3188	pReq->aPages[iPage].idSharedPage = NIL_GMM_PAGEID;
3189	}
3190
3191	rc = GMMR3AllocatePagesPerform(pVM, pReq);
3192	if (RT_FAILURE(rc))
3193	{
3194	GMMR3AllocatePagesCleanup(pReq);
3195	return rc;
3196	}
3197
3198	/*
3199	* Allocate the new ROM range and RAM range (if necessary).
3200	*/
3201	PPGMROMRANGE pRomNew;
3202	rc = MMHyperAlloc(pVM, RT_OFFSETOF(PGMROMRANGE, aPages[cPages]), 0, MM_TAG_PGM_PHYS, (void **)&pRomNew);
3203	if (RT_SUCCESS(rc))
3204	{
3205	PPGMRAMRANGE pRamNew = NULL;
3206	if (!fRamExists)
3207	rc = MMHyperAlloc(pVM, RT_OFFSETOF(PGMRAMRANGE, aPages[cPages]), sizeof(PGMPAGE), MM_TAG_PGM_PHYS, (void **)&pRamNew);
3208	if (RT_SUCCESS(rc))
3209	{
3210	/*
3211	* Initialize and insert the RAM range (if required).
3212	*/
3213	PPGMROMPAGE pRomPage = &pRomNew->aPages[0];
3214	if (!fRamExists)
3215	{
3216	pRamNew->pSelfR0 = MMHyperCCToR0(pVM, pRamNew);
3217	pRamNew->pSelfRC = MMHyperCCToRC(pVM, pRamNew);
3218	pRamNew->GCPhys = GCPhys;
3219	pRamNew->GCPhysLast = GCPhysLast;
3220	pRamNew->cb = cb;
3221	pRamNew->pszDesc = pszDesc;
3222	pRamNew->fFlags = PGM_RAM_RANGE_FLAGS_AD_HOC_ROM;
3223	pRamNew->pvR3 = NULL;
3224	pRamNew->paLSPages = NULL;
3225
3226	PPGMPAGE pPage = &pRamNew->aPages[0];
3227	for (uint32_t iPage = 0; iPage < cPages; iPage++, pPage++, pRomPage++)
3228	{
3229	PGM_PAGE_INIT(pPage,
3230	pReq->aPages[iPage].HCPhysGCPhys,
3231	pReq->aPages[iPage].idPage,
3232	PGMPAGETYPE_ROM,
3233	PGM_PAGE_STATE_ALLOCATED);
3234
3235	pRomPage->Virgin = *pPage;
3236	}
3237
3238	pVM->pgm.s.cAllPages += cPages;
3239	pgmR3PhysLinkRamRange(pVM, pRamNew, pRamPrev);
3240	}
3241	else
3242	{
3243	PPGMPAGE pPage = &pRam->aPages[(GCPhys - pRam->GCPhys) >> PAGE_SHIFT];
3244	for (uint32_t iPage = 0; iPage < cPages; iPage++, pPage++, pRomPage++)
3245	{
3246	PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_ROM);
3247	PGM_PAGE_SET_HCPHYS(pVM, pPage, pReq->aPages[iPage].HCPhysGCPhys);
3248	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
3249	PGM_PAGE_SET_PAGEID(pVM, pPage, pReq->aPages[iPage].idPage);
3250	PGM_PAGE_SET_PDE_TYPE(pVM, pPage, PGM_PAGE_PDE_TYPE_DONTCARE);
3251	PGM_PAGE_SET_PTE_INDEX(pVM, pPage, 0);
3252	PGM_PAGE_SET_TRACKING(pVM, pPage, 0);
3253
3254	pRomPage->Virgin = *pPage;
3255	}
3256
3257	pRamNew = pRam;
3258
3259	pVM->pgm.s.cZeroPages -= cPages;
3260	}
3261	pVM->pgm.s.cPrivatePages += cPages;
3262
3263	/* Flush physical page map TLB. */
3264	pgmPhysInvalidatePageMapTLB(pVM);
3265
3266
3267	/*
3268	* !HACK ALERT! REM + (Shadowed) ROM ==> mess.
3269	*
3270	* If it's shadowed we'll register the handler after the ROM notification
3271	* so we get the access handler callbacks that we should. If it isn't
3272	* shadowed we'll do it the other way around to make REM use the built-in
3273	* ROM behavior and not the handler behavior (which is to route all access
3274	* to PGM atm).
3275	*/
3276	if (fFlags & PGMPHYS_ROM_FLAGS_SHADOWED)
3277	{
3278	#ifdef VBOX_WITH_REM
3279	REMR3NotifyPhysRomRegister(pVM, GCPhys, cb, NULL, true /* fShadowed */);
3280	#endif
3281	rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhysLast,
3282	pgmR3PhysRomWriteHandler, pRomNew,
3283	NULL, "pgmPhysRomWriteHandler", MMHyperCCToR0(pVM, pRomNew),
3284	NULL, "pgmPhysRomWriteHandler", MMHyperCCToRC(pVM, pRomNew), pszDesc);
3285	}
3286	else
3287	{
3288	rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhysLast,
3289	pgmR3PhysRomWriteHandler, pRomNew,
3290	NULL, "pgmPhysRomWriteHandler", MMHyperCCToR0(pVM, pRomNew),
3291	NULL, "pgmPhysRomWriteHandler", MMHyperCCToRC(pVM, pRomNew), pszDesc);
3292	#ifdef VBOX_WITH_REM
3293	REMR3NotifyPhysRomRegister(pVM, GCPhys, cb, NULL, false /* fShadowed */);
3294	#endif
3295	}
3296	if (RT_SUCCESS(rc))
3297	{
3298	/*
3299	* Copy the image over to the virgin pages.
3300	* This must be done after linking in the RAM range.
3301	*/
3302	size_t cbBinaryLeft = cbBinary;
3303	PPGMPAGE pRamPage = &pRamNew->aPages[(GCPhys - pRamNew->GCPhys) >> PAGE_SHIFT];
3304	for (uint32_t iPage = 0; iPage < cPages; iPage++, pRamPage++)
3305	{
3306	void *pvDstPage;
3307	rc = pgmPhysPageMap(pVM, pRamPage, GCPhys + (iPage << PAGE_SHIFT), &pvDstPage);
3308	if (RT_FAILURE(rc))
3309	{
3310	VMSetError(pVM, rc, RT_SRC_POS, "Failed to map virgin ROM page at %RGp", GCPhys);
3311	break;
3312	}
3313	if (cbBinaryLeft >= PAGE_SIZE)
3314	{
3315	memcpy(pvDstPage, (uint8_t const *)pvBinary + ((size_t)iPage << PAGE_SHIFT), PAGE_SIZE);
3316	cbBinaryLeft -= PAGE_SIZE;
3317	}
3318	else
3319	{
3320	ASMMemZeroPage(pvDstPage); /* (shouldn't be necessary, but can't hurt either) */
3321	if (cbBinaryLeft > 0)
3322	{
3323	memcpy(pvDstPage, (uint8_t const *)pvBinary + ((size_t)iPage << PAGE_SHIFT), cbBinaryLeft);
3324	cbBinaryLeft = 0;
3325	}
3326	}
3327	}
3328	if (RT_SUCCESS(rc))
3329	{
3330	/*
3331	* Initialize the ROM range.
3332	* Note that the Virgin member of the pages has already been initialized above.
3333	*/
3334	pRomNew->GCPhys = GCPhys;
3335	pRomNew->GCPhysLast = GCPhysLast;
3336	pRomNew->cb = cb;
3337	pRomNew->fFlags = fFlags;
3338	pRomNew->idSavedState = UINT8_MAX;
3339	pRomNew->cbOriginal = cbBinary;
3340	#ifdef VBOX_STRICT
3341	pRomNew->pvOriginal = fFlags & PGMPHYS_ROM_FLAGS_PERMANENT_BINARY
3342	? pvBinary : RTMemDup(pvBinary, cbBinary);
3343	#else
3344	pRomNew->pvOriginal = fFlags & PGMPHYS_ROM_FLAGS_PERMANENT_BINARY ? pvBinary : NULL;
3345	#endif
3346	pRomNew->pszDesc = pszDesc;
3347
3348	for (unsigned iPage = 0; iPage < cPages; iPage++)
3349	{
3350	PPGMROMPAGE pPage = &pRomNew->aPages[iPage];
3351	pPage->enmProt = PGMROMPROT_READ_ROM_WRITE_IGNORE;
3352	PGM_PAGE_INIT_ZERO(&pPage->Shadow, pVM, PGMPAGETYPE_ROM_SHADOW);
3353	}
3354
3355	/* update the page count stats for the shadow pages. */
3356	if (fFlags & PGMPHYS_ROM_FLAGS_SHADOWED)
3357	{
3358	pVM->pgm.s.cZeroPages += cPages;
3359	pVM->pgm.s.cAllPages += cPages;
3360	}
3361
3362	/*
3363	* Insert the ROM range, tell REM and return successfully.
3364	*/
3365	pRomNew->pNextR3 = pRom;
3366	pRomNew->pNextR0 = pRom ? MMHyperCCToR0(pVM, pRom) : NIL_RTR0PTR;
3367	pRomNew->pNextRC = pRom ? MMHyperCCToRC(pVM, pRom) : NIL_RTRCPTR;
3368
3369	if (pRomPrev)
3370	{
3371	pRomPrev->pNextR3 = pRomNew;
3372	pRomPrev->pNextR0 = MMHyperCCToR0(pVM, pRomNew);
3373	pRomPrev->pNextRC = MMHyperCCToRC(pVM, pRomNew);
3374	}
3375	else
3376	{
3377	pVM->pgm.s.pRomRangesR3 = pRomNew;
3378	pVM->pgm.s.pRomRangesR0 = MMHyperCCToR0(pVM, pRomNew);
3379	pVM->pgm.s.pRomRangesRC = MMHyperCCToRC(pVM, pRomNew);
3380	}
3381
3382	pgmPhysInvalidatePageMapTLB(pVM);
3383	GMMR3AllocatePagesCleanup(pReq);
3384	return VINF_SUCCESS;
3385	}
3386
3387	/* bail out */
3388
3389	int rc2 = PGMHandlerPhysicalDeregister(pVM, GCPhys);
3390	AssertRC(rc2);
3391	}
3392
3393	if (!fRamExists)
3394	{
3395	pgmR3PhysUnlinkRamRange2(pVM, pRamNew, pRamPrev);
3396	MMHyperFree(pVM, pRamNew);
3397	}
3398	}
3399	MMHyperFree(pVM, pRomNew);
3400	}
3401
3402	/** @todo Purge the mapping cache or something... */
3403	GMMR3FreeAllocatedPages(pVM, pReq);
3404	GMMR3AllocatePagesCleanup(pReq);
3405	return rc;
3406	}
3407
3408
3409	/**
3410	* Registers a ROM image.
3411	*
3412	* Shadowed ROM images requires double the amount of backing memory, so,
3413	* don't use that unless you have to. Shadowing of ROM images is process
3414	* where we can select where the reads go and where the writes go. On real
3415	* hardware the chipset provides means to configure this. We provide
3416	* PGMR3PhysProtectROM() for this purpose.
3417	*
3418	* A read-only copy of the ROM image will always be kept around while we
3419	* will allocate RAM pages for the changes on demand (unless all memory
3420	* is configured to be preallocated).
3421	*
3422	* @returns VBox status.
3423	* @param pVM Pointer to the VM.
3424	* @param pDevIns The device instance owning the ROM.
3425	* @param GCPhys First physical address in the range.
3426	* Must be page aligned!
3427	* @param cb The size of the range (in bytes).
3428	* Must be page aligned!
3429	* @param pvBinary Pointer to the binary data backing the ROM image.
3430	* @param cbBinary The size of the binary data pvBinary points to.
3431	* This must be less or equal to @a cb.
3432	* @param fFlags Mask of flags. PGMPHYS_ROM_FLAGS_SHADOWED
3433	* and/or PGMPHYS_ROM_FLAGS_PERMANENT_BINARY.
3434	* @param pszDesc Pointer to description string. This must not be freed.
3435	*
3436	* @remark There is no way to remove the rom, automatically on device cleanup or
3437	* manually from the device yet. This isn't difficult in any way, it's
3438	* just not something we expect to be necessary for a while.
3439	*/
3440	VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
3441	const void pvBinary, uint32_t cbBinary, uint32_t fFlags, const char pszDesc)
3442	{
3443	Log(("PGMR3PhysRomRegister: pDevIns=%p GCPhys=%RGp(-%RGp) cb=%RGp pvBinary=%p cbBinary=%#x fFlags=%#x pszDesc=%s\n",
3444	pDevIns, GCPhys, GCPhys + cb, cb, pvBinary, cbBinary, fFlags, pszDesc));
3445	pgmLock(pVM);
3446	int rc = pgmR3PhysRomRegister(pVM, pDevIns, GCPhys, cb, pvBinary, cbBinary, fFlags, pszDesc);
3447	pgmUnlock(pVM);
3448	return rc;
3449	}
3450
3451
3452	/**
3453	* \#PF Handler callback for ROM write accesses.
3454	*
3455	* @returns VINF_SUCCESS if the handler have carried out the operation.
3456	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
3457	* @param pVM Pointer to the VM.
3458	* @param GCPhys The physical address the guest is writing to.
3459	* @param pvPhys The HC mapping of that address.
3460	* @param pvBuf What the guest is reading/writing.
3461	* @param cbBuf How much it's reading/writing.
3462	* @param enmAccessType The access type.
3463	* @param pvUser User argument.
3464	*/
3465	static DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void pvPhys, void pvBuf, size_t cbBuf,
3466	PGMACCESSTYPE enmAccessType, void *pvUser)
3467	{
3468	PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
3469	const uint32_t iPage = (GCPhys - pRom->GCPhys) >> PAGE_SHIFT;
3470	Assert(iPage < (pRom->cb >> PAGE_SHIFT));
3471	PPGMROMPAGE pRomPage = &pRom->aPages[iPage];
3472	Log5(("pgmR3PhysRomWriteHandler: %d %c %#08RGp %#04zx\n", pRomPage->enmProt, enmAccessType == PGMACCESSTYPE_READ ? 'R' : 'W', GCPhys, cbBuf));
3473	NOREF(pvPhys);
3474
3475	if (enmAccessType == PGMACCESSTYPE_READ)
3476	{
3477	switch (pRomPage->enmProt)
3478	{
3479	/*
3480	* Take the default action.
3481	*/
3482	case PGMROMPROT_READ_ROM_WRITE_IGNORE:
3483	case PGMROMPROT_READ_RAM_WRITE_IGNORE:
3484	case PGMROMPROT_READ_ROM_WRITE_RAM:
3485	case PGMROMPROT_READ_RAM_WRITE_RAM:
3486	return VINF_PGM_HANDLER_DO_DEFAULT;
3487
3488	default:
3489	AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhys=%RGp\n",
3490	pRom->aPages[iPage].enmProt, iPage, GCPhys),
3491	VERR_IPE_NOT_REACHED_DEFAULT_CASE);
3492	}
3493	}
3494	else
3495	{
3496	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
3497	switch (pRomPage->enmProt)
3498	{
3499	/*
3500	* Ignore writes.
3501	*/
3502	case PGMROMPROT_READ_ROM_WRITE_IGNORE:
3503	case PGMROMPROT_READ_RAM_WRITE_IGNORE:
3504	return VINF_SUCCESS;
3505
3506	/*
3507	* Write to the RAM page.
3508	*/
3509	case PGMROMPROT_READ_ROM_WRITE_RAM:
3510	case PGMROMPROT_READ_RAM_WRITE_RAM: /* yes this will get here too, it's way simpler that way. */
3511	{
3512	/* This should be impossible now, pvPhys doesn't work cross page anylonger. */
3513	Assert(((GCPhys - pRom->GCPhys + cbBuf - 1) >> PAGE_SHIFT) == iPage);
3514
3515	/*
3516	* Take the lock, do lazy allocation, map the page and copy the data.
3517	*
3518	* Note that we have to bypass the mapping TLB since it works on
3519	* guest physical addresses and entering the shadow page would
3520	* kind of screw things up...
3521	*/
3522	int rc = pgmLock(pVM);
3523	AssertRC(rc);
3524
3525	PPGMPAGE pShadowPage = &pRomPage->Shadow;
3526	if (!PGMROMPROT_IS_ROM(pRomPage->enmProt))
3527	{
3528	pShadowPage = pgmPhysGetPage(pVM, GCPhys);
3529	AssertLogRelReturn(pShadowPage, VERR_PGM_PHYS_PAGE_GET_IPE);
3530	}
3531
3532	void *pvDstPage;
3533	rc = pgmPhysPageMakeWritableAndMap(pVM, pShadowPage, GCPhys & X86_PTE_PG_MASK, &pvDstPage);
3534	if (RT_SUCCESS(rc))
3535	{
3536	memcpy((uint8_t *)pvDstPage + (GCPhys & PAGE_OFFSET_MASK), pvBuf, cbBuf);
3537	pRomPage->LiveSave.fWrittenTo = true;
3538	}
3539
3540	pgmUnlock(pVM);
3541	return rc;
3542	}
3543
3544	default:
3545	AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhys=%RGp\n",
3546	pRom->aPages[iPage].enmProt, iPage, GCPhys),
3547	VERR_IPE_NOT_REACHED_DEFAULT_CASE);
3548	}
3549	}
3550	}
3551
3552
3553	/**
3554	* Called by PGMR3Reset to reset the shadow, switch to the virgin,
3555	* and verify that the virgin part is untouched.
3556	*
3557	* This is done after the normal memory has been cleared.
3558	*
3559	* ASSUMES that the caller owns the PGM lock.
3560	*
3561	* @param pVM Pointer to the VM.
3562	*/
3563	int pgmR3PhysRomReset(PVM pVM)
3564	{
3565	PGM_LOCK_ASSERT_OWNER(pVM);
3566	for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3)
3567	{
3568	const uint32_t cPages = pRom->cb >> PAGE_SHIFT;
3569
3570	if (pRom->fFlags & PGMPHYS_ROM_FLAGS_SHADOWED)
3571	{
3572	/*
3573	* Reset the physical handler.
3574	*/
3575	int rc = PGMR3PhysRomProtect(pVM, pRom->GCPhys, pRom->cb, PGMROMPROT_READ_ROM_WRITE_IGNORE);
3576	AssertRCReturn(rc, rc);
3577
3578	/*
3579	* What we do with the shadow pages depends on the memory
3580	* preallocation option. If not enabled, we'll just throw
3581	* out all the dirty pages and replace them by the zero page.
3582	*/
3583	if (!pVM->pgm.s.fRamPreAlloc)
3584	{
3585	/* Free the dirty pages. */
3586	uint32_t cPendingPages = 0;
3587	PGMMFREEPAGESREQ pReq;
3588	rc = GMMR3FreePagesPrepare(pVM, &pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
3589	AssertRCReturn(rc, rc);
3590
3591	for (uint32_t iPage = 0; iPage < cPages; iPage++)
3592	if ( !PGM_PAGE_IS_ZERO(&pRom->aPages[iPage].Shadow)
3593	&& !PGM_PAGE_IS_BALLOONED(&pRom->aPages[iPage].Shadow))
3594	{
3595	Assert(PGM_PAGE_GET_STATE(&pRom->aPages[iPage].Shadow) == PGM_PAGE_STATE_ALLOCATED);
3596	rc = pgmPhysFreePage(pVM, pReq, &cPendingPages, &pRom->aPages[iPage].Shadow,
3597	pRom->GCPhys + (iPage << PAGE_SHIFT));
3598	AssertLogRelRCReturn(rc, rc);
3599	}
3600
3601	if (cPendingPages)
3602	{
3603	rc = GMMR3FreePagesPerform(pVM, pReq, cPendingPages);
3604	AssertLogRelRCReturn(rc, rc);
3605	}
3606	GMMR3FreePagesCleanup(pReq);
3607	}
3608	else
3609	{
3610	/* clear all the shadow pages. */
3611	for (uint32_t iPage = 0; iPage < cPages; iPage++)
3612	{
3613	if (PGM_PAGE_IS_ZERO(&pRom->aPages[iPage].Shadow))
3614	continue;
3615	Assert(!PGM_PAGE_IS_BALLOONED(&pRom->aPages[iPage].Shadow));
3616	void *pvDstPage;
3617	const RTGCPHYS GCPhys = pRom->GCPhys + (iPage << PAGE_SHIFT);
3618	rc = pgmPhysPageMakeWritableAndMap(pVM, &pRom->aPages[iPage].Shadow, GCPhys, &pvDstPage);
3619	if (RT_FAILURE(rc))
3620	break;
3621	ASMMemZeroPage(pvDstPage);
3622	}
3623	AssertRCReturn(rc, rc);
3624	}
3625	}
3626
3627	#ifdef VBOX_STRICT
3628	/*
3629	* Verify that the virgin page is unchanged if possible.
3630	*/
3631	if (pRom->pvOriginal)
3632	{
3633	size_t cbSrcLeft = pRom->cbOriginal;
3634	uint8_t const pbSrcPage = (uint8_t const )pRom->pvOriginal;
3635	for (uint32_t iPage = 0; iPage < cPages && cbSrcLeft > 0; iPage++, pbSrcPage += PAGE_SIZE)
3636	{
3637	const RTGCPHYS GCPhys = pRom->GCPhys + (iPage << PAGE_SHIFT);
3638	void const *pvDstPage;
3639	int rc = pgmPhysPageMapReadOnly(pVM, &pRom->aPages[iPage].Virgin, GCPhys, &pvDstPage);
3640	if (RT_FAILURE(rc))
3641	break;
3642
3643	if (memcmp(pvDstPage, pbSrcPage, RT_MIN(cbSrcLeft, PAGE_SIZE)))
3644	LogRel(("pgmR3PhysRomReset: %RGp rom page changed (%s) - loaded saved state?\n",
3645	GCPhys, pRom->pszDesc));
3646	cbSrcLeft -= RT_MIN(cbSrcLeft, PAGE_SIZE);
3647	}
3648	}
3649	#endif
3650	}
3651
3652	return VINF_SUCCESS;
3653	}
3654
3655
3656	/**
3657	* Called by PGMR3Term to free resources.
3658	*
3659	* ASSUMES that the caller owns the PGM lock.
3660	*
3661	* @param pVM Pointer to the VM.
3662	*/
3663	void pgmR3PhysRomTerm(PVM pVM)
3664	{
3665	#ifdef RT_STRICT
3666	/*
3667	* Free the heap copy of the original bits.
3668	*/
3669	for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3)
3670	{
3671	if ( pRom->pvOriginal
3672	&& !(pRom->fFlags & PGMPHYS_ROM_FLAGS_PERMANENT_BINARY))
3673	{
3674	RTMemFree((void *)pRom->pvOriginal);
3675	pRom->pvOriginal = NULL;
3676	}
3677	}
3678	#endif
3679	}
3680
3681
3682	/**
3683	* Change the shadowing of a range of ROM pages.
3684	*
3685	* This is intended for implementing chipset specific memory registers
3686	* and will not be very strict about the input. It will silently ignore
3687	* any pages that are not the part of a shadowed ROM.
3688	*
3689	* @returns VBox status code.
3690	* @retval VINF_PGM_SYNC_CR3
3691	*
3692	* @param pVM Pointer to the VM.
3693	* @param GCPhys Where to start. Page aligned.
3694	* @param cb How much to change. Page aligned.
3695	* @param enmProt The new ROM protection.
3696	*/
3697	VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt)
3698	{
3699	/*
3700	* Check input
3701	*/
3702	if (!cb)
3703	return VINF_SUCCESS;
3704	AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
3705	AssertReturn(!(cb & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
3706	RTGCPHYS GCPhysLast = GCPhys + (cb - 1);
3707	AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);
3708	AssertReturn(enmProt >= PGMROMPROT_INVALID && enmProt <= PGMROMPROT_END, VERR_INVALID_PARAMETER);
3709
3710	/*
3711	* Process the request.
3712	*/
3713	pgmLock(pVM);
3714	int rc = VINF_SUCCESS;
3715	bool fFlushTLB = false;
3716	for (PPGMROMRANGE pRom = pVM->pgm.s.pRomRangesR3; pRom; pRom = pRom->pNextR3)
3717	{
3718	if ( GCPhys <= pRom->GCPhysLast
3719	&& GCPhysLast >= pRom->GCPhys
3720	&& (pRom->fFlags & PGMPHYS_ROM_FLAGS_SHADOWED))
3721	{
3722	/*
3723	* Iterate the relevant pages and make necessary the changes.
3724	*/
3725	bool fChanges = false;
3726	uint32_t const cPages = pRom->GCPhysLast <= GCPhysLast
3727	? pRom->cb >> PAGE_SHIFT
3728	: (GCPhysLast - pRom->GCPhys + 1) >> PAGE_SHIFT;
3729	for (uint32_t iPage = (GCPhys - pRom->GCPhys) >> PAGE_SHIFT;
3730	iPage < cPages;
3731	iPage++)
3732	{
3733	PPGMROMPAGE pRomPage = &pRom->aPages[iPage];
3734	if (PGMROMPROT_IS_ROM(pRomPage->enmProt) != PGMROMPROT_IS_ROM(enmProt))
3735	{
3736	fChanges = true;
3737
3738	/* flush references to the page. */
3739	PPGMPAGE pRamPage = pgmPhysGetPage(pVM, pRom->GCPhys + (iPage << PAGE_SHIFT));
3740	int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRom->GCPhys + (iPage << PAGE_SHIFT), pRamPage,
3741	true /fFlushPTEs/, &fFlushTLB);
3742	if (rc2 != VINF_SUCCESS && (rc == VINF_SUCCESS \|\| RT_FAILURE(rc2)))
3743	rc = rc2;
3744
3745	PPGMPAGE pOld = PGMROMPROT_IS_ROM(pRomPage->enmProt) ? &pRomPage->Virgin : &pRomPage->Shadow;
3746	PPGMPAGE pNew = PGMROMPROT_IS_ROM(pRomPage->enmProt) ? &pRomPage->Shadow : &pRomPage->Virgin;
3747
3748	pOld = pRamPage;
3749	pRamPage = pNew;
3750	/** @todo preserve the volatile flags (handlers) when these have been moved out of HCPhys! */
3751	}
3752	pRomPage->enmProt = enmProt;
3753	}
3754
3755	/*
3756	* Reset the access handler if we made changes, no need
3757	* to optimize this.
3758	*/
3759	if (fChanges)
3760	{
3761	int rc2 = PGMHandlerPhysicalReset(pVM, pRom->GCPhys);
3762	if (RT_FAILURE(rc2))
3763	{
3764	pgmUnlock(pVM);
3765	AssertRC(rc);
3766	return rc2;
3767	}
3768	}
3769
3770	/* Advance - cb isn't updated. */
3771	GCPhys = pRom->GCPhys + (cPages << PAGE_SHIFT);
3772	}
3773	}
3774	pgmUnlock(pVM);
3775	if (fFlushTLB)
3776	PGM_INVL_ALL_VCPU_TLBS(pVM);
3777
3778	return rc;
3779	}
3780
3781
3782	/**
3783	* Sets the Address Gate 20 state.
3784	*
3785	* @param pVCpu Pointer to the VMCPU.
3786	* @param fEnable True if the gate should be enabled.
3787	* False if the gate should be disabled.
3788	*/
3789	VMMDECL(void) PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable)
3790	{
3791	LogFlow(("PGMR3PhysSetA20 %d (was %d)\n", fEnable, pVCpu->pgm.s.fA20Enabled));
3792	if (pVCpu->pgm.s.fA20Enabled != fEnable)
3793	{
3794	pVCpu->pgm.s.fA20Enabled = fEnable;
3795	pVCpu->pgm.s.GCPhysA20Mask = ~(RTGCPHYS)(!fEnable << 20);
3796	#ifdef VBOX_WITH_REM
3797	REMR3A20Set(pVCpu->pVMR3, pVCpu, fEnable);
3798	#endif
3799	#ifdef PGM_WITH_A20
3800	pVCpu->pgm.s.fSyncFlags \|= PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL;
3801	VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
3802	pgmR3RefreshShadowModeAfterA20Change(pVCpu);
3803	HMFlushTLB(pVCpu);
3804	#endif
3805	STAM_REL_COUNTER_INC(&pVCpu->pgm.s.cA20Changes);
3806	}
3807	}
3808
3809
3810	/**
3811	* Tree enumeration callback for dealing with age rollover.
3812	* It will perform a simple compression of the current age.
3813	*/
3814	static DECLCALLBACK(int) pgmR3PhysChunkAgeingRolloverCallback(PAVLU32NODECORE pNode, void *pvUser)
3815	{
3816	/* Age compression - ASSUMES iNow == 4. */
3817	PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)pNode;
3818	if (pChunk->iLastUsed >= UINT32_C(0xffffff00))
3819	pChunk->iLastUsed = 3;
3820	else if (pChunk->iLastUsed >= UINT32_C(0xfffff000))
3821	pChunk->iLastUsed = 2;
3822	else if (pChunk->iLastUsed)
3823	pChunk->iLastUsed = 1;
3824	else /* iLastUsed = 0 */
3825	pChunk->iLastUsed = 4;
3826
3827	NOREF(pvUser);
3828	return 0;
3829	}
3830
3831
3832	/**
3833	* The structure passed in the pvUser argument of pgmR3PhysChunkUnmapCandidateCallback().
3834	*/
3835	typedef struct PGMR3PHYSCHUNKUNMAPCB
3836	{
3837	PVM pVM; /*< Pointer to the VM. /
3838	PPGMCHUNKR3MAP pChunk; /*< The chunk to unmap. /
3839	} PGMR3PHYSCHUNKUNMAPCB, *PPGMR3PHYSCHUNKUNMAPCB;
3840
3841
3842	/**
3843	* Callback used to find the mapping that's been unused for
3844	* the longest time.
3845	*/
3846	static DECLCALLBACK(int) pgmR3PhysChunkUnmapCandidateCallback(PAVLU32NODECORE pNode, void *pvUser)
3847	{
3848	PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)pNode;
3849	PPGMR3PHYSCHUNKUNMAPCB pArg = (PPGMR3PHYSCHUNKUNMAPCB)pvUser;
3850
3851	/*
3852	* Check for locks and compare when last used.
3853	*/
3854	if (pChunk->cRefs)
3855	return 0;
3856	if (pChunk->cPermRefs)
3857	return 0;
3858	if ( pArg->pChunk
3859	&& pChunk->iLastUsed >= pArg->pChunk->iLastUsed)
3860	return 0;
3861
3862	/*
3863	* Check that it's not in any of the TLBs.
3864	*/
3865	PVM pVM = pArg->pVM;
3866	if ( pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(pChunk->Core.Key)].idChunk
3867	== pChunk->Core.Key)
3868	{
3869	pChunk = NULL;
3870	return 0;
3871	}
3872	#ifdef VBOX_STRICT
3873	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.ChunkR3Map.Tlb.aEntries); i++)
3874	{
3875	Assert(pVM->pgm.s.ChunkR3Map.Tlb.aEntries[i].pChunk != pChunk);
3876	Assert(pVM->pgm.s.ChunkR3Map.Tlb.aEntries[i].idChunk != pChunk->Core.Key);
3877	}
3878	#endif
3879
3880	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
3881	if (pVM->pgm.s.PhysTlbHC.aEntries[i].pMap == pChunk)
3882	return 0;
3883
3884	pArg->pChunk = pChunk;
3885	return 0;
3886	}
3887
3888
3889	/**
3890	* Finds a good candidate for unmapping when the ring-3 mapping cache is full.
3891	*
3892	* The candidate will not be part of any TLBs, so no need to flush
3893	* anything afterwards.
3894	*
3895	* @returns Chunk id.
3896	* @param pVM Pointer to the VM.
3897	*/
3898	static int32_t pgmR3PhysChunkFindUnmapCandidate(PVM pVM)
3899	{
3900	PGM_LOCK_ASSERT_OWNER(pVM);
3901
3902	/*
3903	* Enumerate the age tree starting with the left most node.
3904	*/
3905	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkFindCandidate, a);
3906	PGMR3PHYSCHUNKUNMAPCB Args;
3907	Args.pVM = pVM;
3908	Args.pChunk = NULL;
3909	RTAvlU32DoWithAll(&pVM->pgm.s.ChunkR3Map.pTree, true /fFromLeft/, pgmR3PhysChunkUnmapCandidateCallback, &Args);
3910	Assert(Args.pChunk);
3911	if (Args.pChunk)
3912	{
3913	Assert(Args.pChunk->cRefs == 0);
3914	Assert(Args.pChunk->cPermRefs == 0);
3915	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkFindCandidate, a);
3916	return Args.pChunk->Core.Key;
3917	}
3918
3919	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkFindCandidate, a);
3920	return INT32_MAX;
3921	}
3922
3923
3924	/**
3925	* Rendezvous callback used by pgmR3PhysUnmapChunk that unmaps a chunk
3926	*
3927	* This is only called on one of the EMTs while the other ones are waiting for
3928	* it to complete this function.
3929	*
3930	* @returns VINF_SUCCESS (VBox strict status code).
3931	* @param pVM Pointer to the VM.
3932	* @param pVCpu The VMCPU for the EMT we're being called on. Unused.
3933	* @param pvUser User pointer. Unused
3934	*
3935	*/
3936	static DECLCALLBACK(VBOXSTRICTRC) pgmR3PhysUnmapChunkRendezvous(PVM pVM, PVMCPU pVCpu, void *pvUser)
3937	{
3938	int rc = VINF_SUCCESS;
3939	pgmLock(pVM);
3940	NOREF(pVCpu); NOREF(pvUser);
3941
3942	if (pVM->pgm.s.ChunkR3Map.c >= pVM->pgm.s.ChunkR3Map.cMax)
3943	{
3944	/* Flush the pgm pool cache; call the internal rendezvous handler as we're already in a rendezvous handler here. */
3945	/** @todo also not really efficient to unmap a chunk that contains PD
3946	* or PT pages. */
3947	pgmR3PoolClearAllRendezvous(pVM, &pVM->aCpus[0], NULL /* no need to flush the REM TLB as we already did that above */);
3948
3949	/*
3950	* Request the ring-0 part to unmap a chunk to make space in the mapping cache.
3951	*/
3952	GMMMAPUNMAPCHUNKREQ Req;
3953	Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
3954	Req.Hdr.cbReq = sizeof(Req);
3955	Req.pvR3 = NULL;
3956	Req.idChunkMap = NIL_GMM_CHUNKID;
3957	Req.idChunkUnmap = pgmR3PhysChunkFindUnmapCandidate(pVM);
3958	if (Req.idChunkUnmap != INT32_MAX)
3959	{
3960	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkUnmap, a);
3961	rc = VMMR3CallR0(pVM, VMMR0_DO_GMM_MAP_UNMAP_CHUNK, 0, &Req.Hdr);
3962	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkUnmap, a);
3963	if (RT_SUCCESS(rc))
3964	{
3965	/*
3966	* Remove the unmapped one.
3967	*/
3968	PPGMCHUNKR3MAP pUnmappedChunk = (PPGMCHUNKR3MAP)RTAvlU32Remove(&pVM->pgm.s.ChunkR3Map.pTree, Req.idChunkUnmap);
3969	AssertRelease(pUnmappedChunk);
3970	AssertRelease(!pUnmappedChunk->cRefs);
3971	AssertRelease(!pUnmappedChunk->cPermRefs);
3972	pUnmappedChunk->pv = NULL;
3973	pUnmappedChunk->Core.Key = UINT32_MAX;
3974	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
3975	MMR3HeapFree(pUnmappedChunk);
3976	#else
3977	MMR3UkHeapFree(pVM, pUnmappedChunk, MM_TAG_PGM_CHUNK_MAPPING);
3978	#endif
3979	pVM->pgm.s.ChunkR3Map.c--;
3980	pVM->pgm.s.cUnmappedChunks++;
3981
3982	/*
3983	* Flush dangling PGM pointers (R3 & R0 ptrs to GC physical addresses).
3984	*/
3985	/** todo: we should not flush chunks which include cr3 mappings. */
3986	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
3987	{
3988	PPGMCPU pPGM = &pVM->aCpus[idCpu].pgm.s;
3989
3990	pPGM->pGst32BitPdR3 = NULL;
3991	pPGM->pGstPaePdptR3 = NULL;
3992	pPGM->pGstAmd64Pml4R3 = NULL;
3993	#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
3994	pPGM->pGst32BitPdR0 = NIL_RTR0PTR;
3995	pPGM->pGstPaePdptR0 = NIL_RTR0PTR;
3996	pPGM->pGstAmd64Pml4R0 = NIL_RTR0PTR;
3997	#endif
3998	for (unsigned i = 0; i < RT_ELEMENTS(pPGM->apGstPaePDsR3); i++)
3999	{
4000	pPGM->apGstPaePDsR3[i] = NULL;
4001	#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
4002	pPGM->apGstPaePDsR0[i] = NIL_RTR0PTR;
4003	#endif
4004	}
4005
4006	/* Flush REM TLBs. */
4007	CPUMSetChangedFlags(&pVM->aCpus[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
4008	}
4009	#ifdef VBOX_WITH_REM
4010	/* Flush REM translation blocks. */
4011	REMFlushTBs(pVM);
4012	#endif
4013	}
4014	}
4015	}
4016	pgmUnlock(pVM);
4017	return rc;
4018	}
4019
4020	/**
4021	* Unmap a chunk to free up virtual address space (request packet handler for pgmR3PhysChunkMap)
4022	*
4023	* @returns VBox status code.
4024	* @param pVM Pointer to the VM.
4025	*/
4026	void pgmR3PhysUnmapChunk(PVM pVM)
4027	{
4028	int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PhysUnmapChunkRendezvous, NULL);
4029	AssertRC(rc);
4030	}
4031
4032
4033	/**
4034	* Maps the given chunk into the ring-3 mapping cache.
4035	*
4036	* This will call ring-0.
4037	*
4038	* @returns VBox status code.
4039	* @param pVM Pointer to the VM.
4040	* @param idChunk The chunk in question.
4041	* @param ppChunk Where to store the chunk tracking structure.
4042	*
4043	* @remarks Called from within the PGM critical section.
4044	* @remarks Can be called from any thread!
4045	*/
4046	int pgmR3PhysChunkMap(PVM pVM, uint32_t idChunk, PPPGMCHUNKR3MAP ppChunk)
4047	{
4048	int rc;
4049
4050	PGM_LOCK_ASSERT_OWNER(pVM);
4051
4052	/*
4053	* Move the chunk time forward.
4054	*/
4055	pVM->pgm.s.ChunkR3Map.iNow++;
4056	if (pVM->pgm.s.ChunkR3Map.iNow == 0)
4057	{
4058	pVM->pgm.s.ChunkR3Map.iNow = 4;
4059	RTAvlU32DoWithAll(&pVM->pgm.s.ChunkR3Map.pTree, true /fFromLeft/, pgmR3PhysChunkAgeingRolloverCallback, NULL);
4060	}
4061
4062	/*
4063	* Allocate a new tracking structure first.
4064	*/
4065	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
4066	PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)MMR3HeapAllocZ(pVM, MM_TAG_PGM_CHUNK_MAPPING, sizeof(*pChunk));
4067	#else
4068	PPGMCHUNKR3MAP pChunk = (PPGMCHUNKR3MAP)MMR3UkHeapAllocZ(pVM, MM_TAG_PGM_CHUNK_MAPPING, sizeof(*pChunk), NULL);
4069	#endif
4070	AssertReturn(pChunk, VERR_NO_MEMORY);
4071	pChunk->Core.Key = idChunk;
4072	pChunk->iLastUsed = pVM->pgm.s.ChunkR3Map.iNow;
4073
4074	/*
4075	* Request the ring-0 part to map the chunk in question.
4076	*/
4077	GMMMAPUNMAPCHUNKREQ Req;
4078	Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
4079	Req.Hdr.cbReq = sizeof(Req);
4080	Req.pvR3 = NULL;
4081	Req.idChunkMap = idChunk;
4082	Req.idChunkUnmap = NIL_GMM_CHUNKID;
4083
4084	/* Must be callable from any thread, so can't use VMMR3CallR0. */
4085	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkMap, a);
4086	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_GMM_MAP_UNMAP_CHUNK, 0, &Req.Hdr);
4087	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatChunkMap, a);
4088	if (RT_SUCCESS(rc))
4089	{
4090	pChunk->pv = Req.pvR3;
4091
4092	/*
4093	* If we're running out of virtual address space, then we should
4094	* unmap another chunk.
4095	*
4096	* Currently, an unmap operation requires that all other virtual CPUs
4097	* are idling and not by chance making use of the memory we're
4098	* unmapping. So, we create an async unmap operation here.
4099	*
4100	* Now, when creating or restoring a saved state this wont work very
4101	* well since we may want to restore all guest RAM + a little something.
4102	* So, we have to do the unmap synchronously. Fortunately for us
4103	* though, during these operations the other virtual CPUs are inactive
4104	* and it should be safe to do this.
4105	*/
4106	/** @todo Eventually we should lock all memory when used and do
4107	* map+unmap as one kernel call without any rendezvous or
4108	* other precautions. */
4109	if (pVM->pgm.s.ChunkR3Map.c + 1 >= pVM->pgm.s.ChunkR3Map.cMax)
4110	{
4111	switch (VMR3GetState(pVM))
4112	{
4113	case VMSTATE_LOADING:
4114	case VMSTATE_SAVING:
4115	{
4116	PVMCPU pVCpu = VMMGetCpu(pVM);
4117	if ( pVCpu
4118	&& pVM->pgm.s.cDeprecatedPageLocks == 0)
4119	{
4120	pgmR3PhysUnmapChunkRendezvous(pVM, pVCpu, NULL);
4121	break;
4122	}
4123	/* fall thru */
4124	}
4125	default:
4126	rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pgmR3PhysUnmapChunk, 1, pVM);
4127	AssertRC(rc);
4128	break;
4129	}
4130	}
4131
4132	/*
4133	* Update the tree. We must do this after any unmapping to make sure
4134	* the chunk we're going to return isn't unmapped by accident.
4135	*/
4136	AssertPtr(Req.pvR3);
4137	bool fRc = RTAvlU32Insert(&pVM->pgm.s.ChunkR3Map.pTree, &pChunk->Core);
4138	AssertRelease(fRc);
4139	pVM->pgm.s.ChunkR3Map.c++;
4140	pVM->pgm.s.cMappedChunks++;
4141	}
4142	else
4143	{
4144	/** @todo this may fail because of /proc/sys/vm/max_map_count, so we
4145	* should probably restrict ourselves on linux. */
4146	AssertRC(rc);
4147	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
4148	MMR3HeapFree(pChunk);
4149	#else
4150	MMR3UkHeapFree(pVM, pChunk, MM_TAG_PGM_CHUNK_MAPPING);
4151	#endif
4152	pChunk = NULL;
4153	}
4154
4155	*ppChunk = pChunk;
4156	return rc;
4157	}
4158
4159
4160	/**
4161	* For VMMCALLRING3_PGM_MAP_CHUNK, considered internal.
4162	*
4163	* @returns see pgmR3PhysChunkMap.
4164	* @param pVM Pointer to the VM.
4165	* @param idChunk The chunk to map.
4166	*/
4167	VMMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk)
4168	{
4169	PPGMCHUNKR3MAP pChunk;
4170	int rc;
4171
4172	pgmLock(pVM);
4173	rc = pgmR3PhysChunkMap(pVM, idChunk, &pChunk);
4174	pgmUnlock(pVM);
4175	return rc;
4176	}
4177
4178
4179	/**
4180	* Invalidates the TLB for the ring-3 mapping cache.
4181	*
4182	* @param pVM Pointer to the VM.
4183	*/
4184	VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM)
4185	{
4186	pgmLock(pVM);
4187	for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.ChunkR3Map.Tlb.aEntries); i++)
4188	{
4189	pVM->pgm.s.ChunkR3Map.Tlb.aEntries[i].idChunk = NIL_GMM_CHUNKID;
4190	pVM->pgm.s.ChunkR3Map.Tlb.aEntries[i].pChunk = NULL;
4191	}
4192	/* The page map TLB references chunks, so invalidate that one too. */
4193	pgmPhysInvalidatePageMapTLB(pVM);
4194	pgmUnlock(pVM);
4195	}
4196
4197
4198	/**
4199	* Response to VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE to allocate a large
4200	* (2MB) page for use with a nested paging PDE.
4201	*
4202	* @returns The following VBox status codes.
4203	* @retval VINF_SUCCESS on success.
4204	* @retval VINF_EM_NO_MEMORY if we're out of memory.
4205	*
4206	* @param pVM Pointer to the VM.
4207	* @param GCPhys GC physical start address of the 2 MB range
4208	*/
4209	VMMR3DECL(int) PGMR3PhysAllocateLargeHandyPage(PVM pVM, RTGCPHYS GCPhys)
4210	{
4211	#ifdef PGM_WITH_LARGE_PAGES
4212	uint64_t u64TimeStamp1, u64TimeStamp2;
4213
4214	pgmLock(pVM);
4215
4216	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatAllocLargePage, a);
4217	u64TimeStamp1 = RTTimeMilliTS();
4218	int rc = VMMR3CallR0(pVM, VMMR0_DO_PGM_ALLOCATE_LARGE_HANDY_PAGE, 0, NULL);
4219	u64TimeStamp2 = RTTimeMilliTS();
4220	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatAllocLargePage, a);
4221	if (RT_SUCCESS(rc))
4222	{
4223	Assert(pVM->pgm.s.cLargeHandyPages == 1);
4224
4225	uint32_t idPage = pVM->pgm.s.aLargeHandyPage[0].idPage;
4226	RTHCPHYS HCPhys = pVM->pgm.s.aLargeHandyPage[0].HCPhysGCPhys;
4227
4228	void *pv;
4229
4230	/* Map the large page into our address space.
4231	*
4232	* Note: assuming that within the 2 MB range:
4233	* - GCPhys + PAGE_SIZE = HCPhys + PAGE_SIZE (whole point of this exercise)
4234	* - user space mapping is continuous as well
4235	* - page id (GCPhys) + 1 = page id (GCPhys + PAGE_SIZE)
4236	*/
4237	rc = pgmPhysPageMapByPageID(pVM, idPage, HCPhys, &pv);
4238	AssertLogRelMsg(RT_SUCCESS(rc), ("idPage=%#x HCPhysGCPhys=%RHp rc=%Rrc\n", idPage, HCPhys, rc));
4239
4240	if (RT_SUCCESS(rc))
4241	{
4242	/*
4243	* Clear the pages.
4244	*/
4245	STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatClearLargePage, b);
4246	for (unsigned i = 0; i < _2M/PAGE_SIZE; i++)
4247	{
4248	ASMMemZeroPage(pv);
4249
4250	PPGMPAGE pPage;
4251	rc = pgmPhysGetPageEx(pVM, GCPhys, &pPage);
4252	AssertRC(rc);
4253
4254	Assert(PGM_PAGE_IS_ZERO(pPage));
4255	STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatRZPageReplaceZero);
4256	pVM->pgm.s.cZeroPages--;
4257
4258	/*
4259	* Do the PGMPAGE modifications.
4260	*/
4261	pVM->pgm.s.cPrivatePages++;
4262	PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhys);
4263	PGM_PAGE_SET_PAGEID(pVM, pPage, idPage);
4264	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
4265	PGM_PAGE_SET_PDE_TYPE(pVM, pPage, PGM_PAGE_PDE_TYPE_PDE);
4266	PGM_PAGE_SET_PTE_INDEX(pVM, pPage, 0);
4267	PGM_PAGE_SET_TRACKING(pVM, pPage, 0);
4268
4269	/* Somewhat dirty assumption that page ids are increasing. */
4270	idPage++;
4271
4272	HCPhys += PAGE_SIZE;
4273	GCPhys += PAGE_SIZE;
4274
4275	pv = (void *)((uintptr_t)pv + PAGE_SIZE);
4276
4277	Log3(("PGMR3PhysAllocateLargePage: idPage=%#x HCPhys=%RGp\n", idPage, HCPhys));
4278	}
4279	STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatClearLargePage, b);
4280
4281	/* Flush all TLBs. */
4282	PGM_INVL_ALL_VCPU_TLBS(pVM);
4283	pgmPhysInvalidatePageMapTLB(pVM);
4284	}
4285	pVM->pgm.s.cLargeHandyPages = 0;
4286	}
4287
4288	if (RT_SUCCESS(rc))
4289	{
4290	static uint32_t cTimeOut = 0;
4291	uint64_t u64TimeStampDelta = u64TimeStamp2 - u64TimeStamp1;
4292
4293	if (u64TimeStampDelta > 100)
4294	{
4295	STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatLargePageOverflow);
4296	if ( ++cTimeOut > 10
4297	\|\| u64TimeStampDelta > 1000 /* more than one second forces an early retirement from allocating large pages. */)
4298	{
4299	/* If repeated attempts to allocate a large page takes more than 100 ms, then we fall back to normal 4k pages.
4300	* E.g. Vista 64 tries to move memory around, which takes a huge amount of time.
4301	*/
4302	LogRel(("PGMR3PhysAllocateLargePage: allocating large pages takes too long (last attempt %d ms; nr of timeouts %d); DISABLE\n", u64TimeStampDelta, cTimeOut));
4303	PGMSetLargePageUsage(pVM, false);
4304	}
4305	}
4306	else
4307	if (cTimeOut > 0)
4308	cTimeOut--;
4309	}
4310
4311	pgmUnlock(pVM);
4312	return rc;
4313	#else
4314	return VERR_NOT_IMPLEMENTED;
4315	#endif /* PGM_WITH_LARGE_PAGES */
4316	}
4317
4318
4319	/**
4320	* Response to VM_FF_PGM_NEED_HANDY_PAGES and VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES.
4321	*
4322	* This function will also work the VM_FF_PGM_NO_MEMORY force action flag, to
4323	* signal and clear the out of memory condition. When contracted, this API is
4324	* used to try clear the condition when the user wants to resume.
4325	*
4326	* @returns The following VBox status codes.
4327	* @retval VINF_SUCCESS on success. FFs cleared.
4328	* @retval VINF_EM_NO_MEMORY if we're out of memory. The FF is not cleared in
4329	* this case and it gets accompanied by VM_FF_PGM_NO_MEMORY.
4330	*
4331	* @param pVM Pointer to the VM.
4332	*
4333	* @remarks The VINF_EM_NO_MEMORY status is for the benefit of the FF processing
4334	* in EM.cpp and shouldn't be propagated outside TRPM, HM, EM and
4335	* pgmPhysEnsureHandyPage. There is one exception to this in the \#PF
4336	* handler.
4337	*/
4338	VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM)
4339	{
4340	pgmLock(pVM);
4341
4342	/*
4343	* Allocate more pages, noting down the index of the first new page.
4344	*/
4345	uint32_t iClear = pVM->pgm.s.cHandyPages;
4346	AssertMsgReturn(iClear <= RT_ELEMENTS(pVM->pgm.s.aHandyPages), ("%d", iClear), VERR_PGM_HANDY_PAGE_IPE);
4347	Log(("PGMR3PhysAllocateHandyPages: %d -> %d\n", iClear, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
4348	int rcAlloc = VINF_SUCCESS;
4349	int rcSeed = VINF_SUCCESS;
4350	int rc = VMMR3CallR0(pVM, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);
4351	while (rc == VERR_GMM_SEED_ME)
4352	{
4353	void *pvChunk;
4354	rcAlloc = rc = SUPR3PageAlloc(GMM_CHUNK_SIZE >> PAGE_SHIFT, &pvChunk);
4355	if (RT_SUCCESS(rc))
4356	{
4357	rcSeed = rc = VMMR3CallR0(pVM, VMMR0_DO_GMM_SEED_CHUNK, (uintptr_t)pvChunk, NULL);
4358	if (RT_FAILURE(rc))
4359	SUPR3PageFree(pvChunk, GMM_CHUNK_SIZE >> PAGE_SHIFT);
4360	}
4361	if (RT_SUCCESS(rc))
4362	rc = VMMR3CallR0(pVM, VMMR0_DO_PGM_ALLOCATE_HANDY_PAGES, 0, NULL);
4363	}
4364
4365	/* todo: we should split this up into an allocate and flush operation. sometimes you want to flush and not allocate more (which will trigger the vm account limit error) */
4366	if ( rc == VERR_GMM_HIT_VM_ACCOUNT_LIMIT
4367	&& pVM->pgm.s.cHandyPages > 0)
4368	{
4369	/* Still handy pages left, so don't panic. */
4370	rc = VINF_SUCCESS;
4371	}
4372
4373	if (RT_SUCCESS(rc))
4374	{
4375	AssertMsg(rc == VINF_SUCCESS, ("%Rrc\n", rc));
4376	Assert(pVM->pgm.s.cHandyPages > 0);
4377	VM_FF_CLEAR(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
4378	VM_FF_CLEAR(pVM, VM_FF_PGM_NO_MEMORY);
4379
4380	#ifdef VBOX_STRICT
4381	uint32_t i;
4382	for (i = iClear; i < pVM->pgm.s.cHandyPages; i++)
4383	if ( pVM->pgm.s.aHandyPages[i].idPage == NIL_GMM_PAGEID
4384	\|\| pVM->pgm.s.aHandyPages[i].idSharedPage != NIL_GMM_PAGEID
4385	\|\| (pVM->pgm.s.aHandyPages[i].HCPhysGCPhys & PAGE_OFFSET_MASK))
4386	break;
4387	if (i != pVM->pgm.s.cHandyPages)
4388	{
4389	RTAssertMsg1Weak(NULL, __LINE__, __FILE__, __FUNCTION__);
4390	RTAssertMsg2Weak("i=%d iClear=%d cHandyPages=%d\n", i, iClear, pVM->pgm.s.cHandyPages);
4391	for (uint32_t j = iClear; j < pVM->pgm.s.cHandyPages; j++)
4392	RTAssertMsg2Add(("%03d: idPage=%d HCPhysGCPhys=%RHp idSharedPage=%d%\n", j,
4393	pVM->pgm.s.aHandyPages[j].idPage,
4394	pVM->pgm.s.aHandyPages[j].HCPhysGCPhys,
4395	pVM->pgm.s.aHandyPages[j].idSharedPage,
4396	j == i ? " <---" : ""));
4397	RTAssertPanic();
4398	}
4399	#endif
4400	/*
4401	* Clear the pages.
4402	*/
4403	while (iClear < pVM->pgm.s.cHandyPages)
4404	{
4405	PGMMPAGEDESC pPage = &pVM->pgm.s.aHandyPages[iClear];
4406	void *pv;
4407	rc = pgmPhysPageMapByPageID(pVM, pPage->idPage, pPage->HCPhysGCPhys, &pv);
4408	AssertLogRelMsgBreak(RT_SUCCESS(rc),
4409	("%u/%u: idPage=%#x HCPhysGCPhys=%RHp rc=%Rrc\n",
4410	iClear, pVM->pgm.s.cHandyPages, pPage->idPage, pPage->HCPhysGCPhys, rc));
4411	ASMMemZeroPage(pv);
4412	iClear++;
4413	Log3(("PGMR3PhysAllocateHandyPages: idPage=%#x HCPhys=%RGp\n", pPage->idPage, pPage->HCPhysGCPhys));
4414	}
4415	}
4416	else
4417	{
4418	uint64_t cAllocPages, cMaxPages, cBalloonPages;
4419
4420	/*
4421	* We should never get here unless there is a genuine shortage of
4422	* memory (or some internal error). Flag the error so the VM can be
4423	* suspended ASAP and the user informed. If we're totally out of
4424	* handy pages we will return failure.
4425	*/
4426	/* Report the failure. */
4427	LogRel(("PGM: Failed to procure handy pages; rc=%Rrc rcAlloc=%Rrc rcSeed=%Rrc cHandyPages=%#x\n"
4428	" cAllPages=%#x cPrivatePages=%#x cSharedPages=%#x cZeroPages=%#x\n",
4429	rc, rcAlloc, rcSeed,
4430	pVM->pgm.s.cHandyPages,
4431	pVM->pgm.s.cAllPages,
4432	pVM->pgm.s.cPrivatePages,
4433	pVM->pgm.s.cSharedPages,
4434	pVM->pgm.s.cZeroPages));
4435
4436	if (GMMR3QueryMemoryStats(pVM, &cAllocPages, &cMaxPages, &cBalloonPages) == VINF_SUCCESS)
4437	{
4438	LogRel(("GMM: Statistics:\n"
4439	" Allocated pages: %RX64\n"
4440	" Maximum pages: %RX64\n"
4441	" Ballooned pages: %RX64\n", cAllocPages, cMaxPages, cBalloonPages));
4442	}
4443
4444	if ( rc != VERR_NO_MEMORY
4445	&& rc != VERR_NO_PHYS_MEMORY
4446	&& rc != VERR_LOCK_FAILED)
4447	{
4448	for (uint32_t i = 0; i < RT_ELEMENTS(pVM->pgm.s.aHandyPages); i++)
4449	{
4450	LogRel(("PGM: aHandyPages[#%#04x] = {.HCPhysGCPhys=%RHp, .idPage=%#08x, .idSharedPage=%#08x}\n",
4451	i, pVM->pgm.s.aHandyPages[i].HCPhysGCPhys, pVM->pgm.s.aHandyPages[i].idPage,
4452	pVM->pgm.s.aHandyPages[i].idSharedPage));
4453	uint32_t const idPage = pVM->pgm.s.aHandyPages[i].idPage;
4454	if (idPage != NIL_GMM_PAGEID)
4455	{
4456	for (PPGMRAMRANGE pRam = pVM->pgm.s.pRamRangesXR3;
4457	pRam;
4458	pRam = pRam->pNextR3)
4459	{
4460	uint32_t const cPages = pRam->cb >> PAGE_SHIFT;
4461	for (uint32_t iPage = 0; iPage < cPages; iPage++)
4462	if (PGM_PAGE_GET_PAGEID(&pRam->aPages[iPage]) == idPage)
4463	LogRel(("PGM: Used by %RGp %R[pgmpage] (%s)\n",
4464	pRam->GCPhys + ((RTGCPHYS)iPage << PAGE_SHIFT), &pRam->aPages[iPage], pRam->pszDesc));
4465	}
4466	}
4467	}
4468	}
4469
4470	/* Set the FFs and adjust rc. */
4471	VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
4472	VM_FF_SET(pVM, VM_FF_PGM_NO_MEMORY);
4473	if ( rc == VERR_NO_MEMORY
4474	\|\| rc == VERR_NO_PHYS_MEMORY
4475	\|\| rc == VERR_LOCK_FAILED)
4476	rc = VINF_EM_NO_MEMORY;
4477	}
4478
4479	pgmUnlock(pVM);
4480	return rc;
4481	}
4482
4483
4484	/**
4485	* Frees the specified RAM page and replaces it with the ZERO page.
4486	*
4487	* This is used by ballooning, remapping MMIO2, RAM reset and state loading.
4488	*
4489	* @param pVM Pointer to the VM.
4490	* @param pReq Pointer to the request.
4491	* @param pcPendingPages Where the number of pages waiting to be freed are
4492	* kept. This will normally be incremented.
4493	* @param pPage Pointer to the page structure.
4494	* @param GCPhys The guest physical address of the page, if applicable.
4495	*
4496	* @remarks The caller must own the PGM lock.
4497	*/
4498	int pgmPhysFreePage(PVM pVM, PGMMFREEPAGESREQ pReq, uint32_t *pcPendingPages, PPGMPAGE pPage, RTGCPHYS GCPhys)
4499	{
4500	/*
4501	* Assert sanity.
4502	*/
4503	PGM_LOCK_ASSERT_OWNER(pVM);
4504	if (RT_UNLIKELY( PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_RAM
4505	&& PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW))
4506	{
4507	AssertMsgFailed(("GCPhys=%RGp pPage=%R[pgmpage]\n", GCPhys, pPage));
4508	return VMSetError(pVM, VERR_PGM_PHYS_NOT_RAM, RT_SRC_POS, "GCPhys=%RGp type=%d", GCPhys, PGM_PAGE_GET_TYPE(pPage));
4509	}
4510
4511	/** @todo What about ballooning of large pages??! */
4512	Assert( PGM_PAGE_GET_PDE_TYPE(pPage) != PGM_PAGE_PDE_TYPE_PDE
4513	&& PGM_PAGE_GET_PDE_TYPE(pPage) != PGM_PAGE_PDE_TYPE_PDE_DISABLED);
4514
4515	if ( PGM_PAGE_IS_ZERO(pPage)
4516	\|\| PGM_PAGE_IS_BALLOONED(pPage))
4517	return VINF_SUCCESS;
4518
4519	const uint32_t idPage = PGM_PAGE_GET_PAGEID(pPage);
4520	Log3(("pgmPhysFreePage: idPage=%#x GCPhys=%RGp pPage=%R[pgmpage]\n", idPage, GCPhys, pPage));
4521	if (RT_UNLIKELY( idPage == NIL_GMM_PAGEID
4522	\|\| idPage > GMM_PAGEID_LAST
4523	\|\| PGM_PAGE_GET_CHUNKID(pPage) == NIL_GMM_CHUNKID))
4524	{
4525	AssertMsgFailed(("GCPhys=%RGp pPage=%R[pgmpage]\n", GCPhys, pPage));
4526	return VMSetError(pVM, VERR_PGM_PHYS_INVALID_PAGE_ID, RT_SRC_POS, "GCPhys=%RGp idPage=%#x", GCPhys, pPage);
4527	}
4528
4529	/* update page count stats. */
4530	if (PGM_PAGE_IS_SHARED(pPage))
4531	pVM->pgm.s.cSharedPages--;
4532	else
4533	pVM->pgm.s.cPrivatePages--;
4534	pVM->pgm.s.cZeroPages++;
4535
4536	/* Deal with write monitored pages. */
4537	if (PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_WRITE_MONITORED)
4538	{
4539	PGM_PAGE_SET_WRITTEN_TO(pVM, pPage);
4540	pVM->pgm.s.cWrittenToPages++;
4541	}
4542
4543	/*
4544	* pPage = ZERO page.
4545	*/
4546	PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
4547	PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
4548	PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
4549	PGM_PAGE_SET_PDE_TYPE(pVM, pPage, PGM_PAGE_PDE_TYPE_DONTCARE);
4550	PGM_PAGE_SET_PTE_INDEX(pVM, pPage, 0);
4551	PGM_PAGE_SET_TRACKING(pVM, pPage, 0);
4552
4553	/* Flush physical page map TLB entry. */
4554	pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhys);
4555
4556	/*
4557	* Make sure it's not in the handy page array.
4558	*/
4559	for (uint32_t i = pVM->pgm.s.cHandyPages; i < RT_ELEMENTS(pVM->pgm.s.aHandyPages); i++)
4560	{
4561	if (pVM->pgm.s.aHandyPages[i].idPage == idPage)
4562	{
4563	pVM->pgm.s.aHandyPages[i].idPage = NIL_GMM_PAGEID;
4564	break;
4565	}
4566	if (pVM->pgm.s.aHandyPages[i].idSharedPage == idPage)
4567	{
4568	pVM->pgm.s.aHandyPages[i].idSharedPage = NIL_GMM_PAGEID;
4569	break;
4570	}
4571	}
4572
4573	/*
4574	* Push it onto the page array.
4575	*/
4576	uint32_t iPage = *pcPendingPages;
4577	Assert(iPage < PGMPHYS_FREE_PAGE_BATCH_SIZE);
4578	*pcPendingPages += 1;
4579
4580	pReq->aPages[iPage].idPage = idPage;
4581
4582	if (iPage + 1 < PGMPHYS_FREE_PAGE_BATCH_SIZE)
4583	return VINF_SUCCESS;
4584
4585	/*
4586	* Flush the pages.
4587	*/
4588	int rc = GMMR3FreePagesPerform(pVM, pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE);
4589	if (RT_SUCCESS(rc))
4590	{
4591	GMMR3FreePagesRePrep(pVM, pReq, PGMPHYS_FREE_PAGE_BATCH_SIZE, GMMACCOUNT_BASE);
4592	*pcPendingPages = 0;
4593	}
4594	return rc;
4595	}
4596
4597
4598	/**
4599	* Converts a GC physical address to a HC ring-3 pointer, with some
4600	* additional checks.
4601	*
4602	* @returns VBox status code.
4603	* @retval VINF_SUCCESS on success.
4604	* @retval VINF_PGM_PHYS_TLB_CATCH_WRITE and *ppv set if the page has a write
4605	* access handler of some kind.
4606	* @retval VERR_PGM_PHYS_TLB_CATCH_ALL if the page has a handler catching all
4607	* accesses or is odd in any way.
4608	* @retval VERR_PGM_PHYS_TLB_UNASSIGNED if the page doesn't exist.
4609	*
4610	* @param pVM Pointer to the VM.
4611	* @param GCPhys The GC physical address to convert. Since this is only
4612	* used for filling the REM TLB, the A20 mask must be
4613	* applied before calling this API.
4614	* @param fWritable Whether write access is required.
4615	* @param ppv Where to store the pointer corresponding to GCPhys on
4616	* success.
4617	*/
4618	VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv)
4619	{
4620	pgmLock(pVM);
4621	PGM_A20_ASSERT_MASKED(VMMGetCpu(pVM), GCPhys);
4622
4623	PPGMRAMRANGE pRam;
4624	PPGMPAGE pPage;
4625	int rc = pgmPhysGetPageAndRangeEx(pVM, GCPhys, &pPage, &pRam);
4626	if (RT_SUCCESS(rc))
4627	{
4628	if (PGM_PAGE_IS_BALLOONED(pPage))
4629	rc = VINF_PGM_PHYS_TLB_CATCH_WRITE;
4630	else if (!PGM_PAGE_HAS_ANY_HANDLERS(pPage))
4631	rc = VINF_SUCCESS;
4632	else
4633	{
4634	if (PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)) /* catches MMIO */
4635	rc = VERR_PGM_PHYS_TLB_CATCH_ALL;
4636	else if (PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))
4637	{
4638	/** @todo Handle TLB loads of virtual handlers so ./test.sh can be made to work
4639	* in -norawr0 mode. */
4640	if (fWritable)
4641	rc = VINF_PGM_PHYS_TLB_CATCH_WRITE;
4642	}
4643	else
4644	{
4645	/* Temporarily disabled physical handler(s), since the recompiler
4646	doesn't get notified when it's reset we'll have to pretend it's
4647	operating normally. */
4648	if (pgmHandlerPhysicalIsAll(pVM, GCPhys))
4649	rc = VERR_PGM_PHYS_TLB_CATCH_ALL;
4650	else
4651	rc = VINF_PGM_PHYS_TLB_CATCH_WRITE;
4652	}
4653	}
4654	if (RT_SUCCESS(rc))
4655	{
4656	int rc2;
4657
4658	/* Make sure what we return is writable. */
4659	if (fWritable)
4660	switch (PGM_PAGE_GET_STATE(pPage))
4661	{
4662	case PGM_PAGE_STATE_ALLOCATED:
4663	break;
4664	case PGM_PAGE_STATE_BALLOONED:
4665	AssertFailed();
4666	break;
4667	case PGM_PAGE_STATE_ZERO:
4668	case PGM_PAGE_STATE_SHARED:
4669	if (rc == VINF_PGM_PHYS_TLB_CATCH_WRITE)
4670	break;
4671	case PGM_PAGE_STATE_WRITE_MONITORED:
4672	rc2 = pgmPhysPageMakeWritable(pVM, pPage, GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK);
4673	AssertLogRelRCReturn(rc2, rc2);
4674	break;
4675	}
4676
4677	/* Get a ring-3 mapping of the address. */
4678	PPGMPAGER3MAPTLBE pTlbe;
4679	rc2 = pgmPhysPageQueryTlbe(pVM, GCPhys, &pTlbe);
4680	AssertLogRelRCReturn(rc2, rc2);
4681	ppv = (void )((uintptr_t)pTlbe->pv \| (uintptr_t)(GCPhys & PAGE_OFFSET_MASK));
4682	/** @todo mapping/locking hell; this isn't horribly efficient since
4683	* pgmPhysPageLoadIntoTlb will repeat the lookup we've done here. */
4684
4685	Log6(("PGMR3PhysTlbGCPhys2Ptr: GCPhys=%RGp rc=%Rrc pPage=%R[pgmpage] ppv=%p\n", GCPhys, rc, pPage, ppv));
4686	}
4687	else
4688	Log6(("PGMR3PhysTlbGCPhys2Ptr: GCPhys=%RGp rc=%Rrc pPage=%R[pgmpage]\n", GCPhys, rc, pPage));
4689
4690	/* else: handler catching all access, no pointer returned. */
4691	}
4692	else
4693	rc = VERR_PGM_PHYS_TLB_UNASSIGNED;
4694
4695	pgmUnlock(pVM);
4696	return rc;
4697	}
4698

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source: vbox/trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp@ 44397

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