PGMPool.cpp@ 80191

Last change on this file since 80191 was 80191, checked in by vboxsync, 5 years ago
VMM/r3: Refactored VMCPU enumeration in preparation that aCpus will be replaced with a pointer array. Removed two raw-mode offset members from the CPUM and CPUMCPU sub-structures. bugref:9217 bugref:9517
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1	/* $Id: PGMPool.cpp 80191 2019-08-08 00:36:57Z vboxsync $ */
2	/** @file
3	* PGM Shadow Page Pool.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/** @page pg_pgm_pool PGM Shadow Page Pool
19	*
20	* Motivations:
21	* -# Relationship between shadow page tables and physical guest pages. This
22	* should allow us to skip most of the global flushes now following access
23	* handler changes. The main expense is flushing shadow pages.
24	* -# Limit the pool size if necessary (default is kind of limitless).
25	* -# Allocate shadow pages from RC. We use to only do this in SyncCR3.
26	* -# Required for 64-bit guests.
27	* -# Combining the PD cache and page pool in order to simplify caching.
28	*
29	*
30	* @section sec_pgm_pool_outline Design Outline
31	*
32	* The shadow page pool tracks pages used for shadowing paging structures (i.e.
33	* page tables, page directory, page directory pointer table and page map
34	* level-4). Each page in the pool has an unique identifier. This identifier is
35	* used to link a guest physical page to a shadow PT. The identifier is a
36	* non-zero value and has a relativly low max value - say 14 bits. This makes it
37	* possible to fit it into the upper bits of the of the aHCPhys entries in the
38	* ram range.
39	*
40	* By restricting host physical memory to the first 48 bits (which is the
41	* announced physical memory range of the K8L chip (scheduled for 2008)), we
42	* can safely use the upper 16 bits for shadow page ID and reference counting.
43	*
44	* Update: The 48 bit assumption will be lifted with the new physical memory
45	* management (PGMPAGE), so we won't have any trouble when someone stuffs 2TB
46	* into a box in some years.
47	*
48	* Now, it's possible for a page to be aliased, i.e. mapped by more than one PT
49	* or PD. This is solved by creating a list of physical cross reference extents
50	* when ever this happens. Each node in the list (extent) is can contain 3 page
51	* pool indexes. The list it self is chained using indexes into the paPhysExt
52	* array.
53	*
54	*
55	* @section sec_pgm_pool_life Life Cycle of a Shadow Page
56	*
57	* -# The SyncPT function requests a page from the pool.
58	* The request includes the kind of page it is (PT/PD, PAE/legacy), the
59	* address of the page it's shadowing, and more.
60	* -# The pool responds to the request by allocating a new page.
61	* When the cache is enabled, it will first check if it's in the cache.
62	* Should the pool be exhausted, one of two things can be done:
63	* -# Flush the whole pool and current CR3.
64	* -# Use the cache to find a page which can be flushed (~age).
65	* -# The SyncPT function will sync one or more pages and insert it into the
66	* shadow PD.
67	* -# The SyncPage function may sync more pages on a later \#PFs.
68	* -# The page is freed / flushed in SyncCR3 (perhaps) and some other cases.
69	* When caching is enabled, the page isn't flush but remains in the cache.
70	*
71	*
72	* @section sec_pgm_pool_monitoring Monitoring
73	*
74	* We always monitor PAGE_SIZE chunks of memory. When we've got multiple shadow
75	* pages for the same PAGE_SIZE of guest memory (PAE and mixed PD/PT) the pages
76	* sharing the monitor get linked using the iMonitoredNext/Prev. The head page
77	* is the pvUser to the access handlers.
78	*
79	*
80	* @section sec_pgm_pool_impl Implementation
81	*
82	* The pool will take pages from the MM page pool. The tracking data
83	* (attributes, bitmaps and so on) are allocated from the hypervisor heap. The
84	* pool content can be accessed both by using the page id and the physical
85	* address (HC). The former is managed by means of an array, the latter by an
86	* offset based AVL tree.
87	*
88	* Flushing of a pool page means that we iterate the content (we know what kind
89	* it is) and updates the link information in the ram range.
90	*
91	* ...
92	*/
93
94
95	/*********************************************************************************************************************************
96	* Header Files *
97	*********************************************************************************************************************************/
98	#define VBOX_BUGREF_9217_PART_I
99	#define LOG_GROUP LOG_GROUP_PGM_POOL
100	#include <VBox/vmm/pgm.h>
101	#include <VBox/vmm/mm.h>
102	#include "PGMInternal.h"
103	#include <VBox/vmm/vm.h>
104	#include <VBox/vmm/uvm.h>
105	#include "PGMInline.h"
106
107	#include <VBox/log.h>
108	#include <VBox/err.h>
109	#include <iprt/asm.h>
110	#include <iprt/string.h>
111	#include <VBox/dbg.h>
112
113
114	/*********************************************************************************************************************************
115	* Internal Functions *
116	*********************************************************************************************************************************/
117	#ifdef VBOX_WITH_DEBUGGER
118	static FNDBGCCMD pgmR3PoolCmdCheck;
119	#endif
120
121	#ifdef VBOX_WITH_DEBUGGER
122	/** Command descriptors. */
123	static const DBGCCMD g_aCmds[] =
124	{
125	/* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
126	{ "pgmpoolcheck", 0, 0, NULL, 0, 0, pgmR3PoolCmdCheck, "", "Check the pgm pool pages." },
127	};
128	#endif
129
130	/**
131	* Initializes the pool
132	*
133	* @returns VBox status code.
134	* @param pVM The cross context VM structure.
135	*/
136	int pgmR3PoolInit(PVM pVM)
137	{
138	int rc;
139
140	AssertCompile(NIL_PGMPOOL_IDX == 0);
141	/* pPage->cLocked is an unsigned byte. */
142	AssertCompile(VMM_MAX_CPU_COUNT <= 255);
143
144	/*
145	* Query Pool config.
146	*/
147	PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM/Pool");
148
149	/* Default pgm pool size is 1024 pages (4MB). */
150	uint16_t cMaxPages = 1024;
151
152	/* Adjust it up relative to the RAM size, using the nested paging formula. */
153	uint64_t cbRam;
154	rc = CFGMR3QueryU64Def(CFGMR3GetRoot(pVM), "RamSize", &cbRam, 0); AssertRCReturn(rc, rc);
155	uint64_t u64MaxPages = (cbRam >> 9)
156	+ (cbRam >> 18)
157	+ (cbRam >> 27)
158	+ 32 * PAGE_SIZE;
159	u64MaxPages >>= PAGE_SHIFT;
160	if (u64MaxPages > PGMPOOL_IDX_LAST)
161	cMaxPages = PGMPOOL_IDX_LAST;
162	else
163	cMaxPages = (uint16_t)u64MaxPages;
164
165	/** @cfgm{/PGM/Pool/MaxPages, uint16_t, \#pages, 16, 0x3fff, F(ram-size)}
166	* The max size of the shadow page pool in pages. The pool will grow dynamically
167	* up to this limit.
168	*/
169	rc = CFGMR3QueryU16Def(pCfg, "MaxPages", &cMaxPages, cMaxPages);
170	AssertLogRelRCReturn(rc, rc);
171	AssertLogRelMsgReturn(cMaxPages <= PGMPOOL_IDX_LAST && cMaxPages >= RT_ALIGN(PGMPOOL_IDX_FIRST, 16),
172	("cMaxPages=%u (%#x)\n", cMaxPages, cMaxPages), VERR_INVALID_PARAMETER);
173	cMaxPages = RT_ALIGN(cMaxPages, 16);
174	if (cMaxPages > PGMPOOL_IDX_LAST)
175	cMaxPages = PGMPOOL_IDX_LAST;
176	LogRel(("PGM: PGMPool: cMaxPages=%u (u64MaxPages=%llu)\n", cMaxPages, u64MaxPages));
177
178	/** @todo
179	* We need to be much more careful with our allocation strategy here.
180	* For nested paging we don't need pool user info nor extents at all, but
181	* we can't check for nested paging here (too early during init to get a
182	* confirmation it can be used). The default for large memory configs is a
183	* bit large for shadow paging, so I've restricted the extent maximum to 8k
184	* (8k * 16 = 128k of hyper heap).
185	*
186	* Also when large page support is enabled, we typically don't need so much,
187	* although that depends on the availability of 2 MB chunks on the host.
188	*/
189
190	/** @cfgm{/PGM/Pool/MaxUsers, uint16_t, \#users, MaxUsers, 32K, MaxPages*2}
191	* The max number of shadow page user tracking records. Each shadow page has
192	* zero of other shadow pages (or CR3s) that references it, or uses it if you
193	* like. The structures describing these relationships are allocated from a
194	* fixed sized pool. This configuration variable defines the pool size.
195	*/
196	uint16_t cMaxUsers;
197	rc = CFGMR3QueryU16Def(pCfg, "MaxUsers", &cMaxUsers, cMaxPages * 2);
198	AssertLogRelRCReturn(rc, rc);
199	AssertLogRelMsgReturn(cMaxUsers >= cMaxPages && cMaxPages <= _32K,
200	("cMaxUsers=%u (%#x)\n", cMaxUsers, cMaxUsers), VERR_INVALID_PARAMETER);
201
202	/** @cfgm{/PGM/Pool/MaxPhysExts, uint16_t, \#extents, 16, MaxPages * 2, MIN(MaxPages*2\,8192)}
203	* The max number of extents for tracking aliased guest pages.
204	*/
205	uint16_t cMaxPhysExts;
206	rc = CFGMR3QueryU16Def(pCfg, "MaxPhysExts", &cMaxPhysExts,
207	RT_MIN(cMaxPages * 2, 8192 /* 8Ki max as this eat too much hyper heap */));
208	AssertLogRelRCReturn(rc, rc);
209	AssertLogRelMsgReturn(cMaxPhysExts >= 16 && cMaxPhysExts <= PGMPOOL_IDX_LAST,
210	("cMaxPhysExts=%u (%#x)\n", cMaxPhysExts, cMaxPhysExts), VERR_INVALID_PARAMETER);
211
212	/** @cfgm{/PGM/Pool/ChacheEnabled, bool, true}
213	* Enables or disabling caching of shadow pages. Caching means that we will try
214	* reuse shadow pages instead of recreating them everything SyncCR3, SyncPT or
215	* SyncPage requests one. When reusing a shadow page, we can save time
216	* reconstructing it and it's children.
217	*/
218	bool fCacheEnabled;
219	rc = CFGMR3QueryBoolDef(pCfg, "CacheEnabled", &fCacheEnabled, true);
220	AssertLogRelRCReturn(rc, rc);
221
222	LogRel(("PGM: pgmR3PoolInit: cMaxPages=%#RX16 cMaxUsers=%#RX16 cMaxPhysExts=%#RX16 fCacheEnable=%RTbool\n",
223	cMaxPages, cMaxUsers, cMaxPhysExts, fCacheEnabled));
224
225	/*
226	* Allocate the data structures.
227	*/
228	uint32_t cb = RT_UOFFSETOF_DYN(PGMPOOL, aPages[cMaxPages]);
229	cb += cMaxUsers * sizeof(PGMPOOLUSER);
230	cb += cMaxPhysExts * sizeof(PGMPOOLPHYSEXT);
231	PPGMPOOL pPool;
232	rc = MMR3HyperAllocOnceNoRel(pVM, cb, 0, MM_TAG_PGM_POOL, (void **)&pPool);
233	if (RT_FAILURE(rc))
234	return rc;
235	pVM->pgm.s.pPoolR3 = pPool;
236	pVM->pgm.s.pPoolR0 = MMHyperR3ToR0(pVM, pPool);
237
238	/*
239	* Initialize it.
240	*/
241	pPool->pVMR3 = pVM;
242	pPool->pVMR0 = pVM->pVMR0;
243	pPool->cMaxPages = cMaxPages;
244	pPool->cCurPages = PGMPOOL_IDX_FIRST;
245	pPool->iUserFreeHead = 0;
246	pPool->cMaxUsers = cMaxUsers;
247	PPGMPOOLUSER paUsers = (PPGMPOOLUSER)&pPool->aPages[pPool->cMaxPages];
248	pPool->paUsersR3 = paUsers;
249	pPool->paUsersR0 = MMHyperR3ToR0(pVM, paUsers);
250	for (unsigned i = 0; i < cMaxUsers; i++)
251	{
252	paUsers[i].iNext = i + 1;
253	paUsers[i].iUser = NIL_PGMPOOL_IDX;
254	paUsers[i].iUserTable = 0xfffffffe;
255	}
256	paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
257	pPool->iPhysExtFreeHead = 0;
258	pPool->cMaxPhysExts = cMaxPhysExts;
259	PPGMPOOLPHYSEXT paPhysExts = (PPGMPOOLPHYSEXT)&paUsers[cMaxUsers];
260	pPool->paPhysExtsR3 = paPhysExts;
261	pPool->paPhysExtsR0 = MMHyperR3ToR0(pVM, paPhysExts);
262	for (unsigned i = 0; i < cMaxPhysExts; i++)
263	{
264	paPhysExts[i].iNext = i + 1;
265	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
266	paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
267	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
268	paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
269	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
270	paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
271	}
272	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
273	for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
274	pPool->aiHash[i] = NIL_PGMPOOL_IDX;
275	pPool->iAgeHead = NIL_PGMPOOL_IDX;
276	pPool->iAgeTail = NIL_PGMPOOL_IDX;
277	pPool->fCacheEnabled = fCacheEnabled;
278
279	pPool->hAccessHandlerType = NIL_PGMPHYSHANDLERTYPE;
280	rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE,
281	pgmPoolAccessHandler,
282	NULL, "pgmPoolAccessHandler", "pgmRZPoolAccessPfHandler",
283	NULL, "pgmPoolAccessHandler", "pgmRZPoolAccessPfHandler",
284	"Guest Paging Access Handler",
285	&pPool->hAccessHandlerType);
286	AssertLogRelRCReturn(rc, rc);
287
288	pPool->HCPhysTree = 0;
289
290	/*
291	* The NIL entry.
292	*/
293	Assert(NIL_PGMPOOL_IDX == 0);
294	pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID;
295	pPool->aPages[NIL_PGMPOOL_IDX].idx = NIL_PGMPOOL_IDX;
296	pPool->aPages[NIL_PGMPOOL_IDX].Core.Key = NIL_RTHCPHYS;
297	pPool->aPages[NIL_PGMPOOL_IDX].GCPhys = NIL_RTGCPHYS;
298	pPool->aPages[NIL_PGMPOOL_IDX].iNext = NIL_PGMPOOL_IDX;
299	/* pPool->aPages[NIL_PGMPOOL_IDX].cLocked = INT32_MAX; - test this out... */
300	pPool->aPages[NIL_PGMPOOL_IDX].pvPageR3 = 0;
301	pPool->aPages[NIL_PGMPOOL_IDX].iUserHead = NIL_PGMPOOL_USER_INDEX;
302	pPool->aPages[NIL_PGMPOOL_IDX].iModifiedNext = NIL_PGMPOOL_IDX;
303	pPool->aPages[NIL_PGMPOOL_IDX].iModifiedPrev = NIL_PGMPOOL_IDX;
304	pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredNext = NIL_PGMPOOL_IDX;
305	pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredPrev = NIL_PGMPOOL_IDX;
306	pPool->aPages[NIL_PGMPOOL_IDX].iAgeNext = NIL_PGMPOOL_IDX;
307	pPool->aPages[NIL_PGMPOOL_IDX].iAgePrev = NIL_PGMPOOL_IDX;
308
309	Assert(pPool->aPages[NIL_PGMPOOL_IDX].idx == NIL_PGMPOOL_IDX);
310	Assert(pPool->aPages[NIL_PGMPOOL_IDX].GCPhys == NIL_RTGCPHYS);
311	Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fSeenNonGlobal);
312	Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fMonitored);
313	Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fCached);
314	Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fZeroed);
315	Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fReusedFlushPending);
316
317	#ifdef VBOX_WITH_STATISTICS
318	/*
319	* Register statistics.
320	*/
321	STAM_REG(pVM, &pPool->cCurPages, STAMTYPE_U16, "/PGM/Pool/cCurPages", STAMUNIT_PAGES, "Current pool size.");
322	STAM_REG(pVM, &pPool->cMaxPages, STAMTYPE_U16, "/PGM/Pool/cMaxPages", STAMUNIT_PAGES, "Max pool size.");
323	STAM_REG(pVM, &pPool->cUsedPages, STAMTYPE_U16, "/PGM/Pool/cUsedPages", STAMUNIT_PAGES, "The number of pages currently in use.");
324	STAM_REG(pVM, &pPool->cUsedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/cUsedPagesHigh", STAMUNIT_PAGES, "The high watermark for cUsedPages.");
325	STAM_REG(pVM, &pPool->StatAlloc, STAMTYPE_PROFILE_ADV, "/PGM/Pool/Alloc", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolAlloc.");
326	STAM_REG(pVM, &pPool->StatClearAll, STAMTYPE_PROFILE, "/PGM/Pool/ClearAll", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolClearAll.");
327	STAM_REG(pVM, &pPool->StatR3Reset, STAMTYPE_PROFILE, "/PGM/Pool/R3Reset", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolReset.");
328	STAM_REG(pVM, &pPool->StatFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFlushPage.");
329	STAM_REG(pVM, &pPool->StatFree, STAMTYPE_PROFILE, "/PGM/Pool/Free", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFree.");
330	STAM_REG(pVM, &pPool->StatForceFlushPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForce", STAMUNIT_OCCURENCES, "Counting explicit flushes by PGMPoolFlushPage().");
331	STAM_REG(pVM, &pPool->StatForceFlushDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForceDirty", STAMUNIT_OCCURENCES, "Counting explicit flushes of dirty pages by PGMPoolFlushPage().");
332	STAM_REG(pVM, &pPool->StatForceFlushReused, STAMTYPE_COUNTER, "/PGM/Pool/FlushReused", STAMUNIT_OCCURENCES, "Counting flushes for reused pages.");
333	STAM_REG(pVM, &pPool->StatZeroPage, STAMTYPE_PROFILE, "/PGM/Pool/ZeroPage", STAMUNIT_TICKS_PER_CALL, "Profiling time spent zeroing pages. Overlaps with Alloc.");
334	STAM_REG(pVM, &pPool->cMaxUsers, STAMTYPE_U16, "/PGM/Pool/Track/cMaxUsers", STAMUNIT_COUNT, "Max user tracking records.");
335	STAM_REG(pVM, &pPool->cPresent, STAMTYPE_U32, "/PGM/Pool/Track/cPresent", STAMUNIT_COUNT, "Number of present page table entries.");
336	STAM_REG(pVM, &pPool->StatTrackDeref, STAMTYPE_PROFILE, "/PGM/Pool/Track/Deref", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackDeref.");
337	STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPT, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPT", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPT.");
338	STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTs, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTs", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTs.");
339	STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTsSlow, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTsSlow", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTsSlow.");
340	STAM_REG(pVM, &pPool->StatTrackFlushEntry, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Flush", STAMUNIT_COUNT, "Nr of flushed entries.");
341	STAM_REG(pVM, &pPool->StatTrackFlushEntryKeep, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Update", STAMUNIT_COUNT, "Nr of updated entries.");
342	STAM_REG(pVM, &pPool->StatTrackFreeUpOneUser, STAMTYPE_COUNTER, "/PGM/Pool/Track/FreeUpOneUser", STAMUNIT_TICKS_PER_CALL, "The number of times we were out of user tracking records.");
343	STAM_REG(pVM, &pPool->StatTrackDerefGCPhys, STAMTYPE_PROFILE, "/PGM/Pool/Track/DrefGCPhys", STAMUNIT_TICKS_PER_CALL, "Profiling deref activity related tracking GC physical pages.");
344	STAM_REG(pVM, &pPool->StatTrackLinearRamSearches, STAMTYPE_COUNTER, "/PGM/Pool/Track/LinearRamSearches", STAMUNIT_OCCURENCES, "The number of times we had to do linear ram searches.");
345	STAM_REG(pVM, &pPool->StamTrackPhysExtAllocFailures,STAMTYPE_COUNTER, "/PGM/Pool/Track/PhysExtAllocFailures", STAMUNIT_OCCURENCES, "The number of failing pgmPoolTrackPhysExtAlloc calls.");
346
347	STAM_REG(pVM, &pPool->StatMonitorPfRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access handler.");
348	STAM_REG(pVM, &pPool->StatMonitorPfRZEmulateInstr, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/EmulateInstr", STAMUNIT_OCCURENCES, "Times we've failed interpreting the instruction.");
349	STAM_REG(pVM, &pPool->StatMonitorPfRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the RC/R0 access handler.");
350	STAM_REG(pVM, &pPool->StatMonitorPfRZFlushReinit, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushReinit", STAMUNIT_OCCURENCES, "Times we've detected a page table reinit.");
351	STAM_REG(pVM, &pPool->StatMonitorPfRZFlushModOverflow,STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushOverflow", STAMUNIT_OCCURENCES, "Counting flushes for pages that are modified too often.");
352	STAM_REG(pVM, &pPool->StatMonitorPfRZFork, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/Fork", STAMUNIT_OCCURENCES, "Times we've detected fork().");
353	STAM_REG(pVM, &pPool->StatMonitorPfRZHandled, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/Handled", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access we've handled (except REP STOSD).");
354	STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch1, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch1", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction.");
355	STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch2, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch2", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction during flushing.");
356	STAM_REG(pVM, &pPool->StatMonitorPfRZRepPrefix, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/RepPrefix", STAMUNIT_OCCURENCES, "The number of times we've seen rep prefixes we can't handle.");
357	STAM_REG(pVM, &pPool->StatMonitorPfRZRepStosd, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/RepStosd", STAMUNIT_TICKS_PER_CALL, "Profiling the REP STOSD cases we've handled.");
358
359	STAM_REG(pVM, &pPool->StatMonitorRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM", STAMUNIT_TICKS_PER_CALL, "Profiling the regular access handler.");
360	STAM_REG(pVM, &pPool->StatMonitorRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the regular access handler.");
361	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses.");
362	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses.");
363	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses.");
364	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses.");
365	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses.");
366	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses.");
367	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses.");
368	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[7], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses.");
369	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[8], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses.");
370	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[9], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses.");
371	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[10], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses.");
372	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[11], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses.");
373	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[12], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses.");
374	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[13], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses.");
375	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[14], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses.");
376	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[15], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses.");
377	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[16], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
378	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[17], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
379	STAM_REG(pVM, &pPool->aStatMonitorRZSizes[18], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
380	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1.");
381	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2.");
382	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3.");
383	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4.");
384	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5.");
385	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6.");
386	STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7.");
387
388	STAM_REG(pVM, &pPool->StatMonitorRZFaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
389	STAM_REG(pVM, &pPool->StatMonitorRZFaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
390	STAM_REG(pVM, &pPool->StatMonitorRZFaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
391	STAM_REG(pVM, &pPool->StatMonitorRZFaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
392
393	STAM_REG(pVM, &pPool->StatMonitorR3, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3", STAMUNIT_TICKS_PER_CALL, "Profiling the R3 access handler.");
394	STAM_REG(pVM, &pPool->StatMonitorR3FlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the R3 access handler.");
395	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses (R3).");
396	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses (R3).");
397	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses (R3).");
398	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses (R3).");
399	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses (R3).");
400	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses (R3).");
401	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses (R3).");
402	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[7], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses (R3).");
403	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[8], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses (R3).");
404	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[9], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses (R3).");
405	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[10], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses (R3).");
406	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[11], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses (R3).");
407	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[12], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses (R3).");
408	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[13], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses (R3).");
409	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[14], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses (R3).");
410	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[15], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses (R3).");
411	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[16], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
412	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[17], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
413	STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[18], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
414	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1 in R3.");
415	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2 in R3.");
416	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3 in R3.");
417	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4 in R3.");
418	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5 in R3.");
419	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6 in R3.");
420	STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7 in R3.");
421
422	STAM_REG(pVM, &pPool->StatMonitorR3FaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
423	STAM_REG(pVM, &pPool->StatMonitorR3FaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
424	STAM_REG(pVM, &pPool->StatMonitorR3FaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
425	STAM_REG(pVM, &pPool->StatMonitorR3FaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
426
427	STAM_REG(pVM, &pPool->cModifiedPages, STAMTYPE_U16, "/PGM/Pool/Monitor/cModifiedPages", STAMUNIT_PAGES, "The current cModifiedPages value.");
428	STAM_REG(pVM, &pPool->cModifiedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/Monitor/cModifiedPagesHigh", STAMUNIT_PAGES, "The high watermark for cModifiedPages.");
429	STAM_REG(pVM, &pPool->StatResetDirtyPages, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Resets", STAMUNIT_OCCURENCES, "Times we've called pgmPoolResetDirtyPages (and there were dirty page).");
430	STAM_REG(pVM, &pPool->StatDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Pages", STAMUNIT_OCCURENCES, "Times we've called pgmPoolAddDirtyPage.");
431	STAM_REG(pVM, &pPool->StatDirtyPageDupFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushDup", STAMUNIT_OCCURENCES, "Times we've had to flush duplicates for dirty page management.");
432	STAM_REG(pVM, &pPool->StatDirtyPageOverFlowFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushOverflow",STAMUNIT_OCCURENCES, "Times we've had to flush because of overflow.");
433	STAM_REG(pVM, &pPool->StatCacheHits, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Hits", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls satisfied by the cache.");
434	STAM_REG(pVM, &pPool->StatCacheMisses, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Misses", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls not statisfied by the cache.");
435	STAM_REG(pVM, &pPool->StatCacheKindMismatches, STAMTYPE_COUNTER, "/PGM/Pool/Cache/KindMismatches", STAMUNIT_OCCURENCES, "The number of shadow page kind mismatches. (Better be low, preferably 0!)");
436	STAM_REG(pVM, &pPool->StatCacheFreeUpOne, STAMTYPE_COUNTER, "/PGM/Pool/Cache/FreeUpOne", STAMUNIT_OCCURENCES, "The number of times the cache was asked to free up a page.");
437	STAM_REG(pVM, &pPool->StatCacheCacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Cacheable", STAMUNIT_OCCURENCES, "The number of cacheable allocations.");
438	STAM_REG(pVM, &pPool->StatCacheUncacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Uncacheable", STAMUNIT_OCCURENCES, "The number of uncacheable allocations.");
439	#endif /* VBOX_WITH_STATISTICS */
440
441	#ifdef VBOX_WITH_DEBUGGER
442	/*
443	* Debugger commands.
444	*/
445	static bool s_fRegisteredCmds = false;
446	if (!s_fRegisteredCmds)
447	{
448	rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
449	if (RT_SUCCESS(rc))
450	s_fRegisteredCmds = true;
451	}
452	#endif
453
454	return VINF_SUCCESS;
455	}
456
457
458	/**
459	* Relocate the page pool data.
460	*
461	* @param pVM The cross context VM structure.
462	*/
463	void pgmR3PoolRelocate(PVM pVM)
464	{
465	RT_NOREF(pVM);
466	}
467
468
469	/**
470	* Grows the shadow page pool.
471	*
472	* I.e. adds more pages to it, assuming that hasn't reached cMaxPages yet.
473	*
474	* @returns VBox status code.
475	* @param pVM The cross context VM structure.
476	*/
477	VMMR3DECL(int) PGMR3PoolGrow(PVM pVM)
478	{
479	PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
480	AssertReturn(pPool->cCurPages < pPool->cMaxPages, VERR_PGM_POOL_MAXED_OUT_ALREADY);
481
482	/* With 32-bit guests and no EPT, the CR3 limits the root pages to low
483	(below 4 GB) memory. */
484	/** @todo change the pool to handle ROOT page allocations specially when
485	* required. */
486	bool fCanUseHighMemory = HMIsNestedPagingActive(pVM);
487
488	pgmLock(pVM);
489
490	/*
491	* How much to grow it by?
492	*/
493	uint32_t cPages = pPool->cMaxPages - pPool->cCurPages;
494	cPages = RT_MIN(PGMPOOL_CFG_MAX_GROW, cPages);
495	LogFlow(("PGMR3PoolGrow: Growing the pool by %d (%#x) pages. fCanUseHighMemory=%RTbool\n", cPages, cPages, fCanUseHighMemory));
496
497	for (unsigned i = pPool->cCurPages; cPages-- > 0; i++)
498	{
499	PPGMPOOLPAGE pPage = &pPool->aPages[i];
500
501	if (fCanUseHighMemory)
502	pPage->pvPageR3 = MMR3PageAlloc(pVM);
503	else
504	pPage->pvPageR3 = MMR3PageAllocLow(pVM);
505	if (!pPage->pvPageR3)
506	{
507	Log(("We're out of memory!! i=%d fCanUseHighMemory=%RTbool\n", i, fCanUseHighMemory));
508	pgmUnlock(pVM);
509	return i ? VINF_SUCCESS : VERR_NO_PAGE_MEMORY;
510	}
511	pPage->Core.Key = MMPage2Phys(pVM, pPage->pvPageR3);
512	AssertFatal(pPage->Core.Key < _4G \|\| fCanUseHighMemory);
513	pPage->GCPhys = NIL_RTGCPHYS;
514	pPage->enmKind = PGMPOOLKIND_FREE;
515	pPage->idx = pPage - &pPool->aPages[0];
516	LogFlow(("PGMR3PoolGrow: insert page #%#x - %RHp\n", pPage->idx, pPage->Core.Key));
517	pPage->iNext = pPool->iFreeHead;
518	pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
519	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
520	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
521	pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
522	pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
523	pPage->iAgeNext = NIL_PGMPOOL_IDX;
524	pPage->iAgePrev = NIL_PGMPOOL_IDX;
525	/* commit it */
526	bool fRc = RTAvloHCPhysInsert(&pPool->HCPhysTree, &pPage->Core); Assert(fRc); NOREF(fRc);
527	pPool->iFreeHead = i;
528	pPool->cCurPages = i + 1;
529	}
530
531	pgmUnlock(pVM);
532	Assert(pPool->cCurPages <= pPool->cMaxPages);
533	return VINF_SUCCESS;
534	}
535
536
537	/**
538	* Rendezvous callback used by pgmR3PoolClearAll that clears all shadow pages
539	* and all modification counters.
540	*
541	* This is only called on one of the EMTs while the other ones are waiting for
542	* it to complete this function.
543	*
544	* @returns VINF_SUCCESS (VBox strict status code).
545	* @param pVM The cross context VM structure.
546	* @param pVCpu The cross context virtual CPU structure of the calling EMT. Unused.
547	* @param fpvFlushRemTlb When not NULL, we'll flush the REM TLB as well.
548	* (This is the pvUser, so it has to be void *.)
549	*
550	*/
551	DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, void *fpvFlushRemTlb)
552	{
553	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
554	STAM_PROFILE_START(&pPool->StatClearAll, c);
555	NOREF(pVCpu);
556
557	pgmLock(pVM);
558	Log(("pgmR3PoolClearAllRendezvous: cUsedPages=%d fpvFlushRemTlb=%RTbool\n", pPool->cUsedPages, !!fpvFlushRemTlb));
559
560	/*
561	* Iterate all the pages until we've encountered all that are in use.
562	* This is a simple but not quite optimal solution.
563	*/
564	unsigned cModifiedPages = 0; NOREF(cModifiedPages);
565	unsigned cLeft = pPool->cUsedPages;
566	uint32_t iPage = pPool->cCurPages;
567	while (--iPage >= PGMPOOL_IDX_FIRST)
568	{
569	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
570	if (pPage->GCPhys != NIL_RTGCPHYS)
571	{
572	switch (pPage->enmKind)
573	{
574	/*
575	* We only care about shadow page tables that reference physical memory
576	*/
577	#ifdef PGM_WITH_LARGE_PAGES
578	case PGMPOOLKIND_EPT_PD_FOR_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
579	if (pPage->cPresent)
580	{
581	PX86PDPAE pShwPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
582	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
583	{
584	if ( pShwPD->a[i].n.u1Present
585	&& pShwPD->a[i].b.u1Size)
586	{
587	Assert(!(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING));
588	pShwPD->a[i].u = 0;
589	Assert(pPage->cPresent);
590	pPage->cPresent--;
591	}
592	}
593	if (pPage->cPresent == 0)
594	pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
595	}
596	goto default_case;
597
598	case PGMPOOLKIND_PAE_PD_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
599	if (pPage->cPresent)
600	{
601	PEPTPD pShwPD = (PEPTPD)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
602	for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
603	{
604	Assert((pShwPD->a[i].u & UINT64_C(0xfff0000000000f80)) == 0);
605	if ( pShwPD->a[i].n.u1Present
606	&& pShwPD->a[i].b.u1Size)
607	{
608	Assert(!(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING));
609	pShwPD->a[i].u = 0;
610	Assert(pPage->cPresent);
611	pPage->cPresent--;
612	}
613	}
614	if (pPage->cPresent == 0)
615	pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
616	}
617	goto default_case;
618	#endif /* PGM_WITH_LARGE_PAGES */
619
620	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
621	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
622	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
623	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
624	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
625	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
626	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
627	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
628	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
629	{
630	if (pPage->cPresent)
631	{
632	void *pvShw = PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
633	STAM_PROFILE_START(&pPool->StatZeroPage, z);
634	#if 0
635	/* Useful check for leaking references; very expensive though. */
636	switch (pPage->enmKind)
637	{
638	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
639	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
640	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
641	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
642	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
643	{
644	bool fFoundFirst = false;
645	PPGMSHWPTPAE pPT = (PPGMSHWPTPAE)pvShw;
646	for (unsigned ptIndex = 0; ptIndex < RT_ELEMENTS(pPT->a); ptIndex++)
647	{
648	if (pPT->a[ptIndex].u)
649	{
650	if (!fFoundFirst)
651	{
652	AssertFatalMsg(pPage->iFirstPresent <= ptIndex, ("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
653	if (pPage->iFirstPresent != ptIndex)
654	Log(("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
655	fFoundFirst = true;
656	}
657	if (PGMSHWPTEPAE_IS_P(pPT->a[ptIndex]))
658	{
659	pgmPoolTracDerefGCPhysHint(pPool, pPage, PGMSHWPTEPAE_GET_HCPHYS(pPT->a[ptIndex]), NIL_RTGCPHYS);
660	if (pPage->iFirstPresent == ptIndex)
661	pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
662	}
663	}
664	}
665	AssertFatalMsg(pPage->cPresent == 0, ("cPresent = %d pPage = %RGv\n", pPage->cPresent, pPage->GCPhys));
666	break;
667	}
668	default:
669	break;
670	}
671	#endif
672	ASMMemZeroPage(pvShw);
673	STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
674	pPage->cPresent = 0;
675	pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
676	}
677	}
678	RT_FALL_THRU();
679	#ifdef PGM_WITH_LARGE_PAGES
680	default_case:
681	#endif
682	default:
683	Assert(!pPage->cModifications \|\| ++cModifiedPages);
684	Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
685	Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX \|\| pPage->cModifications);
686	pPage->iModifiedNext = NIL_PGMPOOL_IDX;
687	pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
688	pPage->cModifications = 0;
689	break;
690
691	}
692	if (!--cLeft)
693	break;
694	}
695	}
696
697	#ifndef DEBUG_michael
698	AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
699	#endif
700	pPool->iModifiedHead = NIL_PGMPOOL_IDX;
701	pPool->cModifiedPages = 0;
702
703	/*
704	* Clear all the GCPhys links and rebuild the phys ext free list.
705	*/
706	for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRangesX);
707	pRam;
708	pRam = pRam->CTX_SUFF(pNext))
709	{
710	iPage = pRam->cb >> PAGE_SHIFT;
711	while (iPage-- > 0)
712	PGM_PAGE_SET_TRACKING(pVM, &pRam->aPages[iPage], 0);
713	}
714
715	pPool->iPhysExtFreeHead = 0;
716	PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
717	const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
718	for (unsigned i = 0; i < cMaxPhysExts; i++)
719	{
720	paPhysExts[i].iNext = i + 1;
721	paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
722	paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
723	paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
724	paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
725	paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
726	paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
727	}
728	paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
729
730
731	#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
732	/* Reset all dirty pages to reactivate the page monitoring. */
733	/* Note: we must do this after clearing all page references and shadow page tables as there might be stale references to
734	* recently removed MMIO ranges around that might otherwise end up asserting in pgmPoolTracDerefGCPhysHint
735	*/
736	for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++)
737	{
738	unsigned idxPage = pPool->aidxDirtyPages[i];
739	if (idxPage == NIL_PGMPOOL_IDX)
740	continue;
741
742	PPGMPOOLPAGE pPage = &pPool->aPages[idxPage];
743	Assert(pPage->idx == idxPage);
744	Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
745
746	AssertMsg(pPage->fDirty, ("Page %RGp (slot=%d) not marked dirty!", pPage->GCPhys, i));
747
748	Log(("Reactivate dirty page %RGp\n", pPage->GCPhys));
749
750	/* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
751	int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & PAGE_BASE_GC_MASK);
752	AssertRCSuccess(rc);
753	pPage->fDirty = false;
754
755	pPool->aidxDirtyPages[i] = NIL_PGMPOOL_IDX;
756	}
757
758	/* Clear all dirty pages. */
759	pPool->idxFreeDirtyPage = 0;
760	pPool->cDirtyPages = 0;
761	#endif
762
763	/* Clear the PGM_SYNC_CLEAR_PGM_POOL flag on all VCPUs to prevent redundant flushes. */
764	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
765	pVM->apCpusR3[idCpu]->pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
766
767	/* Flush job finished. */
768	VM_FF_CLEAR(pVM, VM_FF_PGM_POOL_FLUSH_PENDING);
769	pPool->cPresent = 0;
770	pgmUnlock(pVM);
771
772	PGM_INVL_ALL_VCPU_TLBS(pVM);
773
774	if (fpvFlushRemTlb)
775	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
776	CPUMSetChangedFlags(pVM->apCpusR3[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
777
778	STAM_PROFILE_STOP(&pPool->StatClearAll, c);
779	return VINF_SUCCESS;
780	}
781
782
783	/**
784	* Clears the shadow page pool.
785	*
786	* @param pVM The cross context VM structure.
787	* @param fFlushRemTlb When set, the REM TLB is scheduled for flushing as
788	* well.
789	*/
790	void pgmR3PoolClearAll(PVM pVM, bool fFlushRemTlb)
791	{
792	int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PoolClearAllRendezvous, &fFlushRemTlb);
793	AssertRC(rc);
794	}
795
796
797	/**
798	* Protect all pgm pool page table entries to monitor writes
799	*
800	* @param pVM The cross context VM structure.
801	*
802	* @remarks ASSUMES the caller will flush all TLBs!!
803	*/
804	void pgmR3PoolWriteProtectPages(PVM pVM)
805	{
806	PGM_LOCK_ASSERT_OWNER(pVM);
807	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
808	unsigned cLeft = pPool->cUsedPages;
809	unsigned iPage = pPool->cCurPages;
810	while (--iPage >= PGMPOOL_IDX_FIRST)
811	{
812	PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
813	if ( pPage->GCPhys != NIL_RTGCPHYS
814	&& pPage->cPresent)
815	{
816	union
817	{
818	void *pv;
819	PX86PT pPT;
820	PPGMSHWPTPAE pPTPae;
821	PEPTPT pPTEpt;
822	} uShw;
823	uShw.pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
824
825	switch (pPage->enmKind)
826	{
827	/*
828	* We only care about shadow page tables.
829	*/
830	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
831	case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
832	case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
833	for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPT->a); iShw++)
834	{
835	if (uShw.pPT->a[iShw].n.u1Present)
836	uShw.pPT->a[iShw].n.u1Write = 0;
837	}
838	break;
839
840	case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
841	case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
842	case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
843	case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
844	case PGMPOOLKIND_PAE_PT_FOR_PHYS:
845	for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTPae->a); iShw++)
846	{
847	if (PGMSHWPTEPAE_IS_P(uShw.pPTPae->a[iShw]))
848	PGMSHWPTEPAE_SET_RO(uShw.pPTPae->a[iShw]);
849	}
850	break;
851
852	case PGMPOOLKIND_EPT_PT_FOR_PHYS:
853	for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTEpt->a); iShw++)
854	{
855	if (uShw.pPTEpt->a[iShw].n.u1Present)
856	uShw.pPTEpt->a[iShw].n.u1Write = 0;
857	}
858	break;
859
860	default:
861	break;
862	}
863	if (!--cLeft)
864	break;
865	}
866	}
867	}
868
869	#ifdef VBOX_WITH_DEBUGGER
870	/**
871	* @callback_method_impl{FNDBGCCMD, The '.pgmpoolcheck' command.}
872	*/
873	static DECLCALLBACK(int) pgmR3PoolCmdCheck(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PUVM pUVM, PCDBGCVAR paArgs, unsigned cArgs)
874	{
875	DBGC_CMDHLP_REQ_UVM_RET(pCmdHlp, pCmd, pUVM);
876	PVM pVM = pUVM->pVM;
877	VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
878	DBGC_CMDHLP_ASSERT_PARSER_RET(pCmdHlp, pCmd, -1, cArgs == 0);
879	uint32_t cErrors = 0;
880	NOREF(paArgs);
881
882	PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
883	for (unsigned i = 0; i < pPool->cCurPages; i++)
884	{
885	PPGMPOOLPAGE pPage = &pPool->aPages[i];
886	bool fFirstMsg = true;
887
888	/** @todo cover other paging modes too. */
889	if (pPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
890	{
891	PPGMSHWPTPAE pShwPT = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
892	{
893	PX86PTPAE pGstPT;
894	PGMPAGEMAPLOCK LockPage;
895	int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, pPage->GCPhys, (const void **)&pGstPT, &LockPage); AssertReleaseRC(rc);
896
897	/* Check if any PTEs are out of sync. */
898	for (unsigned j = 0; j < RT_ELEMENTS(pShwPT->a); j++)
899	{
900	if (PGMSHWPTEPAE_IS_P(pShwPT->a[j]))
901	{
902	RTHCPHYS HCPhys = NIL_RTHCPHYS;
903	rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[j].u & X86_PTE_PAE_PG_MASK, &HCPhys);
904	if ( rc != VINF_SUCCESS
905	\|\| PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[j]) != HCPhys)
906	{
907	if (fFirstMsg)
908	{
909	DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
910	fFirstMsg = false;
911	}
912	DBGCCmdHlpPrintf(pCmdHlp, "Mismatch HCPhys: rc=%Rrc idx=%d guest %RX64 shw=%RX64 vs %RHp\n", rc, j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
913	cErrors++;
914	}
915	else if ( PGMSHWPTEPAE_IS_RW(pShwPT->a[j])
916	&& !pGstPT->a[j].n.u1Write)
917	{
918	if (fFirstMsg)
919	{
920	DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
921	fFirstMsg = false;
922	}
923	DBGCCmdHlpPrintf(pCmdHlp, "Mismatch r/w gst/shw: idx=%d guest %RX64 shw=%RX64 vs %RHp\n", j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
924	cErrors++;
925	}
926	}
927	}
928	PGMPhysReleasePageMappingLock(pVM, &LockPage);
929	}
930
931	/* Make sure this page table can't be written to from any shadow mapping. */
932	RTHCPHYS HCPhysPT = NIL_RTHCPHYS;
933	int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pPage->GCPhys, &HCPhysPT);
934	AssertMsgRC(rc, ("PGMPhysGCPhys2HCPhys failed with rc=%d for %RGp\n", rc, pPage->GCPhys));
935	if (rc == VINF_SUCCESS)
936	{
937	for (unsigned j = 0; j < pPool->cCurPages; j++)
938	{
939	PPGMPOOLPAGE pTempPage = &pPool->aPages[j];
940
941	if (pTempPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
942	{
943	PPGMSHWPTPAE pShwPT2 = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pTempPage);
944
945	for (unsigned k = 0; k < RT_ELEMENTS(pShwPT->a); k++)
946	{
947	if ( PGMSHWPTEPAE_IS_P_RW(pShwPT2->a[k])
948	# ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
949	&& !pPage->fDirty
950	# endif
951	&& PGMSHWPTEPAE_GET_HCPHYS(pShwPT2->a[k]) == HCPhysPT)
952	{
953	if (fFirstMsg)
954	{
955	DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
956	fFirstMsg = false;
957	}
958	DBGCCmdHlpPrintf(pCmdHlp, "Mismatch: r/w: GCPhys=%RGp idx=%d shw %RX64 %RX64\n", pTempPage->GCPhys, k, PGMSHWPTEPAE_GET_LOG(pShwPT->a[k]), PGMSHWPTEPAE_GET_LOG(pShwPT2->a[k]));
959	cErrors++;
960	}
961	}
962	}
963	}
964	}
965	}
966	}
967	if (cErrors > 0)
968	return DBGCCmdHlpFail(pCmdHlp, pCmd, "Found %#x errors", cErrors);
969	return VINF_SUCCESS;
970	}
971	#endif /* VBOX_WITH_DEBUGGER */

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source: vbox/trunk/src/VBox/VMM/VMMR3/PGMPool.cpp@ 80191

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