VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PGMPool.cpp@ 96901

Last change on this file since 96901 was 96901, checked in by vboxsync, 2 years ago

fixing scm complain r153805

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1/* $Id: PGMPool.cpp 96901 2022-09-27 13:44:50Z vboxsync $ */
2/** @file
3 * PGM Shadow Page Pool.
4 */
5
6/*
7 * Copyright (C) 2006-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28/** @page pg_pgm_pool PGM Shadow Page Pool
29 *
30 * Motivations:
31 * -# Relationship between shadow page tables and physical guest pages. This
32 * should allow us to skip most of the global flushes now following access
33 * handler changes. The main expense is flushing shadow pages.
34 * -# Limit the pool size if necessary (default is kind of limitless).
35 * -# Allocate shadow pages from RC. We use to only do this in SyncCR3.
36 * -# Required for 64-bit guests.
37 * -# Combining the PD cache and page pool in order to simplify caching.
38 *
39 *
40 * @section sec_pgm_pool_outline Design Outline
41 *
42 * The shadow page pool tracks pages used for shadowing paging structures (i.e.
43 * page tables, page directory, page directory pointer table and page map
44 * level-4). Each page in the pool has an unique identifier. This identifier is
45 * used to link a guest physical page to a shadow PT. The identifier is a
46 * non-zero value and has a relativly low max value - say 14 bits. This makes it
47 * possible to fit it into the upper bits of the of the aHCPhys entries in the
48 * ram range.
49 *
50 * By restricting host physical memory to the first 48 bits (which is the
51 * announced physical memory range of the K8L chip (scheduled for 2008)), we
52 * can safely use the upper 16 bits for shadow page ID and reference counting.
53 *
54 * Update: The 48 bit assumption will be lifted with the new physical memory
55 * management (PGMPAGE), so we won't have any trouble when someone stuffs 2TB
56 * into a box in some years.
57 *
58 * Now, it's possible for a page to be aliased, i.e. mapped by more than one PT
59 * or PD. This is solved by creating a list of physical cross reference extents
60 * when ever this happens. Each node in the list (extent) is can contain 3 page
61 * pool indexes. The list it self is chained using indexes into the paPhysExt
62 * array.
63 *
64 *
65 * @section sec_pgm_pool_life Life Cycle of a Shadow Page
66 *
67 * -# The SyncPT function requests a page from the pool.
68 * The request includes the kind of page it is (PT/PD, PAE/legacy), the
69 * address of the page it's shadowing, and more.
70 * -# The pool responds to the request by allocating a new page.
71 * When the cache is enabled, it will first check if it's in the cache.
72 * Should the pool be exhausted, one of two things can be done:
73 * -# Flush the whole pool and current CR3.
74 * -# Use the cache to find a page which can be flushed (~age).
75 * -# The SyncPT function will sync one or more pages and insert it into the
76 * shadow PD.
77 * -# The SyncPage function may sync more pages on a later \#PFs.
78 * -# The page is freed / flushed in SyncCR3 (perhaps) and some other cases.
79 * When caching is enabled, the page isn't flush but remains in the cache.
80 *
81 *
82 * @section sec_pgm_pool_monitoring Monitoring
83 *
84 * We always monitor GUEST_PAGE_SIZE chunks of memory. When we've got multiple
85 * shadow pages for the same GUEST_PAGE_SIZE of guest memory (PAE and mixed
86 * PD/PT) the pages sharing the monitor get linked using the
87 * iMonitoredNext/Prev. The head page is the pvUser to the access handlers.
88 *
89 *
90 * @section sec_pgm_pool_impl Implementation
91 *
92 * The pool will take pages from the MM page pool. The tracking data
93 * (attributes, bitmaps and so on) are allocated from the hypervisor heap. The
94 * pool content can be accessed both by using the page id and the physical
95 * address (HC). The former is managed by means of an array, the latter by an
96 * offset based AVL tree.
97 *
98 * Flushing of a pool page means that we iterate the content (we know what kind
99 * it is) and updates the link information in the ram range.
100 *
101 * ...
102 */
103
104
105/*********************************************************************************************************************************
106* Header Files *
107*********************************************************************************************************************************/
108#define LOG_GROUP LOG_GROUP_PGM_POOL
109#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
110#include <VBox/vmm/pgm.h>
111#include <VBox/vmm/mm.h>
112#include "PGMInternal.h"
113#include <VBox/vmm/vmcc.h>
114#include <VBox/vmm/uvm.h>
115#include "PGMInline.h"
116
117#include <VBox/log.h>
118#include <VBox/err.h>
119#include <iprt/asm.h>
120#include <iprt/string.h>
121#include <VBox/dbg.h>
122
123
124/*********************************************************************************************************************************
125* Internal Functions *
126*********************************************************************************************************************************/
127static FNDBGFHANDLERINT pgmR3PoolInfoRoots;
128
129#ifdef VBOX_WITH_DEBUGGER
130static FNDBGCCMD pgmR3PoolCmdCheck;
131
132/** Command descriptors. */
133static const DBGCCMD g_aCmds[] =
134{
135 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
136 { "pgmpoolcheck", 0, 0, NULL, 0, 0, pgmR3PoolCmdCheck, "", "Check the pgm pool pages." },
137};
138#endif
139
140/**
141 * Initializes the pool
142 *
143 * @returns VBox status code.
144 * @param pVM The cross context VM structure.
145 */
146int pgmR3PoolInit(PVM pVM)
147{
148 int rc;
149
150 AssertCompile(NIL_PGMPOOL_IDX == 0);
151 /* pPage->cLocked is an unsigned byte. */
152 AssertCompile(VMM_MAX_CPU_COUNT <= 255);
153
154 /*
155 * Query Pool config.
156 */
157 PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM/Pool");
158
159 /* Default pgm pool size is 1024 pages (4MB). */
160 uint16_t cMaxPages = 1024;
161
162 /* Adjust it up relative to the RAM size, using the nested paging formula. */
163 uint64_t cbRam;
164 rc = CFGMR3QueryU64Def(CFGMR3GetRoot(pVM), "RamSize", &cbRam, 0); AssertRCReturn(rc, rc);
165 /** @todo guest x86 specific */
166 uint64_t u64MaxPages = (cbRam >> 9)
167 + (cbRam >> 18)
168 + (cbRam >> 27)
169 + 32 * GUEST_PAGE_SIZE;
170 u64MaxPages >>= GUEST_PAGE_SHIFT;
171 if (u64MaxPages > PGMPOOL_IDX_LAST)
172 cMaxPages = PGMPOOL_IDX_LAST;
173 else
174 cMaxPages = (uint16_t)u64MaxPages;
175
176 /** @cfgm{/PGM/Pool/MaxPages, uint16_t, \#pages, 16, 0x3fff, F(ram-size)}
177 * The max size of the shadow page pool in pages. The pool will grow dynamically
178 * up to this limit.
179 */
180 rc = CFGMR3QueryU16Def(pCfg, "MaxPages", &cMaxPages, cMaxPages);
181 AssertLogRelRCReturn(rc, rc);
182 AssertLogRelMsgReturn(cMaxPages <= PGMPOOL_IDX_LAST && cMaxPages >= RT_ALIGN(PGMPOOL_IDX_FIRST, 16),
183 ("cMaxPages=%u (%#x)\n", cMaxPages, cMaxPages), VERR_INVALID_PARAMETER);
184 AssertCompile(RT_IS_POWER_OF_TWO(PGMPOOL_CFG_MAX_GROW));
185 if (cMaxPages < PGMPOOL_IDX_LAST)
186 cMaxPages = RT_ALIGN(cMaxPages, PGMPOOL_CFG_MAX_GROW / 2);
187 if (cMaxPages > PGMPOOL_IDX_LAST)
188 cMaxPages = PGMPOOL_IDX_LAST;
189 LogRel(("PGM: PGMPool: cMaxPages=%u (u64MaxPages=%llu)\n", cMaxPages, u64MaxPages));
190
191 /** @todo
192 * We need to be much more careful with our allocation strategy here.
193 * For nested paging we don't need pool user info nor extents at all, but
194 * we can't check for nested paging here (too early during init to get a
195 * confirmation it can be used). The default for large memory configs is a
196 * bit large for shadow paging, so I've restricted the extent maximum to 8k
197 * (8k * 16 = 128k of hyper heap).
198 *
199 * Also when large page support is enabled, we typically don't need so much,
200 * although that depends on the availability of 2 MB chunks on the host.
201 */
202
203 /** @cfgm{/PGM/Pool/MaxUsers, uint16_t, \#users, MaxUsers, 32K, MaxPages*2}
204 * The max number of shadow page user tracking records. Each shadow page has
205 * zero of other shadow pages (or CR3s) that references it, or uses it if you
206 * like. The structures describing these relationships are allocated from a
207 * fixed sized pool. This configuration variable defines the pool size.
208 */
209 uint16_t cMaxUsers;
210 rc = CFGMR3QueryU16Def(pCfg, "MaxUsers", &cMaxUsers, cMaxPages * 2);
211 AssertLogRelRCReturn(rc, rc);
212 AssertLogRelMsgReturn(cMaxUsers >= cMaxPages && cMaxPages <= _32K,
213 ("cMaxUsers=%u (%#x)\n", cMaxUsers, cMaxUsers), VERR_INVALID_PARAMETER);
214
215 /** @cfgm{/PGM/Pool/MaxPhysExts, uint16_t, \#extents, 16, MaxPages * 2, MIN(MaxPages*2\,8192)}
216 * The max number of extents for tracking aliased guest pages.
217 */
218 uint16_t cMaxPhysExts;
219 rc = CFGMR3QueryU16Def(pCfg, "MaxPhysExts", &cMaxPhysExts,
220 RT_MIN(cMaxPages * 2, 8192 /* 8Ki max as this eat too much hyper heap */));
221 AssertLogRelRCReturn(rc, rc);
222 AssertLogRelMsgReturn(cMaxPhysExts >= 16 && cMaxPhysExts <= PGMPOOL_IDX_LAST,
223 ("cMaxPhysExts=%u (%#x)\n", cMaxPhysExts, cMaxPhysExts), VERR_INVALID_PARAMETER);
224
225 /** @cfgm{/PGM/Pool/ChacheEnabled, bool, true}
226 * Enables or disabling caching of shadow pages. Caching means that we will try
227 * reuse shadow pages instead of recreating them everything SyncCR3, SyncPT or
228 * SyncPage requests one. When reusing a shadow page, we can save time
229 * reconstructing it and it's children.
230 */
231 bool fCacheEnabled;
232 rc = CFGMR3QueryBoolDef(pCfg, "CacheEnabled", &fCacheEnabled, true);
233 AssertLogRelRCReturn(rc, rc);
234
235 LogRel(("PGM: pgmR3PoolInit: cMaxPages=%#RX16 cMaxUsers=%#RX16 cMaxPhysExts=%#RX16 fCacheEnable=%RTbool\n",
236 cMaxPages, cMaxUsers, cMaxPhysExts, fCacheEnabled));
237
238 /*
239 * Allocate the data structures.
240 */
241 uint32_t cb = RT_UOFFSETOF_DYN(PGMPOOL, aPages[cMaxPages]);
242 cb += cMaxUsers * sizeof(PGMPOOLUSER);
243 cb += cMaxPhysExts * sizeof(PGMPOOLPHYSEXT);
244 PPGMPOOL pPool;
245 RTR0PTR pPoolR0;
246 rc = SUPR3PageAllocEx(RT_ALIGN_32(cb, HOST_PAGE_SIZE) >> HOST_PAGE_SHIFT, 0 /*fFlags*/, (void **)&pPool, &pPoolR0, NULL);
247 if (RT_FAILURE(rc))
248 return rc;
249 Assert(ASMMemIsZero(pPool, cb));
250 pVM->pgm.s.pPoolR3 = pPool->pPoolR3 = pPool;
251 pVM->pgm.s.pPoolR0 = pPool->pPoolR0 = pPoolR0;
252
253 /*
254 * Initialize it.
255 */
256 pPool->pVMR3 = pVM;
257 pPool->pVMR0 = pVM->pVMR0ForCall;
258 pPool->cMaxPages = cMaxPages;
259 pPool->cCurPages = PGMPOOL_IDX_FIRST;
260 pPool->iUserFreeHead = 0;
261 pPool->cMaxUsers = cMaxUsers;
262 PPGMPOOLUSER paUsers = (PPGMPOOLUSER)&pPool->aPages[pPool->cMaxPages];
263 pPool->paUsersR3 = paUsers;
264 pPool->paUsersR0 = pPoolR0 + (uintptr_t)paUsers - (uintptr_t)pPool;
265 for (unsigned i = 0; i < cMaxUsers; i++)
266 {
267 paUsers[i].iNext = i + 1;
268 paUsers[i].iUser = NIL_PGMPOOL_IDX;
269 paUsers[i].iUserTable = 0xfffffffe;
270 }
271 paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
272 pPool->iPhysExtFreeHead = 0;
273 pPool->cMaxPhysExts = cMaxPhysExts;
274 PPGMPOOLPHYSEXT paPhysExts = (PPGMPOOLPHYSEXT)&paUsers[cMaxUsers];
275 pPool->paPhysExtsR3 = paPhysExts;
276 pPool->paPhysExtsR0 = pPoolR0 + (uintptr_t)paPhysExts - (uintptr_t)pPool;
277 for (unsigned i = 0; i < cMaxPhysExts; i++)
278 {
279 paPhysExts[i].iNext = i + 1;
280 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
281 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
282 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
283 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
284 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
285 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
286 }
287 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
288 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
289 pPool->aiHash[i] = NIL_PGMPOOL_IDX;
290 pPool->iAgeHead = NIL_PGMPOOL_IDX;
291 pPool->iAgeTail = NIL_PGMPOOL_IDX;
292 pPool->fCacheEnabled = fCacheEnabled;
293
294 pPool->hAccessHandlerType = NIL_PGMPHYSHANDLERTYPE;
295 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, PGMPHYSHANDLER_F_KEEP_PGM_LOCK,
296 pgmPoolAccessHandler, "Guest Paging Access Handler", &pPool->hAccessHandlerType);
297 AssertLogRelRCReturn(rc, rc);
298
299 pPool->HCPhysTree = 0;
300
301 /*
302 * The NIL entry.
303 */
304 Assert(NIL_PGMPOOL_IDX == 0);
305 pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID;
306 pPool->aPages[NIL_PGMPOOL_IDX].idx = NIL_PGMPOOL_IDX;
307 pPool->aPages[NIL_PGMPOOL_IDX].Core.Key = NIL_RTHCPHYS;
308 pPool->aPages[NIL_PGMPOOL_IDX].GCPhys = NIL_RTGCPHYS;
309 pPool->aPages[NIL_PGMPOOL_IDX].iNext = NIL_PGMPOOL_IDX;
310 /* pPool->aPages[NIL_PGMPOOL_IDX].cLocked = INT32_MAX; - test this out... */
311 pPool->aPages[NIL_PGMPOOL_IDX].pvPageR3 = 0;
312 pPool->aPages[NIL_PGMPOOL_IDX].iUserHead = NIL_PGMPOOL_USER_INDEX;
313 pPool->aPages[NIL_PGMPOOL_IDX].iModifiedNext = NIL_PGMPOOL_IDX;
314 pPool->aPages[NIL_PGMPOOL_IDX].iModifiedPrev = NIL_PGMPOOL_IDX;
315 pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredNext = NIL_PGMPOOL_IDX;
316 pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredPrev = NIL_PGMPOOL_IDX;
317 pPool->aPages[NIL_PGMPOOL_IDX].iAgeNext = NIL_PGMPOOL_IDX;
318 pPool->aPages[NIL_PGMPOOL_IDX].iAgePrev = NIL_PGMPOOL_IDX;
319
320 Assert(pPool->aPages[NIL_PGMPOOL_IDX].idx == NIL_PGMPOOL_IDX);
321 Assert(pPool->aPages[NIL_PGMPOOL_IDX].GCPhys == NIL_RTGCPHYS);
322 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fSeenNonGlobal);
323 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fMonitored);
324 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fCached);
325 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fZeroed);
326 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fReusedFlushPending);
327
328 /*
329 * Register statistics.
330 */
331 STAM_REL_REG(pVM, &pPool->StatGrow, STAMTYPE_PROFILE, "/PGM/Pool/Grow", STAMUNIT_TICKS_PER_CALL, "Profiling PGMR0PoolGrow");
332#ifdef VBOX_WITH_STATISTICS
333 STAM_REG(pVM, &pPool->cCurPages, STAMTYPE_U16, "/PGM/Pool/cCurPages", STAMUNIT_PAGES, "Current pool size.");
334 STAM_REG(pVM, &pPool->cMaxPages, STAMTYPE_U16, "/PGM/Pool/cMaxPages", STAMUNIT_PAGES, "Max pool size.");
335 STAM_REG(pVM, &pPool->cUsedPages, STAMTYPE_U16, "/PGM/Pool/cUsedPages", STAMUNIT_PAGES, "The number of pages currently in use.");
336 STAM_REG(pVM, &pPool->cUsedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/cUsedPagesHigh", STAMUNIT_PAGES, "The high watermark for cUsedPages.");
337 STAM_REG(pVM, &pPool->StatAlloc, STAMTYPE_PROFILE_ADV, "/PGM/Pool/Alloc", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolAlloc.");
338 STAM_REG(pVM, &pPool->StatClearAll, STAMTYPE_PROFILE, "/PGM/Pool/ClearAll", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolClearAll.");
339 STAM_REG(pVM, &pPool->StatR3Reset, STAMTYPE_PROFILE, "/PGM/Pool/R3Reset", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolReset.");
340 STAM_REG(pVM, &pPool->StatFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFlushPage.");
341 STAM_REG(pVM, &pPool->StatFree, STAMTYPE_PROFILE, "/PGM/Pool/Free", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFree.");
342 STAM_REG(pVM, &pPool->StatForceFlushPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForce", STAMUNIT_OCCURENCES, "Counting explicit flushes by PGMPoolFlushPage().");
343 STAM_REG(pVM, &pPool->StatForceFlushDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForceDirty", STAMUNIT_OCCURENCES, "Counting explicit flushes of dirty pages by PGMPoolFlushPage().");
344 STAM_REG(pVM, &pPool->StatForceFlushReused, STAMTYPE_COUNTER, "/PGM/Pool/FlushReused", STAMUNIT_OCCURENCES, "Counting flushes for reused pages.");
345 STAM_REG(pVM, &pPool->StatZeroPage, STAMTYPE_PROFILE, "/PGM/Pool/ZeroPage", STAMUNIT_TICKS_PER_CALL, "Profiling time spent zeroing pages. Overlaps with Alloc.");
346 STAM_REG(pVM, &pPool->cMaxUsers, STAMTYPE_U16, "/PGM/Pool/Track/cMaxUsers", STAMUNIT_COUNT, "Max user tracking records.");
347 STAM_REG(pVM, &pPool->cPresent, STAMTYPE_U32, "/PGM/Pool/Track/cPresent", STAMUNIT_COUNT, "Number of present page table entries.");
348 STAM_REG(pVM, &pPool->StatTrackDeref, STAMTYPE_PROFILE, "/PGM/Pool/Track/Deref", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackDeref.");
349 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPT, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPT", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPT.");
350 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTs, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTs", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTs.");
351 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTsSlow, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTsSlow", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTsSlow.");
352 STAM_REG(pVM, &pPool->StatTrackFlushEntry, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Flush", STAMUNIT_COUNT, "Nr of flushed entries.");
353 STAM_REG(pVM, &pPool->StatTrackFlushEntryKeep, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Update", STAMUNIT_COUNT, "Nr of updated entries.");
354 STAM_REG(pVM, &pPool->StatTrackFreeUpOneUser, STAMTYPE_COUNTER, "/PGM/Pool/Track/FreeUpOneUser", STAMUNIT_TICKS_PER_CALL, "The number of times we were out of user tracking records.");
355 STAM_REG(pVM, &pPool->StatTrackDerefGCPhys, STAMTYPE_PROFILE, "/PGM/Pool/Track/DrefGCPhys", STAMUNIT_TICKS_PER_CALL, "Profiling deref activity related tracking GC physical pages.");
356 STAM_REG(pVM, &pPool->StatTrackLinearRamSearches, STAMTYPE_COUNTER, "/PGM/Pool/Track/LinearRamSearches", STAMUNIT_OCCURENCES, "The number of times we had to do linear ram searches.");
357 STAM_REG(pVM, &pPool->StamTrackPhysExtAllocFailures,STAMTYPE_COUNTER, "/PGM/Pool/Track/PhysExtAllocFailures", STAMUNIT_OCCURENCES, "The number of failing pgmPoolTrackPhysExtAlloc calls.");
358
359 STAM_REG(pVM, &pPool->StatMonitorPfRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access handler.");
360 STAM_REG(pVM, &pPool->StatMonitorPfRZEmulateInstr, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/EmulateInstr", STAMUNIT_OCCURENCES, "Times we've failed interpreting the instruction.");
361 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the RC/R0 access handler.");
362 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushReinit, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushReinit", STAMUNIT_OCCURENCES, "Times we've detected a page table reinit.");
363 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushModOverflow,STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushOverflow", STAMUNIT_OCCURENCES, "Counting flushes for pages that are modified too often.");
364 STAM_REG(pVM, &pPool->StatMonitorPfRZFork, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/Fork", STAMUNIT_OCCURENCES, "Times we've detected fork().");
365 STAM_REG(pVM, &pPool->StatMonitorPfRZHandled, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/Handled", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access we've handled (except REP STOSD).");
366 STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch1, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch1", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction.");
367 STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch2, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch2", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction during flushing.");
368 STAM_REG(pVM, &pPool->StatMonitorPfRZRepPrefix, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/RepPrefix", STAMUNIT_OCCURENCES, "The number of times we've seen rep prefixes we can't handle.");
369 STAM_REG(pVM, &pPool->StatMonitorPfRZRepStosd, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/RepStosd", STAMUNIT_TICKS_PER_CALL, "Profiling the REP STOSD cases we've handled.");
370
371 STAM_REG(pVM, &pPool->StatMonitorRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM", STAMUNIT_TICKS_PER_CALL, "Profiling the regular access handler.");
372 STAM_REG(pVM, &pPool->StatMonitorRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the regular access handler.");
373 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses.");
374 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses.");
375 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses.");
376 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses.");
377 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses.");
378 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses.");
379 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses.");
380 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[7], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses.");
381 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[8], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses.");
382 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[9], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses.");
383 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[10], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses.");
384 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[11], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses.");
385 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[12], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses.");
386 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[13], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses.");
387 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[14], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses.");
388 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[15], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses.");
389 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[16], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
390 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[17], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
391 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[18], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
392 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1.");
393 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2.");
394 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3.");
395 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4.");
396 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5.");
397 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6.");
398 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7.");
399
400 STAM_REG(pVM, &pPool->StatMonitorRZFaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
401 STAM_REG(pVM, &pPool->StatMonitorRZFaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
402 STAM_REG(pVM, &pPool->StatMonitorRZFaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
403 STAM_REG(pVM, &pPool->StatMonitorRZFaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
404
405 STAM_REG(pVM, &pPool->StatMonitorR3, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3", STAMUNIT_TICKS_PER_CALL, "Profiling the R3 access handler.");
406 STAM_REG(pVM, &pPool->StatMonitorR3FlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the R3 access handler.");
407 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses (R3).");
408 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses (R3).");
409 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses (R3).");
410 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses (R3).");
411 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses (R3).");
412 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses (R3).");
413 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses (R3).");
414 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[7], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses (R3).");
415 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[8], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses (R3).");
416 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[9], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses (R3).");
417 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[10], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses (R3).");
418 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[11], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses (R3).");
419 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[12], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses (R3).");
420 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[13], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses (R3).");
421 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[14], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses (R3).");
422 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[15], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses (R3).");
423 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[16], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
424 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[17], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
425 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[18], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
426 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1 in R3.");
427 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2 in R3.");
428 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3 in R3.");
429 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4 in R3.");
430 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5 in R3.");
431 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6 in R3.");
432 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7 in R3.");
433
434 STAM_REG(pVM, &pPool->StatMonitorR3FaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
435 STAM_REG(pVM, &pPool->StatMonitorR3FaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
436 STAM_REG(pVM, &pPool->StatMonitorR3FaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
437 STAM_REG(pVM, &pPool->StatMonitorR3FaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
438
439 STAM_REG(pVM, &pPool->cModifiedPages, STAMTYPE_U16, "/PGM/Pool/Monitor/cModifiedPages", STAMUNIT_PAGES, "The current cModifiedPages value.");
440 STAM_REG(pVM, &pPool->cModifiedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/Monitor/cModifiedPagesHigh", STAMUNIT_PAGES, "The high watermark for cModifiedPages.");
441 STAM_REG(pVM, &pPool->StatResetDirtyPages, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Resets", STAMUNIT_OCCURENCES, "Times we've called pgmPoolResetDirtyPages (and there were dirty page).");
442 STAM_REG(pVM, &pPool->StatDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Pages", STAMUNIT_OCCURENCES, "Times we've called pgmPoolAddDirtyPage.");
443 STAM_REG(pVM, &pPool->StatDirtyPageDupFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushDup", STAMUNIT_OCCURENCES, "Times we've had to flush duplicates for dirty page management.");
444 STAM_REG(pVM, &pPool->StatDirtyPageOverFlowFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushOverflow",STAMUNIT_OCCURENCES, "Times we've had to flush because of overflow.");
445 STAM_REG(pVM, &pPool->StatCacheHits, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Hits", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls satisfied by the cache.");
446 STAM_REG(pVM, &pPool->StatCacheMisses, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Misses", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls not statisfied by the cache.");
447 STAM_REG(pVM, &pPool->StatCacheKindMismatches, STAMTYPE_COUNTER, "/PGM/Pool/Cache/KindMismatches", STAMUNIT_OCCURENCES, "The number of shadow page kind mismatches. (Better be low, preferably 0!)");
448 STAM_REG(pVM, &pPool->StatCacheFreeUpOne, STAMTYPE_COUNTER, "/PGM/Pool/Cache/FreeUpOne", STAMUNIT_OCCURENCES, "The number of times the cache was asked to free up a page.");
449 STAM_REG(pVM, &pPool->StatCacheCacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Cacheable", STAMUNIT_OCCURENCES, "The number of cacheable allocations.");
450 STAM_REG(pVM, &pPool->StatCacheUncacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Uncacheable", STAMUNIT_OCCURENCES, "The number of uncacheable allocations.");
451#endif /* VBOX_WITH_STATISTICS */
452
453 DBGFR3InfoRegisterInternalEx(pVM, "pgmpoolroots", "Lists page pool roots.", pgmR3PoolInfoRoots, 0);
454
455#ifdef VBOX_WITH_DEBUGGER
456 /*
457 * Debugger commands.
458 */
459 static bool s_fRegisteredCmds = false;
460 if (!s_fRegisteredCmds)
461 {
462 rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
463 if (RT_SUCCESS(rc))
464 s_fRegisteredCmds = true;
465 }
466#endif
467
468 return VINF_SUCCESS;
469}
470
471
472/**
473 * Relocate the page pool data.
474 *
475 * @param pVM The cross context VM structure.
476 */
477void pgmR3PoolRelocate(PVM pVM)
478{
479 RT_NOREF(pVM);
480}
481
482
483/**
484 * Grows the shadow page pool.
485 *
486 * I.e. adds more pages to it, assuming that hasn't reached cMaxPages yet.
487 *
488 * @returns VBox status code.
489 * @param pVM The cross context VM structure.
490 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
491 */
492VMMR3_INT_DECL(int) PGMR3PoolGrow(PVM pVM, PVMCPU pVCpu)
493{
494 /* This used to do a lot of stuff, but it has moved to ring-0 (PGMR0PoolGrow). */
495 AssertReturn(pVM->pgm.s.pPoolR3->cCurPages < pVM->pgm.s.pPoolR3->cMaxPages, VERR_PGM_POOL_MAXED_OUT_ALREADY);
496 int rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_PGM_POOL_GROW, 0, NULL);
497 if (rc == VINF_SUCCESS)
498 return rc;
499 LogRel(("PGMR3PoolGrow: rc=%Rrc cCurPages=%#x cMaxPages=%#x\n",
500 rc, pVM->pgm.s.pPoolR3->cCurPages, pVM->pgm.s.pPoolR3->cMaxPages));
501 if (pVM->pgm.s.pPoolR3->cCurPages > 128 && RT_FAILURE_NP(rc))
502 return -rc;
503 return rc;
504}
505
506
507/**
508 * Rendezvous callback used by pgmR3PoolClearAll that clears all shadow pages
509 * and all modification counters.
510 *
511 * This is only called on one of the EMTs while the other ones are waiting for
512 * it to complete this function.
513 *
514 * @returns VINF_SUCCESS (VBox strict status code).
515 * @param pVM The cross context VM structure.
516 * @param pVCpu The cross context virtual CPU structure of the calling EMT. Unused.
517 * @param fpvFlushRemTlb When not NULL, we'll flush the REM TLB as well.
518 * (This is the pvUser, so it has to be void *.)
519 *
520 */
521DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, void *fpvFlushRemTlb)
522{
523 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
524 STAM_PROFILE_START(&pPool->StatClearAll, c);
525 NOREF(pVCpu);
526
527 PGM_LOCK_VOID(pVM);
528 Log(("pgmR3PoolClearAllRendezvous: cUsedPages=%d fpvFlushRemTlb=%RTbool\n", pPool->cUsedPages, !!fpvFlushRemTlb));
529
530 /*
531 * Iterate all the pages until we've encountered all that are in use.
532 * This is a simple but not quite optimal solution.
533 */
534 unsigned cModifiedPages = 0; NOREF(cModifiedPages);
535 unsigned cLeft = pPool->cUsedPages;
536 uint32_t iPage = pPool->cCurPages;
537 while (--iPage >= PGMPOOL_IDX_FIRST)
538 {
539 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
540 if (pPage->GCPhys != NIL_RTGCPHYS)
541 {
542 switch (pPage->enmKind)
543 {
544 /*
545 * We only care about shadow page tables that reference physical memory
546 */
547#ifdef PGM_WITH_LARGE_PAGES
548 case PGMPOOLKIND_PAE_PD_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
549 if (pPage->cPresent)
550 {
551 PX86PDPAE pShwPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
552 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
553 {
554 //Assert((pShwPD->a[i].u & UINT64_C(0xfff0000000000f80)) == 0); - bogus, includes X86_PDE_PS.
555 if ((pShwPD->a[i].u & (X86_PDE_P | X86_PDE_PS)) == (X86_PDE_P | X86_PDE_PS))
556 {
557 pShwPD->a[i].u = 0;
558 Assert(pPage->cPresent);
559 pPage->cPresent--;
560 }
561 }
562 if (pPage->cPresent == 0)
563 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
564 }
565 goto default_case;
566
567 case PGMPOOLKIND_EPT_PD_FOR_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
568 if (pPage->cPresent)
569 {
570 PEPTPD pShwPD = (PEPTPD)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
571 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
572 {
573 if ((pShwPD->a[i].u & (EPT_E_READ | EPT_E_LEAF)) == (EPT_E_READ | EPT_E_LEAF))
574 {
575 pShwPD->a[i].u = 0;
576 Assert(pPage->cPresent);
577 pPage->cPresent--;
578 }
579 }
580 if (pPage->cPresent == 0)
581 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
582 }
583 goto default_case;
584#endif /* PGM_WITH_LARGE_PAGES */
585
586 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
587 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
588 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
589 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
590 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
591 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
592 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
593 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
594 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
595#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
596 case PGMPOOLKIND_EPT_PT_FOR_EPT_PT:
597 case PGMPOOLKIND_EPT_PD_FOR_EPT_PD:
598 case PGMPOOLKIND_EPT_PDPT_FOR_EPT_PDPT:
599 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4:
600#endif
601 {
602 if (pPage->cPresent)
603 {
604 void *pvShw = PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
605 STAM_PROFILE_START(&pPool->StatZeroPage, z);
606#ifdef VBOX_STRICT
607 if (PGMPOOL_PAGE_IS_NESTED(pPage))
608 {
609 PEPTPT pPT = (PEPTPT)pvShw;
610 for (unsigned idxPt = 0; idxPt < RT_ELEMENTS(pPT->a); idxPt++)
611 if (pPT->a[idxPt].u & EPT_PRESENT_MASK)
612 Assert(!(pPT->a[idxPt].u & EPT_E_LEAF)); /* We don't support large pages as of yet. */
613 }
614#endif
615#if 0
616 /* Useful check for leaking references; *very* expensive though. */
617 switch (pPage->enmKind)
618 {
619 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
620 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
621 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
622 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
623 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
624 {
625 bool fFoundFirst = false;
626 PPGMSHWPTPAE pPT = (PPGMSHWPTPAE)pvShw;
627 for (unsigned ptIndex = 0; ptIndex < RT_ELEMENTS(pPT->a); ptIndex++)
628 {
629 if (pPT->a[ptIndex].u)
630 {
631 if (!fFoundFirst)
632 {
633 AssertFatalMsg(pPage->iFirstPresent <= ptIndex, ("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
634 if (pPage->iFirstPresent != ptIndex)
635 Log(("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
636 fFoundFirst = true;
637 }
638 if (PGMSHWPTEPAE_IS_P(pPT->a[ptIndex]))
639 {
640 pgmPoolTracDerefGCPhysHint(pPool, pPage, PGMSHWPTEPAE_GET_HCPHYS(pPT->a[ptIndex]), NIL_RTGCPHYS);
641 if (pPage->iFirstPresent == ptIndex)
642 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
643 }
644 }
645 }
646 AssertFatalMsg(pPage->cPresent == 0, ("cPresent = %d pPage = %RGv\n", pPage->cPresent, pPage->GCPhys));
647 break;
648 }
649 default:
650 break;
651 }
652#endif
653 ASMMemZeroPage(pvShw);
654 STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
655 pPage->cPresent = 0;
656 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
657 }
658 }
659 RT_FALL_THRU();
660 default:
661#ifdef PGM_WITH_LARGE_PAGES
662 default_case:
663#endif
664 Assert(!pPage->cModifications || ++cModifiedPages);
665 Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX || pPage->cModifications);
666 Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX || pPage->cModifications);
667 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
668 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
669 pPage->cModifications = 0;
670 break;
671
672 }
673 if (!--cLeft)
674 break;
675 }
676 }
677
678#ifndef DEBUG_michael
679 AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
680#endif
681 pPool->iModifiedHead = NIL_PGMPOOL_IDX;
682 pPool->cModifiedPages = 0;
683
684 /*
685 * Clear all the GCPhys links and rebuild the phys ext free list.
686 */
687 for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRangesX);
688 pRam;
689 pRam = pRam->CTX_SUFF(pNext))
690 {
691 iPage = pRam->cb >> GUEST_PAGE_SHIFT;
692 while (iPage-- > 0)
693 PGM_PAGE_SET_TRACKING(pVM, &pRam->aPages[iPage], 0);
694 }
695
696 pPool->iPhysExtFreeHead = 0;
697 PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
698 const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
699 for (unsigned i = 0; i < cMaxPhysExts; i++)
700 {
701 paPhysExts[i].iNext = i + 1;
702 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
703 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
704 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
705 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
706 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
707 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
708 }
709 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
710
711
712#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
713 /* Reset all dirty pages to reactivate the page monitoring. */
714 /* Note: we must do this *after* clearing all page references and shadow page tables as there might be stale references to
715 * recently removed MMIO ranges around that might otherwise end up asserting in pgmPoolTracDerefGCPhysHint
716 */
717 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++)
718 {
719 unsigned idxPage = pPool->aidxDirtyPages[i];
720 if (idxPage == NIL_PGMPOOL_IDX)
721 continue;
722
723 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage];
724 Assert(pPage->idx == idxPage);
725 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
726
727 AssertMsg(pPage->fDirty, ("Page %RGp (slot=%d) not marked dirty!", pPage->GCPhys, i));
728
729 Log(("Reactivate dirty page %RGp\n", pPage->GCPhys));
730
731 /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
732 int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK);
733 AssertRCSuccess(rc);
734 pPage->fDirty = false;
735
736 pPool->aidxDirtyPages[i] = NIL_PGMPOOL_IDX;
737 }
738
739 /* Clear all dirty pages. */
740 pPool->idxFreeDirtyPage = 0;
741 pPool->cDirtyPages = 0;
742#endif
743
744 /* Clear the PGM_SYNC_CLEAR_PGM_POOL flag on all VCPUs to prevent redundant flushes. */
745 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
746 pVM->apCpusR3[idCpu]->pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
747
748 /* Flush job finished. */
749 VM_FF_CLEAR(pVM, VM_FF_PGM_POOL_FLUSH_PENDING);
750 pPool->cPresent = 0;
751 PGM_UNLOCK(pVM);
752
753 PGM_INVL_ALL_VCPU_TLBS(pVM);
754
755 if (fpvFlushRemTlb)
756 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
757 CPUMSetChangedFlags(pVM->apCpusR3[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
758
759 STAM_PROFILE_STOP(&pPool->StatClearAll, c);
760 return VINF_SUCCESS;
761}
762
763
764/**
765 * Clears the shadow page pool.
766 *
767 * @param pVM The cross context VM structure.
768 * @param fFlushRemTlb When set, the REM TLB is scheduled for flushing as
769 * well.
770 */
771void pgmR3PoolClearAll(PVM pVM, bool fFlushRemTlb)
772{
773 int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PoolClearAllRendezvous, &fFlushRemTlb);
774 AssertRC(rc);
775}
776
777
778/**
779 * Protect all pgm pool page table entries to monitor writes
780 *
781 * @param pVM The cross context VM structure.
782 *
783 * @remarks ASSUMES the caller will flush all TLBs!!
784 */
785void pgmR3PoolWriteProtectPages(PVM pVM)
786{
787 PGM_LOCK_ASSERT_OWNER(pVM);
788 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
789 unsigned cLeft = pPool->cUsedPages;
790 unsigned iPage = pPool->cCurPages;
791 while (--iPage >= PGMPOOL_IDX_FIRST)
792 {
793 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
794 if ( pPage->GCPhys != NIL_RTGCPHYS
795 && pPage->cPresent)
796 {
797 union
798 {
799 void *pv;
800 PX86PT pPT;
801 PPGMSHWPTPAE pPTPae;
802 PEPTPT pPTEpt;
803 } uShw;
804 uShw.pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
805
806 switch (pPage->enmKind)
807 {
808 /*
809 * We only care about shadow page tables.
810 */
811 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
812 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
813 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
814 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPT->a); iShw++)
815 if (uShw.pPT->a[iShw].u & X86_PTE_P)
816 uShw.pPT->a[iShw].u = ~(X86PGUINT)X86_PTE_RW;
817 break;
818
819 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
820 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
821 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
822 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
823 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
824 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTPae->a); iShw++)
825 if (PGMSHWPTEPAE_IS_P(uShw.pPTPae->a[iShw]))
826 PGMSHWPTEPAE_SET_RO(uShw.pPTPae->a[iShw]);
827 break;
828
829 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
830 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTEpt->a); iShw++)
831 if (uShw.pPTEpt->a[iShw].u & EPT_E_READ)
832 uShw.pPTEpt->a[iShw].u &= ~(X86PGPAEUINT)EPT_E_WRITE;
833 break;
834
835 default:
836 break;
837 }
838 if (!--cLeft)
839 break;
840 }
841 }
842}
843
844
845/**
846 * @callback_method_impl{FNDBGFHANDLERINT, pgmpoolroots}
847 */
848static DECLCALLBACK(void) pgmR3PoolInfoRoots(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
849{
850 RT_NOREF(pszArgs);
851
852 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
853 unsigned cLeft = pPool->cUsedPages;
854 unsigned iPage = pPool->cCurPages;
855 while (--iPage >= PGMPOOL_IDX_FIRST)
856 {
857 PGMPOOLPAGE volatile const *pPage = (PGMPOOLPAGE volatile const *)&pPool->aPages[iPage];
858 RTGCPHYS const GCPhys = pPage->GCPhys;
859 if (GCPhys != NIL_RTGCPHYS)
860 {
861 uint8_t const enmKind = pPage->enmKind;
862 switch (enmKind)
863 {
864 default:
865 break;
866
867 case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
868 case PGMPOOLKIND_PAE_PDPT:
869 case PGMPOOLKIND_PAE_PDPT_PHYS:
870 case PGMPOOLKIND_64BIT_PML4:
871 case PGMPOOLKIND_ROOT_NESTED:
872 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4:
873 {
874 const char *pszKind = "wtf!";
875 switch (enmKind)
876 {
877 case PGMPOOLKIND_PAE_PDPT_FOR_32BIT: pszKind = "PAE_PDPT_FOR_32BIT"; break;
878 case PGMPOOLKIND_PAE_PDPT: pszKind = "PAE_PDPT"; break;
879 case PGMPOOLKIND_PAE_PDPT_PHYS: pszKind = "PAE_PDPT_PHYS"; break;
880 case PGMPOOLKIND_64BIT_PML4: pszKind = "64BIT_PML4"; break;
881 case PGMPOOLKIND_ROOT_NESTED: pszKind = "ROOT_NESTED"; break;
882 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4: pszKind = "EPT_PML4_FOR_EPT_PML4"; break;
883 }
884 pHlp->pfnPrintf(pHlp, "#%04x: GCPhys=%RGp %s %s\n",
885 iPage, GCPhys, pszKind, pPage->fMonitored ? " monitored" : "");
886 break;
887 }
888 }
889 if (!--cLeft)
890 break;
891 }
892 }
893
894}
895
896
897#ifdef VBOX_WITH_DEBUGGER
898/**
899 * @callback_method_impl{FNDBGCCMD, The '.pgmpoolcheck' command.}
900 */
901static DECLCALLBACK(int) pgmR3PoolCmdCheck(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PUVM pUVM, PCDBGCVAR paArgs, unsigned cArgs)
902{
903 DBGC_CMDHLP_REQ_UVM_RET(pCmdHlp, pCmd, pUVM);
904 PVM pVM = pUVM->pVM;
905 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
906 DBGC_CMDHLP_ASSERT_PARSER_RET(pCmdHlp, pCmd, -1, cArgs == 0);
907 uint32_t cErrors = 0;
908 NOREF(paArgs);
909
910 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
911 for (unsigned i = 0; i < pPool->cCurPages; i++)
912 {
913 PPGMPOOLPAGE pPage = &pPool->aPages[i];
914 bool fFirstMsg = true;
915
916 /** @todo cover other paging modes too. */
917 if (pPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
918 {
919 PPGMSHWPTPAE pShwPT = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
920 {
921 PX86PTPAE pGstPT;
922 PGMPAGEMAPLOCK LockPage;
923 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, pPage->GCPhys, (const void **)&pGstPT, &LockPage); AssertReleaseRC(rc);
924
925 /* Check if any PTEs are out of sync. */
926 for (unsigned j = 0; j < RT_ELEMENTS(pShwPT->a); j++)
927 {
928 if (PGMSHWPTEPAE_IS_P(pShwPT->a[j]))
929 {
930 RTHCPHYS HCPhys = NIL_RTHCPHYS;
931 rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[j].u & X86_PTE_PAE_PG_MASK, &HCPhys);
932 if ( rc != VINF_SUCCESS
933 || PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[j]) != HCPhys)
934 {
935 if (fFirstMsg)
936 {
937 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
938 fFirstMsg = false;
939 }
940 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch HCPhys: rc=%Rrc idx=%d guest %RX64 shw=%RX64 vs %RHp\n", rc, j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
941 cErrors++;
942 }
943 else if ( PGMSHWPTEPAE_IS_RW(pShwPT->a[j])
944 && !(pGstPT->a[j].u & X86_PTE_RW))
945 {
946 if (fFirstMsg)
947 {
948 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
949 fFirstMsg = false;
950 }
951 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch r/w gst/shw: idx=%d guest %RX64 shw=%RX64 vs %RHp\n", j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
952 cErrors++;
953 }
954 }
955 }
956 PGMPhysReleasePageMappingLock(pVM, &LockPage);
957 }
958
959 /* Make sure this page table can't be written to from any shadow mapping. */
960 RTHCPHYS HCPhysPT = NIL_RTHCPHYS;
961 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pPage->GCPhys, &HCPhysPT);
962 AssertMsgRC(rc, ("PGMPhysGCPhys2HCPhys failed with rc=%d for %RGp\n", rc, pPage->GCPhys));
963 if (rc == VINF_SUCCESS)
964 {
965 for (unsigned j = 0; j < pPool->cCurPages; j++)
966 {
967 PPGMPOOLPAGE pTempPage = &pPool->aPages[j];
968
969 if (pTempPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
970 {
971 PPGMSHWPTPAE pShwPT2 = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pTempPage);
972
973 for (unsigned k = 0; k < RT_ELEMENTS(pShwPT->a); k++)
974 {
975 if ( PGMSHWPTEPAE_IS_P_RW(pShwPT2->a[k])
976# ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
977 && !pPage->fDirty
978# endif
979 && PGMSHWPTEPAE_GET_HCPHYS(pShwPT2->a[k]) == HCPhysPT)
980 {
981 if (fFirstMsg)
982 {
983 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
984 fFirstMsg = false;
985 }
986 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch: r/w: GCPhys=%RGp idx=%d shw %RX64 %RX64\n", pTempPage->GCPhys, k, PGMSHWPTEPAE_GET_LOG(pShwPT->a[k]), PGMSHWPTEPAE_GET_LOG(pShwPT2->a[k]));
987 cErrors++;
988 }
989 }
990 }
991 }
992 }
993 }
994 }
995 if (cErrors > 0)
996 return DBGCCmdHlpFail(pCmdHlp, pCmd, "Found %#x errors", cErrors);
997 return VINF_SUCCESS;
998}
999#endif /* VBOX_WITH_DEBUGGER */
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