VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PGMPool.cpp@ 96973

Last change on this file since 96973 was 96957, checked in by vboxsync, 2 years ago

VMM/PGMPool: Extended the .pgmpoolcheck command to cover the other shadow guest EPT structures too. bugref:10092

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1/* $Id: PGMPool.cpp 96957 2022-09-30 20:33:19Z vboxsync $ */
2/** @file
3 * PGM Shadow Page Pool.
4 */
5
6/*
7 * Copyright (C) 2006-2022 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28/** @page pg_pgm_pool PGM Shadow Page Pool
29 *
30 * Motivations:
31 * -# Relationship between shadow page tables and physical guest pages. This
32 * should allow us to skip most of the global flushes now following access
33 * handler changes. The main expense is flushing shadow pages.
34 * -# Limit the pool size if necessary (default is kind of limitless).
35 * -# Allocate shadow pages from RC. We use to only do this in SyncCR3.
36 * -# Required for 64-bit guests.
37 * -# Combining the PD cache and page pool in order to simplify caching.
38 *
39 *
40 * @section sec_pgm_pool_outline Design Outline
41 *
42 * The shadow page pool tracks pages used for shadowing paging structures (i.e.
43 * page tables, page directory, page directory pointer table and page map
44 * level-4). Each page in the pool has an unique identifier. This identifier is
45 * used to link a guest physical page to a shadow PT. The identifier is a
46 * non-zero value and has a relativly low max value - say 14 bits. This makes it
47 * possible to fit it into the upper bits of the of the aHCPhys entries in the
48 * ram range.
49 *
50 * By restricting host physical memory to the first 48 bits (which is the
51 * announced physical memory range of the K8L chip (scheduled for 2008)), we
52 * can safely use the upper 16 bits for shadow page ID and reference counting.
53 *
54 * Update: The 48 bit assumption will be lifted with the new physical memory
55 * management (PGMPAGE), so we won't have any trouble when someone stuffs 2TB
56 * into a box in some years.
57 *
58 * Now, it's possible for a page to be aliased, i.e. mapped by more than one PT
59 * or PD. This is solved by creating a list of physical cross reference extents
60 * when ever this happens. Each node in the list (extent) is can contain 3 page
61 * pool indexes. The list it self is chained using indexes into the paPhysExt
62 * array.
63 *
64 *
65 * @section sec_pgm_pool_life Life Cycle of a Shadow Page
66 *
67 * -# The SyncPT function requests a page from the pool.
68 * The request includes the kind of page it is (PT/PD, PAE/legacy), the
69 * address of the page it's shadowing, and more.
70 * -# The pool responds to the request by allocating a new page.
71 * When the cache is enabled, it will first check if it's in the cache.
72 * Should the pool be exhausted, one of two things can be done:
73 * -# Flush the whole pool and current CR3.
74 * -# Use the cache to find a page which can be flushed (~age).
75 * -# The SyncPT function will sync one or more pages and insert it into the
76 * shadow PD.
77 * -# The SyncPage function may sync more pages on a later \#PFs.
78 * -# The page is freed / flushed in SyncCR3 (perhaps) and some other cases.
79 * When caching is enabled, the page isn't flush but remains in the cache.
80 *
81 *
82 * @section sec_pgm_pool_monitoring Monitoring
83 *
84 * We always monitor GUEST_PAGE_SIZE chunks of memory. When we've got multiple
85 * shadow pages for the same GUEST_PAGE_SIZE of guest memory (PAE and mixed
86 * PD/PT) the pages sharing the monitor get linked using the
87 * iMonitoredNext/Prev. The head page is the pvUser to the access handlers.
88 *
89 *
90 * @section sec_pgm_pool_impl Implementation
91 *
92 * The pool will take pages from the MM page pool. The tracking data
93 * (attributes, bitmaps and so on) are allocated from the hypervisor heap. The
94 * pool content can be accessed both by using the page id and the physical
95 * address (HC). The former is managed by means of an array, the latter by an
96 * offset based AVL tree.
97 *
98 * Flushing of a pool page means that we iterate the content (we know what kind
99 * it is) and updates the link information in the ram range.
100 *
101 * ...
102 */
103
104
105/*********************************************************************************************************************************
106* Header Files *
107*********************************************************************************************************************************/
108#define LOG_GROUP LOG_GROUP_PGM_POOL
109#define VBOX_WITHOUT_PAGING_BIT_FIELDS /* 64-bit bitfields are just asking for trouble. See @bugref{9841} and others. */
110#include <VBox/vmm/pgm.h>
111#include <VBox/vmm/mm.h>
112#include "PGMInternal.h"
113#include <VBox/vmm/vmcc.h>
114#include <VBox/vmm/uvm.h>
115#include "PGMInline.h"
116
117#include <VBox/log.h>
118#include <VBox/err.h>
119#include <iprt/asm.h>
120#include <iprt/string.h>
121#include <VBox/dbg.h>
122
123
124/*********************************************************************************************************************************
125* Structures and Typedefs *
126*********************************************************************************************************************************/
127typedef struct PGMPOOLCHECKERSTATE
128{
129 PDBGCCMDHLP pCmdHlp;
130 PVM pVM;
131 PPGMPOOL pPool;
132 PPGMPOOLPAGE pPage;
133 bool fFirstMsg;
134 uint32_t cErrors;
135} PGMPOOLCHECKERSTATE;
136typedef PGMPOOLCHECKERSTATE *PPGMPOOLCHECKERSTATE;
137
138
139
140/*********************************************************************************************************************************
141* Internal Functions *
142*********************************************************************************************************************************/
143static FNDBGFHANDLERINT pgmR3PoolInfoPages;
144static FNDBGFHANDLERINT pgmR3PoolInfoRoots;
145
146#ifdef VBOX_WITH_DEBUGGER
147static FNDBGCCMD pgmR3PoolCmdCheck;
148
149/** Command descriptors. */
150static const DBGCCMD g_aCmds[] =
151{
152 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
153 { "pgmpoolcheck", 0, 0, NULL, 0, 0, pgmR3PoolCmdCheck, "", "Check the pgm pool pages." },
154};
155#endif
156
157/**
158 * Initializes the pool
159 *
160 * @returns VBox status code.
161 * @param pVM The cross context VM structure.
162 */
163int pgmR3PoolInit(PVM pVM)
164{
165 int rc;
166
167 AssertCompile(NIL_PGMPOOL_IDX == 0);
168 /* pPage->cLocked is an unsigned byte. */
169 AssertCompile(VMM_MAX_CPU_COUNT <= 255);
170
171 /*
172 * Query Pool config.
173 */
174 PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM/Pool");
175
176 /* Default pgm pool size is 1024 pages (4MB). */
177 uint16_t cMaxPages = 1024;
178
179 /* Adjust it up relative to the RAM size, using the nested paging formula. */
180 uint64_t cbRam;
181 rc = CFGMR3QueryU64Def(CFGMR3GetRoot(pVM), "RamSize", &cbRam, 0); AssertRCReturn(rc, rc);
182 /** @todo guest x86 specific */
183 uint64_t u64MaxPages = (cbRam >> 9)
184 + (cbRam >> 18)
185 + (cbRam >> 27)
186 + 32 * GUEST_PAGE_SIZE;
187 u64MaxPages >>= GUEST_PAGE_SHIFT;
188 if (u64MaxPages > PGMPOOL_IDX_LAST)
189 cMaxPages = PGMPOOL_IDX_LAST;
190 else
191 cMaxPages = (uint16_t)u64MaxPages;
192
193 /** @cfgm{/PGM/Pool/MaxPages, uint16_t, \#pages, 16, 0x3fff, F(ram-size)}
194 * The max size of the shadow page pool in pages. The pool will grow dynamically
195 * up to this limit.
196 */
197 rc = CFGMR3QueryU16Def(pCfg, "MaxPages", &cMaxPages, cMaxPages);
198 AssertLogRelRCReturn(rc, rc);
199 AssertLogRelMsgReturn(cMaxPages <= PGMPOOL_IDX_LAST && cMaxPages >= RT_ALIGN(PGMPOOL_IDX_FIRST, 16),
200 ("cMaxPages=%u (%#x)\n", cMaxPages, cMaxPages), VERR_INVALID_PARAMETER);
201 AssertCompile(RT_IS_POWER_OF_TWO(PGMPOOL_CFG_MAX_GROW));
202 if (cMaxPages < PGMPOOL_IDX_LAST)
203 cMaxPages = RT_ALIGN(cMaxPages, PGMPOOL_CFG_MAX_GROW / 2);
204 if (cMaxPages > PGMPOOL_IDX_LAST)
205 cMaxPages = PGMPOOL_IDX_LAST;
206 LogRel(("PGM: PGMPool: cMaxPages=%u (u64MaxPages=%llu)\n", cMaxPages, u64MaxPages));
207
208 /** @todo
209 * We need to be much more careful with our allocation strategy here.
210 * For nested paging we don't need pool user info nor extents at all, but
211 * we can't check for nested paging here (too early during init to get a
212 * confirmation it can be used). The default for large memory configs is a
213 * bit large for shadow paging, so I've restricted the extent maximum to 8k
214 * (8k * 16 = 128k of hyper heap).
215 *
216 * Also when large page support is enabled, we typically don't need so much,
217 * although that depends on the availability of 2 MB chunks on the host.
218 */
219
220 /** @cfgm{/PGM/Pool/MaxUsers, uint16_t, \#users, MaxUsers, 32K, MaxPages*2}
221 * The max number of shadow page user tracking records. Each shadow page has
222 * zero of other shadow pages (or CR3s) that references it, or uses it if you
223 * like. The structures describing these relationships are allocated from a
224 * fixed sized pool. This configuration variable defines the pool size.
225 */
226 uint16_t cMaxUsers;
227 rc = CFGMR3QueryU16Def(pCfg, "MaxUsers", &cMaxUsers, cMaxPages * 2);
228 AssertLogRelRCReturn(rc, rc);
229 AssertLogRelMsgReturn(cMaxUsers >= cMaxPages && cMaxPages <= _32K,
230 ("cMaxUsers=%u (%#x)\n", cMaxUsers, cMaxUsers), VERR_INVALID_PARAMETER);
231
232 /** @cfgm{/PGM/Pool/MaxPhysExts, uint16_t, \#extents, 16, MaxPages * 2, MIN(MaxPages*2\,8192)}
233 * The max number of extents for tracking aliased guest pages.
234 */
235 uint16_t cMaxPhysExts;
236 rc = CFGMR3QueryU16Def(pCfg, "MaxPhysExts", &cMaxPhysExts,
237 RT_MIN(cMaxPages * 2, 8192 /* 8Ki max as this eat too much hyper heap */));
238 AssertLogRelRCReturn(rc, rc);
239 AssertLogRelMsgReturn(cMaxPhysExts >= 16 && cMaxPhysExts <= PGMPOOL_IDX_LAST,
240 ("cMaxPhysExts=%u (%#x)\n", cMaxPhysExts, cMaxPhysExts), VERR_INVALID_PARAMETER);
241
242 /** @cfgm{/PGM/Pool/ChacheEnabled, bool, true}
243 * Enables or disabling caching of shadow pages. Caching means that we will try
244 * reuse shadow pages instead of recreating them everything SyncCR3, SyncPT or
245 * SyncPage requests one. When reusing a shadow page, we can save time
246 * reconstructing it and it's children.
247 */
248 bool fCacheEnabled;
249 rc = CFGMR3QueryBoolDef(pCfg, "CacheEnabled", &fCacheEnabled, true);
250 AssertLogRelRCReturn(rc, rc);
251
252 LogRel(("PGM: pgmR3PoolInit: cMaxPages=%#RX16 cMaxUsers=%#RX16 cMaxPhysExts=%#RX16 fCacheEnable=%RTbool\n",
253 cMaxPages, cMaxUsers, cMaxPhysExts, fCacheEnabled));
254
255 /*
256 * Allocate the data structures.
257 */
258 uint32_t cb = RT_UOFFSETOF_DYN(PGMPOOL, aPages[cMaxPages]);
259 cb += cMaxUsers * sizeof(PGMPOOLUSER);
260 cb += cMaxPhysExts * sizeof(PGMPOOLPHYSEXT);
261 PPGMPOOL pPool;
262 RTR0PTR pPoolR0;
263 rc = SUPR3PageAllocEx(RT_ALIGN_32(cb, HOST_PAGE_SIZE) >> HOST_PAGE_SHIFT, 0 /*fFlags*/, (void **)&pPool, &pPoolR0, NULL);
264 if (RT_FAILURE(rc))
265 return rc;
266 Assert(ASMMemIsZero(pPool, cb));
267 pVM->pgm.s.pPoolR3 = pPool->pPoolR3 = pPool;
268 pVM->pgm.s.pPoolR0 = pPool->pPoolR0 = pPoolR0;
269
270 /*
271 * Initialize it.
272 */
273 pPool->pVMR3 = pVM;
274 pPool->pVMR0 = pVM->pVMR0ForCall;
275 pPool->cMaxPages = cMaxPages;
276 pPool->cCurPages = PGMPOOL_IDX_FIRST;
277 pPool->iUserFreeHead = 0;
278 pPool->cMaxUsers = cMaxUsers;
279 PPGMPOOLUSER paUsers = (PPGMPOOLUSER)&pPool->aPages[pPool->cMaxPages];
280 pPool->paUsersR3 = paUsers;
281 pPool->paUsersR0 = pPoolR0 + (uintptr_t)paUsers - (uintptr_t)pPool;
282 for (unsigned i = 0; i < cMaxUsers; i++)
283 {
284 paUsers[i].iNext = i + 1;
285 paUsers[i].iUser = NIL_PGMPOOL_IDX;
286 paUsers[i].iUserTable = 0xfffffffe;
287 }
288 paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
289 pPool->iPhysExtFreeHead = 0;
290 pPool->cMaxPhysExts = cMaxPhysExts;
291 PPGMPOOLPHYSEXT paPhysExts = (PPGMPOOLPHYSEXT)&paUsers[cMaxUsers];
292 pPool->paPhysExtsR3 = paPhysExts;
293 pPool->paPhysExtsR0 = pPoolR0 + (uintptr_t)paPhysExts - (uintptr_t)pPool;
294 for (unsigned i = 0; i < cMaxPhysExts; i++)
295 {
296 paPhysExts[i].iNext = i + 1;
297 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
298 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
299 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
300 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
301 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
302 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
303 }
304 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
305 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
306 pPool->aiHash[i] = NIL_PGMPOOL_IDX;
307 pPool->iAgeHead = NIL_PGMPOOL_IDX;
308 pPool->iAgeTail = NIL_PGMPOOL_IDX;
309 pPool->fCacheEnabled = fCacheEnabled;
310
311 pPool->hAccessHandlerType = NIL_PGMPHYSHANDLERTYPE;
312 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, PGMPHYSHANDLER_F_KEEP_PGM_LOCK,
313 pgmPoolAccessHandler, "Guest Paging Access Handler", &pPool->hAccessHandlerType);
314 AssertLogRelRCReturn(rc, rc);
315
316 pPool->HCPhysTree = 0;
317
318 /*
319 * The NIL entry.
320 */
321 Assert(NIL_PGMPOOL_IDX == 0);
322 pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID;
323 pPool->aPages[NIL_PGMPOOL_IDX].idx = NIL_PGMPOOL_IDX;
324 pPool->aPages[NIL_PGMPOOL_IDX].Core.Key = NIL_RTHCPHYS;
325 pPool->aPages[NIL_PGMPOOL_IDX].GCPhys = NIL_RTGCPHYS;
326 pPool->aPages[NIL_PGMPOOL_IDX].iNext = NIL_PGMPOOL_IDX;
327 /* pPool->aPages[NIL_PGMPOOL_IDX].cLocked = INT32_MAX; - test this out... */
328 pPool->aPages[NIL_PGMPOOL_IDX].pvPageR3 = 0;
329 pPool->aPages[NIL_PGMPOOL_IDX].iUserHead = NIL_PGMPOOL_USER_INDEX;
330 pPool->aPages[NIL_PGMPOOL_IDX].iModifiedNext = NIL_PGMPOOL_IDX;
331 pPool->aPages[NIL_PGMPOOL_IDX].iModifiedPrev = NIL_PGMPOOL_IDX;
332 pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredNext = NIL_PGMPOOL_IDX;
333 pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredPrev = NIL_PGMPOOL_IDX;
334 pPool->aPages[NIL_PGMPOOL_IDX].iAgeNext = NIL_PGMPOOL_IDX;
335 pPool->aPages[NIL_PGMPOOL_IDX].iAgePrev = NIL_PGMPOOL_IDX;
336
337 Assert(pPool->aPages[NIL_PGMPOOL_IDX].idx == NIL_PGMPOOL_IDX);
338 Assert(pPool->aPages[NIL_PGMPOOL_IDX].GCPhys == NIL_RTGCPHYS);
339 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fSeenNonGlobal);
340 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fMonitored);
341 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fCached);
342 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fZeroed);
343 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fReusedFlushPending);
344
345 /*
346 * Register statistics.
347 */
348 STAM_REL_REG(pVM, &pPool->StatGrow, STAMTYPE_PROFILE, "/PGM/Pool/Grow", STAMUNIT_TICKS_PER_CALL, "Profiling PGMR0PoolGrow");
349#ifdef VBOX_WITH_STATISTICS
350 STAM_REG(pVM, &pPool->cCurPages, STAMTYPE_U16, "/PGM/Pool/cCurPages", STAMUNIT_PAGES, "Current pool size.");
351 STAM_REG(pVM, &pPool->cMaxPages, STAMTYPE_U16, "/PGM/Pool/cMaxPages", STAMUNIT_PAGES, "Max pool size.");
352 STAM_REG(pVM, &pPool->cUsedPages, STAMTYPE_U16, "/PGM/Pool/cUsedPages", STAMUNIT_PAGES, "The number of pages currently in use.");
353 STAM_REG(pVM, &pPool->cUsedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/cUsedPagesHigh", STAMUNIT_PAGES, "The high watermark for cUsedPages.");
354 STAM_REG(pVM, &pPool->StatAlloc, STAMTYPE_PROFILE_ADV, "/PGM/Pool/Alloc", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolAlloc.");
355 STAM_REG(pVM, &pPool->StatClearAll, STAMTYPE_PROFILE, "/PGM/Pool/ClearAll", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolClearAll.");
356 STAM_REG(pVM, &pPool->StatR3Reset, STAMTYPE_PROFILE, "/PGM/Pool/R3Reset", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolReset.");
357 STAM_REG(pVM, &pPool->StatFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFlushPage.");
358 STAM_REG(pVM, &pPool->StatFree, STAMTYPE_PROFILE, "/PGM/Pool/Free", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFree.");
359 STAM_REG(pVM, &pPool->StatForceFlushPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForce", STAMUNIT_OCCURENCES, "Counting explicit flushes by PGMPoolFlushPage().");
360 STAM_REG(pVM, &pPool->StatForceFlushDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForceDirty", STAMUNIT_OCCURENCES, "Counting explicit flushes of dirty pages by PGMPoolFlushPage().");
361 STAM_REG(pVM, &pPool->StatForceFlushReused, STAMTYPE_COUNTER, "/PGM/Pool/FlushReused", STAMUNIT_OCCURENCES, "Counting flushes for reused pages.");
362 STAM_REG(pVM, &pPool->StatZeroPage, STAMTYPE_PROFILE, "/PGM/Pool/ZeroPage", STAMUNIT_TICKS_PER_CALL, "Profiling time spent zeroing pages. Overlaps with Alloc.");
363 STAM_REG(pVM, &pPool->cMaxUsers, STAMTYPE_U16, "/PGM/Pool/Track/cMaxUsers", STAMUNIT_COUNT, "Max user tracking records.");
364 STAM_REG(pVM, &pPool->cPresent, STAMTYPE_U32, "/PGM/Pool/Track/cPresent", STAMUNIT_COUNT, "Number of present page table entries.");
365 STAM_REG(pVM, &pPool->StatTrackDeref, STAMTYPE_PROFILE, "/PGM/Pool/Track/Deref", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackDeref.");
366 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPT, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPT", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPT.");
367 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTs, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTs", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTs.");
368 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTsSlow, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTsSlow", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTsSlow.");
369 STAM_REG(pVM, &pPool->StatTrackFlushEntry, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Flush", STAMUNIT_COUNT, "Nr of flushed entries.");
370 STAM_REG(pVM, &pPool->StatTrackFlushEntryKeep, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Update", STAMUNIT_COUNT, "Nr of updated entries.");
371 STAM_REG(pVM, &pPool->StatTrackFreeUpOneUser, STAMTYPE_COUNTER, "/PGM/Pool/Track/FreeUpOneUser", STAMUNIT_TICKS_PER_CALL, "The number of times we were out of user tracking records.");
372 STAM_REG(pVM, &pPool->StatTrackDerefGCPhys, STAMTYPE_PROFILE, "/PGM/Pool/Track/DrefGCPhys", STAMUNIT_TICKS_PER_CALL, "Profiling deref activity related tracking GC physical pages.");
373 STAM_REG(pVM, &pPool->StatTrackLinearRamSearches, STAMTYPE_COUNTER, "/PGM/Pool/Track/LinearRamSearches", STAMUNIT_OCCURENCES, "The number of times we had to do linear ram searches.");
374 STAM_REG(pVM, &pPool->StamTrackPhysExtAllocFailures,STAMTYPE_COUNTER, "/PGM/Pool/Track/PhysExtAllocFailures", STAMUNIT_OCCURENCES, "The number of failing pgmPoolTrackPhysExtAlloc calls.");
375
376 STAM_REG(pVM, &pPool->StatMonitorPfRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access handler.");
377 STAM_REG(pVM, &pPool->StatMonitorPfRZEmulateInstr, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/EmulateInstr", STAMUNIT_OCCURENCES, "Times we've failed interpreting the instruction.");
378 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the RC/R0 access handler.");
379 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushReinit, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushReinit", STAMUNIT_OCCURENCES, "Times we've detected a page table reinit.");
380 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushModOverflow,STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushOverflow", STAMUNIT_OCCURENCES, "Counting flushes for pages that are modified too often.");
381 STAM_REG(pVM, &pPool->StatMonitorPfRZFork, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/Fork", STAMUNIT_OCCURENCES, "Times we've detected fork().");
382 STAM_REG(pVM, &pPool->StatMonitorPfRZHandled, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/Handled", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access we've handled (except REP STOSD).");
383 STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch1, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch1", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction.");
384 STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch2, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch2", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction during flushing.");
385 STAM_REG(pVM, &pPool->StatMonitorPfRZRepPrefix, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/RepPrefix", STAMUNIT_OCCURENCES, "The number of times we've seen rep prefixes we can't handle.");
386 STAM_REG(pVM, &pPool->StatMonitorPfRZRepStosd, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/RepStosd", STAMUNIT_TICKS_PER_CALL, "Profiling the REP STOSD cases we've handled.");
387
388 STAM_REG(pVM, &pPool->StatMonitorRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM", STAMUNIT_TICKS_PER_CALL, "Profiling the regular access handler.");
389 STAM_REG(pVM, &pPool->StatMonitorRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the regular access handler.");
390 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses.");
391 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses.");
392 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses.");
393 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses.");
394 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses.");
395 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses.");
396 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses.");
397 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[7], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses.");
398 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[8], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses.");
399 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[9], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses.");
400 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[10], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses.");
401 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[11], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses.");
402 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[12], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses.");
403 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[13], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses.");
404 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[14], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses.");
405 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[15], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses.");
406 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[16], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
407 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[17], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
408 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[18], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
409 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1.");
410 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2.");
411 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3.");
412 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4.");
413 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5.");
414 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6.");
415 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/IEM/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7.");
416
417 STAM_REG(pVM, &pPool->StatMonitorRZFaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
418 STAM_REG(pVM, &pPool->StatMonitorRZFaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
419 STAM_REG(pVM, &pPool->StatMonitorRZFaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
420 STAM_REG(pVM, &pPool->StatMonitorRZFaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
421
422 STAM_REG(pVM, &pPool->StatMonitorR3, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3", STAMUNIT_TICKS_PER_CALL, "Profiling the R3 access handler.");
423 STAM_REG(pVM, &pPool->StatMonitorR3FlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the R3 access handler.");
424 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses (R3).");
425 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses (R3).");
426 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses (R3).");
427 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses (R3).");
428 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses (R3).");
429 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses (R3).");
430 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses (R3).");
431 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[7], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses (R3).");
432 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[8], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses (R3).");
433 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[9], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses (R3).");
434 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[10], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses (R3).");
435 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[11], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses (R3).");
436 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[12], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses (R3).");
437 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[13], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses (R3).");
438 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[14], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses (R3).");
439 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[15], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses (R3).");
440 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[16], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
441 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[17], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
442 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[18], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
443 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[0], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1 in R3.");
444 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[1], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2 in R3.");
445 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[2], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3 in R3.");
446 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[3], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4 in R3.");
447 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[4], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5 in R3.");
448 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[5], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6 in R3.");
449 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[6], STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7 in R3.");
450
451 STAM_REG(pVM, &pPool->StatMonitorR3FaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
452 STAM_REG(pVM, &pPool->StatMonitorR3FaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
453 STAM_REG(pVM, &pPool->StatMonitorR3FaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
454 STAM_REG(pVM, &pPool->StatMonitorR3FaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
455
456 STAM_REG(pVM, &pPool->cModifiedPages, STAMTYPE_U16, "/PGM/Pool/Monitor/cModifiedPages", STAMUNIT_PAGES, "The current cModifiedPages value.");
457 STAM_REG(pVM, &pPool->cModifiedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/Monitor/cModifiedPagesHigh", STAMUNIT_PAGES, "The high watermark for cModifiedPages.");
458 STAM_REG(pVM, &pPool->StatResetDirtyPages, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Resets", STAMUNIT_OCCURENCES, "Times we've called pgmPoolResetDirtyPages (and there were dirty page).");
459 STAM_REG(pVM, &pPool->StatDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Pages", STAMUNIT_OCCURENCES, "Times we've called pgmPoolAddDirtyPage.");
460 STAM_REG(pVM, &pPool->StatDirtyPageDupFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushDup", STAMUNIT_OCCURENCES, "Times we've had to flush duplicates for dirty page management.");
461 STAM_REG(pVM, &pPool->StatDirtyPageOverFlowFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushOverflow",STAMUNIT_OCCURENCES, "Times we've had to flush because of overflow.");
462 STAM_REG(pVM, &pPool->StatCacheHits, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Hits", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls satisfied by the cache.");
463 STAM_REG(pVM, &pPool->StatCacheMisses, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Misses", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls not statisfied by the cache.");
464 STAM_REG(pVM, &pPool->StatCacheKindMismatches, STAMTYPE_COUNTER, "/PGM/Pool/Cache/KindMismatches", STAMUNIT_OCCURENCES, "The number of shadow page kind mismatches. (Better be low, preferably 0!)");
465 STAM_REG(pVM, &pPool->StatCacheFreeUpOne, STAMTYPE_COUNTER, "/PGM/Pool/Cache/FreeUpOne", STAMUNIT_OCCURENCES, "The number of times the cache was asked to free up a page.");
466 STAM_REG(pVM, &pPool->StatCacheCacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Cacheable", STAMUNIT_OCCURENCES, "The number of cacheable allocations.");
467 STAM_REG(pVM, &pPool->StatCacheUncacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Uncacheable", STAMUNIT_OCCURENCES, "The number of uncacheable allocations.");
468#endif /* VBOX_WITH_STATISTICS */
469
470 DBGFR3InfoRegisterInternalEx(pVM, "pgmpoolpages", "Lists page pool pages.", pgmR3PoolInfoPages, 0);
471 DBGFR3InfoRegisterInternalEx(pVM, "pgmpoolroots", "Lists page pool roots.", pgmR3PoolInfoRoots, 0);
472
473#ifdef VBOX_WITH_DEBUGGER
474 /*
475 * Debugger commands.
476 */
477 static bool s_fRegisteredCmds = false;
478 if (!s_fRegisteredCmds)
479 {
480 rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
481 if (RT_SUCCESS(rc))
482 s_fRegisteredCmds = true;
483 }
484#endif
485
486 return VINF_SUCCESS;
487}
488
489
490/**
491 * Relocate the page pool data.
492 *
493 * @param pVM The cross context VM structure.
494 */
495void pgmR3PoolRelocate(PVM pVM)
496{
497 RT_NOREF(pVM);
498}
499
500
501/**
502 * Grows the shadow page pool.
503 *
504 * I.e. adds more pages to it, assuming that hasn't reached cMaxPages yet.
505 *
506 * @returns VBox status code.
507 * @param pVM The cross context VM structure.
508 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
509 */
510VMMR3_INT_DECL(int) PGMR3PoolGrow(PVM pVM, PVMCPU pVCpu)
511{
512 /* This used to do a lot of stuff, but it has moved to ring-0 (PGMR0PoolGrow). */
513 AssertReturn(pVM->pgm.s.pPoolR3->cCurPages < pVM->pgm.s.pPoolR3->cMaxPages, VERR_PGM_POOL_MAXED_OUT_ALREADY);
514 int rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_PGM_POOL_GROW, 0, NULL);
515 if (rc == VINF_SUCCESS)
516 return rc;
517 LogRel(("PGMR3PoolGrow: rc=%Rrc cCurPages=%#x cMaxPages=%#x\n",
518 rc, pVM->pgm.s.pPoolR3->cCurPages, pVM->pgm.s.pPoolR3->cMaxPages));
519 if (pVM->pgm.s.pPoolR3->cCurPages > 128 && RT_FAILURE_NP(rc))
520 return -rc;
521 return rc;
522}
523
524
525/**
526 * Rendezvous callback used by pgmR3PoolClearAll that clears all shadow pages
527 * and all modification counters.
528 *
529 * This is only called on one of the EMTs while the other ones are waiting for
530 * it to complete this function.
531 *
532 * @returns VINF_SUCCESS (VBox strict status code).
533 * @param pVM The cross context VM structure.
534 * @param pVCpu The cross context virtual CPU structure of the calling EMT. Unused.
535 * @param fpvFlushRemTlb When not NULL, we'll flush the REM TLB as well.
536 * (This is the pvUser, so it has to be void *.)
537 *
538 */
539DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, void *fpvFlushRemTlb)
540{
541 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
542 STAM_PROFILE_START(&pPool->StatClearAll, c);
543 NOREF(pVCpu);
544
545 PGM_LOCK_VOID(pVM);
546 Log(("pgmR3PoolClearAllRendezvous: cUsedPages=%d fpvFlushRemTlb=%RTbool\n", pPool->cUsedPages, !!fpvFlushRemTlb));
547
548 /*
549 * Iterate all the pages until we've encountered all that are in use.
550 * This is a simple but not quite optimal solution.
551 */
552 unsigned cModifiedPages = 0; NOREF(cModifiedPages);
553 unsigned cLeft = pPool->cUsedPages;
554 uint32_t iPage = pPool->cCurPages;
555 while (--iPage >= PGMPOOL_IDX_FIRST)
556 {
557 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
558 if (pPage->GCPhys != NIL_RTGCPHYS)
559 {
560 switch (pPage->enmKind)
561 {
562 /*
563 * We only care about shadow page tables that reference physical memory
564 */
565#ifdef PGM_WITH_LARGE_PAGES
566 case PGMPOOLKIND_PAE_PD_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
567 if (pPage->cPresent)
568 {
569 PX86PDPAE pShwPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
570 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
571 {
572 //Assert((pShwPD->a[i].u & UINT64_C(0xfff0000000000f80)) == 0); - bogus, includes X86_PDE_PS.
573 if ((pShwPD->a[i].u & (X86_PDE_P | X86_PDE_PS)) == (X86_PDE_P | X86_PDE_PS))
574 {
575 pShwPD->a[i].u = 0;
576 Assert(pPage->cPresent);
577 pPage->cPresent--;
578 }
579 }
580 if (pPage->cPresent == 0)
581 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
582 }
583 goto default_case;
584
585 case PGMPOOLKIND_EPT_PD_FOR_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
586 if (pPage->cPresent)
587 {
588 PEPTPD pShwPD = (PEPTPD)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
589 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
590 {
591 if ((pShwPD->a[i].u & (EPT_E_READ | EPT_E_LEAF)) == (EPT_E_READ | EPT_E_LEAF))
592 {
593 pShwPD->a[i].u = 0;
594 Assert(pPage->cPresent);
595 pPage->cPresent--;
596 }
597 }
598 if (pPage->cPresent == 0)
599 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
600 }
601 goto default_case;
602#endif /* PGM_WITH_LARGE_PAGES */
603
604 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
605 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
606 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
607 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
608 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
609 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
610 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
611 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
612 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
613#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
614 case PGMPOOLKIND_EPT_PT_FOR_EPT_PT:
615 case PGMPOOLKIND_EPT_PD_FOR_EPT_PD:
616 case PGMPOOLKIND_EPT_PDPT_FOR_EPT_PDPT:
617 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4:
618#endif
619 {
620 if (pPage->cPresent)
621 {
622 void *pvShw = PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
623 STAM_PROFILE_START(&pPool->StatZeroPage, z);
624#ifdef VBOX_STRICT
625 if (PGMPOOL_PAGE_IS_NESTED(pPage))
626 {
627 PEPTPT pPT = (PEPTPT)pvShw;
628 for (unsigned idxPt = 0; idxPt < RT_ELEMENTS(pPT->a); idxPt++)
629 if (pPT->a[idxPt].u & EPT_PRESENT_MASK)
630 Assert(!(pPT->a[idxPt].u & EPT_E_LEAF)); /* We don't support large pages as of yet. */
631 }
632#endif
633#if 0
634 /* Useful check for leaking references; *very* expensive though. */
635 switch (pPage->enmKind)
636 {
637 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
638 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
639 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
640 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
641 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
642 {
643 bool fFoundFirst = false;
644 PPGMSHWPTPAE pPT = (PPGMSHWPTPAE)pvShw;
645 for (unsigned ptIndex = 0; ptIndex < RT_ELEMENTS(pPT->a); ptIndex++)
646 {
647 if (pPT->a[ptIndex].u)
648 {
649 if (!fFoundFirst)
650 {
651 AssertFatalMsg(pPage->iFirstPresent <= ptIndex, ("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
652 if (pPage->iFirstPresent != ptIndex)
653 Log(("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
654 fFoundFirst = true;
655 }
656 if (PGMSHWPTEPAE_IS_P(pPT->a[ptIndex]))
657 {
658 pgmPoolTracDerefGCPhysHint(pPool, pPage, PGMSHWPTEPAE_GET_HCPHYS(pPT->a[ptIndex]), NIL_RTGCPHYS);
659 if (pPage->iFirstPresent == ptIndex)
660 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
661 }
662 }
663 }
664 AssertFatalMsg(pPage->cPresent == 0, ("cPresent = %d pPage = %RGv\n", pPage->cPresent, pPage->GCPhys));
665 break;
666 }
667 default:
668 break;
669 }
670#endif
671 ASMMemZeroPage(pvShw);
672 STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
673 pPage->cPresent = 0;
674 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
675 }
676 }
677 RT_FALL_THRU();
678 default:
679#ifdef PGM_WITH_LARGE_PAGES
680 default_case:
681#endif
682 Assert(!pPage->cModifications || ++cModifiedPages);
683 Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX || pPage->cModifications);
684 Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX || pPage->cModifications);
685 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
686 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
687 pPage->cModifications = 0;
688 break;
689
690 }
691 if (!--cLeft)
692 break;
693 }
694 }
695
696#ifndef DEBUG_michael
697 AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
698#endif
699 pPool->iModifiedHead = NIL_PGMPOOL_IDX;
700 pPool->cModifiedPages = 0;
701
702 /*
703 * Clear all the GCPhys links and rebuild the phys ext free list.
704 */
705 for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRangesX);
706 pRam;
707 pRam = pRam->CTX_SUFF(pNext))
708 {
709 iPage = pRam->cb >> GUEST_PAGE_SHIFT;
710 while (iPage-- > 0)
711 PGM_PAGE_SET_TRACKING(pVM, &pRam->aPages[iPage], 0);
712 }
713
714 pPool->iPhysExtFreeHead = 0;
715 PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
716 const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
717 for (unsigned i = 0; i < cMaxPhysExts; i++)
718 {
719 paPhysExts[i].iNext = i + 1;
720 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
721 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
722 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
723 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
724 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
725 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
726 }
727 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
728
729
730#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
731 /* Reset all dirty pages to reactivate the page monitoring. */
732 /* Note: we must do this *after* clearing all page references and shadow page tables as there might be stale references to
733 * recently removed MMIO ranges around that might otherwise end up asserting in pgmPoolTracDerefGCPhysHint
734 */
735 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++)
736 {
737 unsigned idxPage = pPool->aidxDirtyPages[i];
738 if (idxPage == NIL_PGMPOOL_IDX)
739 continue;
740
741 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage];
742 Assert(pPage->idx == idxPage);
743 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
744
745 AssertMsg(pPage->fDirty, ("Page %RGp (slot=%d) not marked dirty!", pPage->GCPhys, i));
746
747 Log(("Reactivate dirty page %RGp\n", pPage->GCPhys));
748
749 /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
750 int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK);
751 AssertRCSuccess(rc);
752 pPage->fDirty = false;
753
754 pPool->aidxDirtyPages[i] = NIL_PGMPOOL_IDX;
755 }
756
757 /* Clear all dirty pages. */
758 pPool->idxFreeDirtyPage = 0;
759 pPool->cDirtyPages = 0;
760#endif
761
762 /* Clear the PGM_SYNC_CLEAR_PGM_POOL flag on all VCPUs to prevent redundant flushes. */
763 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
764 pVM->apCpusR3[idCpu]->pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
765
766 /* Flush job finished. */
767 VM_FF_CLEAR(pVM, VM_FF_PGM_POOL_FLUSH_PENDING);
768 pPool->cPresent = 0;
769 PGM_UNLOCK(pVM);
770
771 PGM_INVL_ALL_VCPU_TLBS(pVM);
772
773 if (fpvFlushRemTlb)
774 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
775 CPUMSetChangedFlags(pVM->apCpusR3[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
776
777 STAM_PROFILE_STOP(&pPool->StatClearAll, c);
778 return VINF_SUCCESS;
779}
780
781
782/**
783 * Clears the shadow page pool.
784 *
785 * @param pVM The cross context VM structure.
786 * @param fFlushRemTlb When set, the REM TLB is scheduled for flushing as
787 * well.
788 */
789void pgmR3PoolClearAll(PVM pVM, bool fFlushRemTlb)
790{
791 int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PoolClearAllRendezvous, &fFlushRemTlb);
792 AssertRC(rc);
793}
794
795/**
796 * Stringifies a PGMPOOLKIND value.
797 */
798static const char *pgmPoolPoolKindToStr(uint8_t enmKind)
799{
800 switch ((PGMPOOLKIND)enmKind)
801 {
802 case PGMPOOLKIND_INVALID:
803 return "INVALID";
804 case PGMPOOLKIND_FREE:
805 return "FREE";
806 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
807 return "32BIT_PT_FOR_PHYS";
808 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
809 return "32BIT_PT_FOR_32BIT_PT";
810 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
811 return "32BIT_PT_FOR_32BIT_4MB";
812 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
813 return "PAE_PT_FOR_PHYS";
814 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
815 return "PAE_PT_FOR_32BIT_PT";
816 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
817 return "PAE_PT_FOR_32BIT_4MB";
818 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
819 return "PAE_PT_FOR_PAE_PT";
820 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
821 return "PAE_PT_FOR_PAE_2MB";
822 case PGMPOOLKIND_32BIT_PD:
823 return "32BIT_PD";
824 case PGMPOOLKIND_32BIT_PD_PHYS:
825 return "32BIT_PD_PHYS";
826 case PGMPOOLKIND_PAE_PD0_FOR_32BIT_PD:
827 return "PAE_PD0_FOR_32BIT_PD";
828 case PGMPOOLKIND_PAE_PD1_FOR_32BIT_PD:
829 return "PAE_PD1_FOR_32BIT_PD";
830 case PGMPOOLKIND_PAE_PD2_FOR_32BIT_PD:
831 return "PAE_PD2_FOR_32BIT_PD";
832 case PGMPOOLKIND_PAE_PD3_FOR_32BIT_PD:
833 return "PAE_PD3_FOR_32BIT_PD";
834 case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
835 return "PAE_PD_FOR_PAE_PD";
836 case PGMPOOLKIND_PAE_PD_PHYS:
837 return "PAE_PD_PHYS";
838 case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
839 return "PAE_PDPT_FOR_32BIT";
840 case PGMPOOLKIND_PAE_PDPT:
841 return "PAE_PDPT";
842 case PGMPOOLKIND_PAE_PDPT_PHYS:
843 return "PAE_PDPT_PHYS";
844 case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
845 return "64BIT_PDPT_FOR_64BIT_PDPT";
846 case PGMPOOLKIND_64BIT_PDPT_FOR_PHYS:
847 return "64BIT_PDPT_FOR_PHYS";
848 case PGMPOOLKIND_64BIT_PD_FOR_64BIT_PD:
849 return "64BIT_PD_FOR_64BIT_PD";
850 case PGMPOOLKIND_64BIT_PD_FOR_PHYS:
851 return "64BIT_PD_FOR_PHYS";
852 case PGMPOOLKIND_64BIT_PML4:
853 return "64BIT_PML4";
854 case PGMPOOLKIND_EPT_PDPT_FOR_PHYS:
855 return "EPT_PDPT_FOR_PHYS";
856 case PGMPOOLKIND_EPT_PD_FOR_PHYS:
857 return "EPT_PD_FOR_PHYS";
858 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
859 return "EPT_PT_FOR_PHYS";
860 case PGMPOOLKIND_ROOT_NESTED:
861 return "ROOT_NESTED";
862 case PGMPOOLKIND_EPT_PT_FOR_EPT_PT:
863 return "EPT_PT_FOR_EPT_PT";
864 case PGMPOOLKIND_EPT_PD_FOR_EPT_PD:
865 return "EPT_PD_FOR_EPT_PD";
866 case PGMPOOLKIND_EPT_PDPT_FOR_EPT_PDPT:
867 return "EPT_PDPT_FOR_EPT_PDPT";
868 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4:
869 return "EPT_PML4_FOR_EPT_PML4";
870 }
871 return "Unknown kind!";
872}
873
874
875/**
876 * Protect all pgm pool page table entries to monitor writes
877 *
878 * @param pVM The cross context VM structure.
879 *
880 * @remarks ASSUMES the caller will flush all TLBs!!
881 */
882void pgmR3PoolWriteProtectPages(PVM pVM)
883{
884 PGM_LOCK_ASSERT_OWNER(pVM);
885 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
886 unsigned cLeft = pPool->cUsedPages;
887 unsigned iPage = pPool->cCurPages;
888 while (--iPage >= PGMPOOL_IDX_FIRST)
889 {
890 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
891 if ( pPage->GCPhys != NIL_RTGCPHYS
892 && pPage->cPresent)
893 {
894 union
895 {
896 void *pv;
897 PX86PT pPT;
898 PPGMSHWPTPAE pPTPae;
899 PEPTPT pPTEpt;
900 } uShw;
901 uShw.pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
902
903 switch (pPage->enmKind)
904 {
905 /*
906 * We only care about shadow page tables.
907 */
908 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
909 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
910 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
911 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPT->a); iShw++)
912 if (uShw.pPT->a[iShw].u & X86_PTE_P)
913 uShw.pPT->a[iShw].u = ~(X86PGUINT)X86_PTE_RW;
914 break;
915
916 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
917 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
918 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
919 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
920 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
921 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTPae->a); iShw++)
922 if (PGMSHWPTEPAE_IS_P(uShw.pPTPae->a[iShw]))
923 PGMSHWPTEPAE_SET_RO(uShw.pPTPae->a[iShw]);
924 break;
925
926 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
927 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTEpt->a); iShw++)
928 if (uShw.pPTEpt->a[iShw].u & EPT_E_READ)
929 uShw.pPTEpt->a[iShw].u &= ~(X86PGPAEUINT)EPT_E_WRITE;
930 break;
931
932 default:
933 break;
934 }
935 if (!--cLeft)
936 break;
937 }
938 }
939}
940
941
942/**
943 * @callback_method_impl{FNDBGFHANDLERINT, pgmpoolpages}
944 */
945static DECLCALLBACK(void) pgmR3PoolInfoPages(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
946{
947 RT_NOREF(pszArgs);
948
949 PPGMPOOL const pPool = pVM->pgm.s.CTX_SUFF(pPool);
950 unsigned const cPages = pPool->cCurPages;
951 unsigned cLeft = pPool->cUsedPages;
952 for (unsigned iPage = 0; iPage < cPages; iPage++)
953 {
954 PGMPOOLPAGE volatile const *pPage = (PGMPOOLPAGE volatile const *)&pPool->aPages[iPage];
955 RTGCPHYS const GCPhys = pPage->GCPhys;
956 uint8_t const enmKind = pPage->enmKind;
957 if ( enmKind != PGMPOOLKIND_INVALID
958 && enmKind != PGMPOOLKIND_FREE)
959 {
960 pHlp->pfnPrintf(pHlp, "#%04x: HCPhys=%RHp GCPhys=%RGp %s %s%s%s\n",
961 iPage, pPage->Core.Key, GCPhys, pPage->fA20Enabled ? "A20 " : "!A20",
962 pgmPoolPoolKindToStr(enmKind),
963 pPage->fCached ? " cached" : "",
964 pPage->fMonitored ? " monitored" : "");
965 if (!--cLeft)
966 break;
967 }
968 }
969}
970
971
972/**
973 * @callback_method_impl{FNDBGFHANDLERINT, pgmpoolroots}
974 */
975static DECLCALLBACK(void) pgmR3PoolInfoRoots(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
976{
977 RT_NOREF(pszArgs);
978
979 PPGMPOOL const pPool = pVM->pgm.s.CTX_SUFF(pPool);
980 unsigned const cPages = pPool->cCurPages;
981 unsigned cLeft = pPool->cUsedPages;
982 for (unsigned iPage = 0; iPage < cPages; iPage++)
983 {
984 PGMPOOLPAGE volatile const *pPage = (PGMPOOLPAGE volatile const *)&pPool->aPages[iPage];
985 RTGCPHYS const GCPhys = pPage->GCPhys;
986 if (GCPhys != NIL_RTGCPHYS)
987 {
988 uint8_t const enmKind = pPage->enmKind;
989 switch (enmKind)
990 {
991 default:
992 break;
993
994 case PGMPOOLKIND_PAE_PDPT_FOR_32BIT:
995 case PGMPOOLKIND_PAE_PDPT:
996 case PGMPOOLKIND_PAE_PDPT_PHYS:
997 case PGMPOOLKIND_64BIT_PML4:
998 case PGMPOOLKIND_ROOT_NESTED:
999 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4:
1000 pHlp->pfnPrintf(pHlp, "#%04x: HCPhys=%RHp GCPhys=%RGp %s %s %s\n",
1001 iPage, pPage->Core.Key, GCPhys, pPage->fA20Enabled ? "A20 " : "!A20",
1002 pgmPoolPoolKindToStr(enmKind), pPage->fMonitored ? " monitored" : "");
1003 break;
1004 }
1005 if (!--cLeft)
1006 break;
1007 }
1008 }
1009}
1010
1011#ifdef VBOX_WITH_DEBUGGER
1012
1013/**
1014 * Helper for pgmR3PoolCmdCheck that reports an error.
1015 */
1016static void pgmR3PoolCheckError(PPGMPOOLCHECKERSTATE pState, const char *pszFormat, ...)
1017{
1018 if (pState->fFirstMsg)
1019 {
1020 DBGCCmdHlpPrintf(pState->pCmdHlp, "Checking pool page #%i for %RGp %s\n",
1021 pState->pPage->idx, pState->pPage->GCPhys, pgmPoolPoolKindToStr(pState->pPage->enmKind));
1022 pState->fFirstMsg = false;
1023 }
1024
1025 va_list va;
1026 va_start(va, pszFormat);
1027 pState->pCmdHlp->pfnPrintfV(pState->pCmdHlp, NULL, pszFormat, va);
1028 va_end(va);
1029}
1030
1031
1032/**
1033 * @callback_method_impl{FNDBGCCMD, The '.pgmpoolcheck' command.}
1034 */
1035static DECLCALLBACK(int) pgmR3PoolCmdCheck(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PUVM pUVM, PCDBGCVAR paArgs, unsigned cArgs)
1036{
1037 DBGC_CMDHLP_REQ_UVM_RET(pCmdHlp, pCmd, pUVM);
1038 PVM pVM = pUVM->pVM;
1039 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1040 DBGC_CMDHLP_ASSERT_PARSER_RET(pCmdHlp, pCmd, -1, cArgs == 0);
1041 NOREF(paArgs);
1042
1043 PGM_LOCK_VOID(pVM);
1044 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
1045 PGMPOOLCHECKERSTATE State = { pCmdHlp, pVM, pPool, NULL, true, 0 };
1046 for (unsigned i = 0; i < pPool->cCurPages; i++)
1047 {
1048 PPGMPOOLPAGE pPage = &pPool->aPages[i];
1049 State.pPage = pPage;
1050 State.fFirstMsg = true;
1051
1052 if (pPage->idx != i)
1053 pgmR3PoolCheckError(&State, "Invalid idx value: %#x, expected %#x", pPage->idx, i);
1054
1055 if (pPage->enmKind == PGMPOOLKIND_FREE)
1056 continue;
1057 if (pPage->enmKind > PGMPOOLKIND_LAST || pPage->enmKind <= PGMPOOLKIND_INVALID)
1058 {
1059 if (pPage->enmKind != PGMPOOLKIND_INVALID || pPage->idx != 0)
1060 pgmR3PoolCheckError(&State, "Invalid enmKind value: %#x\n", pPage->enmKind);
1061 continue;
1062 }
1063
1064 void const *pvGuestPage = NULL;
1065 PGMPAGEMAPLOCK LockPage;
1066 if ( pPage->enmKind != PGMPOOLKIND_EPT_PDPT_FOR_PHYS
1067 && pPage->enmKind != PGMPOOLKIND_EPT_PD_FOR_PHYS
1068 && pPage->enmKind != PGMPOOLKIND_EPT_PT_FOR_PHYS
1069 && pPage->enmKind != PGMPOOLKIND_ROOT_NESTED)
1070 {
1071 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, pPage->GCPhys, &pvGuestPage, &LockPage);
1072 if (RT_FAILURE(rc))
1073 {
1074 pgmR3PoolCheckError(&State, "PGMPhysGCPhys2CCPtrReadOnly failed for %RGp: %Rrc\n", pPage->GCPhys, rc);
1075 continue;
1076 }
1077 }
1078# define HCPHYS_TO_POOL_PAGE(a_HCPhys) (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, (a_HCPhys))
1079
1080 /*
1081 * Check if something obvious is out of sync.
1082 */
1083 switch (pPage->enmKind)
1084 {
1085 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
1086 {
1087 PCPGMSHWPTPAE const pShwPT = (PCPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1088 PCX86PDPAE const pGstPT = (PCX86PDPAE)pvGuestPage;
1089 for (unsigned j = 0; j < RT_ELEMENTS(pShwPT->a); j++)
1090 if (PGMSHWPTEPAE_IS_P(pShwPT->a[j]))
1091 {
1092 RTHCPHYS HCPhys = NIL_RTHCPHYS;
1093 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[j].u & X86_PTE_PAE_PG_MASK, &HCPhys);
1094 if ( rc != VINF_SUCCESS
1095 || PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[j]) != HCPhys)
1096 pgmR3PoolCheckError(&State, "Mismatch HCPhys: rc=%Rrc idx=%#x guest %RX64 shw=%RX64 vs %RHp\n",
1097 rc, j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
1098 else if ( PGMSHWPTEPAE_IS_RW(pShwPT->a[j])
1099 && !(pGstPT->a[j].u & X86_PTE_RW))
1100 pgmR3PoolCheckError(&State, "Mismatch r/w gst/shw: idx=%#x guest %RX64 shw=%RX64 vs %RHp\n",
1101 j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
1102 }
1103 break;
1104 }
1105
1106 case PGMPOOLKIND_EPT_PT_FOR_EPT_PT:
1107 {
1108 PCEPTPT const pShwPT = (PCEPTPT)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1109 PCEPTPT const pGstPT = (PCEPTPT)pvGuestPage;
1110 for (unsigned j = 0; j < RT_ELEMENTS(pShwPT->a); j++)
1111 {
1112 uint64_t const uShw = pShwPT->a[j].u;
1113 if (uShw & EPT_PRESENT_MASK)
1114 {
1115 uint64_t const uGst = pGstPT->a[j].u;
1116 RTHCPHYS HCPhys = NIL_RTHCPHYS;
1117 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), uGst & EPT_E_PG_MASK, &HCPhys);
1118 if ( rc != VINF_SUCCESS
1119 || (uShw & EPT_E_PG_MASK) != HCPhys)
1120 pgmR3PoolCheckError(&State, "Mismatch HCPhys: rc=%Rrc idx=%#x guest %RX64 shw=%RX64 vs %RHp\n",
1121 rc, j, uGst, uShw, HCPhys);
1122 if ( (uShw & (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE))
1123 != (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE)
1124 && ( ((uShw & EPT_E_READ) && !(uGst & EPT_E_READ))
1125 || ((uShw & EPT_E_WRITE) && !(uGst & EPT_E_WRITE))
1126 || ((uShw & EPT_E_EXECUTE) && !(uGst & EPT_E_EXECUTE)) ) )
1127 pgmR3PoolCheckError(&State, "Mismatch r/w/x: idx=%#x guest %RX64 shw=%RX64\n", j, uGst, uShw);
1128 }
1129 }
1130 break;
1131 }
1132
1133 case PGMPOOLKIND_EPT_PD_FOR_EPT_PD:
1134 {
1135 PCEPTPD const pShwPD = (PCEPTPD)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1136 PCEPTPD const pGstPD = (PCEPTPD)pvGuestPage;
1137 for (unsigned j = 0; j < RT_ELEMENTS(pShwPD->a); j++)
1138 {
1139 uint64_t const uShw = pShwPD->a[j].u;
1140 if (uShw & EPT_PRESENT_MASK)
1141 {
1142 uint64_t const uGst = pGstPD->a[j].u;
1143 if (uShw & EPT_E_LEAF)
1144 {
1145 if (!(uGst & EPT_E_LEAF))
1146 pgmR3PoolCheckError(&State, "Leafness-mismatch: idx=%#x guest %RX64 shw=%RX64\n", j, uGst, uShw);
1147 else
1148 {
1149 RTHCPHYS HCPhys = NIL_RTHCPHYS;
1150 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), uGst & EPT_PDE2M_PG_MASK, &HCPhys);
1151 if ( rc != VINF_SUCCESS
1152 || (uShw & EPT_E_PG_MASK) != HCPhys)
1153 pgmR3PoolCheckError(&State, "Mismatch HCPhys: rc=%Rrc idx=%#x guest %RX64 shw=%RX64 vs %RHp (2MB)\n",
1154 rc, j, uGst, uShw, HCPhys);
1155 }
1156 }
1157 else
1158 {
1159 PPGMPOOLPAGE pSubPage = HCPHYS_TO_POOL_PAGE(uShw & EPT_E_PG_MASK);
1160 if (pSubPage)
1161 {
1162 /** @todo adjust for 2M page to shadow PT mapping. */
1163 if (pSubPage->enmKind != PGMPOOLKIND_EPT_PT_FOR_EPT_PT)
1164 pgmR3PoolCheckError(&State, "Wrong sub-table type: idx=%#x guest %RX64 shw=%RX64: idxSub=%#x %s\n",
1165 j, uGst, uShw, pSubPage->idx, pgmPoolPoolKindToStr(pSubPage->enmKind));
1166 if (pSubPage->fA20Enabled != pPage->fA20Enabled)
1167 pgmR3PoolCheckError(&State, "Wrong sub-table A20: idx=%#x guest %RX64 shw=%RX64: idxSub=%#x A20=%d, expected %d\n",
1168 j, uGst, uShw, pSubPage->idx, pSubPage->fA20Enabled, pPage->fA20Enabled);
1169 if (pSubPage->GCPhys != (uGst & EPT_E_PG_MASK))
1170 pgmR3PoolCheckError(&State, "Wrong sub-table GCPhys: idx=%#x guest %RX64 shw=%RX64: GCPhys=%#RGp idxSub=%#x\n",
1171 j, uGst, uShw, pSubPage->GCPhys, pSubPage->idx);
1172 }
1173 else
1174 pgmR3PoolCheckError(&State, "sub table not found: idx=%#x shw=%RX64\n", j, uShw);
1175
1176 }
1177 if ( (uShw & (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE))
1178 != (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE)
1179 && ( ((uShw & EPT_E_READ) && !(uGst & EPT_E_READ))
1180 || ((uShw & EPT_E_WRITE) && !(uGst & EPT_E_WRITE))
1181 || ((uShw & EPT_E_EXECUTE) && !(uGst & EPT_E_EXECUTE)) ) )
1182 pgmR3PoolCheckError(&State, "Mismatch r/w/x: idx=%#x guest %RX64 shw=%RX64\n",
1183 j, uGst, uShw);
1184 }
1185 }
1186 break;
1187 }
1188
1189 case PGMPOOLKIND_EPT_PDPT_FOR_EPT_PDPT:
1190 {
1191 PCEPTPDPT const pShwPDPT = (PCEPTPDPT)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1192 PCEPTPDPT const pGstPDPT = (PCEPTPDPT)pvGuestPage;
1193 for (unsigned j = 0; j < RT_ELEMENTS(pShwPDPT->a); j++)
1194 {
1195 uint64_t const uShw = pShwPDPT->a[j].u;
1196 if (uShw & EPT_PRESENT_MASK)
1197 {
1198 uint64_t const uGst = pGstPDPT->a[j].u;
1199 if (uShw & EPT_E_LEAF)
1200 pgmR3PoolCheckError(&State, "No 1GiB shadow pages: idx=%#x guest %RX64 shw=%RX64\n", j, uGst, uShw);
1201 else
1202 {
1203 PPGMPOOLPAGE pSubPage = HCPHYS_TO_POOL_PAGE(uShw & EPT_E_PG_MASK);
1204 if (pSubPage)
1205 {
1206 if (pSubPage->enmKind != PGMPOOLKIND_EPT_PD_FOR_EPT_PD)
1207 pgmR3PoolCheckError(&State, "Wrong sub-table type: idx=%#x guest %RX64 shw=%RX64: idxSub=%#x %s\n",
1208 j, uGst, uShw, pSubPage->idx, pgmPoolPoolKindToStr(pSubPage->enmKind));
1209 if (pSubPage->fA20Enabled != pPage->fA20Enabled)
1210 pgmR3PoolCheckError(&State, "Wrong sub-table A20: idx=%#x guest %RX64 shw=%RX64: idxSub=%#x A20=%d, expected %d\n",
1211 j, uGst, uShw, pSubPage->idx, pSubPage->fA20Enabled, pPage->fA20Enabled);
1212 if (pSubPage->GCPhys != (uGst & EPT_E_PG_MASK))
1213 pgmR3PoolCheckError(&State, "Wrong sub-table GCPhys: idx=%#x guest %RX64 shw=%RX64: GCPhys=%#RGp idxSub=%#x\n",
1214 j, uGst, uShw, pSubPage->GCPhys, pSubPage->idx);
1215 }
1216 else
1217 pgmR3PoolCheckError(&State, "sub table not found: idx=%#x shw=%RX64\n", j, uShw);
1218
1219 }
1220 if ( (uShw & (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE))
1221 != (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE)
1222 && ( ((uShw & EPT_E_READ) && !(uGst & EPT_E_READ))
1223 || ((uShw & EPT_E_WRITE) && !(uGst & EPT_E_WRITE))
1224 || ((uShw & EPT_E_EXECUTE) && !(uGst & EPT_E_EXECUTE)) ) )
1225 pgmR3PoolCheckError(&State, "Mismatch r/w/x: idx=%#x guest %RX64 shw=%RX64\n",
1226 j, uGst, uShw);
1227 }
1228 }
1229 break;
1230 }
1231
1232 case PGMPOOLKIND_EPT_PML4_FOR_EPT_PML4:
1233 {
1234 PCEPTPML4 const pShwPML4 = (PCEPTPML4)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
1235 PCEPTPML4 const pGstPML4 = (PCEPTPML4)pvGuestPage;
1236 for (unsigned j = 0; j < RT_ELEMENTS(pShwPML4->a); j++)
1237 {
1238 uint64_t const uShw = pShwPML4->a[j].u;
1239 if (uShw & EPT_PRESENT_MASK)
1240 {
1241 uint64_t const uGst = pGstPML4->a[j].u;
1242 if (uShw & EPT_E_LEAF)
1243 pgmR3PoolCheckError(&State, "No 0.5TiB shadow pages: idx=%#x guest %RX64 shw=%RX64\n", j, uGst, uShw);
1244 else
1245 {
1246 PPGMPOOLPAGE pSubPage = HCPHYS_TO_POOL_PAGE(uShw & EPT_E_PG_MASK);
1247 if (pSubPage)
1248 {
1249 if (pSubPage->enmKind != PGMPOOLKIND_EPT_PDPT_FOR_EPT_PDPT)
1250 pgmR3PoolCheckError(&State, "Wrong sub-table type: idx=%#x guest %RX64 shw=%RX64: idxSub=%#x %s\n",
1251 j, uGst, uShw, pSubPage->idx, pgmPoolPoolKindToStr(pSubPage->enmKind));
1252 if (pSubPage->fA20Enabled != pPage->fA20Enabled)
1253 pgmR3PoolCheckError(&State, "Wrong sub-table A20: idx=%#x guest %RX64 shw=%RX64: idxSub=%#x A20=%d, expected %d\n",
1254 j, uGst, uShw, pSubPage->idx, pSubPage->fA20Enabled, pPage->fA20Enabled);
1255 if (pSubPage->GCPhys != (uGst & EPT_E_PG_MASK))
1256 pgmR3PoolCheckError(&State, "Wrong sub-table GCPhys: idx=%#x guest %RX64 shw=%RX64: GCPhys=%#RGp idxSub=%#x\n",
1257 j, uGst, uShw, pSubPage->GCPhys, pSubPage->idx);
1258 }
1259 else
1260 pgmR3PoolCheckError(&State, "sub table not found: idx=%#x shw=%RX64\n", j, uShw);
1261
1262 }
1263 if ( (uShw & (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE))
1264 != (EPT_E_READ | EPT_E_WRITE | EPT_E_EXECUTE)
1265 && ( ((uShw & EPT_E_READ) && !(uGst & EPT_E_READ))
1266 || ((uShw & EPT_E_WRITE) && !(uGst & EPT_E_WRITE))
1267 || ((uShw & EPT_E_EXECUTE) && !(uGst & EPT_E_EXECUTE)) ) )
1268 pgmR3PoolCheckError(&State, "Mismatch r/w/x: idx=%#x guest %RX64 shw=%RX64\n",
1269 j, uGst, uShw);
1270 }
1271 }
1272 break;
1273 }
1274 }
1275
1276#undef HCPHYS_TO_POOL_PAGE
1277 if (pvGuestPage)
1278 PGMPhysReleasePageMappingLock(pVM, &LockPage);
1279 }
1280 PGM_UNLOCK(pVM);
1281
1282 if (State.cErrors > 0)
1283 return DBGCCmdHlpFail(pCmdHlp, pCmd, "Found %#x errors", State.cErrors);
1284 DBGCCmdHlpPrintf(pCmdHlp, "no errors found\n");
1285 return VINF_SUCCESS;
1286}
1287
1288#endif /* VBOX_WITH_DEBUGGER */
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