TRPM.cpp@ 105379

Last change on this file since 105379 was 103194, checked in by vboxsync, 10 months ago
VMM: Nested VMX: bugref:10318 Distinguish NMI vs. hardware exception 2 in TRPM (VMX and SVM have always made this subtle distinction).
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 18.5 KB

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1	/* $Id: TRPM.cpp 103194 2024-02-05 07:23:40Z vboxsync $ */
2	/** @file
3	* TRPM - The Trap Monitor.
4	*/
5
6	/*
7	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	/** @page pg_trpm TRPM - The Trap Monitor
29	*
30	* The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
31	* the VMM. It plays a major role in raw-mode execution and a lesser one in the
32	* hardware assisted mode.
33	*
34	* Note first, the following will use trap as a collective term for faults,
35	* aborts and traps.
36	*
37	* @see grp_trpm
38	*
39	*
40	* @section sec_trpm_rc Raw-Mode Context
41	*
42	* When executing in the raw-mode context, TRPM will be managing the IDT and
43	* processing all traps and interrupts. It will also monitor the guest IDT
44	* because CSAM wishes to know about changes to it (trap/interrupt/syscall
45	* handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
46	* considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
47	*
48	* External interrupts will be forwarded to the host context by the quickest
49	* possible route where they will be reasserted. The other events will be
50	* categorized into virtualization traps, genuine guest traps and hypervisor
51	* traps. The latter group may be recoverable depending on when they happen and
52	* whether there is a handler for it, otherwise it will cause a guru meditation.
53	*
54	* TRPM distinguishes the between the first two (virt and guest traps) and the
55	* latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
56	* it's a hyper trap otherwise it's a virt/guest trap. There are three trap
57	* dispatcher tables, one ad-hoc for one time traps registered via
58	* TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
59	* The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
60	*
61	* The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
62	* part), will call up the other VMM sub-systems depending on what it things
63	* happens. The two most busy traps are page faults (\#PF) and general
64	* protection fault/trap (\#GP).
65	*
66	* Before resuming guest code after having taken a virtualization trap or
67	* injected a guest trap, TRPM will check for pending forced action and
68	* every now and again let TM check for timed out timers. This allows code that
69	* is being executed as part of virtualization traps to signal ring-3 exits,
70	* page table resyncs and similar without necessarily using the status code. It
71	* also make sure we're more responsive to timers and requests from other
72	* threads (necessarily running on some different core/cpu in most cases).
73	*
74	*
75	* @section sec_trpm_all All Contexts
76	*
77	* TRPM will also dispatch / inject interrupts and traps to the guest, both when
78	* in raw-mode and when in hardware assisted mode. See TRPMInject().
79	*
80	*/
81
82
83	/*********************************************************************************************************************************
84	* Header Files *
85	*********************************************************************************************************************************/
86	#define LOG_GROUP LOG_GROUP_TRPM
87	#include <VBox/vmm/trpm.h>
88	#include <VBox/vmm/cpum.h>
89	#include <VBox/vmm/selm.h>
90	#include <VBox/vmm/ssm.h>
91	#include <VBox/vmm/pdmapi.h>
92	#include <VBox/vmm/em.h>
93	#include <VBox/vmm/pgm.h>
94	#include <VBox/vmm/dbgf.h>
95	#include <VBox/vmm/mm.h>
96	#include <VBox/vmm/stam.h>
97	#include <VBox/vmm/iem.h>
98	#include "TRPMInternal.h"
99	#include <VBox/vmm/vm.h>
100	#include <VBox/vmm/em.h>
101	#include <VBox/vmm/hm.h>
102
103	#include <VBox/err.h>
104	#include <VBox/param.h>
105	#include <VBox/log.h>
106	#include <iprt/assert.h>
107	#include <iprt/asm.h>
108	#include <iprt/string.h>
109	#include <iprt/alloc.h>
110
111
112	/*********************************************************************************************************************************
113	* Defined Constants And Macros *
114	*********************************************************************************************************************************/
115	/** TRPM saved state version. */
116	#define TRPM_SAVED_STATE_VERSION 11
117	#define TRPM_SAVED_STATE_VERSION_PRE_NMI 10 /* NMI TRPM event type bumped the version */
118	#define TRPM_SAVED_STATE_VERSION_PRE_ICEBP 9 /* INT1/ICEBP support bumped the version */
119	#define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
120
121
122	/*********************************************************************************************************************************
123	* Internal Functions *
124	*********************************************************************************************************************************/
125	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
126	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
127	static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
128
129
130	/**
131	* Initializes the Trap Manager
132	*
133	* @returns VBox status code.
134	* @param pVM The cross context VM structure.
135	*/
136	VMMR3DECL(int) TRPMR3Init(PVM pVM)
137	{
138	LogFlow(("TRPMR3Init\n"));
139	int rc;
140
141	/*
142	* Assert sizes and alignments.
143	*/
144	AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
145
146	/*
147	* Initialize members.
148	*/
149	for (VMCPUID i = 0; i < pVM->cCpus; i++)
150	{
151	PVMCPU pVCpu = pVM->apCpusR3[i];
152	pVCpu->trpm.s.uActiveVector = ~0U;
153	}
154
155	/*
156	* Register the saved state data unit.
157	*/
158	rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
159	NULL, NULL, NULL,
160	NULL, trpmR3Save, NULL,
161	NULL, trpmR3Load, NULL);
162	if (RT_FAILURE(rc))
163	return rc;
164
165	/*
166	* Register info handlers.
167	*/
168	rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
169	DBGFINFO_FLAGS_ALL_EMTS);
170	AssertRCReturn(rc, rc);
171
172	/*
173	* Statistics.
174	*/
175	for (unsigned i = 0; i < 256; i++)
176	STAMR3RegisterF(pVM, &pVM->trpm.s.aStatForwardedIRQ[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,
177	"Forwarded interrupts.", i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
178
179	return 0;
180	}
181
182
183	/**
184	* Applies relocations to data and code managed by this component.
185	*
186	* This function will be called at init and whenever the VMM need
187	* to relocate itself inside the GC.
188	*
189	* @param pVM The cross context VM structure.
190	* @param offDelta Relocation delta relative to old location.
191	*/
192	VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
193	{
194	RT_NOREF(pVM, offDelta);
195	}
196
197
198	/**
199	* Terminates the Trap Manager
200	*
201	* @returns VBox status code.
202	* @param pVM The cross context VM structure.
203	*/
204	VMMR3DECL(int) TRPMR3Term(PVM pVM)
205	{
206	NOREF(pVM);
207	return VINF_SUCCESS;
208	}
209
210
211	/**
212	* Resets a virtual CPU.
213	*
214	* Used by TRPMR3Reset and CPU hot plugging.
215	*
216	* @param pVCpu The cross context virtual CPU structure.
217	*/
218	VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
219	{
220	pVCpu->trpm.s.uActiveVector = ~0U;
221	}
222
223
224	/**
225	* The VM is being reset.
226	*
227	* For the TRPM component this means that any IDT write monitors
228	* needs to be removed, any pending trap cleared, and the IDT reset.
229	*
230	* @param pVM The cross context VM structure.
231	*/
232	VMMR3DECL(void) TRPMR3Reset(PVM pVM)
233	{
234	/*
235	* Reinitialize other members calling the relocator to get things right.
236	*/
237	for (VMCPUID i = 0; i < pVM->cCpus; i++)
238	TRPMR3ResetCpu(pVM->apCpusR3[i]);
239	TRPMR3Relocate(pVM, 0);
240	}
241
242
243	/**
244	* Execute state save operation.
245	*
246	* @returns VBox status code.
247	* @param pVM The cross context VM structure.
248	* @param pSSM SSM operation handle.
249	*/
250	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
251	{
252	LogFlow(("trpmR3Save:\n"));
253
254	for (VMCPUID i = 0; i < pVM->cCpus; i++)
255	{
256	PCTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
257	SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
258	SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
259	SSMR3PutU32(pSSM, pTrpmCpu->uActiveErrorCode);
260	SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
261	SSMR3PutU8(pSSM, pTrpmCpu->cbInstr);
262	SSMR3PutBool(pSSM, pTrpmCpu->fIcebp);
263	}
264	return VINF_SUCCESS;
265	}
266
267
268	/**
269	* Execute state load operation.
270	*
271	* @returns VBox status code.
272	* @param pVM The cross context VM structure.
273	* @param pSSM SSM operation handle.
274	* @param uVersion Data layout version.
275	* @param uPass The data pass.
276	*/
277	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
278	{
279	LogFlow(("trpmR3Load:\n"));
280	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
281
282	/*
283	* Validate version.
284	*/
285	if ( uVersion != TRPM_SAVED_STATE_VERSION
286	&& uVersion != TRPM_SAVED_STATE_VERSION_PRE_NMI
287	&& uVersion != TRPM_SAVED_STATE_VERSION_PRE_ICEBP
288	&& uVersion != TRPM_SAVED_STATE_VERSION_UNI)
289	{
290	AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
291	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
292	}
293
294	if (uVersion >= TRPM_SAVED_STATE_VERSION_PRE_NMI)
295	{
296	for (VMCPUID i = 0; i < pVM->cCpus; i++)
297	{
298	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
299	SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
300	SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
301	SSMR3GetU32(pSSM, &pTrpmCpu->uActiveErrorCode);
302	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
303	SSMR3GetU8(pSSM, &pTrpmCpu->cbInstr);
304	SSMR3GetBool(pSSM, &pTrpmCpu->fIcebp);
305	}
306	}
307	else
308	{
309	/*
310	* Active and saved traps.
311	*/
312	if (uVersion == TRPM_SAVED_STATE_VERSION_PRE_ICEBP)
313	{
314	for (VMCPUID i = 0; i < pVM->cCpus; i++)
315	{
316	RTGCUINT GCUIntErrCode;
317	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
318	SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
319	SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
320	SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
321	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
322	SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedVector - No longer used. */
323	SSMR3Skip(pSSM, sizeof(RTUINT)); /* enmSavedType - No longer used. */
324	SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedErrorCode - No longer used. */
325	SSMR3Skip(pSSM, sizeof(RTGCUINTPTR)); /* uSavedCR2 - No longer used. */
326	SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uPrevVector - No longer used. */
327
328	/*
329	* We lose the high 64-bits here (if RTGCUINT is 64-bit) after making the
330	* active error code as 32-bits. However, for error codes even 16-bit should
331	* be sufficient. Despite this, we decided to use and keep it at 32-bits
332	* since VMX/SVM defines these as 32-bit in their event fields and converting
333	* to/from these events are safer.
334	*/
335	pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
336	}
337	}
338	else
339	{
340	RTGCUINT GCUIntErrCode;
341	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
342	SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
343	SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
344	SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
345	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
346	pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
347	}
348
349	/*
350	* Skip rest of TRPM saved-state unit involving IDT and trampoline gates.
351	* With the removal of raw-mode support, we no longer need these.
352	*/
353	SSMR3SkipToEndOfUnit(pSSM);
354	}
355
356	/*
357	* For saved-state verions prior to introducing NMI as a separate type, convert
358	* traps with vector 2 as NMI since the rest of VirtualBox code now expects this.
359	*/
360	if (uVersion <= TRPM_SAVED_STATE_VERSION_PRE_NMI)
361	{
362	for (VMCPUID i = 0; i < pVM->cCpus; i++)
363	{
364	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
365	AssertLogRelMsgReturn(pTrpmCpu->enmActiveType != TRPM_NMI,
366	("TRPM event type (%#RX32) invalid for saved-state version %u!",
367	pTrpmCpu->enmActiveType, uVersion), VERR_SSM_ENUM_VALUE_OUT_OF_RANGE);
368	if ( pTrpmCpu->uActiveVector == X86_XCPT_NMI
369	&& pTrpmCpu->enmActiveType == TRPM_TRAP)
370	pTrpmCpu->enmActiveType = TRPM_NMI;
371	}
372	}
373
374	return VINF_SUCCESS;
375	}
376
377
378	/**
379	* Inject event (such as external irq or trap).
380	*
381	* @returns VBox status code.
382	* @param pVM The cross context VM structure.
383	* @param pVCpu The cross context virtual CPU structure.
384	* @param enmEvent Trpm event type
385	* @param pfInjected Where to store whether the event was injected or not.
386	*/
387	VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
388	{
389	#if defined(VBOX_VMM_TARGET_ARMV8)
390	RT_NOREF(pVM, pVCpu, enmEvent, pfInjected);
391	AssertReleaseFailed();
392	return VERR_NOT_IMPLEMENTED;
393	#else
394	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
395	Assert(!CPUMIsInInterruptShadow(pCtx));
396	Assert(pfInjected);
397	*pfInjected = false;
398
399	/* Currently only useful for external hardware interrupts. */
400	Assert(enmEvent == TRPM_HARDWARE_INT);
401
402	RT_NOREF3(pVM, enmEvent, pCtx);
403	uint8_t u8Interrupt = 0;
404	int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
405	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
406	if (RT_SUCCESS(rc))
407	{
408	*pfInjected = true;
409	# ifdef RT_OS_WINDOWS
410	if (!VM_IS_NEM_ENABLED(pVM))
411	{
412	# endif
413	# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
414	/*
415	* If we are NOT calling IEMInjectTrap, we need to handle the
416	* VMX nested-guest external-interrupt VM-exit here.
417	*/
418	if ( CPUMIsGuestInVmxNonRootMode(pCtx)
419	&& CPUMIsGuestVmxInterceptEvents(pCtx)
420	&& CPUMIsGuestVmxPinCtlsSet(pCtx, VMX_PIN_CTLS_EXT_INT_EXIT))
421	{
422	Assert(CPUMIsGuestVmxExitCtlsSet(pCtx, VMX_EXIT_CTLS_ACK_EXT_INT));
423	VBOXSTRICTRC rcStrict = IEMExecVmxVmexitExtInt(pVCpu, u8Interrupt, false /* fIntPending */);
424	Assert(rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE);
425	return VBOXSTRICTRC_VAL(rcStrict);
426	}
427	# endif
428	rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
429	AssertRC(rc);
430	# ifdef RT_OS_WINDOWS
431	}
432	else
433	{
434	VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
435	/** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
436	* If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
437	if (rcStrict != VINF_SUCCESS)
438	return VBOXSTRICTRC_TODO(rcStrict);
439	}
440	# endif
441	STAM_REL_COUNTER_INC(&pVM->trpm.s.aStatForwardedIRQ[u8Interrupt]);
442	}
443	else
444	{
445	/* Can happen if the interrupt is masked by TPR or APIC is disabled. */
446	AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR \|\| rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
447	}
448	# if 0 /* HMR3IsActive is not reliable (esp. after restore), just return VINF_EM_RESCHEDULE. */
449	return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
450	: VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
451	: VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
452	# else
453	return VINF_EM_RESCHEDULE;
454	# endif
455	#endif
456	}
457
458
459	/**
460	* Displays the pending TRPM event.
461	*
462	* @param pVM The cross context VM structure.
463	* @param pHlp The info helper functions.
464	* @param pszArgs Arguments, ignored.
465	*/
466	static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
467	{
468	NOREF(pszArgs);
469	PVMCPU pVCpu = VMMGetCpu(pVM);
470	if (!pVCpu)
471	pVCpu = pVM->apCpusR3[0];
472
473	uint8_t uVector;
474	uint8_t cbInstr;
475	TRPMEVENT enmTrapEvent;
476	uint32_t uErrorCode;
477	RTGCUINTPTR uCR2;
478	bool fIcebp;
479	int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr, &fIcebp);
480	if (RT_SUCCESS(rc))
481	{
482	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
483	static const char * const s_apszTrpmEventType[] =
484	{
485	"Trap",
486	"Hardware Int",
487	"Software Int"
488	};
489	if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
490	{
491	pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
492	pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
493	pHlp->pfnPrintf(pHlp, " uErrorCode = %#x\n", uErrorCode);
494	pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
495	pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
496	pHlp->pfnPrintf(pHlp, " fIcebp = %RTbool\n", fIcebp);
497	}
498	else
499	pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
500	}
501	else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
502	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
503	else
504	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
505	}
506

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source: vbox/trunk/src/VBox/VMM/VMMR3/TRPM.cpp@ 105379

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