TRPM.cpp@ 80239

Last change on this file since 80239 was 80191, checked in by vboxsync, 5 years ago
VMM/r3: Refactored VMCPU enumeration in preparation that aCpus will be replaced with a pointer array. Removed two raw-mode offset members from the CPUM and CPUMCPU sub-structures. bugref:9217 bugref:9517
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File size: 17.0 KB

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1	/* $Id: TRPM.cpp 80191 2019-08-08 00:36:57Z vboxsync $ */
2	/** @file
3	* TRPM - The Trap Monitor.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/** @page pg_trpm TRPM - The Trap Monitor
19	*
20	* The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
21	* the VMM. It plays a major role in raw-mode execution and a lesser one in the
22	* hardware assisted mode.
23	*
24	* Note first, the following will use trap as a collective term for faults,
25	* aborts and traps.
26	*
27	* @see grp_trpm
28	*
29	*
30	* @section sec_trpm_rc Raw-Mode Context
31	*
32	* When executing in the raw-mode context, TRPM will be managing the IDT and
33	* processing all traps and interrupts. It will also monitor the guest IDT
34	* because CSAM wishes to know about changes to it (trap/interrupt/syscall
35	* handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
36	* considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
37	*
38	* External interrupts will be forwarded to the host context by the quickest
39	* possible route where they will be reasserted. The other events will be
40	* categorized into virtualization traps, genuine guest traps and hypervisor
41	* traps. The latter group may be recoverable depending on when they happen and
42	* whether there is a handler for it, otherwise it will cause a guru meditation.
43	*
44	* TRPM distinguishes the between the first two (virt and guest traps) and the
45	* latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
46	* it's a hyper trap otherwise it's a virt/guest trap. There are three trap
47	* dispatcher tables, one ad-hoc for one time traps registered via
48	* TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
49	* The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
50	*
51	* The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
52	* part), will call up the other VMM sub-systems depending on what it things
53	* happens. The two most busy traps are page faults (\#PF) and general
54	* protection fault/trap (\#GP).
55	*
56	* Before resuming guest code after having taken a virtualization trap or
57	* injected a guest trap, TRPM will check for pending forced action and
58	* every now and again let TM check for timed out timers. This allows code that
59	* is being executed as part of virtualization traps to signal ring-3 exits,
60	* page table resyncs and similar without necessarily using the status code. It
61	* also make sure we're more responsive to timers and requests from other
62	* threads (necessarily running on some different core/cpu in most cases).
63	*
64	*
65	* @section sec_trpm_all All Contexts
66	*
67	* TRPM will also dispatch / inject interrupts and traps to the guest, both when
68	* in raw-mode and when in hardware assisted mode. See TRPMInject().
69	*
70	*/
71
72
73	/*********************************************************************************************************************************
74	* Header Files *
75	*********************************************************************************************************************************/
76	#define VBOX_BUGREF_9217_PART_I
77	#define LOG_GROUP LOG_GROUP_TRPM
78	#include <VBox/vmm/trpm.h>
79	#include <VBox/vmm/cpum.h>
80	#include <VBox/vmm/selm.h>
81	#include <VBox/vmm/ssm.h>
82	#include <VBox/vmm/pdmapi.h>
83	#include <VBox/vmm/em.h>
84	#include <VBox/vmm/pgm.h>
85	#include <VBox/vmm/dbgf.h>
86	#include <VBox/vmm/mm.h>
87	#include <VBox/vmm/stam.h>
88	#include <VBox/vmm/iem.h>
89	#include "TRPMInternal.h"
90	#include <VBox/vmm/vm.h>
91	#include <VBox/vmm/em.h>
92	#ifdef VBOX_WITH_REM
93	# include <VBox/vmm/rem.h>
94	#endif
95	#include <VBox/vmm/hm.h>
96
97	#include <VBox/err.h>
98	#include <VBox/param.h>
99	#include <VBox/log.h>
100	#include <iprt/assert.h>
101	#include <iprt/asm.h>
102	#include <iprt/string.h>
103	#include <iprt/alloc.h>
104
105
106	/*********************************************************************************************************************************
107	* Defined Constants And Macros *
108	*********************************************************************************************************************************/
109	/** TRPM saved state version. */
110	#define TRPM_SAVED_STATE_VERSION 9
111	#define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
112
113
114	/*********************************************************************************************************************************
115	* Internal Functions *
116	*********************************************************************************************************************************/
117	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
118	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
119	static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
120
121
122	/**
123	* Initializes the Trap Manager
124	*
125	* @returns VBox status code.
126	* @param pVM The cross context VM structure.
127	*/
128	VMMR3DECL(int) TRPMR3Init(PVM pVM)
129	{
130	LogFlow(("TRPMR3Init\n"));
131	int rc;
132
133	/*
134	* Assert sizes and alignments.
135	*/
136	AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
137
138	/*
139	* Initialize members.
140	*/
141	for (VMCPUID i = 0; i < pVM->cCpus; i++)
142	{
143	PVMCPU pVCpu = pVM->apCpusR3[i];
144	pVCpu->trpm.s.uActiveVector = ~0U;
145	}
146
147	/*
148	* Register the saved state data unit.
149	*/
150	rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
151	NULL, NULL, NULL,
152	NULL, trpmR3Save, NULL,
153	NULL, trpmR3Load, NULL);
154	if (RT_FAILURE(rc))
155	return rc;
156
157	/*
158	* Register info handlers.
159	*/
160	rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
161	DBGFINFO_FLAGS_ALL_EMTS);
162	AssertRCReturn(rc, rc);
163
164	/*
165	* Statistics.
166	*/
167	#ifdef VBOX_WITH_STATISTICS
168	rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, sizeof(STAMCOUNTER), MM_TAG_TRPM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
169	AssertRCReturn(rc, rc);
170	for (unsigned i = 0; i < 256; i++)
171	STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
172	i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
173	#endif
174
175	return 0;
176	}
177
178
179	/**
180	* Applies relocations to data and code managed by this component.
181	*
182	* This function will be called at init and whenever the VMM need
183	* to relocate itself inside the GC.
184	*
185	* @param pVM The cross context VM structure.
186	* @param offDelta Relocation delta relative to old location.
187	*/
188	VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
189	{
190	RT_NOREF(pVM, offDelta);
191	}
192
193
194	/**
195	* Terminates the Trap Manager
196	*
197	* @returns VBox status code.
198	* @param pVM The cross context VM structure.
199	*/
200	VMMR3DECL(int) TRPMR3Term(PVM pVM)
201	{
202	NOREF(pVM);
203	return VINF_SUCCESS;
204	}
205
206
207	/**
208	* Resets a virtual CPU.
209	*
210	* Used by TRPMR3Reset and CPU hot plugging.
211	*
212	* @param pVCpu The cross context virtual CPU structure.
213	*/
214	VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
215	{
216	pVCpu->trpm.s.uActiveVector = ~0U;
217	}
218
219
220	/**
221	* The VM is being reset.
222	*
223	* For the TRPM component this means that any IDT write monitors
224	* needs to be removed, any pending trap cleared, and the IDT reset.
225	*
226	* @param pVM The cross context VM structure.
227	*/
228	VMMR3DECL(void) TRPMR3Reset(PVM pVM)
229	{
230	/*
231	* Reinitialize other members calling the relocator to get things right.
232	*/
233	for (VMCPUID i = 0; i < pVM->cCpus; i++)
234	TRPMR3ResetCpu(pVM->apCpusR3[i]);
235	TRPMR3Relocate(pVM, 0);
236	}
237
238
239	/**
240	* Execute state save operation.
241	*
242	* @returns VBox status code.
243	* @param pVM The cross context VM structure.
244	* @param pSSM SSM operation handle.
245	*/
246	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
247	{
248	LogFlow(("trpmR3Save:\n"));
249
250	/*
251	* Active and saved traps.
252	*/
253	for (VMCPUID i = 0; i < pVM->cCpus; i++)
254	{
255	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
256	SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
257	SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
258	SSMR3PutGCUInt(pSSM, pTrpmCpu->uActiveErrorCode);
259	SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
260	SSMR3PutGCUInt(pSSM, pTrpmCpu->uSavedVector);
261	SSMR3PutUInt(pSSM, pTrpmCpu->enmSavedType);
262	SSMR3PutGCUInt(pSSM, pTrpmCpu->uSavedErrorCode);
263	SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uSavedCR2);
264	SSMR3PutGCUInt(pSSM, pTrpmCpu->uPrevVector);
265	}
266	SSMR3PutBool(pSSM, false /* raw-mode enabled */);
267	SSMR3PutUInt(pSSM, 0 /was VMCPU_FF_TRPM_SYNC_IDT/);
268	uint32_t au32IdtPatched[8];
269	RT_ZERO(au32IdtPatched);
270	SSMR3PutMem(pSSM, &au32IdtPatched[0], sizeof(au32IdtPatched));
271	SSMR3PutU32(pSSM, UINT32_MAX); /* separator. */
272	/* Next came trampoline gates, terminating with UINT32_MAX. */
273	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
274	}
275
276
277	/**
278	* Execute state load operation.
279	*
280	* @returns VBox status code.
281	* @param pVM The cross context VM structure.
282	* @param pSSM SSM operation handle.
283	* @param uVersion Data layout version.
284	* @param uPass The data pass.
285	*/
286	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
287	{
288	LogFlow(("trpmR3Load:\n"));
289	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
290
291	/*
292	* Validate version.
293	*/
294	if ( uVersion != TRPM_SAVED_STATE_VERSION
295	&& uVersion != TRPM_SAVED_STATE_VERSION_UNI)
296	{
297	AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
298	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
299	}
300
301	/*
302	* Call the reset function to kick out any handled gates and other potential trouble.
303	*/
304	TRPMR3Reset(pVM);
305
306	/*
307	* Active and saved traps.
308	*/
309	if (uVersion == TRPM_SAVED_STATE_VERSION)
310	{
311	for (VMCPUID i = 0; i < pVM->cCpus; i++)
312	{
313	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
314	SSMR3GetUInt(pSSM, &pTrpmCpu->uActiveVector);
315	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmActiveType);
316	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uActiveErrorCode);
317	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
318	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedVector);
319	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmSavedType);
320	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedErrorCode);
321	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uSavedCR2);
322	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uPrevVector);
323	}
324
325	bool fIgnored;
326	SSMR3GetBool(pSSM, &fIgnored);
327	}
328	else
329	{
330	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
331	SSMR3GetUInt(pSSM, &pTrpmCpu->uActiveVector);
332	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmActiveType);
333	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uActiveErrorCode);
334	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
335	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedVector);
336	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmSavedType);
337	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedErrorCode);
338	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uSavedCR2);
339	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uPrevVector);
340
341	RTGCUINT fIgnored;
342	SSMR3GetGCUInt(pSSM, &fIgnored);
343	}
344
345	RTUINT fSyncIDT;
346	int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
347	if (RT_FAILURE(rc))
348	return rc;
349	AssertMsgReturn(!(fSyncIDT & ~1), ("fSyncIDT=%#x\n", fSyncIDT), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
350
351	uint32_t au32IdtPatched[8];
352	SSMR3GetMem(pSSM, &au32IdtPatched[0], sizeof(au32IdtPatched));
353
354	/* check the separator */
355	uint32_t u32Sep;
356	rc = SSMR3GetU32(pSSM, &u32Sep);
357	if (RT_FAILURE(rc))
358	return rc;
359	AssertMsgReturn(u32Sep == (uint32_t)~0, ("u32Sep=%#x (first)\n", u32Sep), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
360
361	/*
362	* Restore any trampoline gates.
363	*/
364	for (;;)
365	{
366	/* gate number / terminator */
367	uint32_t iTrap;
368	rc = SSMR3GetU32(pSSM, &iTrap);
369	if (RT_FAILURE(rc))
370	return rc;
371	if (iTrap == (uint32_t)~0)
372	break;
373	AssertMsgReturn(iTrap < 256, ("iTrap=%#x\n", iTrap), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
374
375	/* restore the IDT entry. */
376	RTGCPTR GCPtrHandler;
377	SSMR3GetGCPtr(pSSM, &GCPtrHandler);
378	VBOXIDTE Idte;
379	rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
380	if (RT_FAILURE(rc))
381	return rc;
382	Assert(GCPtrHandler);
383	//pTrpm->aIdt[iTrap] = Idte; - not any more.
384	}
385
386	return VINF_SUCCESS;
387	}
388
389
390	/**
391	* Inject event (such as external irq or trap).
392	*
393	* @returns VBox status code.
394	* @param pVM The cross context VM structure.
395	* @param pVCpu The cross context virtual CPU structure.
396	* @param enmEvent Trpm event type
397	* @param pfInjected Where to store whether the event was injected or not.
398	*/
399	VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
400	{
401	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
402	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
403	Assert(pfInjected);
404	*pfInjected = false;
405
406	/* Currently only useful for external hardware interrupts. */
407	Assert(enmEvent == TRPM_HARDWARE_INT);
408
409	RT_NOREF3(pVM, enmEvent, pCtx);
410	uint8_t u8Interrupt = 0;
411	int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
412	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
413	if (RT_SUCCESS(rc))
414	{
415	*pfInjected = true;
416	if (!VM_IS_NEM_ENABLED(pVM))
417	{
418	rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
419	AssertRC(rc);
420	}
421	else
422	{
423	VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
424	/** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
425	* If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
426	if (rcStrict != VINF_SUCCESS)
427	return VBOXSTRICTRC_TODO(rcStrict);
428	}
429	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
430	}
431	else
432	{
433	/* Can happen if the interrupt is masked by TPR or APIC is disabled. */
434	AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR \|\| rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
435	}
436	return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
437	: VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
438	: VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
439	}
440
441
442	/**
443	* Displays the pending TRPM event.
444	*
445	* @param pVM The cross context VM structure.
446	* @param pHlp The info helper functions.
447	* @param pszArgs Arguments, ignored.
448	*/
449	static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
450	{
451	NOREF(pszArgs);
452	PVMCPU pVCpu = VMMGetCpu(pVM);
453	if (!pVCpu)
454	pVCpu = pVM->apCpusR3[0];
455
456	uint8_t uVector;
457	uint8_t cbInstr;
458	TRPMEVENT enmTrapEvent;
459	RTGCUINT uErrorCode;
460	RTGCUINTPTR uCR2;
461	int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr);
462	if (RT_SUCCESS(rc))
463	{
464	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
465	static const char * const s_apszTrpmEventType[] =
466	{
467	"Trap",
468	"Hardware Int",
469	"Software Int"
470	};
471	if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
472	{
473	pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
474	pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
475	pHlp->pfnPrintf(pHlp, " uErrorCode = %#RGu\n", uErrorCode);
476	pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
477	pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
478	}
479	else
480	pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
481	}
482	else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
483	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
484	else
485	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
486	}
487

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