TRPM.cpp@ 80811

Last change on this file since 80811 was 80811, checked in by vboxsync, 5 years ago
VMM/TRPM: Nested VMX: bugref:9180 We need to check for "acknowledge interrupt on VM-exit" while injecting an event through TRPM.
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1	/* $Id: TRPM.cpp 80811 2019-09-16 06:40:17Z vboxsync $ */
2	/** @file
3	* TRPM - The Trap Monitor.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/** @page pg_trpm TRPM - The Trap Monitor
19	*
20	* The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
21	* the VMM. It plays a major role in raw-mode execution and a lesser one in the
22	* hardware assisted mode.
23	*
24	* Note first, the following will use trap as a collective term for faults,
25	* aborts and traps.
26	*
27	* @see grp_trpm
28	*
29	*
30	* @section sec_trpm_rc Raw-Mode Context
31	*
32	* When executing in the raw-mode context, TRPM will be managing the IDT and
33	* processing all traps and interrupts. It will also monitor the guest IDT
34	* because CSAM wishes to know about changes to it (trap/interrupt/syscall
35	* handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
36	* considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
37	*
38	* External interrupts will be forwarded to the host context by the quickest
39	* possible route where they will be reasserted. The other events will be
40	* categorized into virtualization traps, genuine guest traps and hypervisor
41	* traps. The latter group may be recoverable depending on when they happen and
42	* whether there is a handler for it, otherwise it will cause a guru meditation.
43	*
44	* TRPM distinguishes the between the first two (virt and guest traps) and the
45	* latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
46	* it's a hyper trap otherwise it's a virt/guest trap. There are three trap
47	* dispatcher tables, one ad-hoc for one time traps registered via
48	* TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
49	* The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
50	*
51	* The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
52	* part), will call up the other VMM sub-systems depending on what it things
53	* happens. The two most busy traps are page faults (\#PF) and general
54	* protection fault/trap (\#GP).
55	*
56	* Before resuming guest code after having taken a virtualization trap or
57	* injected a guest trap, TRPM will check for pending forced action and
58	* every now and again let TM check for timed out timers. This allows code that
59	* is being executed as part of virtualization traps to signal ring-3 exits,
60	* page table resyncs and similar without necessarily using the status code. It
61	* also make sure we're more responsive to timers and requests from other
62	* threads (necessarily running on some different core/cpu in most cases).
63	*
64	*
65	* @section sec_trpm_all All Contexts
66	*
67	* TRPM will also dispatch / inject interrupts and traps to the guest, both when
68	* in raw-mode and when in hardware assisted mode. See TRPMInject().
69	*
70	*/
71
72
73	/*********************************************************************************************************************************
74	* Header Files *
75	*********************************************************************************************************************************/
76	#define LOG_GROUP LOG_GROUP_TRPM
77	#include <VBox/vmm/trpm.h>
78	#include <VBox/vmm/cpum.h>
79	#include <VBox/vmm/selm.h>
80	#include <VBox/vmm/ssm.h>
81	#include <VBox/vmm/pdmapi.h>
82	#include <VBox/vmm/em.h>
83	#include <VBox/vmm/pgm.h>
84	#include <VBox/vmm/dbgf.h>
85	#include <VBox/vmm/mm.h>
86	#include <VBox/vmm/stam.h>
87	#include <VBox/vmm/iem.h>
88	#include "TRPMInternal.h"
89	#include <VBox/vmm/vm.h>
90	#include <VBox/vmm/em.h>
91	#ifdef VBOX_WITH_REM
92	# include <VBox/vmm/rem.h>
93	#endif
94	#include <VBox/vmm/hm.h>
95
96	#include <VBox/err.h>
97	#include <VBox/param.h>
98	#include <VBox/log.h>
99	#include <iprt/assert.h>
100	#include <iprt/asm.h>
101	#include <iprt/string.h>
102	#include <iprt/alloc.h>
103
104
105	/*********************************************************************************************************************************
106	* Defined Constants And Macros *
107	*********************************************************************************************************************************/
108	/** TRPM saved state version. */
109	#define TRPM_SAVED_STATE_VERSION 9
110	#define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
111
112
113	/*********************************************************************************************************************************
114	* Internal Functions *
115	*********************************************************************************************************************************/
116	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
117	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
118	static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
119
120
121	/**
122	* Initializes the Trap Manager
123	*
124	* @returns VBox status code.
125	* @param pVM The cross context VM structure.
126	*/
127	VMMR3DECL(int) TRPMR3Init(PVM pVM)
128	{
129	LogFlow(("TRPMR3Init\n"));
130	int rc;
131
132	/*
133	* Assert sizes and alignments.
134	*/
135	AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
136
137	/*
138	* Initialize members.
139	*/
140	for (VMCPUID i = 0; i < pVM->cCpus; i++)
141	{
142	PVMCPU pVCpu = pVM->apCpusR3[i];
143	pVCpu->trpm.s.uActiveVector = ~0U;
144	}
145
146	/*
147	* Register the saved state data unit.
148	*/
149	rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
150	NULL, NULL, NULL,
151	NULL, trpmR3Save, NULL,
152	NULL, trpmR3Load, NULL);
153	if (RT_FAILURE(rc))
154	return rc;
155
156	/*
157	* Register info handlers.
158	*/
159	rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
160	DBGFINFO_FLAGS_ALL_EMTS);
161	AssertRCReturn(rc, rc);
162
163	/*
164	* Statistics.
165	*/
166	#ifdef VBOX_WITH_STATISTICS
167	rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, sizeof(STAMCOUNTER), MM_TAG_TRPM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
168	AssertRCReturn(rc, rc);
169	for (unsigned i = 0; i < 256; i++)
170	STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
171	i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
172	#endif
173
174	return 0;
175	}
176
177
178	/**
179	* Applies relocations to data and code managed by this component.
180	*
181	* This function will be called at init and whenever the VMM need
182	* to relocate itself inside the GC.
183	*
184	* @param pVM The cross context VM structure.
185	* @param offDelta Relocation delta relative to old location.
186	*/
187	VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
188	{
189	RT_NOREF(pVM, offDelta);
190	}
191
192
193	/**
194	* Terminates the Trap Manager
195	*
196	* @returns VBox status code.
197	* @param pVM The cross context VM structure.
198	*/
199	VMMR3DECL(int) TRPMR3Term(PVM pVM)
200	{
201	NOREF(pVM);
202	return VINF_SUCCESS;
203	}
204
205
206	/**
207	* Resets a virtual CPU.
208	*
209	* Used by TRPMR3Reset and CPU hot plugging.
210	*
211	* @param pVCpu The cross context virtual CPU structure.
212	*/
213	VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
214	{
215	pVCpu->trpm.s.uActiveVector = ~0U;
216	}
217
218
219	/**
220	* The VM is being reset.
221	*
222	* For the TRPM component this means that any IDT write monitors
223	* needs to be removed, any pending trap cleared, and the IDT reset.
224	*
225	* @param pVM The cross context VM structure.
226	*/
227	VMMR3DECL(void) TRPMR3Reset(PVM pVM)
228	{
229	/*
230	* Reinitialize other members calling the relocator to get things right.
231	*/
232	for (VMCPUID i = 0; i < pVM->cCpus; i++)
233	TRPMR3ResetCpu(pVM->apCpusR3[i]);
234	TRPMR3Relocate(pVM, 0);
235	}
236
237
238	/**
239	* Execute state save operation.
240	*
241	* @returns VBox status code.
242	* @param pVM The cross context VM structure.
243	* @param pSSM SSM operation handle.
244	*/
245	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
246	{
247	LogFlow(("trpmR3Save:\n"));
248
249	/*
250	* Active and saved traps.
251	*/
252	for (VMCPUID i = 0; i < pVM->cCpus; i++)
253	{
254	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
255	SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
256	SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
257	SSMR3PutGCUInt(pSSM, pTrpmCpu->uActiveErrorCode);
258	SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
259	SSMR3PutGCUInt(pSSM, pTrpmCpu->uSavedVector);
260	SSMR3PutUInt(pSSM, pTrpmCpu->enmSavedType);
261	SSMR3PutGCUInt(pSSM, pTrpmCpu->uSavedErrorCode);
262	SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uSavedCR2);
263	SSMR3PutGCUInt(pSSM, pTrpmCpu->uPrevVector);
264	}
265	SSMR3PutBool(pSSM, false /* raw-mode enabled */);
266	SSMR3PutUInt(pSSM, 0 /was VMCPU_FF_TRPM_SYNC_IDT/);
267	uint32_t au32IdtPatched[8];
268	RT_ZERO(au32IdtPatched);
269	SSMR3PutMem(pSSM, &au32IdtPatched[0], sizeof(au32IdtPatched));
270	SSMR3PutU32(pSSM, UINT32_MAX); /* separator. */
271	/* Next came trampoline gates, terminating with UINT32_MAX. */
272	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
273	}
274
275
276	/**
277	* Execute state load operation.
278	*
279	* @returns VBox status code.
280	* @param pVM The cross context VM structure.
281	* @param pSSM SSM operation handle.
282	* @param uVersion Data layout version.
283	* @param uPass The data pass.
284	*/
285	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
286	{
287	LogFlow(("trpmR3Load:\n"));
288	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
289
290	/*
291	* Validate version.
292	*/
293	if ( uVersion != TRPM_SAVED_STATE_VERSION
294	&& uVersion != TRPM_SAVED_STATE_VERSION_UNI)
295	{
296	AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
297	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
298	}
299
300	/*
301	* Call the reset function to kick out any handled gates and other potential trouble.
302	*/
303	TRPMR3Reset(pVM);
304
305	/*
306	* Active and saved traps.
307	*/
308	if (uVersion == TRPM_SAVED_STATE_VERSION)
309	{
310	for (VMCPUID i = 0; i < pVM->cCpus; i++)
311	{
312	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
313	SSMR3GetUInt(pSSM, &pTrpmCpu->uActiveVector);
314	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmActiveType);
315	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uActiveErrorCode);
316	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
317	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedVector);
318	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmSavedType);
319	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedErrorCode);
320	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uSavedCR2);
321	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uPrevVector);
322	}
323
324	bool fIgnored;
325	SSMR3GetBool(pSSM, &fIgnored);
326	}
327	else
328	{
329	PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
330	SSMR3GetUInt(pSSM, &pTrpmCpu->uActiveVector);
331	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmActiveType);
332	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uActiveErrorCode);
333	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
334	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedVector);
335	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpmCpu->enmSavedType);
336	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uSavedErrorCode);
337	SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uSavedCR2);
338	SSMR3GetGCUInt(pSSM, &pTrpmCpu->uPrevVector);
339
340	RTGCUINT fIgnored;
341	SSMR3GetGCUInt(pSSM, &fIgnored);
342	}
343
344	RTUINT fSyncIDT;
345	int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
346	if (RT_FAILURE(rc))
347	return rc;
348	AssertMsgReturn(!(fSyncIDT & ~1), ("fSyncIDT=%#x\n", fSyncIDT), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
349
350	uint32_t au32IdtPatched[8];
351	SSMR3GetMem(pSSM, &au32IdtPatched[0], sizeof(au32IdtPatched));
352
353	/* check the separator */
354	uint32_t u32Sep;
355	rc = SSMR3GetU32(pSSM, &u32Sep);
356	if (RT_FAILURE(rc))
357	return rc;
358	AssertMsgReturn(u32Sep == (uint32_t)~0, ("u32Sep=%#x (first)\n", u32Sep), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
359
360	/*
361	* Restore any trampoline gates.
362	*/
363	for (;;)
364	{
365	/* gate number / terminator */
366	uint32_t iTrap;
367	rc = SSMR3GetU32(pSSM, &iTrap);
368	if (RT_FAILURE(rc))
369	return rc;
370	if (iTrap == (uint32_t)~0)
371	break;
372	AssertMsgReturn(iTrap < 256, ("iTrap=%#x\n", iTrap), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
373
374	/* restore the IDT entry. */
375	RTGCPTR GCPtrHandler;
376	SSMR3GetGCPtr(pSSM, &GCPtrHandler);
377	VBOXIDTE Idte;
378	rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
379	if (RT_FAILURE(rc))
380	return rc;
381	Assert(GCPtrHandler);
382	//pTrpm->aIdt[iTrap] = Idte; - not any more.
383	}
384
385	return VINF_SUCCESS;
386	}
387
388
389	/**
390	* Inject event (such as external irq or trap).
391	*
392	* @returns VBox status code.
393	* @param pVM The cross context VM structure.
394	* @param pVCpu The cross context virtual CPU structure.
395	* @param enmEvent Trpm event type
396	* @param pfInjected Where to store whether the event was injected or not.
397	*/
398	VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
399	{
400	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
401	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
402	Assert(pfInjected);
403	*pfInjected = false;
404
405	/* Currently only useful for external hardware interrupts. */
406	Assert(enmEvent == TRPM_HARDWARE_INT);
407
408	RT_NOREF3(pVM, enmEvent, pCtx);
409	uint8_t u8Interrupt = 0;
410	int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
411	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
412	if (RT_SUCCESS(rc))
413	{
414	*pfInjected = true;
415	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
416	if ( CPUMIsGuestInVmxNonRootMode(pCtx)
417	&& CPUMIsGuestVmxInterceptEvents(pCtx)
418	&& CPUMIsGuestVmxPinCtlsSet(pVCpu, pCtx, VMX_PIN_CTLS_EXT_INT_EXIT)
419	&& CPUMIsGuestVmxExitCtlsSet(pVCpu, pCtx, VMX_EXIT_CTLS_ACK_EXT_INT))
420	{
421	VBOXSTRICTRC rcStrict = IEMExecVmxVmexitExtInt(pVCpu, u8Interrupt, false /* fIntPending */);
422	Assert(rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE);
423	return VBOXSTRICTRC_VAL(rcStrict);
424	}
425	#endif
426	if (!VM_IS_NEM_ENABLED(pVM))
427	{
428	rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
429	AssertRC(rc);
430	}
431	else
432	{
433	VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
434	/** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
435	* If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
436	if (rcStrict != VINF_SUCCESS)
437	return VBOXSTRICTRC_TODO(rcStrict);
438	}
439	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
440	}
441	else
442	{
443	/* Can happen if the interrupt is masked by TPR or APIC is disabled. */
444	AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR \|\| rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
445	}
446	return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
447	: VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
448	: VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
449	}
450
451
452	/**
453	* Displays the pending TRPM event.
454	*
455	* @param pVM The cross context VM structure.
456	* @param pHlp The info helper functions.
457	* @param pszArgs Arguments, ignored.
458	*/
459	static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
460	{
461	NOREF(pszArgs);
462	PVMCPU pVCpu = VMMGetCpu(pVM);
463	if (!pVCpu)
464	pVCpu = pVM->apCpusR3[0];
465
466	uint8_t uVector;
467	uint8_t cbInstr;
468	TRPMEVENT enmTrapEvent;
469	RTGCUINT uErrorCode;
470	RTGCUINTPTR uCR2;
471	int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr);
472	if (RT_SUCCESS(rc))
473	{
474	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
475	static const char * const s_apszTrpmEventType[] =
476	{
477	"Trap",
478	"Hardware Int",
479	"Software Int"
480	};
481	if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
482	{
483	pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
484	pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
485	pHlp->pfnPrintf(pHlp, " uErrorCode = %#RGu\n", uErrorCode);
486	pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
487	pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
488	}
489	else
490	pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
491	}
492	else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
493	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
494	else
495	pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
496	}
497

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source: vbox/trunk/src/VBox/VMM/VMMR3/TRPM.cpp@ 80811

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