VMM.cpp@ 107307

Last change on this file since 107307 was 107227, checked in by vboxsync, 2 months ago
VMM: Cleaning up ARMv8 / x86 split. jiraref:VBP-1470
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1	/* $Id: VMM.cpp 107227 2024-12-04 15:20:14Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28	//#define NO_SUPCALLR0VMM
29
30	/** @page pg_vmm VMM - The Virtual Machine Monitor
31	*
32	* The VMM component is two things at the moment, it's a component doing a few
33	* management and routing tasks, and it's the whole virtual machine monitor
34	* thing. For hysterical reasons, it is not doing all the management that one
35	* would expect, this is instead done by @ref pg_vm. We'll address this
36	* misdesign eventually, maybe.
37	*
38	* VMM is made up of these components:
39	* - @subpage pg_cfgm
40	* - @subpage pg_cpum
41	* - @subpage pg_dbgf
42	* - @subpage pg_em
43	* - @subpage pg_gim
44	* - @subpage pg_gmm
45	* - @subpage pg_gvmm
46	* - @subpage pg_hm
47	* - @subpage pg_iem
48	* - @subpage pg_iom
49	* - @subpage pg_mm
50	* - @subpage pg_nem
51	* - @subpage pg_pdm
52	* - @subpage pg_pgm
53	* - @subpage pg_selm
54	* - @subpage pg_ssm
55	* - @subpage pg_stam
56	* - @subpage pg_tm
57	* - @subpage pg_trpm
58	* - @subpage pg_vm
59	*
60	*
61	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
62	*
63	*
64	* @section sec_vmmstate VMM State
65	*
66	* @image html VM_Statechart_Diagram.gif
67	*
68	* To be written.
69	*
70	*
71	* @subsection subsec_vmm_init VMM Initialization
72	*
73	* To be written.
74	*
75	*
76	* @subsection subsec_vmm_term VMM Termination
77	*
78	* To be written.
79	*
80	*
81	* @section sec_vmm_limits VMM Limits
82	*
83	* There are various resource limits imposed by the VMM and it's
84	* sub-components. We'll list some of them here.
85	*
86	* On 64-bit hosts:
87	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
88	* can be increased up to 64K - 1.
89	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
91	* - A VM can be assigned all the memory we can use (16TB), however, the
92	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
93	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
94	*
95	* On 32-bit hosts:
96	* - Max 127 VMs. Imposed by GMM's per page structure.
97	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
98	* ROM pages. The limit is imposed by the 28-bit page ID used
99	* internally in GMM. It is also limited by PAE.
100	* - A VM can be assigned all the memory GMM can allocate, however, the
101	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
102	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
103	*
104	*/
105
106
107	/*********************************************************************************************************************************
108	* Header Files *
109	*********************************************************************************************************************************/
110	#define LOG_GROUP LOG_GROUP_VMM
111	#include <VBox/vmm/vmm.h>
112	#include <VBox/vmm/vmapi.h>
113	#include <VBox/vmm/pgm.h>
114	#include <VBox/vmm/cfgm.h>
115	#include <VBox/vmm/pdmqueue.h>
116	#include <VBox/vmm/pdmcritsect.h>
117	#include <VBox/vmm/pdmcritsectrw.h>
118	#include <VBox/vmm/pdmapi.h>
119	#include <VBox/vmm/cpum.h>
120	#include <VBox/vmm/gim.h>
121	#include <VBox/vmm/mm.h>
122	#include <VBox/vmm/nem.h>
123	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
124	# include <VBox/vmm/iem.h>
125	#endif
126	#include <VBox/vmm/iom.h>
127	#include <VBox/vmm/trpm.h>
128	#include <VBox/vmm/selm.h>
129	#include <VBox/vmm/em.h>
130	#include <VBox/sup.h>
131	#include <VBox/vmm/dbgf.h>
132	#ifdef VBOX_VMM_TARGET_ARMV8
133	# include <VBox/vmm/gic.h>
134	#elif defined(VBOX_VMM_TARGET_X86)
135	# include <VBox/vmm/pdmapic.h>
136	#endif
137	#include <VBox/vmm/ssm.h>
138	#include <VBox/vmm/tm.h>
139	#include "VMMInternal.h"
140	#include <VBox/vmm/vmcc.h>
141
142	#include <VBox/err.h>
143	#include <VBox/param.h>
144	#include <VBox/version.h>
145	#include <VBox/vmm/hm.h>
146	#include <iprt/assert.h>
147	#include <iprt/alloc.h>
148	#ifdef VBOX_VMM_TARGET_ARMV8
149	# include <iprt/armv8.h>
150	#endif
151	#include <iprt/asm.h>
152	#include <iprt/time.h>
153	#include <iprt/semaphore.h>
154	#include <iprt/stream.h>
155	#include <iprt/string.h>
156	#include <iprt/stdarg.h>
157	#include <iprt/ctype.h>
158	#include <iprt/x86.h>
159
160
161	/*********************************************************************************************************************************
162	* Defined Constants And Macros *
163	*********************************************************************************************************************************/
164	/** The saved state version. */
165	#define VMM_SAVED_STATE_VERSION 4
166	/** The saved state version used by v3.0 and earlier. (Teleportation) */
167	#define VMM_SAVED_STATE_VERSION_3_0 3
168
169	/** Macro for flushing the ring-0 logging. */
170	#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
171	do { \
172	size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
173	if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
174	\|\| (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
175	{ /* likely? */ } \
176	else \
177	vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
178	} while (0)
179
180
181	/*********************************************************************************************************************************
182	* Internal Functions *
183	*********************************************************************************************************************************/
184	static void vmmR3InitRegisterStats(PVM pVM);
185	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
186	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
187	#if 0 /* pointless when timers doesn't run on EMT */
188	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
189	#endif
190	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
191	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
192	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
193	static FNRTTHREAD vmmR3LogFlusher;
194	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
195	PRTLOGGER pDstLogger);
196	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
197
198
199
200	/**
201	* Initializes the VMM.
202	*
203	* @returns VBox status code.
204	* @param pVM The cross context VM structure.
205	*/
206	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
207	{
208	LogFlow(("VMMR3Init\n"));
209
210	/*
211	* Assert alignment, sizes and order.
212	*/
213	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
214	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
215
216	/*
217	* Init basic VM VMM members.
218	*/
219	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
220	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
221	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
222	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
223	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
224	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
225	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
226	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
227	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
228	pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
229
230	#if 0 /* pointless when timers doesn't run on EMT */
231	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
232	* The EMT yield interval. The EMT yielding is a hack we employ to play a
233	* bit nicer with the rest of the system (like for instance the GUI).
234	*/
235	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
236	23 /* Value arrived at after experimenting with the grub boot prompt. */);
237	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
238	#endif
239
240	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
241	* Controls whether we employ per-cpu preemption timers to limit the time
242	* spent executing guest code. This option is not available on all
243	* platforms and we will silently ignore this setting then. If we are
244	* running in VT-x mode, we will use the VMX-preemption timer instead of
245	* this one when possible.
246	*/
247	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
248	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
249	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
250
251	/*
252	* Initialize the VMM rendezvous semaphores.
253	*/
254	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
255	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
256	return VERR_NO_MEMORY;
257	for (VMCPUID i = 0; i < pVM->cCpus; i++)
258	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
259	for (VMCPUID i = 0; i < pVM->cCpus; i++)
260	{
261	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
262	AssertRCReturn(rc, rc);
263	}
264	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
265	AssertRCReturn(rc, rc);
266	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
267	AssertRCReturn(rc, rc);
268	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
269	AssertRCReturn(rc, rc);
270	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
271	AssertRCReturn(rc, rc);
272	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
273	AssertRCReturn(rc, rc);
274	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
275	AssertRCReturn(rc, rc);
276	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
277	AssertRCReturn(rc, rc);
278	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
279	AssertRCReturn(rc, rc);
280
281	/*
282	* Register the saved state data unit.
283	*/
284	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
285	NULL, NULL, NULL,
286	NULL, vmmR3Save, NULL,
287	NULL, vmmR3Load, NULL);
288	if (RT_FAILURE(rc))
289	return rc;
290
291	#if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
292	/*
293	* Register the Ring-0 VM handle with the session for fast ioctl calls.
294	*/
295	if (!SUPR3IsDriverless())
296	{
297	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
298	if (RT_FAILURE(rc))
299	return rc;
300	}
301	#endif
302
303	#ifdef VBOX_WITH_NMI
304	/*
305	* Allocate mapping for the host APIC.
306	*/
307	rc = MMR3HyperReserve(pVM, HOST_PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
308	AssertRC(rc);
309	#endif
310	if (RT_SUCCESS(rc))
311	{
312	/*
313	* Start the log flusher thread.
314	*/
315	if (!SUPR3IsDriverless())
316	rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /cbStack/,
317	RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
318	if (RT_SUCCESS(rc))
319	{
320
321	/*
322	* Debug info and statistics.
323	*/
324	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
325	vmmR3InitRegisterStats(pVM);
326	vmmInitFormatTypes();
327
328	return VINF_SUCCESS;
329	}
330	}
331	/** @todo Need failure cleanup? */
332
333	return rc;
334	}
335
336
337	/**
338	* VMMR3Init worker that register the statistics with STAM.
339	*
340	* @param pVM The cross context VM structure.
341	*/
342	static void vmmR3InitRegisterStats(PVM pVM)
343	{
344	RT_NOREF_PV(pVM);
345
346	/* Nothing to do here in driverless mode. */
347	if (SUPR3IsDriverless())
348	return;
349
350	/*
351	* Statistics.
352	*/
353	#if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
354	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
355	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
356	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
357	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
358	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
359	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
360	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
361	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
362	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
363	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
364	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
365	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
366	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
367	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
368	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
369	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
370	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
371	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
372	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
373	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
374	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
375	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
376	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
377	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
378	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
379	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
380	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
381	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
382	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
383	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
384	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
385	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
386	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
387	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
388	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
389	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
390	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
391	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
392	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
393	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
394	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
395	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
396	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
397	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
398	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
399	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
400	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
401	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
402	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
406	#endif
407
408	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
409	STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
410
411	for (VMCPUID i = 0; i < pVM->cCpus; i++)
412	{
413	PVMCPU pVCpu = pVM->apCpusR3[i];
414	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
415	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
416	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
417	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
418	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
419	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
420	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
421	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
422	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
423	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
424	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
425	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
426	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
427	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
428	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
429	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
430	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
431
432	STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
433
434	PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
435	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
436	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
437	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
438	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
439	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
440	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
441	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
442	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
443
444	pShared = &pVCpu->vmm.s.u.s.RelLogger;
445	STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
446	STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
447	STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
448	STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
449	STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
450	STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
451	STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
452	STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
453	}
454	}
455
456
457	/**
458	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
459	*
460	* @returns VBox status code.
461	* @param pVM The cross context VM structure.
462	* @param pVCpu The cross context per CPU structure.
463	* @thread EMT(pVCpu)
464	*/
465	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
466	{
467	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
468	}
469
470
471	/**
472	* Initializes the R0 VMM.
473	*
474	* @returns VBox status code.
475	* @param pVM The cross context VM structure.
476	*/
477	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
478	{
479	int rc;
480	PVMCPU pVCpu = VMMGetCpu(pVM);
481	Assert(pVCpu && pVCpu->idCpu == 0);
482
483	/*
484	* Nothing to do here in driverless mode.
485	*/
486	if (SUPR3IsDriverless())
487	return VINF_SUCCESS;
488
489	/*
490	* Make sure the ring-0 loggers are up to date.
491	*/
492	rc = VMMR3UpdateLoggers(pVM);
493	if (RT_FAILURE(rc))
494	return rc;
495
496	/*
497	* Call Ring-0 entry with init code.
498	*/
499	#ifdef NO_SUPCALLR0VMM
500	//rc = VERR_GENERAL_FAILURE;
501	rc = VINF_SUCCESS;
502	#else
503	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
504	#endif
505
506	/*
507	* Flush the logs & deal with assertions.
508	*/
509	#ifdef LOG_ENABLED
510	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
511	#endif
512	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
513	if (rc == VERR_VMM_RING0_ASSERTION)
514	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
515	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
516	{
517	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
518	if (RT_SUCCESS(rc))
519	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
520	}
521
522	/*
523	* Log stuff we learned in ring-0.
524	*/
525	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
526	if (pVM->vmm.s.fIsUsingContextHooks)
527	LogRel(("VMM: Enabled thread-context hooks\n"));
528	else
529	LogRel(("VMM: Thread-context hooks unavailable\n"));
530
531	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
532	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
533	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
534	else
535	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
536	if (pVM->vmm.s.fIsPreemptPossible)
537	LogRel(("VMM: Kernel preemption is possible\n"));
538	else
539	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
540
541	/*
542	* Send all EMTs to ring-0 to get their logger initialized.
543	*/
544	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
545	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
546
547	return rc;
548	}
549
550
551	/**
552	* Called when an init phase completes.
553	*
554	* @returns VBox status code.
555	* @param pVM The cross context VM structure.
556	* @param enmWhat Which init phase.
557	*/
558	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
559	{
560	int rc = VINF_SUCCESS;
561
562	switch (enmWhat)
563	{
564	case VMINITCOMPLETED_RING3:
565	{
566	#if 0 /* pointless when timers doesn't run on EMT */
567	/*
568	* Create the EMT yield timer.
569	*/
570	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
571	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
572	AssertRCReturn(rc, rc);
573
574	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
575	AssertRCReturn(rc, rc);
576	#endif
577	break;
578	}
579
580	case VMINITCOMPLETED_HM:
581	{
582	#ifdef VBOX_VMM_TARGET_X86
583	/*
584	* Disable the periodic preemption timers if we can use the
585	* VMX-preemption timer instead.
586	*/
587	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
588	&& HMR3IsVmxPreemptionTimerUsed(pVM))
589	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
590	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
591	#endif
592
593	/*
594	* Last chance for GIM to update its CPUID leaves if it requires
595	* knowledge/information from HM initialization.
596	*/
597	/** @todo r=bird: This shouldn't be done from here, but rather from VM.cpp. There is no dependency on VMM here. */
598	rc = GIMR3InitCompleted(pVM);
599	AssertRCReturn(rc, rc);
600
601	/*
602	* CPUM's post-initialization (print CPUIDs).
603	*/
604	CPUMR3LogCpuIdAndMsrFeatures(pVM);
605	break;
606	}
607
608	default: /* shuts up gcc */
609	break;
610	}
611
612	return rc;
613	}
614
615
616	/**
617	* Terminate the VMM bits.
618	*
619	* @returns VBox status code.
620	* @param pVM The cross context VM structure.
621	*/
622	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
623	{
624	PVMCPU pVCpu = VMMGetCpu(pVM);
625	Assert(pVCpu && pVCpu->idCpu == 0);
626
627	/*
628	* Call Ring-0 entry with termination code.
629	*/
630	int rc = VINF_SUCCESS;
631	if (!SUPR3IsDriverless())
632	{
633	#ifndef NO_SUPCALLR0VMM
634	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
635	#endif
636	}
637
638	/*
639	* Flush the logs & deal with assertions.
640	*/
641	#ifdef LOG_ENABLED
642	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
643	#endif
644	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
645	if (rc == VERR_VMM_RING0_ASSERTION)
646	rc = vmmR3HandleRing0Assert(pVM, pVCpu);
647	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
648	{
649	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
650	if (RT_SUCCESS(rc))
651	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
652	}
653
654	/*
655	* Do clean ups.
656	*/
657	for (VMCPUID i = 0; i < pVM->cCpus; i++)
658	{
659	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
660	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
661	}
662	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
663	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
664	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
665	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
666	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
667	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
668	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
669	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
670	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
671	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
672	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
673	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
674	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
675	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
676	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
677	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
678
679	vmmTermFormatTypes();
680
681	/*
682	* Wait for the log flusher thread to complete.
683	*/
684	if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
685	{
686	int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
687	AssertLogRelRC(rc2);
688	if (RT_SUCCESS(rc2))
689	pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
690	}
691
692	return rc;
693	}
694
695
696	/**
697	* Applies relocations to data and code managed by this
698	* component. This function will be called at init and
699	* whenever the VMM need to relocate it self inside the GC.
700	*
701	* The VMM will need to apply relocations to the core code.
702	*
703	* @param pVM The cross context VM structure.
704	* @param offDelta The relocation delta.
705	*/
706	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
707	{
708	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
709	RT_NOREF(offDelta);
710
711	/*
712	* Update the logger.
713	*/
714	VMMR3UpdateLoggers(pVM);
715	}
716
717
718	/**
719	* Worker for VMMR3UpdateLoggers.
720	*/
721	static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
722	{
723	/*
724	* Get the group count.
725	*/
726	uint32_t uGroupsCrc32 = 0;
727	uint32_t cGroups = 0;
728	uint64_t fFlags = 0;
729	int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
730	Assert(rc == VERR_BUFFER_OVERFLOW);
731
732	/*
733	* Allocate the request of the right size.
734	*/
735	uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
736	PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
737	if (pReq)
738	{
739	pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
740	pReq->Hdr.cbReq = cbReq;
741	pReq->cGroups = cGroups;
742	rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
743	AssertRC(rc);
744	if (RT_SUCCESS(rc))
745	{
746	/*
747	* The 64-bit value argument.
748	*/
749	uint64_t fExtraArg = fReleaseLogger;
750
751	/* Only outputting to the parent VMM's logs? Enable ring-0 to flush directly. */
752	uint32_t fDst = RTLogGetDestinations(pSrcLogger);
753	fDst &= ~(RTLOGDEST_DUMMY \| RTLOGDEST_F_NO_DENY \| RTLOGDEST_F_DELAY_FILE \| RTLOGDEST_FIXED_FILE \| RTLOGDEST_FIXED_DIR);
754	if ( (fDst & (RTLOGDEST_VMM \| RTLOGDEST_VMM_REL))
755	&& !(fDst & ~(RTLOGDEST_VMM \| RTLOGDEST_VMM_REL)))
756	fExtraArg \|= (fDst & RTLOGDEST_VMM ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_DBG : 0)
757	\| (fDst & RTLOGDEST_VMM_REL ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_REL : 0);
758
759	rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fExtraArg, &pReq->Hdr);
760	}
761
762	RTMemFree(pReq);
763	}
764	else
765	rc = VERR_NO_MEMORY;
766	return rc;
767	}
768
769
770	/**
771	* Updates the settings for the RC and R0 loggers.
772	*
773	* @returns VBox status code.
774	* @param pVM The cross context VM structure.
775	* @thread EMT
776	*/
777	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
778	{
779	/* Nothing to do here if we're in driverless mode: */
780	if (SUPR3IsDriverless())
781	return VINF_SUCCESS;
782
783	PVMCPU pVCpu = VMMGetCpu(pVM);
784	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
785
786	/*
787	* Each EMT has each own logger instance.
788	*/
789	/* Debug logging.*/
790	int rcDebug = VINF_SUCCESS;
791	#ifdef LOG_ENABLED
792	PRTLOGGER const pDefault = RTLogDefaultInstance();
793	if (pDefault)
794	rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /fReleaseLogger/);
795	#else
796	RT_NOREF(pVM);
797	#endif
798
799	/* Release logging. */
800	int rcRelease = VINF_SUCCESS;
801	PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
802	if (pRelease)
803	rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /fReleaseLogger/);
804
805	return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
806	}
807
808
809	/**
810	* @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
811	*/
812	static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
813	{
814	PVM const pVM = (PVM)pvUser;
815	RT_NOREF(hThreadSelf);
816
817	/* Reset the flusher state before we start: */
818	pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
819
820	/*
821	* The work loop.
822	*/
823	for (;;)
824	{
825	/*
826	* Wait for work.
827	*/
828	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
829	if (RT_SUCCESS(rc))
830	{
831	/* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
832	VMMLOGFLUSHERENTRY Item;
833	Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
834	if ( Item.s.idCpu < pVM->cCpus
835	&& Item.s.idxLogger < VMMLOGGER_IDX_MAX
836	&& Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
837	{
838	/*
839	* Verify the request.
840	*/
841	PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
842	PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
843	uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
844	if (cbToFlush > 0)
845	{
846	if (cbToFlush <= pShared->cbBuf)
847	{
848	char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
849	if (pchBufR3)
850	{
851	/*
852	* Do the flushing.
853	*/
854	PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
855	? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
856	if (pLogger)
857	{
858	char szBefore[128];
859	RTStrPrintf(szBefore, sizeof(szBefore),
860	"FLUSH idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
861	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
862	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
863	RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "FLUSH DONE\n");
864	}
865	}
866	else
867	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
868	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
869	}
870	else
871	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
872	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
873	}
874	else
875	Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
876	Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
877
878	/*
879	* Mark the descriptor as flushed and set the request flag for same.
880	*/
881	pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
882	}
883	else
884	{
885	Assert(Item.s.idCpu == UINT16_MAX);
886	Assert(Item.s.idxLogger == UINT8_MAX);
887	Assert(Item.s.idxBuffer == UINT8_MAX);
888	}
889	}
890	/*
891	* Interrupted can happen, just ignore it.
892	*/
893	else if (rc == VERR_INTERRUPTED)
894	{ /* ignore*/ }
895	/*
896	* The ring-0 termination code will set the shutdown flag and wake us
897	* up, and we should return with object destroyed. In case there is
898	* some kind of race, we might also get sempahore destroyed.
899	*/
900	else if ( rc == VERR_OBJECT_DESTROYED
901	\|\| rc == VERR_SEM_DESTROYED
902	\|\| rc == VERR_INVALID_HANDLE)
903	{
904	LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
905	return VINF_SUCCESS;
906	}
907	/*
908	* There shouldn't be any other errors...
909	*/
910	else
911	{
912	LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
913	AssertRC(rc);
914	RTThreadSleep(1);
915	}
916	}
917	}
918
919
920	/**
921	* Helper for VMM_FLUSH_R0_LOG that does the flushing.
922	*
923	* @param pVM The cross context VM structure.
924	* @param pVCpu The cross context virtual CPU structure of the calling
925	* EMT.
926	* @param pShared The shared logger data.
927	* @param idxBuf The buffer to flush.
928	* @param pDstLogger The destination IPRT logger.
929	*/
930	static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
931	{
932	uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
933	const char pszBefore = cbToFlush < 256 ? NULL : "FLUSH*\n";
934	const char pszAfter = cbToFlush < 256 ? NULL : "END*\n";
935
936	#if VMMLOGGER_BUFFER_COUNT > 1
937	/*
938	* When we have more than one log buffer, the flusher thread may still be
939	* working on the previous buffer when we get here.
940	*/
941	char szBefore[64];
942	if (pShared->cFlushing > 0)
943	{
944	STAM_REL_PROFILE_START(&pShared->StatRaces, a);
945	uint64_t const nsStart = RTTimeNanoTS();
946
947	/* A no-op, but it takes the lock and the hope is that we end up waiting
948	on the flusher to finish up. */
949	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
950	if (pShared->cFlushing != 0)
951	{
952	RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
953
954	/* If no luck, go to ring-0 and to proper waiting. */
955	if (pShared->cFlushing != 0)
956	{
957	STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
958	SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
959	}
960	}
961
962	RTStrPrintf(szBefore, sizeof(szBefore), "%sFLUSH waited %'RU64 ns\n",
963	pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
964	pszBefore = szBefore;
965	STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
966	}
967	#else
968	RT_NOREF(pVM, pVCpu);
969	#endif
970
971	RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
972	pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
973	}
974
975
976	/**
977	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
978	*
979	* @returns Pointer to the buffer.
980	* @param pVM The cross context VM structure.
981	*/
982	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
983	{
984	return pVM->vmm.s.szRing0AssertMsg1;
985	}
986
987
988	/**
989	* Returns the VMCPU of the specified virtual CPU.
990	*
991	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
992	*
993	* @param pUVM The user mode VM handle.
994	* @param idCpu The ID of the virtual CPU.
995	*/
996	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
997	{
998	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
999	AssertReturn(idCpu < pUVM->cCpus, NULL);
1000	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1001	return pUVM->pVM->apCpusR3[idCpu];
1002	}
1003
1004
1005	/**
1006	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1007	*
1008	* @returns Pointer to the buffer.
1009	* @param pVM The cross context VM structure.
1010	*/
1011	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1012	{
1013	return pVM->vmm.s.szRing0AssertMsg2;
1014	}
1015
1016
1017	/**
1018	* Execute state save operation.
1019	*
1020	* @returns VBox status code.
1021	* @param pVM The cross context VM structure.
1022	* @param pSSM SSM operation handle.
1023	*/
1024	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1025	{
1026	LogFlow(("vmmR3Save:\n"));
1027
1028	/*
1029	* Save the started/stopped state of all CPUs except 0 as it will always
1030	* be running. This avoids breaking the saved state version. :-)
1031	*/
1032	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1033	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1034
1035	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1036	}
1037
1038
1039	/**
1040	* Execute state load operation.
1041	*
1042	* @returns VBox status code.
1043	* @param pVM The cross context VM structure.
1044	* @param pSSM SSM operation handle.
1045	* @param uVersion Data layout version.
1046	* @param uPass The data pass.
1047	*/
1048	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1049	{
1050	LogFlow(("vmmR3Load:\n"));
1051	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1052
1053	/*
1054	* Validate version.
1055	*/
1056	if ( uVersion != VMM_SAVED_STATE_VERSION
1057	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1058	{
1059	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1060	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1061	}
1062
1063	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1064	{
1065	/* Ignore the stack bottom, stack pointer and stack bits. */
1066	RTRCPTR RCPtrIgnored;
1067	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1068	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1069	#ifdef RT_OS_DARWIN
1070	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1071	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1072	&& SSMR3HandleRevision(pSSM) >= 48858
1073	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1074	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1075	)
1076	SSMR3Skip(pSSM, 16384);
1077	else
1078	SSMR3Skip(pSSM, 8192);
1079	#else
1080	SSMR3Skip(pSSM, 8192);
1081	#endif
1082	}
1083
1084	/*
1085	* Restore the VMCPU states. VCPU 0 is always started.
1086	*/
1087	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1088	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1089	{
1090	bool fStarted;
1091	int rc = SSMR3GetBool(pSSM, &fStarted);
1092	if (RT_FAILURE(rc))
1093	return rc;
1094	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1095	}
1096
1097	/* terminator */
1098	uint32_t u32;
1099	int rc = SSMR3GetU32(pSSM, &u32);
1100	if (RT_FAILURE(rc))
1101	return rc;
1102	if (u32 != UINT32_MAX)
1103	{
1104	AssertMsgFailed(("u32=%#x\n", u32));
1105	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1106	}
1107	return VINF_SUCCESS;
1108	}
1109
1110
1111	/**
1112	* Suspends the CPU yielder.
1113	*
1114	* @param pVM The cross context VM structure.
1115	*/
1116	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1117	{
1118	#if 0 /* pointless when timers doesn't run on EMT */
1119	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1120	if (!pVM->vmm.s.cYieldResumeMillies)
1121	{
1122	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1123	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1124	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1125	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1126	else
1127	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1128	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1129	}
1130	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1131	#else
1132	RT_NOREF(pVM);
1133	#endif
1134	}
1135
1136
1137	/**
1138	* Stops the CPU yielder.
1139	*
1140	* @param pVM The cross context VM structure.
1141	*/
1142	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1143	{
1144	#if 0 /* pointless when timers doesn't run on EMT */
1145	if (!pVM->vmm.s.cYieldResumeMillies)
1146	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1147	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1148	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1149	#else
1150	RT_NOREF(pVM);
1151	#endif
1152	}
1153
1154
1155	/**
1156	* Resumes the CPU yielder when it has been a suspended or stopped.
1157	*
1158	* @param pVM The cross context VM structure.
1159	*/
1160	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1161	{
1162	#if 0 /* pointless when timers doesn't run on EMT */
1163	if (pVM->vmm.s.cYieldResumeMillies)
1164	{
1165	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1166	pVM->vmm.s.cYieldResumeMillies = 0;
1167	}
1168	#else
1169	RT_NOREF(pVM);
1170	#endif
1171	}
1172
1173
1174	#if 0 /* pointless when timers doesn't run on EMT */
1175	/**
1176	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1177	*
1178	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1179	*/
1180	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1181	{
1182	NOREF(pvUser);
1183
1184	/*
1185	* This really needs some careful tuning. While we shouldn't be too greedy since
1186	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1187	* because that'll cause us to stop up.
1188	*
1189	* The current logic is to use the default interval when there is no lag worth
1190	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1191	*
1192	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1193	* so the lag is up to date.)
1194	*/
1195	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1196	if ( u64Lag < 50000000 /* 50ms */
1197	\|\| ( u64Lag < 1000000000 /* 1s */
1198	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1199	)
1200	{
1201	uint64_t u64Elapsed = RTTimeNanoTS();
1202	pVM->vmm.s.u64LastYield = u64Elapsed;
1203
1204	RTThreadYield();
1205
1206	#ifdef LOG_ENABLED
1207	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1208	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1209	#endif
1210	}
1211	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1212	}
1213	#endif
1214
1215	#ifdef VBOX_WITH_HWVIRT
1216	# ifndef VBOX_VMM_TARGET_X86
1217	# error "config error"
1218	# endif
1219	/**
1220	* Executes guest code (Intel VT-x and AMD-V).
1221	*
1222	* @param pVM The cross context VM structure.
1223	* @param pVCpu The cross context virtual CPU structure.
1224	*/
1225	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1226	{
1227	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1228
1229	int rc;
1230	do
1231	{
1232	# ifdef NO_SUPCALLR0VMM
1233	rc = VERR_GENERAL_FAILURE;
1234	# else
1235	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1236	if (RT_LIKELY(rc == VINF_SUCCESS))
1237	rc = pVCpu->vmm.s.iLastGZRc;
1238	# endif
1239	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1240
1241	# if 0 /** @todo triggers too often */
1242	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1243	# endif
1244
1245	/*
1246	* Flush the logs
1247	*/
1248	# ifdef LOG_ENABLED
1249	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1250	# endif
1251	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1252	if (rc != VERR_VMM_RING0_ASSERTION)
1253	{
1254	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1255	return rc;
1256	}
1257	return vmmR3HandleRing0Assert(pVM, pVCpu);
1258	}
1259	#endif /* VBOX_WITH_HWVIRT */
1260
1261
1262	#ifdef VBOX_VMM_TARGET_ARMV8
1263
1264	/**
1265	* VCPU worker for VMMR3CpuOn.
1266	*
1267	* @param pVM The cross context VM structure.
1268	* @param idCpu Virtual CPU to perform SIPI on.
1269	* @param GCPhysExecAddr The guest physical address to start executing at.
1270	* @param u64CtxId The context ID passed in x0/w0.
1271	*/
1272	static DECLCALLBACK(int) vmmR3CpuOn(PVM pVM, VMCPUID idCpu, RTGCPHYS GCPhysExecAddr, uint64_t u64CtxId)
1273	{
1274	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1275	VMCPU_ASSERT_EMT(pVCpu);
1276
1277	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1278	return VINF_SUCCESS;
1279
1280	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1281
1282	pCtx->aGRegs[ARMV8_AARCH64_REG_X0].x = u64CtxId;
1283	pCtx->Pc.u64 = GCPhysExecAddr;
1284
1285	Log(("vmmR3CpuOn for VCPU %d with GCPhysExecAddr=%RGp u64CtxId=%#RX64\n", idCpu, GCPhysExecAddr, u64CtxId));
1286
1287	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1288	EMSetState(pVCpu, EMSTATE_HALTED);
1289	return VINF_EM_RESCHEDULE;
1290	# else /* And if we go the VMCPU::enmState way it can stay here. */
1291	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1292	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1293	return VINF_SUCCESS;
1294	# endif
1295	}
1296
1297
1298	/**
1299	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1300	* vector-dependent state and unhalting processor.
1301	*
1302	* @param pVM The cross context VM structure.
1303	* @param idCpu Virtual CPU to perform SIPI on.
1304	* @param GCPhysExecAddr The guest physical address to start executing at.
1305	* @param u64CtxId The context ID passed in x0/w0.
1306	*/
1307	VMMR3_INT_DECL(void) VMMR3CpuOn(PVM pVM, VMCPUID idCpu, RTGCPHYS GCPhysExecAddr, uint64_t u64CtxId)
1308	{
1309	AssertReturnVoid(idCpu < pVM->cCpus);
1310
1311	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3CpuOn, 4, pVM, idCpu, GCPhysExecAddr, u64CtxId);
1312	AssertRC(rc);
1313	}
1314
1315	#elif defined(VBOX_VMM_TARGET_X86)
1316
1317	/**
1318	* VCPU worker for VMMR3SendStartupIpi.
1319	*
1320	* @param pVM The cross context VM structure.
1321	* @param idCpu Virtual CPU to perform SIPI on.
1322	* @param uVector The SIPI vector.
1323	*/
1324	static DECLCALLBACK(int) vmmR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1325	{
1326	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1327	VMCPU_ASSERT_EMT(pVCpu);
1328
1329	/*
1330	* In the INIT state, the target CPU is only responsive to an SIPI.
1331	* This is also true for when when the CPU is in VMX non-root mode.
1332	*
1333	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1334	* See Intel spec. 26.6.2 "Activity State".
1335	*/
1336	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1337	return VINF_SUCCESS;
1338
1339	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1340	# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1341	if (CPUMIsGuestInVmxRootMode(pCtx))
1342	{
1343	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1344	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1345	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1346
1347	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1348	return VINF_SUCCESS;
1349	}
1350	# endif
1351
1352	pCtx->cs.Sel = uVector << 8;
1353	pCtx->cs.ValidSel = uVector << 8;
1354	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1355	pCtx->cs.u64Base = uVector << 12;
1356	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1357	pCtx->rip = 0;
1358
1359	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1360
1361	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1362	EMSetState(pVCpu, EMSTATE_HALTED);
1363	return VINF_EM_RESCHEDULE;
1364	# else /* And if we go the VMCPU::enmState way it can stay here. */
1365	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1366	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1367	return VINF_SUCCESS;
1368	# endif
1369	}
1370
1371
1372	/**
1373	* VCPU worker for VMMR3SendInitIpi.
1374	*
1375	* @returns VBox status code.
1376	* @param pVM The cross context VM structure.
1377	* @param idCpu Virtual CPU to perform SIPI on.
1378	*/
1379	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1380	{
1381	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1382	VMCPU_ASSERT_EMT(pVCpu);
1383
1384	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1385
1386	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1387	* wait-for-SIPI state. Verify. */
1388
1389	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1390	# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1391	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1392	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1393	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1394	# endif
1395
1396	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1397	* IPI (e.g. SVM_EXIT_INIT). */
1398
1399	PGMR3ResetCpu(pVM, pVCpu);
1400	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1401	PDMR3ApicInitIpi(pVCpu);
1402	TRPMR3ResetCpu(pVCpu);
1403	CPUMR3ResetCpu(pVM, pVCpu);
1404	EMR3ResetCpu(pVCpu);
1405	HMR3ResetCpu(pVCpu);
1406	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1407
1408	/* This will trickle up on the target EMT. */
1409	return VINF_EM_WAIT_SIPI;
1410	}
1411
1412
1413	/**
1414	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1415	* vector-dependent state and unhalting processor.
1416	*
1417	* @param pVM The cross context VM structure.
1418	* @param idCpu Virtual CPU to perform SIPI on.
1419	* @param uVector SIPI vector.
1420	*/
1421	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1422	{
1423	AssertReturnVoid(idCpu < pVM->cCpus);
1424
1425	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStartupIpi, 3, pVM, idCpu, uVector);
1426	AssertRC(rc);
1427	}
1428
1429
1430	/**
1431	* Sends init IPI to the virtual CPU.
1432	*
1433	* @param pVM The cross context VM structure.
1434	* @param idCpu Virtual CPU to perform int IPI on.
1435	*/
1436	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1437	{
1438	AssertReturnVoid(idCpu < pVM->cCpus);
1439
1440	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1441	AssertRC(rc);
1442	}
1443
1444	#endif /* VBOX_VMM_TARGET_X86 */
1445
1446	/**
1447	* Registers the guest memory range that can be used for patching.
1448	*
1449	* @returns VBox status code.
1450	* @param pVM The cross context VM structure.
1451	* @param pPatchMem Patch memory range.
1452	* @param cbPatchMem Size of the memory range.
1453	*/
1454	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1455	{
1456	VM_ASSERT_EMT(pVM);
1457	if (HMIsEnabled(pVM))
1458	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1459
1460	return VERR_NOT_SUPPORTED;
1461	}
1462
1463
1464	/**
1465	* Deregisters the guest memory range that can be used for patching.
1466	*
1467	* @returns VBox status code.
1468	* @param pVM The cross context VM structure.
1469	* @param pPatchMem Patch memory range.
1470	* @param cbPatchMem Size of the memory range.
1471	*/
1472	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1473	{
1474	if (HMIsEnabled(pVM))
1475	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1476
1477	return VINF_SUCCESS;
1478	}
1479
1480
1481	/**
1482	* Common recursion handler for the other EMTs.
1483	*
1484	* @returns Strict VBox status code.
1485	* @param pVM The cross context VM structure.
1486	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1487	* @param rcStrict Current status code to be combined with the one
1488	* from this recursion and returned.
1489	*/
1490	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1491	{
1492	int rc2;
1493
1494	/*
1495	* We wait here while the initiator of this recursion reconfigures
1496	* everything. The last EMT to get in signals the initiator.
1497	*/
1498	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1499	{
1500	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1501	AssertLogRelRC(rc2);
1502	}
1503
1504	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1505	AssertLogRelRC(rc2);
1506
1507	/*
1508	* Do the normal rendezvous processing.
1509	*/
1510	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1511	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1512
1513	/*
1514	* Wait for the initiator to restore everything.
1515	*/
1516	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1517	AssertLogRelRC(rc2);
1518
1519	/*
1520	* Last thread out of here signals the initiator.
1521	*/
1522	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1523	{
1524	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1525	AssertLogRelRC(rc2);
1526	}
1527
1528	/*
1529	* Merge status codes and return.
1530	*/
1531	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1532	if ( rcStrict2 != VINF_SUCCESS
1533	&& ( rcStrict == VINF_SUCCESS
1534	\|\| rcStrict > rcStrict2))
1535	rcStrict = rcStrict2;
1536	return rcStrict;
1537	}
1538
1539
1540	/**
1541	* Count returns and have the last non-caller EMT wake up the caller.
1542	*
1543	* @returns VBox strict informational status code for EM scheduling. No failures
1544	* will be returned here, those are for the caller only.
1545	*
1546	* @param pVM The cross context VM structure.
1547	* @param rcStrict The current accumulated recursive status code,
1548	* to be merged with i32RendezvousStatus and
1549	* returned.
1550	*/
1551	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1552	{
1553	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1554
1555	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1556	if (cReturned == pVM->cCpus - 1U)
1557	{
1558	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1559	AssertLogRelRC(rc);
1560	}
1561
1562	/*
1563	* Merge the status codes, ignoring error statuses in this code path.
1564	*/
1565	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1566	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1567	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1568	VERR_IPE_UNEXPECTED_INFO_STATUS);
1569
1570	if (RT_SUCCESS(rcStrict2))
1571	{
1572	if ( rcStrict2 != VINF_SUCCESS
1573	&& ( rcStrict == VINF_SUCCESS
1574	\|\| rcStrict > rcStrict2))
1575	rcStrict = rcStrict2;
1576	}
1577	return rcStrict;
1578	}
1579
1580
1581	/**
1582	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1583	*
1584	* @returns VBox strict informational status code for EM scheduling. No failures
1585	* will be returned here, those are for the caller only. When
1586	* fIsCaller is set, VINF_SUCCESS is always returned.
1587	*
1588	* @param pVM The cross context VM structure.
1589	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1590	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1591	* not.
1592	* @param fFlags The flags.
1593	* @param pfnRendezvous The callback.
1594	* @param pvUser The user argument for the callback.
1595	*/
1596	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1597	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1598	{
1599	int rc;
1600	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1601
1602	/*
1603	* Enter, the last EMT triggers the next callback phase.
1604	*/
1605	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1606	if (cEntered != pVM->cCpus)
1607	{
1608	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1609	{
1610	/* Wait for our turn. */
1611	for (;;)
1612	{
1613	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1614	AssertLogRelRC(rc);
1615	if (!pVM->vmm.s.fRendezvousRecursion)
1616	break;
1617	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1618	}
1619	}
1620	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1621	{
1622	/* Wait for the last EMT to arrive and wake everyone up. */
1623	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1624	AssertLogRelRC(rc);
1625	Assert(!pVM->vmm.s.fRendezvousRecursion);
1626	}
1627	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1628	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1629	{
1630	/* Wait for our turn. */
1631	for (;;)
1632	{
1633	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1634	AssertLogRelRC(rc);
1635	if (!pVM->vmm.s.fRendezvousRecursion)
1636	break;
1637	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1638	}
1639	}
1640	else
1641	{
1642	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1643
1644	/*
1645	* The execute once is handled specially to optimize the code flow.
1646	*
1647	* The last EMT to arrive will perform the callback and the other
1648	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1649	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1650	* returns, that EMT will initiate the normal return sequence.
1651	*/
1652	if (!fIsCaller)
1653	{
1654	for (;;)
1655	{
1656	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1657	AssertLogRelRC(rc);
1658	if (!pVM->vmm.s.fRendezvousRecursion)
1659	break;
1660	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1661	}
1662
1663	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1664	}
1665	return VINF_SUCCESS;
1666	}
1667	}
1668	else
1669	{
1670	/*
1671	* All EMTs are waiting, clear the FF and take action according to the
1672	* execution method.
1673	*/
1674	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1675
1676	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1677	{
1678	/* Wake up everyone. */
1679	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1680	AssertLogRelRC(rc);
1681	}
1682	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1683	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1684	{
1685	/* Figure out who to wake up and wake it up. If it's ourself, then
1686	it's easy otherwise wait for our turn. */
1687	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1688	? 0
1689	: pVM->cCpus - 1U;
1690	if (pVCpu->idCpu != iFirst)
1691	{
1692	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1693	AssertLogRelRC(rc);
1694	for (;;)
1695	{
1696	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1697	AssertLogRelRC(rc);
1698	if (!pVM->vmm.s.fRendezvousRecursion)
1699	break;
1700	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1701	}
1702	}
1703	}
1704	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1705	}
1706
1707
1708	/*
1709	* Do the callback and update the status if necessary.
1710	*/
1711	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1712	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1713	{
1714	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1715	if (rcStrict2 != VINF_SUCCESS)
1716	{
1717	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1718	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1719	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1720	int32_t i32RendezvousStatus;
1721	do
1722	{
1723	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1724	if ( rcStrict2 == i32RendezvousStatus
1725	\|\| RT_FAILURE(i32RendezvousStatus)
1726	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1727	&& rcStrict2 > i32RendezvousStatus))
1728	break;
1729	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1730	}
1731	}
1732
1733	/*
1734	* Increment the done counter and take action depending on whether we're
1735	* the last to finish callback execution.
1736	*/
1737	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1738	if ( cDone != pVM->cCpus
1739	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1740	{
1741	/* Signal the next EMT? */
1742	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1743	{
1744	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1745	AssertLogRelRC(rc);
1746	}
1747	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1748	{
1749	Assert(cDone == pVCpu->idCpu + 1U);
1750	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1751	AssertLogRelRC(rc);
1752	}
1753	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1754	{
1755	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1756	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1757	AssertLogRelRC(rc);
1758	}
1759
1760	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1761	if (!fIsCaller)
1762	{
1763	for (;;)
1764	{
1765	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1766	AssertLogRelRC(rc);
1767	if (!pVM->vmm.s.fRendezvousRecursion)
1768	break;
1769	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1770	}
1771	}
1772	}
1773	else
1774	{
1775	/* Callback execution is all done, tell the rest to return. */
1776	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1777	AssertLogRelRC(rc);
1778	}
1779
1780	if (!fIsCaller)
1781	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1782	return rcStrictRecursion;
1783	}
1784
1785
1786	/**
1787	* Called in response to VM_FF_EMT_RENDEZVOUS.
1788	*
1789	* @returns VBox strict status code - EM scheduling. No errors will be returned
1790	* here, nor will any non-EM scheduling status codes be returned.
1791	*
1792	* @param pVM The cross context VM structure.
1793	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1794	*
1795	* @thread EMT
1796	*/
1797	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1798	{
1799	Assert(!pVCpu->vmm.s.fInRendezvous);
1800	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1801	pVCpu->vmm.s.fInRendezvous = true;
1802	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1803	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1804	pVCpu->vmm.s.fInRendezvous = false;
1805	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1806	return VBOXSTRICTRC_TODO(rcStrict);
1807	}
1808
1809
1810	/**
1811	* Helper for resetting an single wakeup event sempahore.
1812	*
1813	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1814	* @param hEvt The event semaphore to reset.
1815	*/
1816	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1817	{
1818	for (uint32_t cLoops = 0; ; cLoops++)
1819	{
1820	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1821	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1822	return rc;
1823	}
1824	}
1825
1826
1827	/**
1828	* Worker for VMMR3EmtRendezvous that handles recursion.
1829	*
1830	* @returns VBox strict status code. This will be the first error,
1831	* VINF_SUCCESS, or an EM scheduling status code.
1832	*
1833	* @param pVM The cross context VM structure.
1834	* @param pVCpu The cross context virtual CPU structure of the
1835	* calling EMT.
1836	* @param fFlags Flags indicating execution methods. See
1837	* grp_VMMR3EmtRendezvous_fFlags.
1838	* @param pfnRendezvous The callback.
1839	* @param pvUser User argument for the callback.
1840	*
1841	* @thread EMT(pVCpu)
1842	*/
1843	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1844	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1845	{
1846	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1847	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1848	Assert(pVCpu->vmm.s.fInRendezvous);
1849
1850	/*
1851	* Save the current state.
1852	*/
1853	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1854	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1855	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1856	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1857	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1858
1859	/*
1860	* Check preconditions and save the current state.
1861	*/
1862	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1863	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1864	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1865	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1866	VERR_INTERNAL_ERROR);
1867	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1868	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1869
1870	/*
1871	* Reset the recursion prep and pop semaphores.
1872	*/
1873	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1874	AssertLogRelRCReturn(rc, rc);
1875	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1876	AssertLogRelRCReturn(rc, rc);
1877	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1878	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1879	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1880	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1881
1882	/*
1883	* Usher the other thread into the recursion routine.
1884	*/
1885	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1886	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1887
1888	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1889	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1890	while (cLeft-- > 0)
1891	{
1892	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1893	AssertLogRelRC(rc);
1894	}
1895	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1896	{
1897	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1898	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1899	{
1900	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1901	AssertLogRelRC(rc);
1902	}
1903	}
1904	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1905	{
1906	Assert(cLeft == pVCpu->idCpu);
1907	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1908	{
1909	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1910	AssertLogRelRC(rc);
1911	}
1912	}
1913	else
1914	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1915	VERR_INTERNAL_ERROR_4);
1916
1917	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1918	AssertLogRelRC(rc);
1919	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1920	AssertLogRelRC(rc);
1921
1922
1923	/*
1924	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1925	*/
1926	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1927	{
1928	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1929	AssertLogRelRC(rc);
1930	}
1931
1932	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1933
1934	/*
1935	* Clear the slate and setup the new rendezvous.
1936	*/
1937	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1938	{
1939	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1940	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1941	}
1942	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1943	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1944	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1945	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1946
1947	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1948	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1949	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1950	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1951	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1952	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1953	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1954	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1955
1956	/*
1957	* We're ready to go now, do normal rendezvous processing.
1958	*/
1959	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1960	AssertLogRelRC(rc);
1961
1962	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1963
1964	/*
1965	* The caller waits for the other EMTs to be done, return and waiting on the
1966	* pop semaphore.
1967	*/
1968	for (;;)
1969	{
1970	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1971	AssertLogRelRC(rc);
1972	if (!pVM->vmm.s.fRendezvousRecursion)
1973	break;
1974	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1975	}
1976
1977	/*
1978	* Get the return code and merge it with the above recursion status.
1979	*/
1980	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1981	if ( rcStrict2 != VINF_SUCCESS
1982	&& ( rcStrict == VINF_SUCCESS
1983	\|\| rcStrict > rcStrict2))
1984	rcStrict = rcStrict2;
1985
1986	/*
1987	* Restore the parent rendezvous state.
1988	*/
1989	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1990	{
1991	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1992	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1993	}
1994	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1995	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1996	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1997	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1998
1999	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2000	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2001	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2002	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2003	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2004	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2005	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2006
2007	/*
2008	* Usher the other EMTs back to their parent recursion routine, waiting
2009	* for them to all get there before we return (makes sure they've been
2010	* scheduled and are past the pop event sem, see below).
2011	*/
2012	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2013	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2014	AssertLogRelRC(rc);
2015
2016	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2017	{
2018	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2019	AssertLogRelRC(rc);
2020	}
2021
2022	/*
2023	* We must reset the pop semaphore on the way out (doing the pop caller too,
2024	* just in case). The parent may be another recursion.
2025	*/
2026	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2027	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2028
2029	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2030
2031	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2032	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2033	return rcStrict;
2034	}
2035
2036
2037	/**
2038	* EMT rendezvous.
2039	*
2040	* Gathers all the EMTs and execute some code on each of them, either in a one
2041	* by one fashion or all at once.
2042	*
2043	* @returns VBox strict status code. This will be the first error,
2044	* VINF_SUCCESS, or an EM scheduling status code.
2045	*
2046	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2047	* doesn't support it or if the recursion is too deep.
2048	*
2049	* @param pVM The cross context VM structure.
2050	* @param fFlags Flags indicating execution methods. See
2051	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2052	* descending and ascending rendezvous types support
2053	* recursion from inside @a pfnRendezvous.
2054	* @param pfnRendezvous The callback.
2055	* @param pvUser User argument for the callback.
2056	*
2057	* @thread Any.
2058	*/
2059	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2060	{
2061	/*
2062	* Validate input.
2063	*/
2064	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2065	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2066	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2067	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2068	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2069	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2070	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2071	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2072
2073	VBOXSTRICTRC rcStrict;
2074	PVMCPU pVCpu = VMMGetCpu(pVM);
2075	if (!pVCpu)
2076	{
2077	/*
2078	* Forward the request to an EMT thread.
2079	*/
2080	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2081	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2082	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2083	else
2084	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2085	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2086	}
2087	else if ( pVM->cCpus == 1
2088	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2089	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2090	{
2091	/*
2092	* Shortcut for the single EMT case.
2093	*
2094	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2095	* during vmR3Destroy after other emulation threads have started terminating.
2096	*/
2097	if (!pVCpu->vmm.s.fInRendezvous)
2098	{
2099	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2100	pVCpu->vmm.s.fInRendezvous = true;
2101	pVM->vmm.s.fRendezvousFlags = fFlags;
2102	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2103	pVCpu->vmm.s.fInRendezvous = false;
2104	}
2105	else
2106	{
2107	/* Recursion. Do the same checks as in the SMP case. */
2108	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2109	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2110	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2111	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2112	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2113	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2114	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2115	, VERR_DEADLOCK);
2116
2117	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2118	pVM->vmm.s.cRendezvousRecursions++;
2119	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2120	pVM->vmm.s.fRendezvousFlags = fFlags;
2121
2122	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2123
2124	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2125	pVM->vmm.s.cRendezvousRecursions--;
2126	}
2127	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2128	}
2129	else
2130	{
2131	/*
2132	* Spin lock. If busy, check for recursion, if not recursing wait for
2133	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2134	*/
2135	int rc;
2136	rcStrict = VINF_SUCCESS;
2137	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2138	{
2139	/* Allow recursion in some cases. */
2140	if ( pVCpu->vmm.s.fInRendezvous
2141	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2142	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2143	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2144	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2145	))
2146	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2147
2148	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2149	VERR_DEADLOCK);
2150
2151	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2152	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2153	{
2154	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2155	{
2156	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2157	if ( rc != VINF_SUCCESS
2158	&& ( rcStrict == VINF_SUCCESS
2159	\|\| rcStrict > rc))
2160	rcStrict = rc;
2161	/** @todo Perhaps deal with termination here? */
2162	}
2163	ASMNopPause();
2164	}
2165	}
2166
2167	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2168	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2169	Assert(!pVCpu->vmm.s.fInRendezvous);
2170	pVCpu->vmm.s.fInRendezvous = true;
2171
2172	/*
2173	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2174	*/
2175	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2176	{
2177	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2178	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2179	}
2180	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2181	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2182	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2183	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2184	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2185	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2186	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2187	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2188	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2189	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2190	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2191
2192	/*
2193	* Set the FF and poke the other EMTs.
2194	*/
2195	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2196	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2197
2198	/*
2199	* Do the same ourselves.
2200	*/
2201	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2202
2203	/*
2204	* The caller waits for the other EMTs to be done and return before doing
2205	* the cleanup. This makes away with wakeup / reset races we would otherwise
2206	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2207	*/
2208	for (;;)
2209	{
2210	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2211	AssertLogRelRC(rc);
2212	if (!pVM->vmm.s.fRendezvousRecursion)
2213	break;
2214	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2215	}
2216
2217	/*
2218	* Get the return code and clean up a little bit.
2219	*/
2220	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2221	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2222
2223	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2224	pVCpu->vmm.s.fInRendezvous = false;
2225
2226	/*
2227	* Merge rcStrict, rcStrict2 and rcStrict3.
2228	*/
2229	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2230	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2231	if ( rcStrict2 != VINF_SUCCESS
2232	&& ( rcStrict == VINF_SUCCESS
2233	\|\| rcStrict > rcStrict2))
2234	rcStrict = rcStrict2;
2235	if ( rcStrict3 != VINF_SUCCESS
2236	&& ( rcStrict == VINF_SUCCESS
2237	\|\| rcStrict > rcStrict3))
2238	rcStrict = rcStrict3;
2239	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2240	}
2241
2242	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2243	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2244	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2245	VERR_IPE_UNEXPECTED_INFO_STATUS);
2246	return VBOXSTRICTRC_VAL(rcStrict);
2247	}
2248
2249
2250	/**
2251	* Interface for vmR3SetHaltMethodU.
2252	*
2253	* @param pVCpu The cross context virtual CPU structure of the
2254	* calling EMT.
2255	* @param fMayHaltInRing0 The new state.
2256	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2257	* @thread EMT(pVCpu)
2258	*
2259	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2260	* component.
2261	*/
2262	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2263	{
2264	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2265	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2266	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2267	}
2268
2269
2270	/**
2271	* Read from the ring 0 jump buffer stack.
2272	*
2273	* @returns VBox status code.
2274	*
2275	* @param pVM The cross context VM structure.
2276	* @param idCpu The ID of the source CPU context (for the address).
2277	* @param R0Addr Where to start reading.
2278	* @param pvBuf Where to store the data we've read.
2279	* @param cbRead The number of bytes to read.
2280	*/
2281	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2282	{
2283	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2284	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2285	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2286
2287	/*
2288	* Hopefully we've got all the requested bits. If not supply what we
2289	* can and zero the remaining stuff.
2290	*/
2291	RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2292	if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2293	{
2294	size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2295	if (cbRead <= cbValid)
2296	{
2297	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2298	return VINF_SUCCESS;
2299	}
2300
2301	memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2302	RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2303	}
2304	else
2305	RT_BZERO(pvBuf, cbRead);
2306
2307	/*
2308	* Supply the setjmp return RIP/EIP if requested.
2309	*/
2310	if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2311	&& pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2312	{
2313	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2314	size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2315	size_t offDst = 0;
2316	if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2317	offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2318	else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2319	{
2320	size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2321	Assert(offSrc < cbSrc);
2322	pbSrc -= offSrc;
2323	cbSrc -= offSrc;
2324	}
2325	if (cbSrc > cbRead - offDst)
2326	cbSrc = cbRead - offDst;
2327	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2328
2329	//if (cbSrc == cbRead)
2330	// rc = VINF_SUCCESS;
2331	}
2332
2333	return VINF_SUCCESS;
2334	}
2335
2336
2337	/**
2338	* Used by the DBGF stack unwinder to initialize the register state.
2339	*
2340	* @param pUVM The user mode VM handle.
2341	* @param idCpu The ID of the CPU being unwound.
2342	* @param pState The unwind state to initialize.
2343	*/
2344	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2345	{
2346	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2347	AssertReturnVoid(pVCpu);
2348
2349	/*
2350	* This is all we really need here if we had proper unwind info (win64 only)...
2351	*/
2352	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2353	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2354	pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2355
2356	/*
2357	* Locate the resume point on the stack.
2358	*/
2359	#ifdef RT_ARCH_AMD64
2360	/* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly. */
2361	uintptr_t off = 0;
2362	# ifdef RT_OS_WINDOWS
2363	off += 0xa0; /* XMM6 thru XMM15 */
2364	# endif
2365	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2366	off += 8;
2367	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2368	off += 8;
2369	# ifdef RT_OS_WINDOWS
2370	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2371	off += 8;
2372	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2373	off += 8;
2374	# endif
2375	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2376	off += 8;
2377	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2378	off += 8;
2379	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2380	off += 8;
2381	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2382	off += 8;
2383	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2384	off += 8;
2385	pState->uPc = (uint64_t const )&pVCpu->vmm.s.abAssertStack[off];
2386	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2387
2388	#elif defined(RT_ARCH_X86)
2389	/* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly. */
2390	uintptr_t off = 0;
2391	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2392	off += 4;
2393	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2394	off += 4;
2395	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2396	off += 4;
2397	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2398	off += 4;
2399	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2400	off += 4;
2401	pState->uPc = (uint32_t const )&pVCpu->vmm.s.abAssertStack[off];
2402	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2403
2404	#elif defined(RT_ARCH_ARM64)
2405	/** @todo PORTME: arm ring-0 */
2406
2407	#else
2408	# error "Port me"
2409	#endif
2410	}
2411
2412
2413	/**
2414	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2415	*
2416	* @returns VBox status code.
2417	* @param pVM The cross context VM structure.
2418	* @param uOperation Operation to execute.
2419	* @param u64Arg Constant argument.
2420	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2421	* details.
2422	*/
2423	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2424	{
2425	PVMCPU pVCpu = VMMGetCpu(pVM);
2426	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2427	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2428	}
2429
2430
2431	/**
2432	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2433	*
2434	* @returns VBox status code.
2435	* @param pVM The cross context VM structure.
2436	* @param pVCpu The cross context VM structure.
2437	* @param enmOperation Operation to execute.
2438	* @param u64Arg Constant argument.
2439	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2440	* details.
2441	*/
2442	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2443	{
2444	/*
2445	* Call ring-0.
2446	*/
2447	#ifdef NO_SUPCALLR0VMM
2448	int rc = VERR_GENERAL_FAILURE;
2449	#else
2450	int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2451	#endif
2452
2453	/*
2454	* Flush the logs and deal with ring-0 assertions.
2455	*/
2456	#ifdef LOG_ENABLED
2457	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2458	#endif
2459	VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2460	if (rc != VERR_VMM_RING0_ASSERTION)
2461	{
2462	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2463	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2464	VERR_IPE_UNEXPECTED_INFO_STATUS);
2465	return rc;
2466	}
2467	return vmmR3HandleRing0Assert(pVM, pVCpu);
2468	}
2469
2470
2471	/**
2472	* Logs a ring-0 assertion ASAP after returning to ring-3.
2473	*
2474	* @returns VBox status code.
2475	* @param pVM The cross context VM structure.
2476	* @param pVCpu The cross context virtual CPU structure.
2477	*/
2478	static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2479	{
2480	RT_NOREF(pVCpu);
2481	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2482	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2483	return VERR_VMM_RING0_ASSERTION;
2484	}
2485
2486
2487	/**
2488	* Displays the Force action Flags.
2489	*
2490	* @param pVM The cross context VM structure.
2491	* @param pHlp The output helpers.
2492	* @param pszArgs The additional arguments (ignored).
2493	*/
2494	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2495	{
2496	int c;
2497	uint32_t f;
2498	NOREF(pszArgs);
2499
2500	#define PRINT_FLAG(prf,flag) do { \
2501	if (f & (prf##flag)) \
2502	{ \
2503	static const char *s_psz = #flag; \
2504	if (!(c % 6)) \
2505	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2506	else \
2507	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2508	c++; \
2509	f &= ~(prf##flag); \
2510	} \
2511	} while (0)
2512
2513	#define PRINT_GROUP(prf,grp,sfx) do { \
2514	if (f & (prf##grp##sfx)) \
2515	{ \
2516	static const char *s_psz = #grp; \
2517	if (!(c % 5)) \
2518	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2519	else \
2520	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2521	c++; \
2522	} \
2523	} while (0)
2524
2525	/*
2526	* The global flags.
2527	*/
2528	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2529	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2530
2531	/* show the flag mnemonics */
2532	c = 0;
2533	f = fGlobalForcedActions;
2534	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2535	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2536	PRINT_FLAG(VM_FF_,PDM_DMA);
2537	PRINT_FLAG(VM_FF_,DBGF);
2538	PRINT_FLAG(VM_FF_,REQUEST);
2539	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2540	PRINT_FLAG(VM_FF_,RESET);
2541	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2542	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2543	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2544	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2545	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2546	if (f)
2547	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2548	else
2549	pHlp->pfnPrintf(pHlp, "\n");
2550
2551	/* the groups */
2552	c = 0;
2553	f = fGlobalForcedActions;
2554	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2555	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2556	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2557	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2558	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2559	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2560	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2561	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2562	if (c)
2563	pHlp->pfnPrintf(pHlp, "\n");
2564
2565	/*
2566	* Per CPU flags.
2567	*/
2568	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2569	{
2570	PVMCPU pVCpu = pVM->apCpusR3[i];
2571	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2572	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2573
2574	/* show the flag mnemonics */
2575	c = 0;
2576	f = fLocalForcedActions;
2577	#ifdef VBOX_VMM_TARGET_ARMV8
2578	PRINT_FLAG(VMCPU_FF_,INTERRUPT_IRQ);
2579	PRINT_FLAG(VMCPU_FF_,INTERRUPT_FIQ);
2580	#elif defined(VBOX_VMM_TARGET_X86)
2581	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2582	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2583	#else
2584	# error "port me"
2585	#endif
2586	PRINT_FLAG(VMCPU_FF_,TIMER);
2587	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2588	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2589	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2590	PRINT_FLAG(VMCPU_FF_,UNHALT);
2591	PRINT_FLAG(VMCPU_FF_,IEM);
2592	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2593	PRINT_FLAG(VMCPU_FF_,DBGF);
2594	PRINT_FLAG(VMCPU_FF_,REQUEST);
2595	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2596	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2597	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2598	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2599	PRINT_FLAG(VMCPU_FF_,TO_R3);
2600	PRINT_FLAG(VMCPU_FF_,IOM);
2601	if (f)
2602	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2603	else
2604	pHlp->pfnPrintf(pHlp, "\n");
2605
2606	/* the groups */
2607	c = 0;
2608	f = fLocalForcedActions;
2609	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2610	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2611	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2612	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2613	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2614	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2615	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2616	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2617	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2618	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2619	if (c)
2620	pHlp->pfnPrintf(pHlp, "\n");
2621	}
2622
2623	#undef PRINT_FLAG
2624	#undef PRINT_GROUP
2625	}
2626

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 107307

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