VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 107200

Last change on this file since 107200 was 107194, checked in by vboxsync, 2 months ago

VMM: More adjustments for VBOX_WITH_ONLY_PGM_NEM_MODE, VBOX_WITH_MINIMAL_R0, VBOX_WITH_HWVIRT and such. jiraref:VBP-1466
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 107.2 KB
Line 
1/* $Id: VMM.cpp 107194 2024-11-29 14:47:06Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28//#define NO_SUPCALLR0VMM
29
30/** @page pg_vmm VMM - The Virtual Machine Monitor
31 *
32 * The VMM component is two things at the moment, it's a component doing a few
33 * management and routing tasks, and it's the whole virtual machine monitor
34 * thing. For hysterical reasons, it is not doing all the management that one
35 * would expect, this is instead done by @ref pg_vm. We'll address this
36 * misdesign eventually, maybe.
37 *
38 * VMM is made up of these components:
39 * - @subpage pg_cfgm
40 * - @subpage pg_cpum
41 * - @subpage pg_dbgf
42 * - @subpage pg_em
43 * - @subpage pg_gim
44 * - @subpage pg_gmm
45 * - @subpage pg_gvmm
46 * - @subpage pg_hm
47 * - @subpage pg_iem
48 * - @subpage pg_iom
49 * - @subpage pg_mm
50 * - @subpage pg_nem
51 * - @subpage pg_pdm
52 * - @subpage pg_pgm
53 * - @subpage pg_selm
54 * - @subpage pg_ssm
55 * - @subpage pg_stam
56 * - @subpage pg_tm
57 * - @subpage pg_trpm
58 * - @subpage pg_vm
59 *
60 *
61 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
62 *
63 *
64 * @section sec_vmmstate VMM State
65 *
66 * @image html VM_Statechart_Diagram.gif
67 *
68 * To be written.
69 *
70 *
71 * @subsection subsec_vmm_init VMM Initialization
72 *
73 * To be written.
74 *
75 *
76 * @subsection subsec_vmm_term VMM Termination
77 *
78 * To be written.
79 *
80 *
81 * @section sec_vmm_limits VMM Limits
82 *
83 * There are various resource limits imposed by the VMM and it's
84 * sub-components. We'll list some of them here.
85 *
86 * On 64-bit hosts:
87 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
88 * can be increased up to 64K - 1.
89 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
90 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
91 * - A VM can be assigned all the memory we can use (16TB), however, the
92 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
93 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
94 *
95 * On 32-bit hosts:
96 * - Max 127 VMs. Imposed by GMM's per page structure.
97 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
98 * ROM pages. The limit is imposed by the 28-bit page ID used
99 * internally in GMM. It is also limited by PAE.
100 * - A VM can be assigned all the memory GMM can allocate, however, the
101 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
102 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
103 *
104 */
105
106
107/*********************************************************************************************************************************
108* Header Files *
109*********************************************************************************************************************************/
110#define LOG_GROUP LOG_GROUP_VMM
111#include <VBox/vmm/vmm.h>
112#include <VBox/vmm/vmapi.h>
113#include <VBox/vmm/pgm.h>
114#include <VBox/vmm/cfgm.h>
115#include <VBox/vmm/pdmqueue.h>
116#include <VBox/vmm/pdmcritsect.h>
117#include <VBox/vmm/pdmcritsectrw.h>
118#include <VBox/vmm/pdmapi.h>
119#include <VBox/vmm/cpum.h>
120#include <VBox/vmm/gim.h>
121#include <VBox/vmm/mm.h>
122#include <VBox/vmm/nem.h>
123#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
124# include <VBox/vmm/iem.h>
125#endif
126#include <VBox/vmm/iom.h>
127#include <VBox/vmm/trpm.h>
128#include <VBox/vmm/selm.h>
129#include <VBox/vmm/em.h>
130#include <VBox/sup.h>
131#include <VBox/vmm/dbgf.h>
132#if defined(VBOX_VMM_TARGET_ARMV8)
133# include <VBox/vmm/gic.h>
134#else
135# include <VBox/vmm/pdmapic.h>
136#endif
137#include <VBox/vmm/ssm.h>
138#include <VBox/vmm/tm.h>
139#include "VMMInternal.h"
140#include <VBox/vmm/vmcc.h>
141
142#include <VBox/err.h>
143#include <VBox/param.h>
144#include <VBox/version.h>
145#include <VBox/vmm/hm.h>
146#include <iprt/assert.h>
147#include <iprt/alloc.h>
148#if defined(VBOX_VMM_TARGET_ARMV8)
149# include <iprt/armv8.h>
150#endif
151#include <iprt/asm.h>
152#include <iprt/time.h>
153#include <iprt/semaphore.h>
154#include <iprt/stream.h>
155#include <iprt/string.h>
156#include <iprt/stdarg.h>
157#include <iprt/ctype.h>
158#include <iprt/x86.h>
159
160
161/*********************************************************************************************************************************
162* Defined Constants And Macros *
163*********************************************************************************************************************************/
164/** The saved state version. */
165#define VMM_SAVED_STATE_VERSION 4
166/** The saved state version used by v3.0 and earlier. (Teleportation) */
167#define VMM_SAVED_STATE_VERSION_3_0 3
168
169/** Macro for flushing the ring-0 logging. */
170#define VMM_FLUSH_R0_LOG(a_pVM, a_pVCpu, a_pLogger, a_pR3Logger) \
171 do { \
172 size_t const idxBuf = (a_pLogger)->idxBuf % VMMLOGGER_BUFFER_COUNT; \
173 if ( (a_pLogger)->aBufs[idxBuf].AuxDesc.offBuf == 0 \
174 || (a_pLogger)->aBufs[idxBuf].AuxDesc.fFlushedIndicator) \
175 { /* likely? */ } \
176 else \
177 vmmR3LogReturnFlush(a_pVM, a_pVCpu, a_pLogger, idxBuf, a_pR3Logger); \
178 } while (0)
179
180
181/*********************************************************************************************************************************
182* Internal Functions *
183*********************************************************************************************************************************/
184static void vmmR3InitRegisterStats(PVM pVM);
185static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
186static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
187#if 0 /* pointless when timers doesn't run on EMT */
188static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
189#endif
190static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
191 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
192static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu);
193static FNRTTHREAD vmmR3LogFlusher;
194static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf,
195 PRTLOGGER pDstLogger);
196static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
197
198
199
200/**
201 * Initializes the VMM.
202 *
203 * @returns VBox status code.
204 * @param pVM The cross context VM structure.
205 */
206VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
207{
208 LogFlow(("VMMR3Init\n"));
209
210 /*
211 * Assert alignment, sizes and order.
212 */
213 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
214 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
215
216 /*
217 * Init basic VM VMM members.
218 */
219 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
220 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
221 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
222 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
223 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
224 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
225 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
226 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
227 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
228 pVM->vmm.s.nsProgramStart = RTTimeProgramStartNanoTS();
229
230#if 0 /* pointless when timers doesn't run on EMT */
231 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
232 * The EMT yield interval. The EMT yielding is a hack we employ to play a
233 * bit nicer with the rest of the system (like for instance the GUI).
234 */
235 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
236 23 /* Value arrived at after experimenting with the grub boot prompt. */);
237 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
238#endif
239
240 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
241 * Controls whether we employ per-cpu preemption timers to limit the time
242 * spent executing guest code. This option is not available on all
243 * platforms and we will silently ignore this setting then. If we are
244 * running in VT-x mode, we will use the VMX-preemption timer instead of
245 * this one when possible.
246 */
247 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
248 int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
249 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
250
251 /*
252 * Initialize the VMM rendezvous semaphores.
253 */
254 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
255 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
256 return VERR_NO_MEMORY;
257 for (VMCPUID i = 0; i < pVM->cCpus; i++)
258 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
259 for (VMCPUID i = 0; i < pVM->cCpus; i++)
260 {
261 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
262 AssertRCReturn(rc, rc);
263 }
264 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
265 AssertRCReturn(rc, rc);
266 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
267 AssertRCReturn(rc, rc);
268 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
269 AssertRCReturn(rc, rc);
270 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
271 AssertRCReturn(rc, rc);
272 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
273 AssertRCReturn(rc, rc);
274 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
275 AssertRCReturn(rc, rc);
276 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
277 AssertRCReturn(rc, rc);
278 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
279 AssertRCReturn(rc, rc);
280
281 /*
282 * Register the saved state data unit.
283 */
284 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
285 NULL, NULL, NULL,
286 NULL, vmmR3Save, NULL,
287 NULL, vmmR3Load, NULL);
288 if (RT_FAILURE(rc))
289 return rc;
290
291#if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
292 /*
293 * Register the Ring-0 VM handle with the session for fast ioctl calls.
294 */
295 if (!SUPR3IsDriverless())
296 {
297 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
298 if (RT_FAILURE(rc))
299 return rc;
300 }
301#endif
302
303#ifdef VBOX_WITH_NMI
304 /*
305 * Allocate mapping for the host APIC.
306 */
307 rc = MMR3HyperReserve(pVM, HOST_PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
308 AssertRC(rc);
309#endif
310 if (RT_SUCCESS(rc))
311 {
312 /*
313 * Start the log flusher thread.
314 */
315 if (!SUPR3IsDriverless())
316 rc = RTThreadCreate(&pVM->vmm.s.hLogFlusherThread, vmmR3LogFlusher, pVM, 0 /*cbStack*/,
317 RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "R0LogWrk");
318 if (RT_SUCCESS(rc))
319 {
320
321 /*
322 * Debug info and statistics.
323 */
324 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
325 vmmR3InitRegisterStats(pVM);
326 vmmInitFormatTypes();
327
328 return VINF_SUCCESS;
329 }
330 }
331 /** @todo Need failure cleanup? */
332
333 return rc;
334}
335
336
337/**
338 * VMMR3Init worker that register the statistics with STAM.
339 *
340 * @param pVM The cross context VM structure.
341 */
342static void vmmR3InitRegisterStats(PVM pVM)
343{
344 RT_NOREF_PV(pVM);
345
346 /* Nothing to do here in driverless mode. */
347 if (SUPR3IsDriverless())
348 return;
349
350 /*
351 * Statistics.
352 */
353#if defined(VBOX_WITH_R0_MODULES) && !defined(VBOX_WITH_MINIMAL_R0)
354 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
355 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
356 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
357 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
358 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
359 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
360 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
361 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
362 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
363 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
364 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
365 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
366 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
367 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
368 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
369 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
370 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
371 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
372 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
373 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
374 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
375 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
376 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
377 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
378 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
379 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
380 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
381 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
382 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
383 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
384 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
385 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
386 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
387 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
388 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
389 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
390 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
391 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
392 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
393 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
394 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
395 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
396 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
397 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
398 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
399 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
400 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
401 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
402 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
403 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
404 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
406#endif
407
408 STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-Flushes", STAMUNIT_OCCURENCES, "Total number of buffer flushes");
409 STAMR3Register(pVM, &pVM->vmm.s.StatLogFlusherNoWakeUp, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, "/VMM/LogFlush/00-NoWakups", STAMUNIT_OCCURENCES, "Times the flusher thread didn't need waking up.");
410
411 for (VMCPUID i = 0; i < pVM->cCpus; i++)
412 {
413 PVMCPU pVCpu = pVM->apCpusR3[i];
414 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
415 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
416 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
417 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
418 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
419 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
420 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
421 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3", i);
422 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/FromSpin", i);
423 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3Other, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/Other", i);
424 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PendingFF, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PendingFF", i);
425 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3SmallDelta, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/SmallDelta", i);
426 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostNoInt, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitNoInt", i);
427 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3PostPendingFF,STAMTYPE_COUNTER,STAMVISIBILITY_ALWAYS,STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3/PostWaitPendingFF", i);
428 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
429 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
430 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
431
432 STAMR3RegisterF(pVM, &pVCpu->cEmtHashCollisions, STAMTYPE_U8, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/VMM/EmtHashCollisions/Emt%02u", i);
433
434 PVMMR3CPULOGGER pShared = &pVCpu->vmm.s.u.s.Logger;
435 STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg", i);
436 STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/CannotBlock", i);
437 STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Wait", i);
438 STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Reg/Races", i);
439 STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Reg/RacesToR0", i);
440 STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbDropped", i);
441 STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/cbBuf", i);
442 STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Reg/idxBuf", i);
443
444 pShared = &pVCpu->vmm.s.u.s.RelLogger;
445 STAMR3RegisterF(pVM, &pShared->StatFlushes, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel", i);
446 STAMR3RegisterF(pVM, &pShared->StatCannotBlock, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/CannotBlock", i);
447 STAMR3RegisterF(pVM, &pShared->StatWait, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Wait", i);
448 STAMR3RegisterF(pVM, &pShared->StatRaces, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, "", "/VMM/LogFlush/CPU%u/Rel/Races", i);
449 STAMR3RegisterF(pVM, &pShared->StatRacesToR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "", "/VMM/LogFlush/CPU%u/Rel/RacesToR0", i);
450 STAMR3RegisterF(pVM, &pShared->cbDropped, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbDropped", i);
451 STAMR3RegisterF(pVM, &pShared->cbBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/cbBuf", i);
452 STAMR3RegisterF(pVM, &pShared->idxBuf, STAMTYPE_U32, STAMVISIBILITY_USED, STAMUNIT_BYTES, "", "/VMM/LogFlush/CPU%u/Rel/idxBuf", i);
453 }
454}
455
456
457/**
458 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
459 *
460 * @returns VBox status code.
461 * @param pVM The cross context VM structure.
462 * @param pVCpu The cross context per CPU structure.
463 * @thread EMT(pVCpu)
464 */
465static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
466{
467 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
468}
469
470
471/**
472 * Initializes the R0 VMM.
473 *
474 * @returns VBox status code.
475 * @param pVM The cross context VM structure.
476 */
477VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
478{
479 int rc;
480 PVMCPU pVCpu = VMMGetCpu(pVM);
481 Assert(pVCpu && pVCpu->idCpu == 0);
482
483 /*
484 * Nothing to do here in driverless mode.
485 */
486 if (SUPR3IsDriverless())
487 return VINF_SUCCESS;
488
489 /*
490 * Make sure the ring-0 loggers are up to date.
491 */
492 rc = VMMR3UpdateLoggers(pVM);
493 if (RT_FAILURE(rc))
494 return rc;
495
496 /*
497 * Call Ring-0 entry with init code.
498 */
499#ifdef NO_SUPCALLR0VMM
500 //rc = VERR_GENERAL_FAILURE;
501 rc = VINF_SUCCESS;
502#else
503 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
504#endif
505
506 /*
507 * Flush the logs & deal with assertions.
508 */
509#ifdef LOG_ENABLED
510 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
511#endif
512 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
513 if (rc == VERR_VMM_RING0_ASSERTION)
514 rc = vmmR3HandleRing0Assert(pVM, pVCpu);
515 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
516 {
517 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
518 if (RT_SUCCESS(rc))
519 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
520 }
521
522 /*
523 * Log stuff we learned in ring-0.
524 */
525 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
526 if (pVM->vmm.s.fIsUsingContextHooks)
527 LogRel(("VMM: Enabled thread-context hooks\n"));
528 else
529 LogRel(("VMM: Thread-context hooks unavailable\n"));
530
531 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
532 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
533 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
534 else
535 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
536 if (pVM->vmm.s.fIsPreemptPossible)
537 LogRel(("VMM: Kernel preemption is possible\n"));
538 else
539 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
540
541 /*
542 * Send all EMTs to ring-0 to get their logger initialized.
543 */
544 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
545 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
546
547 return rc;
548}
549
550
551/**
552 * Called when an init phase completes.
553 *
554 * @returns VBox status code.
555 * @param pVM The cross context VM structure.
556 * @param enmWhat Which init phase.
557 */
558VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
559{
560 int rc = VINF_SUCCESS;
561
562 switch (enmWhat)
563 {
564 case VMINITCOMPLETED_RING3:
565 {
566#if 0 /* pointless when timers doesn't run on EMT */
567 /*
568 * Create the EMT yield timer.
569 */
570 rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
571 "EMT Yielder", &pVM->vmm.s.hYieldTimer);
572 AssertRCReturn(rc, rc);
573
574 rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
575 AssertRCReturn(rc, rc);
576#endif
577 break;
578 }
579
580 case VMINITCOMPLETED_HM:
581 {
582#if !defined(VBOX_VMM_TARGET_ARMV8)
583 /*
584 * Disable the periodic preemption timers if we can use the
585 * VMX-preemption timer instead.
586 */
587 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
588 && HMR3IsVmxPreemptionTimerUsed(pVM))
589 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
590 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
591#endif
592
593 /*
594 * Last chance for GIM to update its CPUID leaves if it requires
595 * knowledge/information from HM initialization.
596 */
597/** @todo r=bird: This shouldn't be done from here, but rather from VM.cpp. There is no dependency on VMM here. */
598 rc = GIMR3InitCompleted(pVM);
599 AssertRCReturn(rc, rc);
600
601 /*
602 * CPUM's post-initialization (print CPUIDs).
603 */
604 CPUMR3LogCpuIdAndMsrFeatures(pVM);
605 break;
606 }
607
608 default: /* shuts up gcc */
609 break;
610 }
611
612 return rc;
613}
614
615
616/**
617 * Terminate the VMM bits.
618 *
619 * @returns VBox status code.
620 * @param pVM The cross context VM structure.
621 */
622VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
623{
624 PVMCPU pVCpu = VMMGetCpu(pVM);
625 Assert(pVCpu && pVCpu->idCpu == 0);
626
627 /*
628 * Call Ring-0 entry with termination code.
629 */
630 int rc = VINF_SUCCESS;
631 if (!SUPR3IsDriverless())
632 {
633#ifndef NO_SUPCALLR0VMM
634 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
635#endif
636 }
637
638 /*
639 * Flush the logs & deal with assertions.
640 */
641#ifdef LOG_ENABLED
642 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
643#endif
644 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
645 if (rc == VERR_VMM_RING0_ASSERTION)
646 rc = vmmR3HandleRing0Assert(pVM, pVCpu);
647 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
648 {
649 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
650 if (RT_SUCCESS(rc))
651 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
652 }
653
654 /*
655 * Do clean ups.
656 */
657 for (VMCPUID i = 0; i < pVM->cCpus; i++)
658 {
659 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
660 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
661 }
662 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
663 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
664 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
665 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
666 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
667 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
668 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
669 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
670 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
671 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
672 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
673 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
674 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
675 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
676 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
677 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
678
679 vmmTermFormatTypes();
680
681 /*
682 * Wait for the log flusher thread to complete.
683 */
684 if (pVM->vmm.s.hLogFlusherThread != NIL_RTTHREAD)
685 {
686 int rc2 = RTThreadWait(pVM->vmm.s.hLogFlusherThread, RT_MS_30SEC, NULL);
687 AssertLogRelRC(rc2);
688 if (RT_SUCCESS(rc2))
689 pVM->vmm.s.hLogFlusherThread = NIL_RTTHREAD;
690 }
691
692 return rc;
693}
694
695
696/**
697 * Applies relocations to data and code managed by this
698 * component. This function will be called at init and
699 * whenever the VMM need to relocate it self inside the GC.
700 *
701 * The VMM will need to apply relocations to the core code.
702 *
703 * @param pVM The cross context VM structure.
704 * @param offDelta The relocation delta.
705 */
706VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
707{
708 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
709 RT_NOREF(offDelta);
710
711 /*
712 * Update the logger.
713 */
714 VMMR3UpdateLoggers(pVM);
715}
716
717
718/**
719 * Worker for VMMR3UpdateLoggers.
720 */
721static int vmmR3UpdateLoggersWorker(PVM pVM, PVMCPU pVCpu, PRTLOGGER pSrcLogger, bool fReleaseLogger)
722{
723 /*
724 * Get the group count.
725 */
726 uint32_t uGroupsCrc32 = 0;
727 uint32_t cGroups = 0;
728 uint64_t fFlags = 0;
729 int rc = RTLogQueryBulk(pSrcLogger, &fFlags, &uGroupsCrc32, &cGroups, NULL);
730 Assert(rc == VERR_BUFFER_OVERFLOW);
731
732 /*
733 * Allocate the request of the right size.
734 */
735 uint32_t const cbReq = RT_UOFFSETOF_DYN(VMMR0UPDATELOGGERSREQ, afGroups[cGroups]);
736 PVMMR0UPDATELOGGERSREQ pReq = (PVMMR0UPDATELOGGERSREQ)RTMemAllocZVar(cbReq);
737 if (pReq)
738 {
739 pReq->Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
740 pReq->Hdr.cbReq = cbReq;
741 pReq->cGroups = cGroups;
742 rc = RTLogQueryBulk(pSrcLogger, &pReq->fFlags, &pReq->uGroupCrc32, &pReq->cGroups, pReq->afGroups);
743 AssertRC(rc);
744 if (RT_SUCCESS(rc))
745 {
746 /*
747 * The 64-bit value argument.
748 */
749 uint64_t fExtraArg = fReleaseLogger;
750
751 /* Only outputting to the parent VMM's logs? Enable ring-0 to flush directly. */
752 uint32_t fDst = RTLogGetDestinations(pSrcLogger);
753 fDst &= ~(RTLOGDEST_DUMMY | RTLOGDEST_F_NO_DENY | RTLOGDEST_F_DELAY_FILE | RTLOGDEST_FIXED_FILE | RTLOGDEST_FIXED_DIR);
754 if ( (fDst & (RTLOGDEST_VMM | RTLOGDEST_VMM_REL))
755 && !(fDst & ~(RTLOGDEST_VMM | RTLOGDEST_VMM_REL)))
756 fExtraArg |= (fDst & RTLOGDEST_VMM ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_DBG : 0)
757 | (fDst & RTLOGDEST_VMM_REL ? VMMR0UPDATELOGGER_F_TO_PARENT_VMM_REL : 0);
758
759 rc = VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_UPDATE_LOGGERS, fExtraArg, &pReq->Hdr);
760 }
761
762 RTMemFree(pReq);
763 }
764 else
765 rc = VERR_NO_MEMORY;
766 return rc;
767}
768
769
770/**
771 * Updates the settings for the RC and R0 loggers.
772 *
773 * @returns VBox status code.
774 * @param pVM The cross context VM structure.
775 * @thread EMT
776 */
777VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
778{
779 /* Nothing to do here if we're in driverless mode: */
780 if (SUPR3IsDriverless())
781 return VINF_SUCCESS;
782
783 PVMCPU pVCpu = VMMGetCpu(pVM);
784 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
785
786 /*
787 * Each EMT has each own logger instance.
788 */
789 /* Debug logging.*/
790 int rcDebug = VINF_SUCCESS;
791#ifdef LOG_ENABLED
792 PRTLOGGER const pDefault = RTLogDefaultInstance();
793 if (pDefault)
794 rcDebug = vmmR3UpdateLoggersWorker(pVM, pVCpu, pDefault, false /*fReleaseLogger*/);
795#else
796 RT_NOREF(pVM);
797#endif
798
799 /* Release logging. */
800 int rcRelease = VINF_SUCCESS;
801 PRTLOGGER const pRelease = RTLogRelGetDefaultInstance();
802 if (pRelease)
803 rcRelease = vmmR3UpdateLoggersWorker(pVM, pVCpu, pRelease, true /*fReleaseLogger*/);
804
805 return RT_SUCCESS(rcDebug) ? rcRelease : rcDebug;
806}
807
808
809/**
810 * @callback_method_impl{FNRTTHREAD, Ring-0 log flusher thread.}
811 */
812static DECLCALLBACK(int) vmmR3LogFlusher(RTTHREAD hThreadSelf, void *pvUser)
813{
814 PVM const pVM = (PVM)pvUser;
815 RT_NOREF(hThreadSelf);
816
817 /* Reset the flusher state before we start: */
818 pVM->vmm.s.LogFlusherItem.u32 = UINT32_MAX;
819
820 /*
821 * The work loop.
822 */
823 for (;;)
824 {
825 /*
826 * Wait for work.
827 */
828 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_VMMR0_LOG_FLUSHER, 0, NULL);
829 if (RT_SUCCESS(rc))
830 {
831 /* Paranoia: Make another copy of the request, to make sure the validated data can't be changed. */
832 VMMLOGFLUSHERENTRY Item;
833 Item.u32 = pVM->vmm.s.LogFlusherItem.u32;
834 if ( Item.s.idCpu < pVM->cCpus
835 && Item.s.idxLogger < VMMLOGGER_IDX_MAX
836 && Item.s.idxBuffer < VMMLOGGER_BUFFER_COUNT)
837 {
838 /*
839 * Verify the request.
840 */
841 PVMCPU const pVCpu = pVM->apCpusR3[Item.s.idCpu];
842 PVMMR3CPULOGGER const pShared = &pVCpu->vmm.s.u.aLoggers[Item.s.idxLogger];
843 uint32_t const cbToFlush = pShared->aBufs[Item.s.idxBuffer].AuxDesc.offBuf;
844 if (cbToFlush > 0)
845 {
846 if (cbToFlush <= pShared->cbBuf)
847 {
848 char * const pchBufR3 = pShared->aBufs[Item.s.idxBuffer].pchBufR3;
849 if (pchBufR3)
850 {
851 /*
852 * Do the flushing.
853 */
854 PRTLOGGER const pLogger = Item.s.idxLogger == VMMLOGGER_IDX_REGULAR
855 ? RTLogGetDefaultInstance() : RTLogRelGetDefaultInstance();
856 if (pLogger)
857 {
858 char szBefore[128];
859 RTStrPrintf(szBefore, sizeof(szBefore),
860 "*FLUSH* idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x fFlushed=%RTbool cbDropped=%#x\n",
861 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush,
862 pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator, pShared->cbDropped);
863 RTLogBulkWrite(pLogger, szBefore, pchBufR3, cbToFlush, "*FLUSH DONE*\n");
864 }
865 }
866 else
867 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! No ring-3 buffer pointer!\n",
868 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
869 }
870 else
871 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Exceeds %#x bytes buffer size!\n",
872 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush, pShared->cbBuf));
873 }
874 else
875 Log(("vmmR3LogFlusher: idCpu=%u idxLogger=%u idxBuffer=%u cbToFlush=%#x: Warning! Zero bytes to flush!\n",
876 Item.s.idCpu, Item.s.idxLogger, Item.s.idxBuffer, cbToFlush));
877
878 /*
879 * Mark the descriptor as flushed and set the request flag for same.
880 */
881 pShared->aBufs[Item.s.idxBuffer].AuxDesc.fFlushedIndicator = true;
882 }
883 else
884 {
885 Assert(Item.s.idCpu == UINT16_MAX);
886 Assert(Item.s.idxLogger == UINT8_MAX);
887 Assert(Item.s.idxBuffer == UINT8_MAX);
888 }
889 }
890 /*
891 * Interrupted can happen, just ignore it.
892 */
893 else if (rc == VERR_INTERRUPTED)
894 { /* ignore*/ }
895 /*
896 * The ring-0 termination code will set the shutdown flag and wake us
897 * up, and we should return with object destroyed. In case there is
898 * some kind of race, we might also get sempahore destroyed.
899 */
900 else if ( rc == VERR_OBJECT_DESTROYED
901 || rc == VERR_SEM_DESTROYED
902 || rc == VERR_INVALID_HANDLE)
903 {
904 LogRel(("vmmR3LogFlusher: Terminating (%Rrc)\n", rc));
905 return VINF_SUCCESS;
906 }
907 /*
908 * There shouldn't be any other errors...
909 */
910 else
911 {
912 LogRelMax(64, ("vmmR3LogFlusher: VMMR0_DO_VMMR0_LOG_FLUSHER -> %Rrc\n", rc));
913 AssertRC(rc);
914 RTThreadSleep(1);
915 }
916 }
917}
918
919
920/**
921 * Helper for VMM_FLUSH_R0_LOG that does the flushing.
922 *
923 * @param pVM The cross context VM structure.
924 * @param pVCpu The cross context virtual CPU structure of the calling
925 * EMT.
926 * @param pShared The shared logger data.
927 * @param idxBuf The buffer to flush.
928 * @param pDstLogger The destination IPRT logger.
929 */
930static void vmmR3LogReturnFlush(PVM pVM, PVMCPU pVCpu, PVMMR3CPULOGGER pShared, size_t idxBuf, PRTLOGGER pDstLogger)
931{
932 uint32_t const cbToFlush = pShared->aBufs[idxBuf].AuxDesc.offBuf;
933 const char *pszBefore = cbToFlush < 256 ? NULL : "*FLUSH*\n";
934 const char *pszAfter = cbToFlush < 256 ? NULL : "*END*\n";
935
936#if VMMLOGGER_BUFFER_COUNT > 1
937 /*
938 * When we have more than one log buffer, the flusher thread may still be
939 * working on the previous buffer when we get here.
940 */
941 char szBefore[64];
942 if (pShared->cFlushing > 0)
943 {
944 STAM_REL_PROFILE_START(&pShared->StatRaces, a);
945 uint64_t const nsStart = RTTimeNanoTS();
946
947 /* A no-op, but it takes the lock and the hope is that we end up waiting
948 on the flusher to finish up. */
949 RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
950 if (pShared->cFlushing != 0)
951 {
952 RTLogBulkWrite(pDstLogger, NULL, "", 0, NULL);
953
954 /* If no luck, go to ring-0 and to proper waiting. */
955 if (pShared->cFlushing != 0)
956 {
957 STAM_REL_COUNTER_INC(&pShared->StatRacesToR0);
958 SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, VMMR0_DO_VMMR0_LOG_WAIT_FLUSHED, 0, NULL);
959 }
960 }
961
962 RTStrPrintf(szBefore, sizeof(szBefore), "*%sFLUSH* waited %'RU64 ns\n",
963 pShared->cFlushing == 0 ? "" : " MISORDERED", RTTimeNanoTS() - nsStart);
964 pszBefore = szBefore;
965 STAM_REL_PROFILE_STOP(&pShared->StatRaces, a);
966 }
967#else
968 RT_NOREF(pVM, pVCpu);
969#endif
970
971 RTLogBulkWrite(pDstLogger, pszBefore, pShared->aBufs[idxBuf].pchBufR3, cbToFlush, pszAfter);
972 pShared->aBufs[idxBuf].AuxDesc.fFlushedIndicator = true;
973}
974
975
976/**
977 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
978 *
979 * @returns Pointer to the buffer.
980 * @param pVM The cross context VM structure.
981 */
982VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
983{
984 return pVM->vmm.s.szRing0AssertMsg1;
985}
986
987
988/**
989 * Returns the VMCPU of the specified virtual CPU.
990 *
991 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
992 *
993 * @param pUVM The user mode VM handle.
994 * @param idCpu The ID of the virtual CPU.
995 */
996VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
997{
998 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
999 AssertReturn(idCpu < pUVM->cCpus, NULL);
1000 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1001 return pUVM->pVM->apCpusR3[idCpu];
1002}
1003
1004
1005/**
1006 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1007 *
1008 * @returns Pointer to the buffer.
1009 * @param pVM The cross context VM structure.
1010 */
1011VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1012{
1013 return pVM->vmm.s.szRing0AssertMsg2;
1014}
1015
1016
1017/**
1018 * Execute state save operation.
1019 *
1020 * @returns VBox status code.
1021 * @param pVM The cross context VM structure.
1022 * @param pSSM SSM operation handle.
1023 */
1024static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1025{
1026 LogFlow(("vmmR3Save:\n"));
1027
1028 /*
1029 * Save the started/stopped state of all CPUs except 0 as it will always
1030 * be running. This avoids breaking the saved state version. :-)
1031 */
1032 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1033 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
1034
1035 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1036}
1037
1038
1039/**
1040 * Execute state load operation.
1041 *
1042 * @returns VBox status code.
1043 * @param pVM The cross context VM structure.
1044 * @param pSSM SSM operation handle.
1045 * @param uVersion Data layout version.
1046 * @param uPass The data pass.
1047 */
1048static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1049{
1050 LogFlow(("vmmR3Load:\n"));
1051 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1052
1053 /*
1054 * Validate version.
1055 */
1056 if ( uVersion != VMM_SAVED_STATE_VERSION
1057 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1058 {
1059 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1060 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1061 }
1062
1063 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1064 {
1065 /* Ignore the stack bottom, stack pointer and stack bits. */
1066 RTRCPTR RCPtrIgnored;
1067 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1068 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1069#ifdef RT_OS_DARWIN
1070 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1071 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1072 && SSMR3HandleRevision(pSSM) >= 48858
1073 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1074 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1075 )
1076 SSMR3Skip(pSSM, 16384);
1077 else
1078 SSMR3Skip(pSSM, 8192);
1079#else
1080 SSMR3Skip(pSSM, 8192);
1081#endif
1082 }
1083
1084 /*
1085 * Restore the VMCPU states. VCPU 0 is always started.
1086 */
1087 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
1088 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1089 {
1090 bool fStarted;
1091 int rc = SSMR3GetBool(pSSM, &fStarted);
1092 if (RT_FAILURE(rc))
1093 return rc;
1094 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1095 }
1096
1097 /* terminator */
1098 uint32_t u32;
1099 int rc = SSMR3GetU32(pSSM, &u32);
1100 if (RT_FAILURE(rc))
1101 return rc;
1102 if (u32 != UINT32_MAX)
1103 {
1104 AssertMsgFailed(("u32=%#x\n", u32));
1105 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1106 }
1107 return VINF_SUCCESS;
1108}
1109
1110
1111/**
1112 * Suspends the CPU yielder.
1113 *
1114 * @param pVM The cross context VM structure.
1115 */
1116VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1117{
1118#if 0 /* pointless when timers doesn't run on EMT */
1119 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1120 if (!pVM->vmm.s.cYieldResumeMillies)
1121 {
1122 uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1123 uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1124 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1125 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1126 else
1127 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1128 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1129 }
1130 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1131#else
1132 RT_NOREF(pVM);
1133#endif
1134}
1135
1136
1137/**
1138 * Stops the CPU yielder.
1139 *
1140 * @param pVM The cross context VM structure.
1141 */
1142VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1143{
1144#if 0 /* pointless when timers doesn't run on EMT */
1145 if (!pVM->vmm.s.cYieldResumeMillies)
1146 TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1147 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1148 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1149#else
1150 RT_NOREF(pVM);
1151#endif
1152}
1153
1154
1155/**
1156 * Resumes the CPU yielder when it has been a suspended or stopped.
1157 *
1158 * @param pVM The cross context VM structure.
1159 */
1160VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1161{
1162#if 0 /* pointless when timers doesn't run on EMT */
1163 if (pVM->vmm.s.cYieldResumeMillies)
1164 {
1165 TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1166 pVM->vmm.s.cYieldResumeMillies = 0;
1167 }
1168#else
1169 RT_NOREF(pVM);
1170#endif
1171}
1172
1173
1174#if 0 /* pointless when timers doesn't run on EMT */
1175/**
1176 * @callback_method_impl{FNTMTIMERINT, EMT yielder}
1177 *
1178 * @todo This is a UNI core/thread thing, really... Should be reconsidered.
1179 */
1180static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1181{
1182 NOREF(pvUser);
1183
1184 /*
1185 * This really needs some careful tuning. While we shouldn't be too greedy since
1186 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1187 * because that'll cause us to stop up.
1188 *
1189 * The current logic is to use the default interval when there is no lag worth
1190 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1191 *
1192 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1193 * so the lag is up to date.)
1194 */
1195 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1196 if ( u64Lag < 50000000 /* 50ms */
1197 || ( u64Lag < 1000000000 /* 1s */
1198 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1199 )
1200 {
1201 uint64_t u64Elapsed = RTTimeNanoTS();
1202 pVM->vmm.s.u64LastYield = u64Elapsed;
1203
1204 RTThreadYield();
1205
1206#ifdef LOG_ENABLED
1207 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1208 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1209#endif
1210 }
1211 TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1212}
1213#endif
1214
1215#ifdef VBOX_WITH_HWVIRT
1216
1217/**
1218 * Executes guest code (Intel VT-x and AMD-V).
1219 *
1220 * @param pVM The cross context VM structure.
1221 * @param pVCpu The cross context virtual CPU structure.
1222 */
1223VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1224{
1225# if defined(VBOX_VMM_TARGET_ARMV8)
1226 /* We should actually never get here as the only execution engine is NEM. */
1227 RT_NOREF(pVM, pVCpu);
1228 AssertReleaseFailed();
1229 return VERR_NOT_SUPPORTED;
1230# else
1231 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1232
1233 int rc;
1234 do
1235 {
1236# ifdef NO_SUPCALLR0VMM
1237 rc = VERR_GENERAL_FAILURE;
1238# else
1239 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1240 if (RT_LIKELY(rc == VINF_SUCCESS))
1241 rc = pVCpu->vmm.s.iLastGZRc;
1242# endif
1243 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1244
1245# if 0 /** @todo triggers too often */
1246 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1247# endif
1248
1249 /*
1250 * Flush the logs
1251 */
1252# ifdef LOG_ENABLED
1253 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
1254# endif
1255 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
1256 if (rc != VERR_VMM_RING0_ASSERTION)
1257 {
1258 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1259 return rc;
1260 }
1261 return vmmR3HandleRing0Assert(pVM, pVCpu);
1262# endif
1263}
1264#endif /* VBOX_WITH_HWVIRT */
1265
1266
1267#if defined(VBOX_VMM_TARGET_ARMV8)
1268
1269/**
1270 * VCPU worker for VMMR3CpuOn.
1271 *
1272 * @param pVM The cross context VM structure.
1273 * @param idCpu Virtual CPU to perform SIPI on.
1274 * @param GCPhysExecAddr The guest physical address to start executing at.
1275 * @param u64CtxId The context ID passed in x0/w0.
1276 */
1277static DECLCALLBACK(int) vmmR3CpuOn(PVM pVM, VMCPUID idCpu, RTGCPHYS GCPhysExecAddr, uint64_t u64CtxId)
1278{
1279 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1280 VMCPU_ASSERT_EMT(pVCpu);
1281
1282 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1283 return VINF_SUCCESS;
1284
1285 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1286
1287 pCtx->aGRegs[ARMV8_AARCH64_REG_X0].x = u64CtxId;
1288 pCtx->Pc.u64 = GCPhysExecAddr;
1289
1290 Log(("vmmR3CpuOn for VCPU %d with GCPhysExecAddr=%RGp u64CtxId=%#RX64\n", idCpu, GCPhysExecAddr, u64CtxId));
1291
1292# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1293 EMSetState(pVCpu, EMSTATE_HALTED);
1294 return VINF_EM_RESCHEDULE;
1295# else /* And if we go the VMCPU::enmState way it can stay here. */
1296 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1297 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1298 return VINF_SUCCESS;
1299# endif
1300}
1301
1302
1303/**
1304 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1305 * vector-dependent state and unhalting processor.
1306 *
1307 * @param pVM The cross context VM structure.
1308 * @param idCpu Virtual CPU to perform SIPI on.
1309 * @param GCPhysExecAddr The guest physical address to start executing at.
1310 * @param u64CtxId The context ID passed in x0/w0.
1311 */
1312VMMR3_INT_DECL(void) VMMR3CpuOn(PVM pVM, VMCPUID idCpu, RTGCPHYS GCPhysExecAddr, uint64_t u64CtxId)
1313{
1314 AssertReturnVoid(idCpu < pVM->cCpus);
1315
1316 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3CpuOn, 4, pVM, idCpu, GCPhysExecAddr, u64CtxId);
1317 AssertRC(rc);
1318}
1319
1320#else /* !VBOX_VMM_TARGET_ARMV8 */
1321
1322/**
1323 * VCPU worker for VMMR3SendStartupIpi.
1324 *
1325 * @param pVM The cross context VM structure.
1326 * @param idCpu Virtual CPU to perform SIPI on.
1327 * @param uVector The SIPI vector.
1328 */
1329static DECLCALLBACK(int) vmmR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1330{
1331 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1332 VMCPU_ASSERT_EMT(pVCpu);
1333
1334 /*
1335 * In the INIT state, the target CPU is only responsive to an SIPI.
1336 * This is also true for when when the CPU is in VMX non-root mode.
1337 *
1338 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1339 * See Intel spec. 26.6.2 "Activity State".
1340 */
1341 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1342 return VINF_SUCCESS;
1343
1344 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1345# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1346 if (CPUMIsGuestInVmxRootMode(pCtx))
1347 {
1348 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1349 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1350 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1351
1352 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1353 return VINF_SUCCESS;
1354 }
1355# endif
1356
1357 pCtx->cs.Sel = uVector << 8;
1358 pCtx->cs.ValidSel = uVector << 8;
1359 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1360 pCtx->cs.u64Base = uVector << 12;
1361 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1362 pCtx->rip = 0;
1363
1364 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1365
1366# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1367 EMSetState(pVCpu, EMSTATE_HALTED);
1368 return VINF_EM_RESCHEDULE;
1369# else /* And if we go the VMCPU::enmState way it can stay here. */
1370 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1371 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1372 return VINF_SUCCESS;
1373# endif
1374}
1375
1376
1377/**
1378 * VCPU worker for VMMR3SendInitIpi.
1379 *
1380 * @returns VBox status code.
1381 * @param pVM The cross context VM structure.
1382 * @param idCpu Virtual CPU to perform SIPI on.
1383 */
1384static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1385{
1386 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
1387 VMCPU_ASSERT_EMT(pVCpu);
1388
1389 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1390
1391 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1392 * wait-for-SIPI state. Verify. */
1393
1394 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1395# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1396 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1397 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1398 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1399# endif
1400
1401 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1402 * IPI (e.g. SVM_EXIT_INIT). */
1403
1404 PGMR3ResetCpu(pVM, pVCpu);
1405 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1406# if !defined(VBOX_VMM_TARGET_ARMV8)
1407 PDMR3ApicInitIpi(pVCpu);
1408# endif
1409 TRPMR3ResetCpu(pVCpu);
1410 CPUMR3ResetCpu(pVM, pVCpu);
1411 EMR3ResetCpu(pVCpu);
1412 HMR3ResetCpu(pVCpu);
1413 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1414
1415 /* This will trickle up on the target EMT. */
1416 return VINF_EM_WAIT_SIPI;
1417}
1418
1419
1420/**
1421 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1422 * vector-dependent state and unhalting processor.
1423 *
1424 * @param pVM The cross context VM structure.
1425 * @param idCpu Virtual CPU to perform SIPI on.
1426 * @param uVector SIPI vector.
1427 */
1428VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1429{
1430 AssertReturnVoid(idCpu < pVM->cCpus);
1431
1432 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStartupIpi, 3, pVM, idCpu, uVector);
1433 AssertRC(rc);
1434}
1435
1436
1437/**
1438 * Sends init IPI to the virtual CPU.
1439 *
1440 * @param pVM The cross context VM structure.
1441 * @param idCpu Virtual CPU to perform int IPI on.
1442 */
1443VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1444{
1445 AssertReturnVoid(idCpu < pVM->cCpus);
1446
1447 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1448 AssertRC(rc);
1449}
1450
1451#endif /* !VBOX_VMM_TARGET_ARMV8 */
1452
1453/**
1454 * Registers the guest memory range that can be used for patching.
1455 *
1456 * @returns VBox status code.
1457 * @param pVM The cross context VM structure.
1458 * @param pPatchMem Patch memory range.
1459 * @param cbPatchMem Size of the memory range.
1460 */
1461VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1462{
1463 VM_ASSERT_EMT(pVM);
1464 if (HMIsEnabled(pVM))
1465 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1466
1467 return VERR_NOT_SUPPORTED;
1468}
1469
1470
1471/**
1472 * Deregisters the guest memory range that can be used for patching.
1473 *
1474 * @returns VBox status code.
1475 * @param pVM The cross context VM structure.
1476 * @param pPatchMem Patch memory range.
1477 * @param cbPatchMem Size of the memory range.
1478 */
1479VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1480{
1481 if (HMIsEnabled(pVM))
1482 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1483
1484 return VINF_SUCCESS;
1485}
1486
1487
1488/**
1489 * Common recursion handler for the other EMTs.
1490 *
1491 * @returns Strict VBox status code.
1492 * @param pVM The cross context VM structure.
1493 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1494 * @param rcStrict Current status code to be combined with the one
1495 * from this recursion and returned.
1496 */
1497static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1498{
1499 int rc2;
1500
1501 /*
1502 * We wait here while the initiator of this recursion reconfigures
1503 * everything. The last EMT to get in signals the initiator.
1504 */
1505 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1506 {
1507 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1508 AssertLogRelRC(rc2);
1509 }
1510
1511 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1512 AssertLogRelRC(rc2);
1513
1514 /*
1515 * Do the normal rendezvous processing.
1516 */
1517 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1518 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1519
1520 /*
1521 * Wait for the initiator to restore everything.
1522 */
1523 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1524 AssertLogRelRC(rc2);
1525
1526 /*
1527 * Last thread out of here signals the initiator.
1528 */
1529 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1530 {
1531 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1532 AssertLogRelRC(rc2);
1533 }
1534
1535 /*
1536 * Merge status codes and return.
1537 */
1538 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1539 if ( rcStrict2 != VINF_SUCCESS
1540 && ( rcStrict == VINF_SUCCESS
1541 || rcStrict > rcStrict2))
1542 rcStrict = rcStrict2;
1543 return rcStrict;
1544}
1545
1546
1547/**
1548 * Count returns and have the last non-caller EMT wake up the caller.
1549 *
1550 * @returns VBox strict informational status code for EM scheduling. No failures
1551 * will be returned here, those are for the caller only.
1552 *
1553 * @param pVM The cross context VM structure.
1554 * @param rcStrict The current accumulated recursive status code,
1555 * to be merged with i32RendezvousStatus and
1556 * returned.
1557 */
1558DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1559{
1560 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1561
1562 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1563 if (cReturned == pVM->cCpus - 1U)
1564 {
1565 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1566 AssertLogRelRC(rc);
1567 }
1568
1569 /*
1570 * Merge the status codes, ignoring error statuses in this code path.
1571 */
1572 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1573 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1574 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1575 VERR_IPE_UNEXPECTED_INFO_STATUS);
1576
1577 if (RT_SUCCESS(rcStrict2))
1578 {
1579 if ( rcStrict2 != VINF_SUCCESS
1580 && ( rcStrict == VINF_SUCCESS
1581 || rcStrict > rcStrict2))
1582 rcStrict = rcStrict2;
1583 }
1584 return rcStrict;
1585}
1586
1587
1588/**
1589 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1590 *
1591 * @returns VBox strict informational status code for EM scheduling. No failures
1592 * will be returned here, those are for the caller only. When
1593 * fIsCaller is set, VINF_SUCCESS is always returned.
1594 *
1595 * @param pVM The cross context VM structure.
1596 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1597 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1598 * not.
1599 * @param fFlags The flags.
1600 * @param pfnRendezvous The callback.
1601 * @param pvUser The user argument for the callback.
1602 */
1603static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1604 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1605{
1606 int rc;
1607 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1608
1609 /*
1610 * Enter, the last EMT triggers the next callback phase.
1611 */
1612 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1613 if (cEntered != pVM->cCpus)
1614 {
1615 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1616 {
1617 /* Wait for our turn. */
1618 for (;;)
1619 {
1620 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1621 AssertLogRelRC(rc);
1622 if (!pVM->vmm.s.fRendezvousRecursion)
1623 break;
1624 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1625 }
1626 }
1627 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1628 {
1629 /* Wait for the last EMT to arrive and wake everyone up. */
1630 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1631 AssertLogRelRC(rc);
1632 Assert(!pVM->vmm.s.fRendezvousRecursion);
1633 }
1634 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1635 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1636 {
1637 /* Wait for our turn. */
1638 for (;;)
1639 {
1640 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1641 AssertLogRelRC(rc);
1642 if (!pVM->vmm.s.fRendezvousRecursion)
1643 break;
1644 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1645 }
1646 }
1647 else
1648 {
1649 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1650
1651 /*
1652 * The execute once is handled specially to optimize the code flow.
1653 *
1654 * The last EMT to arrive will perform the callback and the other
1655 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1656 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1657 * returns, that EMT will initiate the normal return sequence.
1658 */
1659 if (!fIsCaller)
1660 {
1661 for (;;)
1662 {
1663 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1664 AssertLogRelRC(rc);
1665 if (!pVM->vmm.s.fRendezvousRecursion)
1666 break;
1667 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1668 }
1669
1670 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1671 }
1672 return VINF_SUCCESS;
1673 }
1674 }
1675 else
1676 {
1677 /*
1678 * All EMTs are waiting, clear the FF and take action according to the
1679 * execution method.
1680 */
1681 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1682
1683 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1684 {
1685 /* Wake up everyone. */
1686 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1687 AssertLogRelRC(rc);
1688 }
1689 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1690 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1691 {
1692 /* Figure out who to wake up and wake it up. If it's ourself, then
1693 it's easy otherwise wait for our turn. */
1694 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1695 ? 0
1696 : pVM->cCpus - 1U;
1697 if (pVCpu->idCpu != iFirst)
1698 {
1699 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1700 AssertLogRelRC(rc);
1701 for (;;)
1702 {
1703 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1704 AssertLogRelRC(rc);
1705 if (!pVM->vmm.s.fRendezvousRecursion)
1706 break;
1707 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1708 }
1709 }
1710 }
1711 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1712 }
1713
1714
1715 /*
1716 * Do the callback and update the status if necessary.
1717 */
1718 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1719 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1720 {
1721 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1722 if (rcStrict2 != VINF_SUCCESS)
1723 {
1724 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1725 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1726 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1727 int32_t i32RendezvousStatus;
1728 do
1729 {
1730 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1731 if ( rcStrict2 == i32RendezvousStatus
1732 || RT_FAILURE(i32RendezvousStatus)
1733 || ( i32RendezvousStatus != VINF_SUCCESS
1734 && rcStrict2 > i32RendezvousStatus))
1735 break;
1736 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1737 }
1738 }
1739
1740 /*
1741 * Increment the done counter and take action depending on whether we're
1742 * the last to finish callback execution.
1743 */
1744 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1745 if ( cDone != pVM->cCpus
1746 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1747 {
1748 /* Signal the next EMT? */
1749 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1750 {
1751 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1752 AssertLogRelRC(rc);
1753 }
1754 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1755 {
1756 Assert(cDone == pVCpu->idCpu + 1U);
1757 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1758 AssertLogRelRC(rc);
1759 }
1760 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1761 {
1762 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1763 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1764 AssertLogRelRC(rc);
1765 }
1766
1767 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1768 if (!fIsCaller)
1769 {
1770 for (;;)
1771 {
1772 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1773 AssertLogRelRC(rc);
1774 if (!pVM->vmm.s.fRendezvousRecursion)
1775 break;
1776 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1777 }
1778 }
1779 }
1780 else
1781 {
1782 /* Callback execution is all done, tell the rest to return. */
1783 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1784 AssertLogRelRC(rc);
1785 }
1786
1787 if (!fIsCaller)
1788 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1789 return rcStrictRecursion;
1790}
1791
1792
1793/**
1794 * Called in response to VM_FF_EMT_RENDEZVOUS.
1795 *
1796 * @returns VBox strict status code - EM scheduling. No errors will be returned
1797 * here, nor will any non-EM scheduling status codes be returned.
1798 *
1799 * @param pVM The cross context VM structure.
1800 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1801 *
1802 * @thread EMT
1803 */
1804VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1805{
1806 Assert(!pVCpu->vmm.s.fInRendezvous);
1807 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1808 pVCpu->vmm.s.fInRendezvous = true;
1809 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1810 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1811 pVCpu->vmm.s.fInRendezvous = false;
1812 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1813 return VBOXSTRICTRC_TODO(rcStrict);
1814}
1815
1816
1817/**
1818 * Helper for resetting an single wakeup event sempahore.
1819 *
1820 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1821 * @param hEvt The event semaphore to reset.
1822 */
1823static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1824{
1825 for (uint32_t cLoops = 0; ; cLoops++)
1826 {
1827 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1828 if (rc != VINF_SUCCESS || cLoops > _4K)
1829 return rc;
1830 }
1831}
1832
1833
1834/**
1835 * Worker for VMMR3EmtRendezvous that handles recursion.
1836 *
1837 * @returns VBox strict status code. This will be the first error,
1838 * VINF_SUCCESS, or an EM scheduling status code.
1839 *
1840 * @param pVM The cross context VM structure.
1841 * @param pVCpu The cross context virtual CPU structure of the
1842 * calling EMT.
1843 * @param fFlags Flags indicating execution methods. See
1844 * grp_VMMR3EmtRendezvous_fFlags.
1845 * @param pfnRendezvous The callback.
1846 * @param pvUser User argument for the callback.
1847 *
1848 * @thread EMT(pVCpu)
1849 */
1850static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1851 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1852{
1853 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1854 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1855 Assert(pVCpu->vmm.s.fInRendezvous);
1856
1857 /*
1858 * Save the current state.
1859 */
1860 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1861 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1862 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1863 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1864 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1865
1866 /*
1867 * Check preconditions and save the current state.
1868 */
1869 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1870 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1871 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1872 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1873 VERR_INTERNAL_ERROR);
1874 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1875 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1876
1877 /*
1878 * Reset the recursion prep and pop semaphores.
1879 */
1880 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1881 AssertLogRelRCReturn(rc, rc);
1882 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1883 AssertLogRelRCReturn(rc, rc);
1884 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1885 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1886 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1887 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1888
1889 /*
1890 * Usher the other thread into the recursion routine.
1891 */
1892 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1893 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1894
1895 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1896 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1897 while (cLeft-- > 0)
1898 {
1899 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1900 AssertLogRelRC(rc);
1901 }
1902 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1903 {
1904 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1905 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1906 {
1907 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1908 AssertLogRelRC(rc);
1909 }
1910 }
1911 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1912 {
1913 Assert(cLeft == pVCpu->idCpu);
1914 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1915 {
1916 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1917 AssertLogRelRC(rc);
1918 }
1919 }
1920 else
1921 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1922 VERR_INTERNAL_ERROR_4);
1923
1924 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1925 AssertLogRelRC(rc);
1926 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1927 AssertLogRelRC(rc);
1928
1929
1930 /*
1931 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1932 */
1933 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1934 {
1935 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1936 AssertLogRelRC(rc);
1937 }
1938
1939 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1940
1941 /*
1942 * Clear the slate and setup the new rendezvous.
1943 */
1944 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1945 {
1946 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1947 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1948 }
1949 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1950 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1951 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1952 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1953
1954 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1955 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1956 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1957 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1958 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1959 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1960 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1961 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1962
1963 /*
1964 * We're ready to go now, do normal rendezvous processing.
1965 */
1966 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1967 AssertLogRelRC(rc);
1968
1969 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1970
1971 /*
1972 * The caller waits for the other EMTs to be done, return and waiting on the
1973 * pop semaphore.
1974 */
1975 for (;;)
1976 {
1977 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1978 AssertLogRelRC(rc);
1979 if (!pVM->vmm.s.fRendezvousRecursion)
1980 break;
1981 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1982 }
1983
1984 /*
1985 * Get the return code and merge it with the above recursion status.
1986 */
1987 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1988 if ( rcStrict2 != VINF_SUCCESS
1989 && ( rcStrict == VINF_SUCCESS
1990 || rcStrict > rcStrict2))
1991 rcStrict = rcStrict2;
1992
1993 /*
1994 * Restore the parent rendezvous state.
1995 */
1996 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1997 {
1998 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1999 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2000 }
2001 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2002 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2003 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2004 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2005
2006 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2007 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2008 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2009 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2010 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2011 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2012 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
2013
2014 /*
2015 * Usher the other EMTs back to their parent recursion routine, waiting
2016 * for them to all get there before we return (makes sure they've been
2017 * scheduled and are past the pop event sem, see below).
2018 */
2019 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2020 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2021 AssertLogRelRC(rc);
2022
2023 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2024 {
2025 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2026 AssertLogRelRC(rc);
2027 }
2028
2029 /*
2030 * We must reset the pop semaphore on the way out (doing the pop caller too,
2031 * just in case). The parent may be another recursion.
2032 */
2033 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2034 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2035
2036 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2037
2038 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2039 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2040 return rcStrict;
2041}
2042
2043
2044/**
2045 * EMT rendezvous.
2046 *
2047 * Gathers all the EMTs and execute some code on each of them, either in a one
2048 * by one fashion or all at once.
2049 *
2050 * @returns VBox strict status code. This will be the first error,
2051 * VINF_SUCCESS, or an EM scheduling status code.
2052 *
2053 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2054 * doesn't support it or if the recursion is too deep.
2055 *
2056 * @param pVM The cross context VM structure.
2057 * @param fFlags Flags indicating execution methods. See
2058 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2059 * descending and ascending rendezvous types support
2060 * recursion from inside @a pfnRendezvous.
2061 * @param pfnRendezvous The callback.
2062 * @param pvUser User argument for the callback.
2063 *
2064 * @thread Any.
2065 */
2066VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2067{
2068 /*
2069 * Validate input.
2070 */
2071 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2072 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2073 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2074 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2075 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2076 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2077 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2078 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2079
2080 VBOXSTRICTRC rcStrict;
2081 PVMCPU pVCpu = VMMGetCpu(pVM);
2082 if (!pVCpu)
2083 {
2084 /*
2085 * Forward the request to an EMT thread.
2086 */
2087 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2088 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2089 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2090 else
2091 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2092 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2093 }
2094 else if ( pVM->cCpus == 1
2095 || ( pVM->enmVMState == VMSTATE_DESTROYING
2096 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2097 {
2098 /*
2099 * Shortcut for the single EMT case.
2100 *
2101 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2102 * during vmR3Destroy after other emulation threads have started terminating.
2103 */
2104 if (!pVCpu->vmm.s.fInRendezvous)
2105 {
2106 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2107 pVCpu->vmm.s.fInRendezvous = true;
2108 pVM->vmm.s.fRendezvousFlags = fFlags;
2109 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2110 pVCpu->vmm.s.fInRendezvous = false;
2111 }
2112 else
2113 {
2114 /* Recursion. Do the same checks as in the SMP case. */
2115 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2116 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2117 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2118 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2119 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2120 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2121 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2122 , VERR_DEADLOCK);
2123
2124 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2125 pVM->vmm.s.cRendezvousRecursions++;
2126 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2127 pVM->vmm.s.fRendezvousFlags = fFlags;
2128
2129 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2130
2131 pVM->vmm.s.fRendezvousFlags = fParentFlags;
2132 pVM->vmm.s.cRendezvousRecursions--;
2133 }
2134 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2135 }
2136 else
2137 {
2138 /*
2139 * Spin lock. If busy, check for recursion, if not recursing wait for
2140 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2141 */
2142 int rc;
2143 rcStrict = VINF_SUCCESS;
2144 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2145 {
2146 /* Allow recursion in some cases. */
2147 if ( pVCpu->vmm.s.fInRendezvous
2148 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2149 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2150 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2151 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2152 ))
2153 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2154
2155 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2156 VERR_DEADLOCK);
2157
2158 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2159 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2160 {
2161 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2162 {
2163 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2164 if ( rc != VINF_SUCCESS
2165 && ( rcStrict == VINF_SUCCESS
2166 || rcStrict > rc))
2167 rcStrict = rc;
2168 /** @todo Perhaps deal with termination here? */
2169 }
2170 ASMNopPause();
2171 }
2172 }
2173
2174 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2175 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2176 Assert(!pVCpu->vmm.s.fInRendezvous);
2177 pVCpu->vmm.s.fInRendezvous = true;
2178
2179 /*
2180 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2181 */
2182 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2183 {
2184 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2185 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2186 }
2187 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2188 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2189 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2190 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2191 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2192 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2193 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2194 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2195 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2196 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2197 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2198
2199 /*
2200 * Set the FF and poke the other EMTs.
2201 */
2202 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2203 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2204
2205 /*
2206 * Do the same ourselves.
2207 */
2208 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2209
2210 /*
2211 * The caller waits for the other EMTs to be done and return before doing
2212 * the cleanup. This makes away with wakeup / reset races we would otherwise
2213 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2214 */
2215 for (;;)
2216 {
2217 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2218 AssertLogRelRC(rc);
2219 if (!pVM->vmm.s.fRendezvousRecursion)
2220 break;
2221 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2222 }
2223
2224 /*
2225 * Get the return code and clean up a little bit.
2226 */
2227 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2228 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2229
2230 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2231 pVCpu->vmm.s.fInRendezvous = false;
2232
2233 /*
2234 * Merge rcStrict, rcStrict2 and rcStrict3.
2235 */
2236 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2237 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2238 if ( rcStrict2 != VINF_SUCCESS
2239 && ( rcStrict == VINF_SUCCESS
2240 || rcStrict > rcStrict2))
2241 rcStrict = rcStrict2;
2242 if ( rcStrict3 != VINF_SUCCESS
2243 && ( rcStrict == VINF_SUCCESS
2244 || rcStrict > rcStrict3))
2245 rcStrict = rcStrict3;
2246 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2247 }
2248
2249 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2250 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2251 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2252 VERR_IPE_UNEXPECTED_INFO_STATUS);
2253 return VBOXSTRICTRC_VAL(rcStrict);
2254}
2255
2256
2257/**
2258 * Interface for vmR3SetHaltMethodU.
2259 *
2260 * @param pVCpu The cross context virtual CPU structure of the
2261 * calling EMT.
2262 * @param fMayHaltInRing0 The new state.
2263 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2264 * @thread EMT(pVCpu)
2265 *
2266 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2267 * component.
2268 */
2269VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2270{
2271 LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2272 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2273 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2274}
2275
2276
2277/**
2278 * Read from the ring 0 jump buffer stack.
2279 *
2280 * @returns VBox status code.
2281 *
2282 * @param pVM The cross context VM structure.
2283 * @param idCpu The ID of the source CPU context (for the address).
2284 * @param R0Addr Where to start reading.
2285 * @param pvBuf Where to store the data we've read.
2286 * @param cbRead The number of bytes to read.
2287 */
2288VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2289{
2290 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2291 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2292 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2293
2294 /*
2295 * Hopefully we've got all the requested bits. If not supply what we
2296 * can and zero the remaining stuff.
2297 */
2298 RTHCUINTPTR off = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2299 if (off < pVCpu->vmm.s.AssertJmpBuf.cbStackValid)
2300 {
2301 size_t const cbValid = pVCpu->vmm.s.AssertJmpBuf.cbStackValid - off;
2302 if (cbRead <= cbValid)
2303 {
2304 memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbRead);
2305 return VINF_SUCCESS;
2306 }
2307
2308 memcpy(pvBuf, &pVCpu->vmm.s.abAssertStack[off], cbValid);
2309 RT_BZERO((uint8_t *)pvBuf + cbValid, cbRead - cbValid);
2310 }
2311 else
2312 RT_BZERO(pvBuf, cbRead);
2313
2314 /*
2315 * Supply the setjmp return RIP/EIP if requested.
2316 */
2317 if ( pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2318 && pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation < R0Addr + cbRead)
2319 {
2320 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue;
2321 size_t cbSrc = sizeof(pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcValue);
2322 size_t offDst = 0;
2323 if (R0Addr < pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2324 offDst = pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation - R0Addr;
2325 else if (R0Addr > pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation)
2326 {
2327 size_t offSrc = R0Addr - pVCpu->vmm.s.AssertJmpBuf.UnwindRetPcLocation;
2328 Assert(offSrc < cbSrc);
2329 pbSrc -= offSrc;
2330 cbSrc -= offSrc;
2331 }
2332 if (cbSrc > cbRead - offDst)
2333 cbSrc = cbRead - offDst;
2334 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2335
2336 //if (cbSrc == cbRead)
2337 // rc = VINF_SUCCESS;
2338 }
2339
2340 return VINF_SUCCESS;
2341}
2342
2343
2344/**
2345 * Used by the DBGF stack unwinder to initialize the register state.
2346 *
2347 * @param pUVM The user mode VM handle.
2348 * @param idCpu The ID of the CPU being unwound.
2349 * @param pState The unwind state to initialize.
2350 */
2351VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2352{
2353 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2354 AssertReturnVoid(pVCpu);
2355
2356 /*
2357 * This is all we really need here if we had proper unwind info (win64 only)...
2358 */
2359 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.AssertJmpBuf.UnwindBp;
2360 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindSp;
2361 pState->uPc = pVCpu->vmm.s.AssertJmpBuf.UnwindPc;
2362
2363 /*
2364 * Locate the resume point on the stack.
2365 */
2366#ifdef RT_ARCH_AMD64
2367 /* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-amd64.asm exactly. */
2368 uintptr_t off = 0;
2369# ifdef RT_OS_WINDOWS
2370 off += 0xa0; /* XMM6 thru XMM15 */
2371# endif
2372 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2373 off += 8;
2374 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2375 off += 8;
2376# ifdef RT_OS_WINDOWS
2377 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2378 off += 8;
2379 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2380 off += 8;
2381# endif
2382 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2383 off += 8;
2384 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2385 off += 8;
2386 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2387 off += 8;
2388 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2389 off += 8;
2390 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2391 off += 8;
2392 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.abAssertStack[off];
2393 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2394
2395#elif defined(RT_ARCH_X86)
2396 /* This code must match the vmmR0CallRing3LongJmp stack frame setup in VMMR0JmpA-x86.asm exactly. */
2397 uintptr_t off = 0;
2398 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2399 off += 4;
2400 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2401 off += 4;
2402 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2403 off += 4;
2404 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2405 off += 4;
2406 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2407 off += 4;
2408 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.abAssertStack[off];
2409 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.AssertJmpBuf.UnwindRetSp;
2410
2411#elif defined(RT_ARCH_ARM64)
2412 /** @todo PORTME: arm ring-0 */
2413
2414#else
2415# error "Port me"
2416#endif
2417}
2418
2419
2420/**
2421 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2422 *
2423 * @returns VBox status code.
2424 * @param pVM The cross context VM structure.
2425 * @param uOperation Operation to execute.
2426 * @param u64Arg Constant argument.
2427 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2428 * details.
2429 */
2430VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2431{
2432 PVMCPU pVCpu = VMMGetCpu(pVM);
2433 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2434 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2435}
2436
2437
2438/**
2439 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2440 *
2441 * @returns VBox status code.
2442 * @param pVM The cross context VM structure.
2443 * @param pVCpu The cross context VM structure.
2444 * @param enmOperation Operation to execute.
2445 * @param u64Arg Constant argument.
2446 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2447 * details.
2448 */
2449VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2450{
2451 /*
2452 * Call ring-0.
2453 */
2454#ifdef NO_SUPCALLR0VMM
2455 int rc = VERR_GENERAL_FAILURE;
2456#else
2457 int rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2458#endif
2459
2460 /*
2461 * Flush the logs and deal with ring-0 assertions.
2462 */
2463#ifdef LOG_ENABLED
2464 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.Logger, NULL);
2465#endif
2466 VMM_FLUSH_R0_LOG(pVM, pVCpu, &pVCpu->vmm.s.u.s.RelLogger, RTLogRelGetDefaultInstance());
2467 if (rc != VERR_VMM_RING0_ASSERTION)
2468 {
2469 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2470 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2471 VERR_IPE_UNEXPECTED_INFO_STATUS);
2472 return rc;
2473 }
2474 return vmmR3HandleRing0Assert(pVM, pVCpu);
2475}
2476
2477
2478/**
2479 * Logs a ring-0 assertion ASAP after returning to ring-3.
2480 *
2481 * @returns VBox status code.
2482 * @param pVM The cross context VM structure.
2483 * @param pVCpu The cross context virtual CPU structure.
2484 */
2485static int vmmR3HandleRing0Assert(PVM pVM, PVMCPU pVCpu)
2486{
2487 RT_NOREF(pVCpu);
2488 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2489 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2490 return VERR_VMM_RING0_ASSERTION;
2491}
2492
2493
2494/**
2495 * Displays the Force action Flags.
2496 *
2497 * @param pVM The cross context VM structure.
2498 * @param pHlp The output helpers.
2499 * @param pszArgs The additional arguments (ignored).
2500 */
2501static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2502{
2503 int c;
2504 uint32_t f;
2505 NOREF(pszArgs);
2506
2507#define PRINT_FLAG(prf,flag) do { \
2508 if (f & (prf##flag)) \
2509 { \
2510 static const char *s_psz = #flag; \
2511 if (!(c % 6)) \
2512 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2513 else \
2514 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2515 c++; \
2516 f &= ~(prf##flag); \
2517 } \
2518 } while (0)
2519
2520#define PRINT_GROUP(prf,grp,sfx) do { \
2521 if (f & (prf##grp##sfx)) \
2522 { \
2523 static const char *s_psz = #grp; \
2524 if (!(c % 5)) \
2525 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2526 else \
2527 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2528 c++; \
2529 } \
2530 } while (0)
2531
2532 /*
2533 * The global flags.
2534 */
2535 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2536 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2537
2538 /* show the flag mnemonics */
2539 c = 0;
2540 f = fGlobalForcedActions;
2541 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2542 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2543 PRINT_FLAG(VM_FF_,PDM_DMA);
2544 PRINT_FLAG(VM_FF_,DBGF);
2545 PRINT_FLAG(VM_FF_,REQUEST);
2546 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2547 PRINT_FLAG(VM_FF_,RESET);
2548 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2549 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2550 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2551 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2552 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2553 if (f)
2554 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2555 else
2556 pHlp->pfnPrintf(pHlp, "\n");
2557
2558 /* the groups */
2559 c = 0;
2560 f = fGlobalForcedActions;
2561 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2562 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2563 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2564 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2565 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2566 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2567 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2568 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2569 if (c)
2570 pHlp->pfnPrintf(pHlp, "\n");
2571
2572 /*
2573 * Per CPU flags.
2574 */
2575 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2576 {
2577 PVMCPU pVCpu = pVM->apCpusR3[i];
2578 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2579 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2580
2581 /* show the flag mnemonics */
2582 c = 0;
2583 f = fLocalForcedActions;
2584#if defined(VBOX_VMM_TARGET_ARMV8)
2585 PRINT_FLAG(VMCPU_FF_,INTERRUPT_IRQ);
2586 PRINT_FLAG(VMCPU_FF_,INTERRUPT_FIQ);
2587#else
2588 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2589 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2590#endif
2591 PRINT_FLAG(VMCPU_FF_,TIMER);
2592 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2593 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2594 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2595 PRINT_FLAG(VMCPU_FF_,UNHALT);
2596 PRINT_FLAG(VMCPU_FF_,IEM);
2597 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2598 PRINT_FLAG(VMCPU_FF_,DBGF);
2599 PRINT_FLAG(VMCPU_FF_,REQUEST);
2600 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2601 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2602 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2603 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2604 PRINT_FLAG(VMCPU_FF_,TO_R3);
2605 PRINT_FLAG(VMCPU_FF_,IOM);
2606 if (f)
2607 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2608 else
2609 pHlp->pfnPrintf(pHlp, "\n");
2610
2611 /* the groups */
2612 c = 0;
2613 f = fLocalForcedActions;
2614 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2615 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2616 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2617 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2618 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2619 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2620 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2621 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2622 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2623 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2624 if (c)
2625 pHlp->pfnPrintf(pHlp, "\n");
2626 }
2627
2628#undef PRINT_FLAG
2629#undef PRINT_GROUP
2630}
2631
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette