VMM.cpp@ 37507

Last change on this file since 37507 was 37452, checked in by vboxsync, 14 years ago
IOM,PDMCritSect: Extended PDMCritSectEnter to handle rcBusy=VINF_SUCCESS as a request to call ring-3 to acquire a busy lock. Implemented device level locking in the MMIO code.
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File size: 85.8 KB

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1	/* $Id: VMM.cpp 37452 2011-06-14 18:13:48Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*
48	* @sections sec_vmm_limits VMM Limits
49	*
50	* There are various resource limits imposed by the VMM and it's
51	* sub-components. We'll list some of them here.
52	*
53	* On 64-bit hosts:
54	* - Max 1023 VMs. Imposed by GVMM's handle allocation
55	* (GVMM_MAX_HANDLES), can be increased up to 64K.
56	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58	* - A VM can be assigned all the memory we can use (16TB), however, the
59	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61	*
62	* On 32-bit hosts:
63	* - Max 127 VMs. Imposed by GMM's per page structure.
64	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65	* ROM pages. The limit is imposed by the 28-bit page ID used
66	* internally in GMM. It is also limited by PAE.
67	* - A VM can be assigned all the memory GMM can allocate, however, the
68	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70	*
71	*/
72
73	/*******************************************************************************
74	* Header Files *
75	*******************************************************************************/
76	#define LOG_GROUP LOG_GROUP_VMM
77	#include <VBox/vmm/vmm.h>
78	#include <VBox/vmm/vmapi.h>
79	#include <VBox/vmm/pgm.h>
80	#include <VBox/vmm/cfgm.h>
81	#include <VBox/vmm/pdmqueue.h>
82	#include <VBox/vmm/pdmcritsect.h>
83	#include <VBox/vmm/pdmapi.h>
84	#include <VBox/vmm/cpum.h>
85	#include <VBox/vmm/mm.h>
86	#include <VBox/vmm/iom.h>
87	#include <VBox/vmm/trpm.h>
88	#include <VBox/vmm/selm.h>
89	#include <VBox/vmm/em.h>
90	#include <VBox/sup.h>
91	#include <VBox/vmm/dbgf.h>
92	#include <VBox/vmm/csam.h>
93	#include <VBox/vmm/patm.h>
94	#include <VBox/vmm/rem.h>
95	#include <VBox/vmm/ssm.h>
96	#include <VBox/vmm/tm.h>
97	#include "VMMInternal.h"
98	#include "VMMSwitcher.h"
99	#include <VBox/vmm/vm.h>
100	#include <VBox/vmm/ftm.h>
101
102	#include <VBox/err.h>
103	#include <VBox/param.h>
104	#include <VBox/version.h>
105	#include <VBox/x86.h>
106	#include <VBox/vmm/hwaccm.h>
107	#include <iprt/assert.h>
108	#include <iprt/alloc.h>
109	#include <iprt/asm.h>
110	#include <iprt/time.h>
111	#include <iprt/semaphore.h>
112	#include <iprt/stream.h>
113	#include <iprt/string.h>
114	#include <iprt/stdarg.h>
115	#include <iprt/ctype.h>
116
117
118
119	/*******************************************************************************
120	* Defined Constants And Macros *
121	*******************************************************************************/
122	/** The saved state version. */
123	#define VMM_SAVED_STATE_VERSION 4
124	/** The saved state version used by v3.0 and earlier. (Teleportation) */
125	#define VMM_SAVED_STATE_VERSION_3_0 3
126
127
128	/*******************************************************************************
129	* Internal Functions *
130	*******************************************************************************/
131	static int vmmR3InitStacks(PVM pVM);
132	static int vmmR3InitLoggers(PVM pVM);
133	static void vmmR3InitRegisterStats(PVM pVM);
134	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
135	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
136	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
137	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
138	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
139
140
141	/**
142	* Initializes the VMM.
143	*
144	* @returns VBox status code.
145	* @param pVM The VM to operate on.
146	*/
147	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
148	{
149	LogFlow(("VMMR3Init\n"));
150
151	/*
152	* Assert alignment, sizes and order.
153	*/
154	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
155	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
156	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
157
158	/*
159	* Init basic VM VMM members.
160	*/
161	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
162	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
163	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
164	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
165	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
166	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
167
168	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
169	* The EMT yield interval. The EMT yielding is a hack we employ to play a
170	* bit nicer with the rest of the system (like for instance the GUI).
171	*/
172	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
173	23 /* Value arrived at after experimenting with the grub boot prompt. */);
174	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
175
176
177	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
178	* Controls whether we employ per-cpu preemption timers to limit the time
179	* spent executing guest code. This option is not available on all
180	* platforms and we will silently ignore this setting then. If we are
181	* running in VT-x mode, we will use the VMX-preemption timer instead of
182	* this one when possible.
183	*/
184	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
185	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
186	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
187
188	/*
189	* Initialize the VMM sync critical section and semaphores.
190	*/
191	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
192	AssertRCReturn(rc, rc);
193	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
194	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
195	return VERR_NO_MEMORY;
196	for (VMCPUID i = 0; i < pVM->cCpus; i++)
197	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
198	for (VMCPUID i = 0; i < pVM->cCpus; i++)
199	{
200	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
201	AssertRCReturn(rc, rc);
202	}
203	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
204	AssertRCReturn(rc, rc);
205	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
206	AssertRCReturn(rc, rc);
207	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
208	AssertRCReturn(rc, rc);
209	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
210	AssertRCReturn(rc, rc);
211
212	/* GC switchers are enabled by default. Turned off by HWACCM. */
213	pVM->vmm.s.fSwitcherDisabled = false;
214
215	/*
216	* Register the saved state data unit.
217	*/
218	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
219	NULL, NULL, NULL,
220	NULL, vmmR3Save, NULL,
221	NULL, vmmR3Load, NULL);
222	if (RT_FAILURE(rc))
223	return rc;
224
225	/*
226	* Register the Ring-0 VM handle with the session for fast ioctl calls.
227	*/
228	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
229	if (RT_FAILURE(rc))
230	return rc;
231
232	/*
233	* Init various sub-components.
234	*/
235	rc = vmmR3SwitcherInit(pVM);
236	if (RT_SUCCESS(rc))
237	{
238	rc = vmmR3InitStacks(pVM);
239	if (RT_SUCCESS(rc))
240	{
241	rc = vmmR3InitLoggers(pVM);
242
243	#ifdef VBOX_WITH_NMI
244	/*
245	* Allocate mapping for the host APIC.
246	*/
247	if (RT_SUCCESS(rc))
248	{
249	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
250	AssertRC(rc);
251	}
252	#endif
253	if (RT_SUCCESS(rc))
254	{
255	/*
256	* Debug info and statistics.
257	*/
258	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
259	vmmR3InitRegisterStats(pVM);
260
261	return VINF_SUCCESS;
262	}
263	}
264	/** @todo: Need failure cleanup. */
265
266	//more todo in here?
267	//if (RT_SUCCESS(rc))
268	//{
269	//}
270	//int rc2 = vmmR3TermCoreCode(pVM);
271	//AssertRC(rc2));
272	}
273
274	return rc;
275	}
276
277
278	/**
279	* Allocate & setup the VMM RC stack(s) (for EMTs).
280	*
281	* The stacks are also used for long jumps in Ring-0.
282	*
283	* @returns VBox status code.
284	* @param pVM Pointer to the shared VM structure.
285	*
286	* @remarks The optional guard page gets it protection setup up during R3 init
287	* completion because of init order issues.
288	*/
289	static int vmmR3InitStacks(PVM pVM)
290	{
291	int rc = VINF_SUCCESS;
292	#ifdef VMM_R0_SWITCH_STACK
293	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
294	#else
295	uint32_t fFlags = 0;
296	#endif
297
298	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
299	{
300	PVMCPU pVCpu = &pVM->aCpus[idCpu];
301
302	#ifdef VBOX_STRICT_VMM_STACK
303	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
304	#else
305	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
306	#endif
307	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
308	if (RT_SUCCESS(rc))
309	{
310	#ifdef VBOX_STRICT_VMM_STACK
311	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
312	#endif
313	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
314	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
315	if (!VMMIsHwVirtExtForced(pVM))
316	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
317	else
318	#endif
319	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
320	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
321	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
322	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
323
324	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
325	}
326	}
327
328	return rc;
329	}
330
331
332	/**
333	* Initialize the loggers.
334	*
335	* @returns VBox status code.
336	* @param pVM Pointer to the shared VM structure.
337	*/
338	static int vmmR3InitLoggers(PVM pVM)
339	{
340	int rc;
341
342	/*
343	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
344	*/
345	#ifdef LOG_ENABLED
346	PRTLOGGER pLogger = RTLogDefaultInstance();
347	if (pLogger)
348	{
349	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
350	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
351	if (RT_FAILURE(rc))
352	return rc;
353	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
354
355	# ifdef VBOX_WITH_R0_LOGGING
356	for (VMCPUID i = 0; i < pVM->cCpus; i++)
357	{
358	PVMCPU pVCpu = &pVM->aCpus[i];
359
360	rc = MMR3HyperAllocOnceNoRelEx(pVM, RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[pLogger->cGroups]),
361	0, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
362	(void **)&pVCpu->vmm.s.pR0LoggerR3);
363	if (RT_FAILURE(rc))
364	return rc;
365	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
366	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
367	pVCpu->vmm.s.pR0LoggerR3->cbLogger = RT_OFFSETOF(RTLOGGER, afGroups[pLogger->cGroups]);
368	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
369	}
370	# endif
371	}
372	#endif /* LOG_ENABLED */
373
374	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
375	/*
376	* Allocate RC release logger instances (finalized in the relocator).
377	*/
378	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
379	if (pRelLogger)
380	{
381	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
382	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
383	if (RT_FAILURE(rc))
384	return rc;
385	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
386	}
387	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
388	return VINF_SUCCESS;
389	}
390
391
392	/**
393	* VMMR3Init worker that register the statistics with STAM.
394	*
395	* @param pVM The shared VM structure.
396	*/
397	static void vmmR3InitRegisterStats(PVM pVM)
398	{
399	/*
400	* Statistics.
401	*/
402	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
444	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
445	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
446	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
447	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
448	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
449	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
450	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
451	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
452	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
461
462	#ifdef VBOX_WITH_STATISTICS
463	for (VMCPUID i = 0; i < pVM->cCpus; i++)
464	{
465	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
466	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
467	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
468	}
469	#endif
470	}
471
472
473	/**
474	* Initializes the R0 VMM.
475	*
476	* @returns VBox status code.
477	* @param pVM The VM to operate on.
478	*/
479	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
480	{
481	int rc;
482	PVMCPU pVCpu = VMMGetCpu(pVM);
483	Assert(pVCpu && pVCpu->idCpu == 0);
484
485	#ifdef LOG_ENABLED
486	/*
487	* Initialize the ring-0 logger if we haven't done so yet.
488	*/
489	if ( pVCpu->vmm.s.pR0LoggerR3
490	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
491	{
492	rc = VMMR3UpdateLoggers(pVM);
493	if (RT_FAILURE(rc))
494	return rc;
495	}
496	#endif
497
498	/*
499	* Call Ring-0 entry with init code.
500	*/
501	for (;;)
502	{
503	#ifdef NO_SUPCALLR0VMM
504	//rc = VERR_GENERAL_FAILURE;
505	rc = VINF_SUCCESS;
506	#else
507	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
508	#endif
509	/*
510	* Flush the logs.
511	*/
512	#ifdef LOG_ENABLED
513	if ( pVCpu->vmm.s.pR0LoggerR3
514	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
515	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
516	#endif
517	if (rc != VINF_VMM_CALL_HOST)
518	break;
519	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
520	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
521	break;
522	/* Resume R0 */
523	}
524
525	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
526	{
527	LogRel(("R0 init failed, rc=%Rra\n", rc));
528	if (RT_SUCCESS(rc))
529	rc = VERR_INTERNAL_ERROR;
530	}
531	return rc;
532	}
533
534
535	/**
536	* Initializes the RC VMM.
537	*
538	* @returns VBox status code.
539	* @param pVM The VM to operate on.
540	*/
541	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
542	{
543	PVMCPU pVCpu = VMMGetCpu(pVM);
544	Assert(pVCpu && pVCpu->idCpu == 0);
545
546	/* In VMX mode, there's no need to init RC. */
547	if (pVM->vmm.s.fSwitcherDisabled)
548	return VINF_SUCCESS;
549
550	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
551
552	/*
553	* Call VMMGCInit():
554	* -# resolve the address.
555	* -# setup stackframe and EIP to use the trampoline.
556	* -# do a generic hypervisor call.
557	*/
558	RTRCPTR RCPtrEP;
559	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
560	if (RT_SUCCESS(rc))
561	{
562	CPUMHyperSetCtxCore(pVCpu, NULL);
563	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
564	uint64_t u64TS = RTTimeProgramStartNanoTS();
565	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
566	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
567	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
568	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
569	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
570	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
571	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
572	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
573	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
574
575	for (;;)
576	{
577	#ifdef NO_SUPCALLR0VMM
578	//rc = VERR_GENERAL_FAILURE;
579	rc = VINF_SUCCESS;
580	#else
581	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
582	#endif
583	#ifdef LOG_ENABLED
584	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
585	if ( pLogger
586	&& pLogger->offScratch > 0)
587	RTLogFlushRC(NULL, pLogger);
588	#endif
589	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
590	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
591	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
592	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
593	#endif
594	if (rc != VINF_VMM_CALL_HOST)
595	break;
596	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
597	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
598	break;
599	}
600
601	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
602	{
603	VMMR3FatalDump(pVM, pVCpu, rc);
604	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
605	rc = VERR_INTERNAL_ERROR;
606	}
607	AssertRC(rc);
608	}
609	return rc;
610	}
611
612
613	/**
614	* Called when an init phase completes.
615	*
616	* @returns VBox status code.
617	* @param pVM The VM handle.
618	* @param enmWhat Which init phase.
619	*/
620	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
621	{
622	int rc = VINF_SUCCESS;
623
624	switch (enmWhat)
625	{
626	case VMINITCOMPLETED_RING3:
627	{
628	/*
629	* Set page attributes to r/w for stack pages.
630	*/
631	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
632	{
633	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
634	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
635	AssertRCReturn(rc, rc);
636	}
637
638	/*
639	* Create the EMT yield timer.
640	*/
641	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
642	AssertRCReturn(rc, rc);
643
644	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
645	AssertRCReturn(rc, rc);
646
647	#ifdef VBOX_WITH_NMI
648	/*
649	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
650	*/
651	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
652	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
653	AssertRCReturn(rc, rc);
654	#endif
655
656	#ifdef VBOX_STRICT_VMM_STACK
657	/*
658	* Setup the stack guard pages: Two inaccessible pages at each sides of the
659	* stack to catch over/under-flows.
660	*/
661	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
662	{
663	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
664
665	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
666	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
667
668	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
669	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
670	}
671	pVM->vmm.s.fStackGuardsStationed = true;
672	#endif
673	break;
674	}
675
676	case VMINITCOMPLETED_RING0:
677	{
678	/*
679	* Disable the periodic preemption timers if we can use the
680	* VMX-preemption timer instead.
681	*/
682	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
683	&& HWACCMR3IsVmxPreemptionTimerUsed(pVM))
684	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
685	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
686	break;
687	}
688
689	default: /* shuts up gcc */
690	break;
691	}
692
693	return rc;
694	}
695
696
697	/**
698	* Terminate the VMM bits.
699	*
700	* @returns VINF_SUCCESS.
701	* @param pVM The VM handle.
702	*/
703	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
704	{
705	PVMCPU pVCpu = VMMGetCpu(pVM);
706	Assert(pVCpu && pVCpu->idCpu == 0);
707
708	/*
709	* Call Ring-0 entry with termination code.
710	*/
711	int rc;
712	for (;;)
713	{
714	#ifdef NO_SUPCALLR0VMM
715	//rc = VERR_GENERAL_FAILURE;
716	rc = VINF_SUCCESS;
717	#else
718	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
719	#endif
720	/*
721	* Flush the logs.
722	*/
723	#ifdef LOG_ENABLED
724	if ( pVCpu->vmm.s.pR0LoggerR3
725	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
726	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
727	#endif
728	if (rc != VINF_VMM_CALL_HOST)
729	break;
730	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
731	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
732	break;
733	/* Resume R0 */
734	}
735	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
736	{
737	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
738	if (RT_SUCCESS(rc))
739	rc = VERR_INTERNAL_ERROR;
740	}
741
742	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
743	for (VMCPUID i = 0; i < pVM->cCpus; i++)
744	{
745	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
746	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
747	}
748	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
749	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
750	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
751	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
752	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
753	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
754	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
755	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
756
757	#ifdef VBOX_STRICT_VMM_STACK
758	/*
759	* Make the two stack guard pages present again.
760	*/
761	if (pVM->vmm.s.fStackGuardsStationed)
762	{
763	for (VMCPUID i = 0; i < pVM->cCpus; i++)
764	{
765	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
766	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
767	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
768	}
769	pVM->vmm.s.fStackGuardsStationed = false;
770	}
771	#endif
772	return rc;
773	}
774
775
776	/**
777	* Applies relocations to data and code managed by this
778	* component. This function will be called at init and
779	* whenever the VMM need to relocate it self inside the GC.
780	*
781	* The VMM will need to apply relocations to the core code.
782	*
783	* @param pVM The VM handle.
784	* @param offDelta The relocation delta.
785	*/
786	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
787	{
788	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
789
790	/*
791	* Recalc the RC address.
792	*/
793	#ifdef VBOX_WITH_RAW_MODE
794	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
795	#endif
796
797	/*
798	* The stack.
799	*/
800	for (VMCPUID i = 0; i < pVM->cCpus; i++)
801	{
802	PVMCPU pVCpu = &pVM->aCpus[i];
803
804	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
805
806	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
807	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
808	}
809
810	/*
811	* All the switchers.
812	*/
813	vmmR3SwitcherRelocate(pVM, offDelta);
814
815	/*
816	* Get other RC entry points.
817	*/
818	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
819	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
820
821	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
822	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
823
824	/*
825	* Update the logger.
826	*/
827	VMMR3UpdateLoggers(pVM);
828	}
829
830
831	/**
832	* Updates the settings for the RC and R0 loggers.
833	*
834	* @returns VBox status code.
835	* @param pVM The VM handle.
836	*/
837	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
838	{
839	/*
840	* Simply clone the logger instance (for RC).
841	*/
842	int rc = VINF_SUCCESS;
843	RTRCPTR RCPtrLoggerFlush = 0;
844
845	if (pVM->vmm.s.pRCLoggerR3
846	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
847	\|\| pVM->vmm.s.pRCRelLoggerR3
848	#endif
849	)
850	{
851	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
852	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
853	}
854
855	if (pVM->vmm.s.pRCLoggerR3)
856	{
857	RTRCPTR RCPtrLoggerWrapper = 0;
858	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
859	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
860
861	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
862	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
863	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
864	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
865	}
866
867	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
868	if (pVM->vmm.s.pRCRelLoggerR3)
869	{
870	RTRCPTR RCPtrLoggerWrapper = 0;
871	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
872	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
873
874	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
875	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
876	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
877	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
878	}
879	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
880
881	#ifdef LOG_ENABLED
882	/*
883	* For the ring-0 EMT logger, we use a per-thread logger instance
884	* in ring-0. Only initialize it once.
885	*/
886	for (VMCPUID i = 0; i < pVM->cCpus; i++)
887	{
888	PVMCPU pVCpu = &pVM->aCpus[i];
889	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
890	if (pR0LoggerR3)
891	{
892	if (!pR0LoggerR3->fCreated)
893	{
894	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
895	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
896	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
897
898	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
899	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
900	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
901
902	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
903	(PFNRTLOGGER )&pfnLoggerWrapper, (PFNRTLOGFLUSH )&pfnLoggerFlush,
904	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
905	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
906
907	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
908	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
909	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
910	rc = RTLogSetCustomPrefixCallback(&pR0LoggerR3->Logger, (PFNRTLOGPREFIX )&pfnLoggerPrefix, NULL);
911	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
912
913	pR0LoggerR3->idCpu = i;
914	pR0LoggerR3->fCreated = true;
915	pR0LoggerR3->fFlushingDisabled = false;
916
917	}
918
919	rc = RTLogCopyGroupsAndFlags(&pR0LoggerR3->Logger, NULL /* default */, pVM->vmm.s.pRCLoggerR3->fFlags, RTLOGFLAGS_BUFFERED);
920	AssertRC(rc);
921	}
922	}
923	#endif
924	return rc;
925	}
926
927
928	/**
929	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
930	*
931	* @returns Pointer to the buffer.
932	* @param pVM The VM handle.
933	*/
934	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
935	{
936	if (HWACCMIsEnabled(pVM))
937	return pVM->vmm.s.szRing0AssertMsg1;
938
939	RTRCPTR RCPtr;
940	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
941	if (RT_SUCCESS(rc))
942	return (const char *)MMHyperRCToR3(pVM, RCPtr);
943
944	return NULL;
945	}
946
947
948	/**
949	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
950	*
951	* @returns Pointer to the buffer.
952	* @param pVM The VM handle.
953	*/
954	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
955	{
956	if (HWACCMIsEnabled(pVM))
957	return pVM->vmm.s.szRing0AssertMsg2;
958
959	RTRCPTR RCPtr;
960	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
961	if (RT_SUCCESS(rc))
962	return (const char *)MMHyperRCToR3(pVM, RCPtr);
963
964	return NULL;
965	}
966
967
968	/**
969	* Execute state save operation.
970	*
971	* @returns VBox status code.
972	* @param pVM VM Handle.
973	* @param pSSM SSM operation handle.
974	*/
975	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
976	{
977	LogFlow(("vmmR3Save:\n"));
978
979	/*
980	* Save the started/stopped state of all CPUs except 0 as it will always
981	* be running. This avoids breaking the saved state version. :-)
982	*/
983	for (VMCPUID i = 1; i < pVM->cCpus; i++)
984	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
985
986	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
987	}
988
989
990	/**
991	* Execute state load operation.
992	*
993	* @returns VBox status code.
994	* @param pVM VM Handle.
995	* @param pSSM SSM operation handle.
996	* @param uVersion Data layout version.
997	* @param uPass The data pass.
998	*/
999	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1000	{
1001	LogFlow(("vmmR3Load:\n"));
1002	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1003
1004	/*
1005	* Validate version.
1006	*/
1007	if ( uVersion != VMM_SAVED_STATE_VERSION
1008	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1009	{
1010	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1011	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1012	}
1013
1014	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1015	{
1016	/* Ignore the stack bottom, stack pointer and stack bits. */
1017	RTRCPTR RCPtrIgnored;
1018	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1019	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1020	#ifdef RT_OS_DARWIN
1021	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1022	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1023	&& SSMR3HandleRevision(pSSM) >= 48858
1024	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1025	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1026	)
1027	SSMR3Skip(pSSM, 16384);
1028	else
1029	SSMR3Skip(pSSM, 8192);
1030	#else
1031	SSMR3Skip(pSSM, 8192);
1032	#endif
1033	}
1034
1035	/*
1036	* Restore the VMCPU states. VCPU 0 is always started.
1037	*/
1038	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1039	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1040	{
1041	bool fStarted;
1042	int rc = SSMR3GetBool(pSSM, &fStarted);
1043	if (RT_FAILURE(rc))
1044	return rc;
1045	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1046	}
1047
1048	/* terminator */
1049	uint32_t u32;
1050	int rc = SSMR3GetU32(pSSM, &u32);
1051	if (RT_FAILURE(rc))
1052	return rc;
1053	if (u32 != UINT32_MAX)
1054	{
1055	AssertMsgFailed(("u32=%#x\n", u32));
1056	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1057	}
1058	return VINF_SUCCESS;
1059	}
1060
1061
1062	/**
1063	* Resolve a builtin RC symbol.
1064	*
1065	* Called by PDM when loading or relocating RC modules.
1066	*
1067	* @returns VBox status
1068	* @param pVM VM Handle.
1069	* @param pszSymbol Symbol to resolv
1070	* @param pRCPtrValue Where to store the symbol value.
1071	*
1072	* @remark This has to work before VMMR3Relocate() is called.
1073	*/
1074	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1075	{
1076	if (!strcmp(pszSymbol, "g_Logger"))
1077	{
1078	if (pVM->vmm.s.pRCLoggerR3)
1079	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1080	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1081	}
1082	else if (!strcmp(pszSymbol, "g_RelLogger"))
1083	{
1084	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1085	if (pVM->vmm.s.pRCRelLoggerR3)
1086	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1087	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1088	#else
1089	*pRCPtrValue = NIL_RTRCPTR;
1090	#endif
1091	}
1092	else
1093	return VERR_SYMBOL_NOT_FOUND;
1094	return VINF_SUCCESS;
1095	}
1096
1097
1098	/**
1099	* Suspends the CPU yielder.
1100	*
1101	* @param pVM The VM handle.
1102	*/
1103	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1104	{
1105	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1106	if (!pVM->vmm.s.cYieldResumeMillies)
1107	{
1108	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1109	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1110	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1111	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1112	else
1113	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1114	TMTimerStop(pVM->vmm.s.pYieldTimer);
1115	}
1116	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1117	}
1118
1119
1120	/**
1121	* Stops the CPU yielder.
1122	*
1123	* @param pVM The VM handle.
1124	*/
1125	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1126	{
1127	if (!pVM->vmm.s.cYieldResumeMillies)
1128	TMTimerStop(pVM->vmm.s.pYieldTimer);
1129	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1130	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1131	}
1132
1133
1134	/**
1135	* Resumes the CPU yielder when it has been a suspended or stopped.
1136	*
1137	* @param pVM The VM handle.
1138	*/
1139	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1140	{
1141	if (pVM->vmm.s.cYieldResumeMillies)
1142	{
1143	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1144	pVM->vmm.s.cYieldResumeMillies = 0;
1145	}
1146	}
1147
1148
1149	/**
1150	* Internal timer callback function.
1151	*
1152	* @param pVM The VM.
1153	* @param pTimer The timer handle.
1154	* @param pvUser User argument specified upon timer creation.
1155	*/
1156	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1157	{
1158	/*
1159	* This really needs some careful tuning. While we shouldn't be too greedy since
1160	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1161	* because that'll cause us to stop up.
1162	*
1163	* The current logic is to use the default interval when there is no lag worth
1164	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1165	*
1166	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1167	* so the lag is up to date.)
1168	*/
1169	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1170	if ( u64Lag < 50000000 /* 50ms */
1171	\|\| ( u64Lag < 1000000000 /* 1s */
1172	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1173	)
1174	{
1175	uint64_t u64Elapsed = RTTimeNanoTS();
1176	pVM->vmm.s.u64LastYield = u64Elapsed;
1177
1178	RTThreadYield();
1179
1180	#ifdef LOG_ENABLED
1181	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1182	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1183	#endif
1184	}
1185	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1186	}
1187
1188
1189	/**
1190	* Executes guest code in the raw-mode context.
1191	*
1192	* @param pVM VM handle.
1193	* @param pVCpu The VMCPU to operate on.
1194	*/
1195	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1196	{
1197	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1198
1199	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1200
1201	/*
1202	* Set the EIP and ESP.
1203	*/
1204	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1205	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1206	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1207	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1208
1209	/*
1210	* We hide log flushes (outer) and hypervisor interrupts (inner).
1211	*/
1212	for (;;)
1213	{
1214	#ifdef VBOX_STRICT
1215	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1216	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1217	PGMMapCheck(pVM);
1218	#endif
1219	int rc;
1220	do
1221	{
1222	#ifdef NO_SUPCALLR0VMM
1223	rc = VERR_GENERAL_FAILURE;
1224	#else
1225	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1226	if (RT_LIKELY(rc == VINF_SUCCESS))
1227	rc = pVCpu->vmm.s.iLastGZRc;
1228	#endif
1229	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1230
1231	/*
1232	* Flush the logs.
1233	*/
1234	#ifdef LOG_ENABLED
1235	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1236	if ( pLogger
1237	&& pLogger->offScratch > 0)
1238	RTLogFlushRC(NULL, pLogger);
1239	#endif
1240	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1241	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1242	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1243	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1244	#endif
1245	if (rc != VINF_VMM_CALL_HOST)
1246	{
1247	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1248	return rc;
1249	}
1250	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1251	if (RT_FAILURE(rc))
1252	return rc;
1253	/* Resume GC */
1254	}
1255	}
1256
1257
1258	/**
1259	* Executes guest code (Intel VT-x and AMD-V).
1260	*
1261	* @param pVM VM handle.
1262	* @param pVCpu The VMCPU to operate on.
1263	*/
1264	VMMR3_INT_DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1265	{
1266	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1267
1268	for (;;)
1269	{
1270	int rc;
1271	do
1272	{
1273	#ifdef NO_SUPCALLR0VMM
1274	rc = VERR_GENERAL_FAILURE;
1275	#else
1276	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1277	if (RT_LIKELY(rc == VINF_SUCCESS))
1278	rc = pVCpu->vmm.s.iLastGZRc;
1279	#endif
1280	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1281
1282	#if 0 /* todo triggers too often */
1283	Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1284	#endif
1285
1286	#ifdef LOG_ENABLED
1287	/*
1288	* Flush the log
1289	*/
1290	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1291	if ( pR0LoggerR3
1292	&& pR0LoggerR3->Logger.offScratch > 0)
1293	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1294	#endif /* !LOG_ENABLED */
1295	if (rc != VINF_VMM_CALL_HOST)
1296	{
1297	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1298	return rc;
1299	}
1300	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1301	if (RT_FAILURE(rc))
1302	return rc;
1303	/* Resume R0 */
1304	}
1305	}
1306
1307	/**
1308	* VCPU worker for VMMSendSipi.
1309	*
1310	* @param pVM The VM to operate on.
1311	* @param idCpu Virtual CPU to perform SIPI on
1312	* @param uVector SIPI vector
1313	*/
1314	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1315	{
1316	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1317	VMCPU_ASSERT_EMT(pVCpu);
1318
1319	/** @todo what are we supposed to do if the processor is already running? */
1320	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1321	return VERR_ACCESS_DENIED;
1322
1323
1324	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1325
1326	pCtx->cs = uVector << 8;
1327	pCtx->csHid.u64Base = uVector << 12;
1328	pCtx->csHid.u32Limit = 0x0000ffff;
1329	pCtx->rip = 0;
1330
1331	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1332
1333	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1334	EMSetState(pVCpu, EMSTATE_HALTED);
1335	return VINF_EM_RESCHEDULE;
1336	# else /* And if we go the VMCPU::enmState way it can stay here. */
1337	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1338	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1339	return VINF_SUCCESS;
1340	# endif
1341	}
1342
1343	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1344	{
1345	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1346	VMCPU_ASSERT_EMT(pVCpu);
1347
1348	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1349	CPUMR3ResetCpu(pVCpu);
1350	return VINF_EM_WAIT_SIPI;
1351	}
1352
1353	/**
1354	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1355	* and unhalting processor
1356	*
1357	* @param pVM The VM to operate on.
1358	* @param idCpu Virtual CPU to perform SIPI on
1359	* @param uVector SIPI vector
1360	*/
1361	VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1362	{
1363	AssertReturnVoid(idCpu < pVM->cCpus);
1364
1365	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1366	AssertRC(rc);
1367	}
1368
1369	/**
1370	* Sends init IPI to the virtual CPU.
1371	*
1372	* @param pVM The VM to operate on.
1373	* @param idCpu Virtual CPU to perform int IPI on
1374	*/
1375	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1376	{
1377	AssertReturnVoid(idCpu < pVM->cCpus);
1378
1379	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1380	AssertRC(rc);
1381	}
1382
1383	/**
1384	* Registers the guest memory range that can be used for patching
1385	*
1386	* @returns VBox status code.
1387	* @param pVM The VM to operate on.
1388	* @param pPatchMem Patch memory range
1389	* @param cbPatchMem Size of the memory range
1390	*/
1391	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1392	{
1393	if (HWACCMIsEnabled(pVM))
1394	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1395
1396	return VERR_NOT_SUPPORTED;
1397	}
1398
1399	/**
1400	* Deregisters the guest memory range that can be used for patching
1401	*
1402	* @returns VBox status code.
1403	* @param pVM The VM to operate on.
1404	* @param pPatchMem Patch memory range
1405	* @param cbPatchMem Size of the memory range
1406	*/
1407	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1408	{
1409	if (HWACCMIsEnabled(pVM))
1410	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1411
1412	return VINF_SUCCESS;
1413	}
1414
1415
1416	/**
1417	* VCPU worker for VMMR3SynchronizeAllVCpus.
1418	*
1419	* @param pVM The VM to operate on.
1420	* @param idCpu Virtual CPU to perform SIPI on
1421	* @param uVector SIPI vector
1422	*/
1423	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1424	{
1425	/* Block until the job in the caller has finished. */
1426	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1427	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1428	return VINF_SUCCESS;
1429	}
1430
1431
1432	/**
1433	* Atomically execute a callback handler
1434	* Note: This is very expensive; avoid using it frequently!
1435	*
1436	* @param pVM The VM to operate on.
1437	* @param pfnHandler Callback handler
1438	* @param pvUser User specified parameter
1439	*
1440	* @thread EMT
1441	* @todo Remove this if not used again soon.
1442	*/
1443	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1444	{
1445	int rc;
1446	PVMCPU pVCpu = VMMGetCpu(pVM);
1447	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1448
1449	/* Shortcut for the uniprocessor case. */
1450	if (pVM->cCpus == 1)
1451	return pfnHandler(pVM, pvUser);
1452
1453	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1454	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1455	{
1456	if (idCpu != pVCpu->idCpu)
1457	{
1458	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1459	AssertRC(rc);
1460	}
1461	}
1462	/* Wait until all other VCPUs are waiting for us. */
1463	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1464	RTThreadSleep(1);
1465
1466	rc = pfnHandler(pVM, pvUser);
1467	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1468	return rc;
1469	}
1470
1471
1472	/**
1473	* Count returns and have the last non-caller EMT wake up the caller.
1474	*
1475	* @returns VBox strict informational status code for EM scheduling. No failures
1476	* will be returned here, those are for the caller only.
1477	*
1478	* @param pVM The VM handle.
1479	*/
1480	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1481	{
1482	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1483	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1484	if (cReturned == pVM->cCpus - 1U)
1485	{
1486	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1487	AssertLogRelRC(rc);
1488	}
1489
1490	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1491	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1492	("%Rrc\n", rcRet),
1493	VERR_IPE_UNEXPECTED_INFO_STATUS);
1494	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1495	}
1496
1497
1498	/**
1499	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1500	*
1501	* @returns VBox strict informational status code for EM scheduling. No failures
1502	* will be returned here, those are for the caller only. When
1503	* fIsCaller is set, VINF_SUCCESS is always returned.
1504	*
1505	* @param pVM The VM handle.
1506	* @param pVCpu The VMCPU structure for the calling EMT.
1507	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1508	* not.
1509	* @param fFlags The flags.
1510	* @param pfnRendezvous The callback.
1511	* @param pvUser The user argument for the callback.
1512	*/
1513	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1514	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1515	{
1516	int rc;
1517
1518	/*
1519	* Enter, the last EMT triggers the next callback phase.
1520	*/
1521	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1522	if (cEntered != pVM->cCpus)
1523	{
1524	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1525	{
1526	/* Wait for our turn. */
1527	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1528	AssertLogRelRC(rc);
1529	}
1530	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1531	{
1532	/* Wait for the last EMT to arrive and wake everyone up. */
1533	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1534	AssertLogRelRC(rc);
1535	}
1536	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1537	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1538	{
1539	/* Wait for our turn. */
1540	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1541	AssertLogRelRC(rc);
1542	}
1543	else
1544	{
1545	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1546
1547	/*
1548	* The execute once is handled specially to optimize the code flow.
1549	*
1550	* The last EMT to arrive will perform the callback and the other
1551	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1552	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1553	* returns, that EMT will initiate the normal return sequence.
1554	*/
1555	if (!fIsCaller)
1556	{
1557	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1558	AssertLogRelRC(rc);
1559
1560	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1561	}
1562	return VINF_SUCCESS;
1563	}
1564	}
1565	else
1566	{
1567	/*
1568	* All EMTs are waiting, clear the FF and take action according to the
1569	* execution method.
1570	*/
1571	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1572
1573	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1574	{
1575	/* Wake up everyone. */
1576	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1577	AssertLogRelRC(rc);
1578	}
1579	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1580	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1581	{
1582	/* Figure out who to wake up and wake it up. If it's ourself, then
1583	it's easy otherwise wait for our turn. */
1584	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1585	? 0
1586	: pVM->cCpus - 1U;
1587	if (pVCpu->idCpu != iFirst)
1588	{
1589	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1590	AssertLogRelRC(rc);
1591	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1592	AssertLogRelRC(rc);
1593	}
1594	}
1595	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1596	}
1597
1598
1599	/*
1600	* Do the callback and update the status if necessary.
1601	*/
1602	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1603	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1604	{
1605	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1606	if (rcStrict != VINF_SUCCESS)
1607	{
1608	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1609	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1610	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1611	int32_t i32RendezvousStatus;
1612	do
1613	{
1614	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1615	if ( rcStrict == i32RendezvousStatus
1616	\|\| RT_FAILURE(i32RendezvousStatus)
1617	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1618	&& rcStrict > i32RendezvousStatus))
1619	break;
1620	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1621	}
1622	}
1623
1624	/*
1625	* Increment the done counter and take action depending on whether we're
1626	* the last to finish callback execution.
1627	*/
1628	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1629	if ( cDone != pVM->cCpus
1630	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1631	{
1632	/* Signal the next EMT? */
1633	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1634	{
1635	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1636	AssertLogRelRC(rc);
1637	}
1638	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1639	{
1640	Assert(cDone == pVCpu->idCpu + 1U);
1641	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1642	AssertLogRelRC(rc);
1643	}
1644	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1645	{
1646	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1647	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1648	AssertLogRelRC(rc);
1649	}
1650
1651	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1652	if (!fIsCaller)
1653	{
1654	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1655	AssertLogRelRC(rc);
1656	}
1657	}
1658	else
1659	{
1660	/* Callback execution is all done, tell the rest to return. */
1661	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1662	AssertLogRelRC(rc);
1663	}
1664
1665	if (!fIsCaller)
1666	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1667	return VINF_SUCCESS;
1668	}
1669
1670
1671	/**
1672	* Called in response to VM_FF_EMT_RENDEZVOUS.
1673	*
1674	* @returns VBox strict status code - EM scheduling. No errors will be returned
1675	* here, nor will any non-EM scheduling status codes be returned.
1676	*
1677	* @param pVM The VM handle
1678	* @param pVCpu The handle of the calling EMT.
1679	*
1680	* @thread EMT
1681	*/
1682	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1683	{
1684	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1685	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1686	}
1687
1688
1689	/**
1690	* EMT rendezvous.
1691	*
1692	* Gathers all the EMTs and execute some code on each of them, either in a one
1693	* by one fashion or all at once.
1694	*
1695	* @returns VBox strict status code. This will be the the first error,
1696	* VINF_SUCCESS, or an EM scheduling status code.
1697	*
1698	* @param pVM The VM handle.
1699	* @param fFlags Flags indicating execution methods. See
1700	* grp_VMMR3EmtRendezvous_fFlags.
1701	* @param pfnRendezvous The callback.
1702	* @param pvUser User argument for the callback.
1703	*
1704	* @thread Any.
1705	*/
1706	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1707	{
1708	/*
1709	* Validate input.
1710	*/
1711	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1712	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1713	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1714	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1715	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1716	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1717	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1718
1719	VBOXSTRICTRC rcStrict;
1720	PVMCPU pVCpu = VMMGetCpu(pVM);
1721	if (!pVCpu)
1722	/*
1723	* Forward the request to an EMT thread.
1724	*/
1725	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1726	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1727	else if (pVM->cCpus == 1)
1728	/*
1729	* Shortcut for the single EMT case.
1730	*/
1731	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1732	else
1733	{
1734	/*
1735	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1736	* lookout of the RENDEZVOUS FF.
1737	*/
1738	int rc;
1739	rcStrict = VINF_SUCCESS;
1740	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1741	{
1742	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1743	{
1744	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1745	{
1746	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1747	if ( rc != VINF_SUCCESS
1748	&& ( rcStrict == VINF_SUCCESS
1749	\|\| rcStrict > rc))
1750	rcStrict = rc;
1751	/** @todo Perhaps deal with termination here? */
1752	}
1753	ASMNopPause();
1754	}
1755	}
1756	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1757
1758	/*
1759	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1760	*/
1761	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1762	{
1763	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1764	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1765	}
1766	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1767	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1768	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1769	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1770	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1771	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1772	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1773	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1774	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1775	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1776	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1777
1778	/*
1779	* Set the FF and poke the other EMTs.
1780	*/
1781	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1782	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1783
1784	/*
1785	* Do the same ourselves.
1786	*/
1787	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1788
1789	/*
1790	* The caller waits for the other EMTs to be done and return before doing
1791	* the cleanup. This makes away with wakeup / reset races we would otherwise
1792	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1793	*/
1794	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1795	AssertLogRelRC(rc);
1796
1797	/*
1798	* Get the return code and clean up a little bit.
1799	*/
1800	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1801	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1802
1803	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1804
1805	/*
1806	* Merge rcStrict and rcMy.
1807	*/
1808	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1809	if ( rcMy != VINF_SUCCESS
1810	&& ( rcStrict == VINF_SUCCESS
1811	\|\| rcStrict > rcMy))
1812	rcStrict = rcMy;
1813	}
1814
1815	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1816	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1817	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1818	VERR_IPE_UNEXPECTED_INFO_STATUS);
1819	return VBOXSTRICTRC_VAL(rcStrict);
1820	}
1821
1822
1823	/**
1824	* Read from the ring 0 jump buffer stack
1825	*
1826	* @returns VBox status code.
1827	*
1828	* @param pVM Pointer to the shared VM structure.
1829	* @param idCpu The ID of the source CPU context (for the address).
1830	* @param R0Addr Where to start reading.
1831	* @param pvBuf Where to store the data we've read.
1832	* @param cbRead The number of bytes to read.
1833	*/
1834	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1835	{
1836	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1837	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1838
1839	#ifdef VMM_R0_SWITCH_STACK
1840	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1841	#else
1842	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1843	#endif
1844	if ( off > VMM_STACK_SIZE
1845	\|\| off + cbRead >= VMM_STACK_SIZE)
1846	return VERR_INVALID_POINTER;
1847
1848	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1849	return VINF_SUCCESS;
1850	}
1851
1852
1853	/**
1854	* Calls a RC function.
1855	*
1856	* @param pVM The VM handle.
1857	* @param RCPtrEntry The address of the RC function.
1858	* @param cArgs The number of arguments in the ....
1859	* @param ... Arguments to the function.
1860	*/
1861	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1862	{
1863	va_list args;
1864	va_start(args, cArgs);
1865	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1866	va_end(args);
1867	return rc;
1868	}
1869
1870
1871	/**
1872	* Calls a RC function.
1873	*
1874	* @param pVM The VM handle.
1875	* @param RCPtrEntry The address of the RC function.
1876	* @param cArgs The number of arguments in the ....
1877	* @param args Arguments to the function.
1878	*/
1879	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1880	{
1881	/* Raw mode implies 1 VCPU. */
1882	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1883	PVMCPU pVCpu = &pVM->aCpus[0];
1884
1885	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1886
1887	/*
1888	* Setup the call frame using the trampoline.
1889	*/
1890	CPUMHyperSetCtxCore(pVCpu, NULL);
1891	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1892	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1893	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1894	int i = cArgs;
1895	while (i-- > 0)
1896	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1897
1898	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1899	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1900	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1901
1902	/*
1903	* We hide log flushes (outer) and hypervisor interrupts (inner).
1904	*/
1905	for (;;)
1906	{
1907	int rc;
1908	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1909	do
1910	{
1911	#ifdef NO_SUPCALLR0VMM
1912	rc = VERR_GENERAL_FAILURE;
1913	#else
1914	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1915	if (RT_LIKELY(rc == VINF_SUCCESS))
1916	rc = pVCpu->vmm.s.iLastGZRc;
1917	#endif
1918	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1919
1920	/*
1921	* Flush the logs.
1922	*/
1923	#ifdef LOG_ENABLED
1924	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1925	if ( pLogger
1926	&& pLogger->offScratch > 0)
1927	RTLogFlushRC(NULL, pLogger);
1928	#endif
1929	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1930	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1931	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1932	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1933	#endif
1934	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1935	VMMR3FatalDump(pVM, pVCpu, rc);
1936	if (rc != VINF_VMM_CALL_HOST)
1937	{
1938	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1939	return rc;
1940	}
1941	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1942	if (RT_FAILURE(rc))
1943	return rc;
1944	}
1945	}
1946
1947
1948	/**
1949	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1950	*
1951	* @returns VBox status code.
1952	* @param pVM The VM to operate on.
1953	* @param uOperation Operation to execute.
1954	* @param u64Arg Constant argument.
1955	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1956	* details.
1957	*/
1958	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1959	{
1960	PVMCPU pVCpu = VMMGetCpu(pVM);
1961	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1962
1963	/*
1964	* Call Ring-0 entry with init code.
1965	*/
1966	int rc;
1967	for (;;)
1968	{
1969	#ifdef NO_SUPCALLR0VMM
1970	rc = VERR_GENERAL_FAILURE;
1971	#else
1972	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1973	#endif
1974	/*
1975	* Flush the logs.
1976	*/
1977	#ifdef LOG_ENABLED
1978	if ( pVCpu->vmm.s.pR0LoggerR3
1979	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1980	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1981	#endif
1982	if (rc != VINF_VMM_CALL_HOST)
1983	break;
1984	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1985	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1986	break;
1987	/* Resume R0 */
1988	}
1989
1990	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1991	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1992	VERR_INTERNAL_ERROR);
1993	return rc;
1994	}
1995
1996
1997	/**
1998	* Resumes executing hypervisor code when interrupted by a queue flush or a
1999	* debug event.
2000	*
2001	* @returns VBox status code.
2002	* @param pVM VM handle.
2003	* @param pVCpu VMCPU handle.
2004	*/
2005	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2006	{
2007	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2008	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2009
2010	/*
2011	* We hide log flushes (outer) and hypervisor interrupts (inner).
2012	*/
2013	for (;;)
2014	{
2015	int rc;
2016	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2017	do
2018	{
2019	#ifdef NO_SUPCALLR0VMM
2020	rc = VERR_GENERAL_FAILURE;
2021	#else
2022	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2023	if (RT_LIKELY(rc == VINF_SUCCESS))
2024	rc = pVCpu->vmm.s.iLastGZRc;
2025	#endif
2026	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2027
2028	/*
2029	* Flush the loggers,
2030	*/
2031	#ifdef LOG_ENABLED
2032	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2033	if ( pLogger
2034	&& pLogger->offScratch > 0)
2035	RTLogFlushRC(NULL, pLogger);
2036	#endif
2037	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2038	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2039	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2040	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2041	#endif
2042	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2043	VMMR3FatalDump(pVM, pVCpu, rc);
2044	if (rc != VINF_VMM_CALL_HOST)
2045	{
2046	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2047	return rc;
2048	}
2049	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2050	if (RT_FAILURE(rc))
2051	return rc;
2052	}
2053	}
2054
2055
2056	/**
2057	* Service a call to the ring-3 host code.
2058	*
2059	* @returns VBox status code.
2060	* @param pVM VM handle.
2061	* @param pVCpu VMCPU handle
2062	* @remark Careful with critsects.
2063	*/
2064	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2065	{
2066	/*
2067	* We must also check for pending critsect exits or else we can deadlock
2068	* when entering other critsects here.
2069	*/
2070	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2071	PDMCritSectFF(pVCpu);
2072
2073	switch (pVCpu->vmm.s.enmCallRing3Operation)
2074	{
2075	/*
2076	* Acquire a critical section.
2077	*/
2078	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2079	{
2080	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2081	true /fCallRing3/);
2082	break;
2083	}
2084
2085	/*
2086	* Acquire the PDM lock.
2087	*/
2088	case VMMCALLRING3_PDM_LOCK:
2089	{
2090	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2091	break;
2092	}
2093
2094	/*
2095	* Grow the PGM pool.
2096	*/
2097	case VMMCALLRING3_PGM_POOL_GROW:
2098	{
2099	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2100	break;
2101	}
2102
2103	/*
2104	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2105	*/
2106	case VMMCALLRING3_PGM_MAP_CHUNK:
2107	{
2108	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2109	break;
2110	}
2111
2112	/*
2113	* Allocates more handy pages.
2114	*/
2115	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2116	{
2117	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2118	break;
2119	}
2120
2121	/*
2122	* Allocates a large page.
2123	*/
2124	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2125	{
2126	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2127	break;
2128	}
2129
2130	/*
2131	* Acquire the PGM lock.
2132	*/
2133	case VMMCALLRING3_PGM_LOCK:
2134	{
2135	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2136	break;
2137	}
2138
2139	/*
2140	* Acquire the MM hypervisor heap lock.
2141	*/
2142	case VMMCALLRING3_MMHYPER_LOCK:
2143	{
2144	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2145	break;
2146	}
2147
2148	/*
2149	* Flush REM handler notifications.
2150	*/
2151	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2152	{
2153	REMR3ReplayHandlerNotifications(pVM);
2154	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2155	break;
2156	}
2157
2158	/*
2159	* This is a noop. We just take this route to avoid unnecessary
2160	* tests in the loops.
2161	*/
2162	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2163	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2164	LogAlways(("FLUSH\n"));
2165	break;
2166
2167	/*
2168	* Set the VM error message.
2169	*/
2170	case VMMCALLRING3_VM_SET_ERROR:
2171	VMR3SetErrorWorker(pVM);
2172	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2173	break;
2174
2175	/*
2176	* Set the VM runtime error message.
2177	*/
2178	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2179	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2180	break;
2181
2182	/*
2183	* Signal a ring 0 hypervisor assertion.
2184	* Cancel the longjmp operation that's in progress.
2185	*/
2186	case VMMCALLRING3_VM_R0_ASSERTION:
2187	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2188	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2189	#ifdef RT_ARCH_X86
2190	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2191	#else
2192	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2193	#endif
2194	#ifdef VMM_R0_SWITCH_STACK
2195	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2196	#endif
2197	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2198	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2199	return VERR_VMM_RING0_ASSERTION;
2200
2201	/*
2202	* A forced switch to ring 0 for preemption purposes.
2203	*/
2204	case VMMCALLRING3_VM_R0_PREEMPT:
2205	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2206	break;
2207
2208	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2209	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2210	break;
2211
2212	default:
2213	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2214	return VERR_INTERNAL_ERROR;
2215	}
2216
2217	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2218	return VINF_SUCCESS;
2219	}
2220
2221
2222	/**
2223	* Displays the Force action Flags.
2224	*
2225	* @param pVM The VM handle.
2226	* @param pHlp The output helpers.
2227	* @param pszArgs The additional arguments (ignored).
2228	*/
2229	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2230	{
2231	int c;
2232	uint32_t f;
2233	#define PRINT_FLAG(prf,flag) do { \
2234	if (f & (prf##flag)) \
2235	{ \
2236	static const char *s_psz = #flag; \
2237	if (!(c % 6)) \
2238	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2239	else \
2240	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2241	c++; \
2242	f &= ~(prf##flag); \
2243	} \
2244	} while (0)
2245
2246	#define PRINT_GROUP(prf,grp,sfx) do { \
2247	if (f & (prf##grp##sfx)) \
2248	{ \
2249	static const char *s_psz = #grp; \
2250	if (!(c % 5)) \
2251	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2252	else \
2253	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2254	c++; \
2255	} \
2256	} while (0)
2257
2258	/*
2259	* The global flags.
2260	*/
2261	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2262	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2263
2264	/* show the flag mnemonics */
2265	c = 0;
2266	f = fGlobalForcedActions;
2267	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2268	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2269	PRINT_FLAG(VM_FF_,PDM_DMA);
2270	PRINT_FLAG(VM_FF_,DBGF);
2271	PRINT_FLAG(VM_FF_,REQUEST);
2272	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2273	PRINT_FLAG(VM_FF_,RESET);
2274	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2275	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2276	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2277	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2278	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2279	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2280	if (f)
2281	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2282	else
2283	pHlp->pfnPrintf(pHlp, "\n");
2284
2285	/* the groups */
2286	c = 0;
2287	f = fGlobalForcedActions;
2288	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2289	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2290	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2291	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2292	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2293	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2294	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2295	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2296	if (c)
2297	pHlp->pfnPrintf(pHlp, "\n");
2298
2299	/*
2300	* Per CPU flags.
2301	*/
2302	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2303	{
2304	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2305	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2306
2307	/* show the flag mnemonics */
2308	c = 0;
2309	f = fLocalForcedActions;
2310	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2311	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2312	PRINT_FLAG(VMCPU_FF_,TIMER);
2313	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2314	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2315	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2316	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2317	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2318	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2319	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2320	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2321	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2322	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2323	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2324	PRINT_FLAG(VMCPU_FF_,TO_R3);
2325	if (f)
2326	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2327	else
2328	pHlp->pfnPrintf(pHlp, "\n");
2329
2330	/* the groups */
2331	c = 0;
2332	f = fLocalForcedActions;
2333	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2334	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2335	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2336	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2337	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2338	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2339	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2340	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2341	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2342	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2343	if (c)
2344	pHlp->pfnPrintf(pHlp, "\n");
2345	}
2346
2347	#undef PRINT_FLAG
2348	#undef PRINT_GROUP
2349	}
2350

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 37507

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