VMM.cpp@ 37595

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1	/* $Id: VMM.cpp 37595 2011-06-22 18:27:14Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*
48	* @sections sec_vmm_limits VMM Limits
49	*
50	* There are various resource limits imposed by the VMM and it's
51	* sub-components. We'll list some of them here.
52	*
53	* On 64-bit hosts:
54	* - Max 1023 VMs. Imposed by GVMM's handle allocation
55	* (GVMM_MAX_HANDLES), can be increased up to 64K.
56	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58	* - A VM can be assigned all the memory we can use (16TB), however, the
59	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61	*
62	* On 32-bit hosts:
63	* - Max 127 VMs. Imposed by GMM's per page structure.
64	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65	* ROM pages. The limit is imposed by the 28-bit page ID used
66	* internally in GMM. It is also limited by PAE.
67	* - A VM can be assigned all the memory GMM can allocate, however, the
68	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70	*
71	*/
72
73	/*******************************************************************************
74	* Header Files *
75	*******************************************************************************/
76	#define LOG_GROUP LOG_GROUP_VMM
77	#include <VBox/vmm/vmm.h>
78	#include <VBox/vmm/vmapi.h>
79	#include <VBox/vmm/pgm.h>
80	#include <VBox/vmm/cfgm.h>
81	#include <VBox/vmm/pdmqueue.h>
82	#include <VBox/vmm/pdmcritsect.h>
83	#include <VBox/vmm/pdmapi.h>
84	#include <VBox/vmm/cpum.h>
85	#include <VBox/vmm/mm.h>
86	#include <VBox/vmm/iom.h>
87	#include <VBox/vmm/trpm.h>
88	#include <VBox/vmm/selm.h>
89	#include <VBox/vmm/em.h>
90	#include <VBox/sup.h>
91	#include <VBox/vmm/dbgf.h>
92	#include <VBox/vmm/csam.h>
93	#include <VBox/vmm/patm.h>
94	#include <VBox/vmm/rem.h>
95	#include <VBox/vmm/ssm.h>
96	#include <VBox/vmm/tm.h>
97	#include "VMMInternal.h"
98	#include "VMMSwitcher.h"
99	#include <VBox/vmm/vm.h>
100	#include <VBox/vmm/ftm.h>
101
102	#include <VBox/err.h>
103	#include <VBox/param.h>
104	#include <VBox/version.h>
105	#include <VBox/x86.h>
106	#include <VBox/vmm/hwaccm.h>
107	#include <iprt/assert.h>
108	#include <iprt/alloc.h>
109	#include <iprt/asm.h>
110	#include <iprt/time.h>
111	#include <iprt/semaphore.h>
112	#include <iprt/stream.h>
113	#include <iprt/string.h>
114	#include <iprt/stdarg.h>
115	#include <iprt/ctype.h>
116
117
118
119	/*******************************************************************************
120	* Defined Constants And Macros *
121	*******************************************************************************/
122	/** The saved state version. */
123	#define VMM_SAVED_STATE_VERSION 4
124	/** The saved state version used by v3.0 and earlier. (Teleportation) */
125	#define VMM_SAVED_STATE_VERSION_3_0 3
126
127
128	/*******************************************************************************
129	* Internal Functions *
130	*******************************************************************************/
131	static int vmmR3InitStacks(PVM pVM);
132	static int vmmR3InitLoggers(PVM pVM);
133	static void vmmR3InitRegisterStats(PVM pVM);
134	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
135	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
136	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
137	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
138	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
139
140
141	/**
142	* Initializes the VMM.
143	*
144	* @returns VBox status code.
145	* @param pVM The VM to operate on.
146	*/
147	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
148	{
149	LogFlow(("VMMR3Init\n"));
150
151	/*
152	* Assert alignment, sizes and order.
153	*/
154	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
155	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
156	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
157
158	/*
159	* Init basic VM VMM members.
160	*/
161	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
162	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
163	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
164	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
165	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
166	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
167
168	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
169	* The EMT yield interval. The EMT yielding is a hack we employ to play a
170	* bit nicer with the rest of the system (like for instance the GUI).
171	*/
172	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
173	23 /* Value arrived at after experimenting with the grub boot prompt. */);
174	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
175
176
177	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
178	* Controls whether we employ per-cpu preemption timers to limit the time
179	* spent executing guest code. This option is not available on all
180	* platforms and we will silently ignore this setting then. If we are
181	* running in VT-x mode, we will use the VMX-preemption timer instead of
182	* this one when possible.
183	*/
184	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
185	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
186	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
187
188	/*
189	* Initialize the VMM sync critical section and semaphores.
190	*/
191	rc = RTCritSectInit(&pVM->vmm.s.CritSectSync);
192	AssertRCReturn(rc, rc);
193	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
194	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
195	return VERR_NO_MEMORY;
196	for (VMCPUID i = 0; i < pVM->cCpus; i++)
197	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
198	for (VMCPUID i = 0; i < pVM->cCpus; i++)
199	{
200	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
201	AssertRCReturn(rc, rc);
202	}
203	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
204	AssertRCReturn(rc, rc);
205	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
206	AssertRCReturn(rc, rc);
207	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
208	AssertRCReturn(rc, rc);
209	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
210	AssertRCReturn(rc, rc);
211
212	/* GC switchers are enabled by default. Turned off by HWACCM. */
213	pVM->vmm.s.fSwitcherDisabled = false;
214
215	/*
216	* Register the saved state data unit.
217	*/
218	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
219	NULL, NULL, NULL,
220	NULL, vmmR3Save, NULL,
221	NULL, vmmR3Load, NULL);
222	if (RT_FAILURE(rc))
223	return rc;
224
225	/*
226	* Register the Ring-0 VM handle with the session for fast ioctl calls.
227	*/
228	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
229	if (RT_FAILURE(rc))
230	return rc;
231
232	/*
233	* Init various sub-components.
234	*/
235	rc = vmmR3SwitcherInit(pVM);
236	if (RT_SUCCESS(rc))
237	{
238	rc = vmmR3InitStacks(pVM);
239	if (RT_SUCCESS(rc))
240	{
241	rc = vmmR3InitLoggers(pVM);
242
243	#ifdef VBOX_WITH_NMI
244	/*
245	* Allocate mapping for the host APIC.
246	*/
247	if (RT_SUCCESS(rc))
248	{
249	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
250	AssertRC(rc);
251	}
252	#endif
253	if (RT_SUCCESS(rc))
254	{
255	/*
256	* Debug info and statistics.
257	*/
258	DBGFR3InfoRegisterInternal(pVM, "ff", "Displays the current Forced actions Flags.", vmmR3InfoFF);
259	vmmR3InitRegisterStats(pVM);
260
261	return VINF_SUCCESS;
262	}
263	}
264	/** @todo: Need failure cleanup. */
265
266	//more todo in here?
267	//if (RT_SUCCESS(rc))
268	//{
269	//}
270	//int rc2 = vmmR3TermCoreCode(pVM);
271	//AssertRC(rc2));
272	}
273
274	return rc;
275	}
276
277
278	/**
279	* Allocate & setup the VMM RC stack(s) (for EMTs).
280	*
281	* The stacks are also used for long jumps in Ring-0.
282	*
283	* @returns VBox status code.
284	* @param pVM Pointer to the shared VM structure.
285	*
286	* @remarks The optional guard page gets it protection setup up during R3 init
287	* completion because of init order issues.
288	*/
289	static int vmmR3InitStacks(PVM pVM)
290	{
291	int rc = VINF_SUCCESS;
292	#ifdef VMM_R0_SWITCH_STACK
293	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
294	#else
295	uint32_t fFlags = 0;
296	#endif
297
298	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
299	{
300	PVMCPU pVCpu = &pVM->aCpus[idCpu];
301
302	#ifdef VBOX_STRICT_VMM_STACK
303	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
304	#else
305	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
306	#endif
307	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
308	if (RT_SUCCESS(rc))
309	{
310	#ifdef VBOX_STRICT_VMM_STACK
311	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
312	#endif
313	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
314	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
315	if (!VMMIsHwVirtExtForced(pVM))
316	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
317	else
318	#endif
319	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
320	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
321	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
322	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
323
324	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
325	}
326	}
327
328	return rc;
329	}
330
331
332	/**
333	* Initialize the loggers.
334	*
335	* @returns VBox status code.
336	* @param pVM Pointer to the shared VM structure.
337	*/
338	static int vmmR3InitLoggers(PVM pVM)
339	{
340	int rc;
341	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
342
343	/*
344	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
345	*/
346	#ifdef LOG_ENABLED
347	PRTLOGGER pLogger = RTLogDefaultInstance();
348	if (pLogger)
349	{
350	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
351	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
352	if (RT_FAILURE(rc))
353	return rc;
354	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
355
356	# ifdef VBOX_WITH_R0_LOGGING
357	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
358	for (VMCPUID i = 0; i < pVM->cCpus; i++)
359	{
360	PVMCPU pVCpu = &pVM->aCpus[i];
361	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
362	(void **)&pVCpu->vmm.s.pR0LoggerR3);
363	if (RT_FAILURE(rc))
364	return rc;
365	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
366	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
367	pVCpu->vmm.s.pR0LoggerR3->cbLogger = cbLogger;
368	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
369	}
370	# endif
371	}
372	#endif /* LOG_ENABLED */
373
374	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
375	/*
376	* Allocate RC release logger instances (finalized in the relocator).
377	*/
378	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
379	if (pRelLogger)
380	{
381	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
382	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
383	if (RT_FAILURE(rc))
384	return rc;
385	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
386	}
387	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
388	return VINF_SUCCESS;
389	}
390
391
392	/**
393	* VMMR3Init worker that register the statistics with STAM.
394	*
395	* @param pVM The shared VM structure.
396	*/
397	static void vmmR3InitRegisterStats(PVM pVM)
398	{
399	/*
400	* Statistics.
401	*/
402	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
403	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
404	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_READ returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_IOPORT_WRITE returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_WRITE returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_READ_WRITE returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
436	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
444	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
445	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
446	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
447	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
448	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
449	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HWACCM_PATCH_TPR_INSTR returns.");
450	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
451	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
452	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
461
462	#ifdef VBOX_WITH_STATISTICS
463	for (VMCPUID i = 0; i < pVM->cCpus; i++)
464	{
465	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
466	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
467	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
468	}
469	#endif
470	}
471
472
473	/**
474	* Initializes the R0 VMM.
475	*
476	* @returns VBox status code.
477	* @param pVM The VM to operate on.
478	*/
479	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
480	{
481	int rc;
482	PVMCPU pVCpu = VMMGetCpu(pVM);
483	Assert(pVCpu && pVCpu->idCpu == 0);
484
485	#ifdef LOG_ENABLED
486	/*
487	* Initialize the ring-0 logger if we haven't done so yet.
488	*/
489	if ( pVCpu->vmm.s.pR0LoggerR3
490	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
491	{
492	rc = VMMR3UpdateLoggers(pVM);
493	if (RT_FAILURE(rc))
494	return rc;
495	}
496	#endif
497
498	/*
499	* Call Ring-0 entry with init code.
500	*/
501	for (;;)
502	{
503	#ifdef NO_SUPCALLR0VMM
504	//rc = VERR_GENERAL_FAILURE;
505	rc = VINF_SUCCESS;
506	#else
507	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
508	#endif
509	/*
510	* Flush the logs.
511	*/
512	#ifdef LOG_ENABLED
513	if ( pVCpu->vmm.s.pR0LoggerR3
514	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
515	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
516	#endif
517	if (rc != VINF_VMM_CALL_HOST)
518	break;
519	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
520	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
521	break;
522	/* Resume R0 */
523	}
524
525	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
526	{
527	LogRel(("R0 init failed, rc=%Rra\n", rc));
528	if (RT_SUCCESS(rc))
529	rc = VERR_INTERNAL_ERROR;
530	}
531	return rc;
532	}
533
534
535	/**
536	* Initializes the RC VMM.
537	*
538	* @returns VBox status code.
539	* @param pVM The VM to operate on.
540	*/
541	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
542	{
543	PVMCPU pVCpu = VMMGetCpu(pVM);
544	Assert(pVCpu && pVCpu->idCpu == 0);
545
546	/* In VMX mode, there's no need to init RC. */
547	if (pVM->vmm.s.fSwitcherDisabled)
548	return VINF_SUCCESS;
549
550	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
551
552	/*
553	* Call VMMGCInit():
554	* -# resolve the address.
555	* -# setup stackframe and EIP to use the trampoline.
556	* -# do a generic hypervisor call.
557	*/
558	RTRCPTR RCPtrEP;
559	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
560	if (RT_SUCCESS(rc))
561	{
562	CPUMHyperSetCtxCore(pVCpu, NULL);
563	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
564	uint64_t u64TS = RTTimeProgramStartNanoTS();
565	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
566	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
567	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
568	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
569	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
570	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
571	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
572	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
573	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
574
575	for (;;)
576	{
577	#ifdef NO_SUPCALLR0VMM
578	//rc = VERR_GENERAL_FAILURE;
579	rc = VINF_SUCCESS;
580	#else
581	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
582	#endif
583	#ifdef LOG_ENABLED
584	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
585	if ( pLogger
586	&& pLogger->offScratch > 0)
587	RTLogFlushRC(NULL, pLogger);
588	#endif
589	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
590	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
591	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
592	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
593	#endif
594	if (rc != VINF_VMM_CALL_HOST)
595	break;
596	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
597	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
598	break;
599	}
600
601	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
602	{
603	VMMR3FatalDump(pVM, pVCpu, rc);
604	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
605	rc = VERR_INTERNAL_ERROR;
606	}
607	AssertRC(rc);
608	}
609	return rc;
610	}
611
612
613	/**
614	* Called when an init phase completes.
615	*
616	* @returns VBox status code.
617	* @param pVM The VM handle.
618	* @param enmWhat Which init phase.
619	*/
620	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
621	{
622	int rc = VINF_SUCCESS;
623
624	switch (enmWhat)
625	{
626	case VMINITCOMPLETED_RING3:
627	{
628	/*
629	* Set page attributes to r/w for stack pages.
630	*/
631	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
632	{
633	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
634	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
635	AssertRCReturn(rc, rc);
636	}
637
638	/*
639	* Create the EMT yield timer.
640	*/
641	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
642	AssertRCReturn(rc, rc);
643
644	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
645	AssertRCReturn(rc, rc);
646
647	#ifdef VBOX_WITH_NMI
648	/*
649	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
650	*/
651	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
652	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
653	AssertRCReturn(rc, rc);
654	#endif
655
656	#ifdef VBOX_STRICT_VMM_STACK
657	/*
658	* Setup the stack guard pages: Two inaccessible pages at each sides of the
659	* stack to catch over/under-flows.
660	*/
661	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
662	{
663	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
664
665	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
666	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
667
668	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
669	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
670	}
671	pVM->vmm.s.fStackGuardsStationed = true;
672	#endif
673	break;
674	}
675
676	case VMINITCOMPLETED_RING0:
677	{
678	/*
679	* Disable the periodic preemption timers if we can use the
680	* VMX-preemption timer instead.
681	*/
682	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
683	&& HWACCMR3IsVmxPreemptionTimerUsed(pVM))
684	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
685	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
686	break;
687	}
688
689	default: /* shuts up gcc */
690	break;
691	}
692
693	return rc;
694	}
695
696
697	/**
698	* Terminate the VMM bits.
699	*
700	* @returns VINF_SUCCESS.
701	* @param pVM The VM handle.
702	*/
703	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
704	{
705	PVMCPU pVCpu = VMMGetCpu(pVM);
706	Assert(pVCpu && pVCpu->idCpu == 0);
707
708	/*
709	* Call Ring-0 entry with termination code.
710	*/
711	int rc;
712	for (;;)
713	{
714	#ifdef NO_SUPCALLR0VMM
715	//rc = VERR_GENERAL_FAILURE;
716	rc = VINF_SUCCESS;
717	#else
718	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
719	#endif
720	/*
721	* Flush the logs.
722	*/
723	#ifdef LOG_ENABLED
724	if ( pVCpu->vmm.s.pR0LoggerR3
725	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
726	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
727	#endif
728	if (rc != VINF_VMM_CALL_HOST)
729	break;
730	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
731	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
732	break;
733	/* Resume R0 */
734	}
735	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
736	{
737	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
738	if (RT_SUCCESS(rc))
739	rc = VERR_INTERNAL_ERROR;
740	}
741
742	RTCritSectDelete(&pVM->vmm.s.CritSectSync);
743	for (VMCPUID i = 0; i < pVM->cCpus; i++)
744	{
745	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
746	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
747	}
748	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
749	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
750	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
751	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
752	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
753	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
754	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
755	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
756
757	#ifdef VBOX_STRICT_VMM_STACK
758	/*
759	* Make the two stack guard pages present again.
760	*/
761	if (pVM->vmm.s.fStackGuardsStationed)
762	{
763	for (VMCPUID i = 0; i < pVM->cCpus; i++)
764	{
765	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
766	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
767	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
768	}
769	pVM->vmm.s.fStackGuardsStationed = false;
770	}
771	#endif
772	return rc;
773	}
774
775
776	/**
777	* Applies relocations to data and code managed by this
778	* component. This function will be called at init and
779	* whenever the VMM need to relocate it self inside the GC.
780	*
781	* The VMM will need to apply relocations to the core code.
782	*
783	* @param pVM The VM handle.
784	* @param offDelta The relocation delta.
785	*/
786	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
787	{
788	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
789
790	/*
791	* Recalc the RC address.
792	*/
793	#ifdef VBOX_WITH_RAW_MODE
794	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
795	#endif
796
797	/*
798	* The stack.
799	*/
800	for (VMCPUID i = 0; i < pVM->cCpus; i++)
801	{
802	PVMCPU pVCpu = &pVM->aCpus[i];
803
804	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
805
806	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
807	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
808	}
809
810	/*
811	* All the switchers.
812	*/
813	vmmR3SwitcherRelocate(pVM, offDelta);
814
815	/*
816	* Get other RC entry points.
817	*/
818	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
819	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
820
821	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
822	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
823
824	/*
825	* Update the logger.
826	*/
827	VMMR3UpdateLoggers(pVM);
828	}
829
830
831	/**
832	* Updates the settings for the RC and R0 loggers.
833	*
834	* @returns VBox status code.
835	* @param pVM The VM handle.
836	*/
837	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
838	{
839	/*
840	* Simply clone the logger instance (for RC).
841	*/
842	int rc = VINF_SUCCESS;
843	RTRCPTR RCPtrLoggerFlush = 0;
844
845	if (pVM->vmm.s.pRCLoggerR3
846	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
847	\|\| pVM->vmm.s.pRCRelLoggerR3
848	#endif
849	)
850	{
851	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
852	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
853	}
854
855	if (pVM->vmm.s.pRCLoggerR3)
856	{
857	RTRCPTR RCPtrLoggerWrapper = 0;
858	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
859	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
860
861	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
862	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
863	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
864	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
865	}
866
867	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
868	if (pVM->vmm.s.pRCRelLoggerR3)
869	{
870	RTRCPTR RCPtrLoggerWrapper = 0;
871	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
872	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
873
874	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
875	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
876	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
877	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
878	}
879	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
880
881	#ifdef LOG_ENABLED
882	/*
883	* For the ring-0 EMT logger, we use a per-thread logger instance
884	* in ring-0. Only initialize it once.
885	*/
886	PRTLOGGER const pDefault = RTLogRelDefaultInstance();
887	for (VMCPUID i = 0; i < pVM->cCpus; i++)
888	{
889	PVMCPU pVCpu = &pVM->aCpus[i];
890	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
891	if (pR0LoggerR3)
892	{
893	if (!pR0LoggerR3->fCreated)
894	{
895	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
896	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
897	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
898
899	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
900	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
901	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
902
903	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger, pVCpu->vmm.s.pR0LoggerR0,
904	pfnLoggerWrapper, pfnLoggerFlush,
905	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
906	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
907
908	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
909	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
910	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
911	rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0, pfnLoggerPrefix, NIL_RTR0PTR);
912	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
913
914	pR0LoggerR3->idCpu = i;
915	pR0LoggerR3->fCreated = true;
916	pR0LoggerR3->fFlushingDisabled = false;
917
918	}
919
920	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0, pDefault,
921	UINT32_MAX, RTLOGFLAGS_BUFFERED);
922	AssertRC(rc);
923	}
924	}
925	#endif
926	return rc;
927	}
928
929
930	/**
931	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
932	*
933	* @returns Pointer to the buffer.
934	* @param pVM The VM handle.
935	*/
936	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
937	{
938	if (HWACCMIsEnabled(pVM))
939	return pVM->vmm.s.szRing0AssertMsg1;
940
941	RTRCPTR RCPtr;
942	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
943	if (RT_SUCCESS(rc))
944	return (const char *)MMHyperRCToR3(pVM, RCPtr);
945
946	return NULL;
947	}
948
949
950	/**
951	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
952	*
953	* @returns Pointer to the buffer.
954	* @param pVM The VM handle.
955	*/
956	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
957	{
958	if (HWACCMIsEnabled(pVM))
959	return pVM->vmm.s.szRing0AssertMsg2;
960
961	RTRCPTR RCPtr;
962	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
963	if (RT_SUCCESS(rc))
964	return (const char *)MMHyperRCToR3(pVM, RCPtr);
965
966	return NULL;
967	}
968
969
970	/**
971	* Execute state save operation.
972	*
973	* @returns VBox status code.
974	* @param pVM VM Handle.
975	* @param pSSM SSM operation handle.
976	*/
977	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
978	{
979	LogFlow(("vmmR3Save:\n"));
980
981	/*
982	* Save the started/stopped state of all CPUs except 0 as it will always
983	* be running. This avoids breaking the saved state version. :-)
984	*/
985	for (VMCPUID i = 1; i < pVM->cCpus; i++)
986	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
987
988	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
989	}
990
991
992	/**
993	* Execute state load operation.
994	*
995	* @returns VBox status code.
996	* @param pVM VM Handle.
997	* @param pSSM SSM operation handle.
998	* @param uVersion Data layout version.
999	* @param uPass The data pass.
1000	*/
1001	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1002	{
1003	LogFlow(("vmmR3Load:\n"));
1004	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1005
1006	/*
1007	* Validate version.
1008	*/
1009	if ( uVersion != VMM_SAVED_STATE_VERSION
1010	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1011	{
1012	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1013	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1014	}
1015
1016	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1017	{
1018	/* Ignore the stack bottom, stack pointer and stack bits. */
1019	RTRCPTR RCPtrIgnored;
1020	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1021	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1022	#ifdef RT_OS_DARWIN
1023	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1024	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1025	&& SSMR3HandleRevision(pSSM) >= 48858
1026	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1027	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1028	)
1029	SSMR3Skip(pSSM, 16384);
1030	else
1031	SSMR3Skip(pSSM, 8192);
1032	#else
1033	SSMR3Skip(pSSM, 8192);
1034	#endif
1035	}
1036
1037	/*
1038	* Restore the VMCPU states. VCPU 0 is always started.
1039	*/
1040	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1041	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1042	{
1043	bool fStarted;
1044	int rc = SSMR3GetBool(pSSM, &fStarted);
1045	if (RT_FAILURE(rc))
1046	return rc;
1047	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1048	}
1049
1050	/* terminator */
1051	uint32_t u32;
1052	int rc = SSMR3GetU32(pSSM, &u32);
1053	if (RT_FAILURE(rc))
1054	return rc;
1055	if (u32 != UINT32_MAX)
1056	{
1057	AssertMsgFailed(("u32=%#x\n", u32));
1058	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1059	}
1060	return VINF_SUCCESS;
1061	}
1062
1063
1064	/**
1065	* Resolve a builtin RC symbol.
1066	*
1067	* Called by PDM when loading or relocating RC modules.
1068	*
1069	* @returns VBox status
1070	* @param pVM VM Handle.
1071	* @param pszSymbol Symbol to resolv
1072	* @param pRCPtrValue Where to store the symbol value.
1073	*
1074	* @remark This has to work before VMMR3Relocate() is called.
1075	*/
1076	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1077	{
1078	if (!strcmp(pszSymbol, "g_Logger"))
1079	{
1080	if (pVM->vmm.s.pRCLoggerR3)
1081	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1082	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1083	}
1084	else if (!strcmp(pszSymbol, "g_RelLogger"))
1085	{
1086	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1087	if (pVM->vmm.s.pRCRelLoggerR3)
1088	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1089	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1090	#else
1091	*pRCPtrValue = NIL_RTRCPTR;
1092	#endif
1093	}
1094	else
1095	return VERR_SYMBOL_NOT_FOUND;
1096	return VINF_SUCCESS;
1097	}
1098
1099
1100	/**
1101	* Suspends the CPU yielder.
1102	*
1103	* @param pVM The VM handle.
1104	*/
1105	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1106	{
1107	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1108	if (!pVM->vmm.s.cYieldResumeMillies)
1109	{
1110	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1111	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1112	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1113	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1114	else
1115	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1116	TMTimerStop(pVM->vmm.s.pYieldTimer);
1117	}
1118	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1119	}
1120
1121
1122	/**
1123	* Stops the CPU yielder.
1124	*
1125	* @param pVM The VM handle.
1126	*/
1127	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1128	{
1129	if (!pVM->vmm.s.cYieldResumeMillies)
1130	TMTimerStop(pVM->vmm.s.pYieldTimer);
1131	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1132	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1133	}
1134
1135
1136	/**
1137	* Resumes the CPU yielder when it has been a suspended or stopped.
1138	*
1139	* @param pVM The VM handle.
1140	*/
1141	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1142	{
1143	if (pVM->vmm.s.cYieldResumeMillies)
1144	{
1145	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1146	pVM->vmm.s.cYieldResumeMillies = 0;
1147	}
1148	}
1149
1150
1151	/**
1152	* Internal timer callback function.
1153	*
1154	* @param pVM The VM.
1155	* @param pTimer The timer handle.
1156	* @param pvUser User argument specified upon timer creation.
1157	*/
1158	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1159	{
1160	/*
1161	* This really needs some careful tuning. While we shouldn't be too greedy since
1162	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1163	* because that'll cause us to stop up.
1164	*
1165	* The current logic is to use the default interval when there is no lag worth
1166	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1167	*
1168	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1169	* so the lag is up to date.)
1170	*/
1171	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1172	if ( u64Lag < 50000000 /* 50ms */
1173	\|\| ( u64Lag < 1000000000 /* 1s */
1174	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1175	)
1176	{
1177	uint64_t u64Elapsed = RTTimeNanoTS();
1178	pVM->vmm.s.u64LastYield = u64Elapsed;
1179
1180	RTThreadYield();
1181
1182	#ifdef LOG_ENABLED
1183	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1184	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1185	#endif
1186	}
1187	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1188	}
1189
1190
1191	/**
1192	* Executes guest code in the raw-mode context.
1193	*
1194	* @param pVM VM handle.
1195	* @param pVCpu The VMCPU to operate on.
1196	*/
1197	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1198	{
1199	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1200
1201	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1202
1203	/*
1204	* Set the EIP and ESP.
1205	*/
1206	CPUMSetHyperEIP(pVCpu, CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1207	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1208	: pVM->vmm.s.pfnCPUMRCResumeGuest);
1209	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
1210
1211	/*
1212	* We hide log flushes (outer) and hypervisor interrupts (inner).
1213	*/
1214	for (;;)
1215	{
1216	#ifdef VBOX_STRICT
1217	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1218	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1219	PGMMapCheck(pVM);
1220	#endif
1221	int rc;
1222	do
1223	{
1224	#ifdef NO_SUPCALLR0VMM
1225	rc = VERR_GENERAL_FAILURE;
1226	#else
1227	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1228	if (RT_LIKELY(rc == VINF_SUCCESS))
1229	rc = pVCpu->vmm.s.iLastGZRc;
1230	#endif
1231	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1232
1233	/*
1234	* Flush the logs.
1235	*/
1236	#ifdef LOG_ENABLED
1237	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1238	if ( pLogger
1239	&& pLogger->offScratch > 0)
1240	RTLogFlushRC(NULL, pLogger);
1241	#endif
1242	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1243	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1244	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1245	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1246	#endif
1247	if (rc != VINF_VMM_CALL_HOST)
1248	{
1249	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1250	return rc;
1251	}
1252	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1253	if (RT_FAILURE(rc))
1254	return rc;
1255	/* Resume GC */
1256	}
1257	}
1258
1259
1260	/**
1261	* Executes guest code (Intel VT-x and AMD-V).
1262	*
1263	* @param pVM VM handle.
1264	* @param pVCpu The VMCPU to operate on.
1265	*/
1266	VMMR3_INT_DECL(int) VMMR3HwAccRunGC(PVM pVM, PVMCPU pVCpu)
1267	{
1268	Log2(("VMMR3HwAccRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1269
1270	for (;;)
1271	{
1272	int rc;
1273	do
1274	{
1275	#ifdef NO_SUPCALLR0VMM
1276	rc = VERR_GENERAL_FAILURE;
1277	#else
1278	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HWACC_RUN, pVCpu->idCpu);
1279	if (RT_LIKELY(rc == VINF_SUCCESS))
1280	rc = pVCpu->vmm.s.iLastGZRc;
1281	#endif
1282	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1283
1284	#if 0 /* todo triggers too often */
1285	Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1286	#endif
1287
1288	#ifdef LOG_ENABLED
1289	/*
1290	* Flush the log
1291	*/
1292	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1293	if ( pR0LoggerR3
1294	&& pR0LoggerR3->Logger.offScratch > 0)
1295	RTLogFlushToLogger(&pR0LoggerR3->Logger, NULL);
1296	#endif /* !LOG_ENABLED */
1297	if (rc != VINF_VMM_CALL_HOST)
1298	{
1299	Log2(("VMMR3HwAccRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1300	return rc;
1301	}
1302	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1303	if (RT_FAILURE(rc))
1304	return rc;
1305	/* Resume R0 */
1306	}
1307	}
1308
1309	/**
1310	* VCPU worker for VMMSendSipi.
1311	*
1312	* @param pVM The VM to operate on.
1313	* @param idCpu Virtual CPU to perform SIPI on
1314	* @param uVector SIPI vector
1315	*/
1316	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1317	{
1318	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1319	VMCPU_ASSERT_EMT(pVCpu);
1320
1321	/** @todo what are we supposed to do if the processor is already running? */
1322	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1323	return VERR_ACCESS_DENIED;
1324
1325
1326	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1327
1328	pCtx->cs = uVector << 8;
1329	pCtx->csHid.u64Base = uVector << 12;
1330	pCtx->csHid.u32Limit = 0x0000ffff;
1331	pCtx->rip = 0;
1332
1333	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1334
1335	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1336	EMSetState(pVCpu, EMSTATE_HALTED);
1337	return VINF_EM_RESCHEDULE;
1338	# else /* And if we go the VMCPU::enmState way it can stay here. */
1339	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1340	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1341	return VINF_SUCCESS;
1342	# endif
1343	}
1344
1345	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1346	{
1347	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1348	VMCPU_ASSERT_EMT(pVCpu);
1349
1350	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1351	CPUMR3ResetCpu(pVCpu);
1352	return VINF_EM_WAIT_SIPI;
1353	}
1354
1355	/**
1356	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1357	* and unhalting processor
1358	*
1359	* @param pVM The VM to operate on.
1360	* @param idCpu Virtual CPU to perform SIPI on
1361	* @param uVector SIPI vector
1362	*/
1363	VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1364	{
1365	AssertReturnVoid(idCpu < pVM->cCpus);
1366
1367	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1368	AssertRC(rc);
1369	}
1370
1371	/**
1372	* Sends init IPI to the virtual CPU.
1373	*
1374	* @param pVM The VM to operate on.
1375	* @param idCpu Virtual CPU to perform int IPI on
1376	*/
1377	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1378	{
1379	AssertReturnVoid(idCpu < pVM->cCpus);
1380
1381	int rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1382	AssertRC(rc);
1383	}
1384
1385	/**
1386	* Registers the guest memory range that can be used for patching
1387	*
1388	* @returns VBox status code.
1389	* @param pVM The VM to operate on.
1390	* @param pPatchMem Patch memory range
1391	* @param cbPatchMem Size of the memory range
1392	*/
1393	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1394	{
1395	if (HWACCMIsEnabled(pVM))
1396	return HWACMMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1397
1398	return VERR_NOT_SUPPORTED;
1399	}
1400
1401	/**
1402	* Deregisters the guest memory range that can be used for patching
1403	*
1404	* @returns VBox status code.
1405	* @param pVM The VM to operate on.
1406	* @param pPatchMem Patch memory range
1407	* @param cbPatchMem Size of the memory range
1408	*/
1409	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1410	{
1411	if (HWACCMIsEnabled(pVM))
1412	return HWACMMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1413
1414	return VINF_SUCCESS;
1415	}
1416
1417
1418	/**
1419	* VCPU worker for VMMR3SynchronizeAllVCpus.
1420	*
1421	* @param pVM The VM to operate on.
1422	* @param idCpu Virtual CPU to perform SIPI on
1423	* @param uVector SIPI vector
1424	*/
1425	DECLCALLBACK(int) vmmR3SyncVCpu(PVM pVM)
1426	{
1427	/* Block until the job in the caller has finished. */
1428	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1429	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1430	return VINF_SUCCESS;
1431	}
1432
1433
1434	/**
1435	* Atomically execute a callback handler
1436	* Note: This is very expensive; avoid using it frequently!
1437	*
1438	* @param pVM The VM to operate on.
1439	* @param pfnHandler Callback handler
1440	* @param pvUser User specified parameter
1441	*
1442	* @thread EMT
1443	* @todo Remove this if not used again soon.
1444	*/
1445	VMMR3DECL(int) VMMR3AtomicExecuteHandler(PVM pVM, PFNATOMICHANDLER pfnHandler, void *pvUser)
1446	{
1447	int rc;
1448	PVMCPU pVCpu = VMMGetCpu(pVM);
1449	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1450
1451	/* Shortcut for the uniprocessor case. */
1452	if (pVM->cCpus == 1)
1453	return pfnHandler(pVM, pvUser);
1454
1455	RTCritSectEnter(&pVM->vmm.s.CritSectSync);
1456	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
1457	{
1458	if (idCpu != pVCpu->idCpu)
1459	{
1460	rc = VMR3ReqCallNoWaitU(pVM->pUVM, idCpu, (PFNRT)vmmR3SyncVCpu, 1, pVM);
1461	AssertRC(rc);
1462	}
1463	}
1464	/* Wait until all other VCPUs are waiting for us. */
1465	while (RTCritSectGetWaiters(&pVM->vmm.s.CritSectSync) != (int32_t)(pVM->cCpus - 1))
1466	RTThreadSleep(1);
1467
1468	rc = pfnHandler(pVM, pvUser);
1469	RTCritSectLeave(&pVM->vmm.s.CritSectSync);
1470	return rc;
1471	}
1472
1473
1474	/**
1475	* Count returns and have the last non-caller EMT wake up the caller.
1476	*
1477	* @returns VBox strict informational status code for EM scheduling. No failures
1478	* will be returned here, those are for the caller only.
1479	*
1480	* @param pVM The VM handle.
1481	*/
1482	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1483	{
1484	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1485	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1486	if (cReturned == pVM->cCpus - 1U)
1487	{
1488	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1489	AssertLogRelRC(rc);
1490	}
1491
1492	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1493	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1494	("%Rrc\n", rcRet),
1495	VERR_IPE_UNEXPECTED_INFO_STATUS);
1496	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1497	}
1498
1499
1500	/**
1501	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1502	*
1503	* @returns VBox strict informational status code for EM scheduling. No failures
1504	* will be returned here, those are for the caller only. When
1505	* fIsCaller is set, VINF_SUCCESS is always returned.
1506	*
1507	* @param pVM The VM handle.
1508	* @param pVCpu The VMCPU structure for the calling EMT.
1509	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1510	* not.
1511	* @param fFlags The flags.
1512	* @param pfnRendezvous The callback.
1513	* @param pvUser The user argument for the callback.
1514	*/
1515	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1516	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1517	{
1518	int rc;
1519
1520	/*
1521	* Enter, the last EMT triggers the next callback phase.
1522	*/
1523	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1524	if (cEntered != pVM->cCpus)
1525	{
1526	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1527	{
1528	/* Wait for our turn. */
1529	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1530	AssertLogRelRC(rc);
1531	}
1532	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1533	{
1534	/* Wait for the last EMT to arrive and wake everyone up. */
1535	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1536	AssertLogRelRC(rc);
1537	}
1538	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1539	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1540	{
1541	/* Wait for our turn. */
1542	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1543	AssertLogRelRC(rc);
1544	}
1545	else
1546	{
1547	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1548
1549	/*
1550	* The execute once is handled specially to optimize the code flow.
1551	*
1552	* The last EMT to arrive will perform the callback and the other
1553	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1554	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1555	* returns, that EMT will initiate the normal return sequence.
1556	*/
1557	if (!fIsCaller)
1558	{
1559	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1560	AssertLogRelRC(rc);
1561
1562	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1563	}
1564	return VINF_SUCCESS;
1565	}
1566	}
1567	else
1568	{
1569	/*
1570	* All EMTs are waiting, clear the FF and take action according to the
1571	* execution method.
1572	*/
1573	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1574
1575	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1576	{
1577	/* Wake up everyone. */
1578	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1579	AssertLogRelRC(rc);
1580	}
1581	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1582	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1583	{
1584	/* Figure out who to wake up and wake it up. If it's ourself, then
1585	it's easy otherwise wait for our turn. */
1586	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1587	? 0
1588	: pVM->cCpus - 1U;
1589	if (pVCpu->idCpu != iFirst)
1590	{
1591	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1592	AssertLogRelRC(rc);
1593	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1594	AssertLogRelRC(rc);
1595	}
1596	}
1597	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1598	}
1599
1600
1601	/*
1602	* Do the callback and update the status if necessary.
1603	*/
1604	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1605	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1606	{
1607	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1608	if (rcStrict != VINF_SUCCESS)
1609	{
1610	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1611	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1612	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1613	int32_t i32RendezvousStatus;
1614	do
1615	{
1616	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1617	if ( rcStrict == i32RendezvousStatus
1618	\|\| RT_FAILURE(i32RendezvousStatus)
1619	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1620	&& rcStrict > i32RendezvousStatus))
1621	break;
1622	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1623	}
1624	}
1625
1626	/*
1627	* Increment the done counter and take action depending on whether we're
1628	* the last to finish callback execution.
1629	*/
1630	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1631	if ( cDone != pVM->cCpus
1632	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1633	{
1634	/* Signal the next EMT? */
1635	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1636	{
1637	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1638	AssertLogRelRC(rc);
1639	}
1640	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1641	{
1642	Assert(cDone == pVCpu->idCpu + 1U);
1643	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1644	AssertLogRelRC(rc);
1645	}
1646	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1647	{
1648	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1649	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1650	AssertLogRelRC(rc);
1651	}
1652
1653	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1654	if (!fIsCaller)
1655	{
1656	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1657	AssertLogRelRC(rc);
1658	}
1659	}
1660	else
1661	{
1662	/* Callback execution is all done, tell the rest to return. */
1663	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1664	AssertLogRelRC(rc);
1665	}
1666
1667	if (!fIsCaller)
1668	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1669	return VINF_SUCCESS;
1670	}
1671
1672
1673	/**
1674	* Called in response to VM_FF_EMT_RENDEZVOUS.
1675	*
1676	* @returns VBox strict status code - EM scheduling. No errors will be returned
1677	* here, nor will any non-EM scheduling status codes be returned.
1678	*
1679	* @param pVM The VM handle
1680	* @param pVCpu The handle of the calling EMT.
1681	*
1682	* @thread EMT
1683	*/
1684	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1685	{
1686	return vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1687	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1688	}
1689
1690
1691	/**
1692	* EMT rendezvous.
1693	*
1694	* Gathers all the EMTs and execute some code on each of them, either in a one
1695	* by one fashion or all at once.
1696	*
1697	* @returns VBox strict status code. This will be the the first error,
1698	* VINF_SUCCESS, or an EM scheduling status code.
1699	*
1700	* @param pVM The VM handle.
1701	* @param fFlags Flags indicating execution methods. See
1702	* grp_VMMR3EmtRendezvous_fFlags.
1703	* @param pfnRendezvous The callback.
1704	* @param pvUser User argument for the callback.
1705	*
1706	* @thread Any.
1707	*/
1708	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1709	{
1710	/*
1711	* Validate input.
1712	*/
1713	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1714	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1715	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1716	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1717	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1718	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1719	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1720
1721	VBOXSTRICTRC rcStrict;
1722	PVMCPU pVCpu = VMMGetCpu(pVM);
1723	if (!pVCpu)
1724	/*
1725	* Forward the request to an EMT thread.
1726	*/
1727	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1728	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1729	else if (pVM->cCpus == 1)
1730	/*
1731	* Shortcut for the single EMT case.
1732	*/
1733	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1734	else
1735	{
1736	/*
1737	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1738	* lookout of the RENDEZVOUS FF.
1739	*/
1740	int rc;
1741	rcStrict = VINF_SUCCESS;
1742	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1743	{
1744	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1745	{
1746	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1747	{
1748	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1749	if ( rc != VINF_SUCCESS
1750	&& ( rcStrict == VINF_SUCCESS
1751	\|\| rcStrict > rc))
1752	rcStrict = rc;
1753	/** @todo Perhaps deal with termination here? */
1754	}
1755	ASMNopPause();
1756	}
1757	}
1758	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1759
1760	/*
1761	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1762	*/
1763	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1764	{
1765	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1766	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1767	}
1768	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1769	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1770	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1771	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1772	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1773	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1774	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1775	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1776	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1777	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1778	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1779
1780	/*
1781	* Set the FF and poke the other EMTs.
1782	*/
1783	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1784	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1785
1786	/*
1787	* Do the same ourselves.
1788	*/
1789	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1790
1791	/*
1792	* The caller waits for the other EMTs to be done and return before doing
1793	* the cleanup. This makes away with wakeup / reset races we would otherwise
1794	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1795	*/
1796	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1797	AssertLogRelRC(rc);
1798
1799	/*
1800	* Get the return code and clean up a little bit.
1801	*/
1802	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1803	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1804
1805	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1806
1807	/*
1808	* Merge rcStrict and rcMy.
1809	*/
1810	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1811	if ( rcMy != VINF_SUCCESS
1812	&& ( rcStrict == VINF_SUCCESS
1813	\|\| rcStrict > rcMy))
1814	rcStrict = rcMy;
1815	}
1816
1817	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1818	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1819	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1820	VERR_IPE_UNEXPECTED_INFO_STATUS);
1821	return VBOXSTRICTRC_VAL(rcStrict);
1822	}
1823
1824
1825	/**
1826	* Read from the ring 0 jump buffer stack
1827	*
1828	* @returns VBox status code.
1829	*
1830	* @param pVM Pointer to the shared VM structure.
1831	* @param idCpu The ID of the source CPU context (for the address).
1832	* @param R0Addr Where to start reading.
1833	* @param pvBuf Where to store the data we've read.
1834	* @param cbRead The number of bytes to read.
1835	*/
1836	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1837	{
1838	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1839	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1840
1841	#ifdef VMM_R0_SWITCH_STACK
1842	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1843	#else
1844	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1845	#endif
1846	if ( off > VMM_STACK_SIZE
1847	\|\| off + cbRead >= VMM_STACK_SIZE)
1848	return VERR_INVALID_POINTER;
1849
1850	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1851	return VINF_SUCCESS;
1852	}
1853
1854
1855	/**
1856	* Calls a RC function.
1857	*
1858	* @param pVM The VM handle.
1859	* @param RCPtrEntry The address of the RC function.
1860	* @param cArgs The number of arguments in the ....
1861	* @param ... Arguments to the function.
1862	*/
1863	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1864	{
1865	va_list args;
1866	va_start(args, cArgs);
1867	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1868	va_end(args);
1869	return rc;
1870	}
1871
1872
1873	/**
1874	* Calls a RC function.
1875	*
1876	* @param pVM The VM handle.
1877	* @param RCPtrEntry The address of the RC function.
1878	* @param cArgs The number of arguments in the ....
1879	* @param args Arguments to the function.
1880	*/
1881	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1882	{
1883	/* Raw mode implies 1 VCPU. */
1884	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1885	PVMCPU pVCpu = &pVM->aCpus[0];
1886
1887	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1888
1889	/*
1890	* Setup the call frame using the trampoline.
1891	*/
1892	CPUMHyperSetCtxCore(pVCpu, NULL);
1893	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1894	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32));
1895	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1896	int i = cArgs;
1897	while (i-- > 0)
1898	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1899
1900	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1901	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1902	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
1903
1904	/*
1905	* We hide log flushes (outer) and hypervisor interrupts (inner).
1906	*/
1907	for (;;)
1908	{
1909	int rc;
1910	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1911	do
1912	{
1913	#ifdef NO_SUPCALLR0VMM
1914	rc = VERR_GENERAL_FAILURE;
1915	#else
1916	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1917	if (RT_LIKELY(rc == VINF_SUCCESS))
1918	rc = pVCpu->vmm.s.iLastGZRc;
1919	#endif
1920	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1921
1922	/*
1923	* Flush the logs.
1924	*/
1925	#ifdef LOG_ENABLED
1926	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1927	if ( pLogger
1928	&& pLogger->offScratch > 0)
1929	RTLogFlushRC(NULL, pLogger);
1930	#endif
1931	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1932	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1933	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1934	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1935	#endif
1936	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1937	VMMR3FatalDump(pVM, pVCpu, rc);
1938	if (rc != VINF_VMM_CALL_HOST)
1939	{
1940	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1941	return rc;
1942	}
1943	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1944	if (RT_FAILURE(rc))
1945	return rc;
1946	}
1947	}
1948
1949
1950	/**
1951	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1952	*
1953	* @returns VBox status code.
1954	* @param pVM The VM to operate on.
1955	* @param uOperation Operation to execute.
1956	* @param u64Arg Constant argument.
1957	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1958	* details.
1959	*/
1960	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1961	{
1962	PVMCPU pVCpu = VMMGetCpu(pVM);
1963	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1964
1965	/*
1966	* Call Ring-0 entry with init code.
1967	*/
1968	int rc;
1969	for (;;)
1970	{
1971	#ifdef NO_SUPCALLR0VMM
1972	rc = VERR_GENERAL_FAILURE;
1973	#else
1974	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1975	#endif
1976	/*
1977	* Flush the logs.
1978	*/
1979	#ifdef LOG_ENABLED
1980	if ( pVCpu->vmm.s.pR0LoggerR3
1981	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
1982	RTLogFlushToLogger(&pVCpu->vmm.s.pR0LoggerR3->Logger, NULL);
1983	#endif
1984	if (rc != VINF_VMM_CALL_HOST)
1985	break;
1986	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1987	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
1988	break;
1989	/* Resume R0 */
1990	}
1991
1992	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
1993	("uOperation=%u rc=%Rrc\n", uOperation, rc),
1994	VERR_INTERNAL_ERROR);
1995	return rc;
1996	}
1997
1998
1999	/**
2000	* Resumes executing hypervisor code when interrupted by a queue flush or a
2001	* debug event.
2002	*
2003	* @returns VBox status code.
2004	* @param pVM VM handle.
2005	* @param pVCpu VMCPU handle.
2006	*/
2007	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2008	{
2009	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2010	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2011
2012	/*
2013	* We hide log flushes (outer) and hypervisor interrupts (inner).
2014	*/
2015	for (;;)
2016	{
2017	int rc;
2018	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2019	do
2020	{
2021	#ifdef NO_SUPCALLR0VMM
2022	rc = VERR_GENERAL_FAILURE;
2023	#else
2024	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2025	if (RT_LIKELY(rc == VINF_SUCCESS))
2026	rc = pVCpu->vmm.s.iLastGZRc;
2027	#endif
2028	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2029
2030	/*
2031	* Flush the loggers,
2032	*/
2033	#ifdef LOG_ENABLED
2034	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2035	if ( pLogger
2036	&& pLogger->offScratch > 0)
2037	RTLogFlushRC(NULL, pLogger);
2038	#endif
2039	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2040	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2041	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2042	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2043	#endif
2044	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2045	VMMR3FatalDump(pVM, pVCpu, rc);
2046	if (rc != VINF_VMM_CALL_HOST)
2047	{
2048	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2049	return rc;
2050	}
2051	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2052	if (RT_FAILURE(rc))
2053	return rc;
2054	}
2055	}
2056
2057
2058	/**
2059	* Service a call to the ring-3 host code.
2060	*
2061	* @returns VBox status code.
2062	* @param pVM VM handle.
2063	* @param pVCpu VMCPU handle
2064	* @remark Careful with critsects.
2065	*/
2066	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2067	{
2068	/*
2069	* We must also check for pending critsect exits or else we can deadlock
2070	* when entering other critsects here.
2071	*/
2072	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2073	PDMCritSectFF(pVCpu);
2074
2075	switch (pVCpu->vmm.s.enmCallRing3Operation)
2076	{
2077	/*
2078	* Acquire a critical section.
2079	*/
2080	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2081	{
2082	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2083	true /fCallRing3/);
2084	break;
2085	}
2086
2087	/*
2088	* Acquire the PDM lock.
2089	*/
2090	case VMMCALLRING3_PDM_LOCK:
2091	{
2092	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2093	break;
2094	}
2095
2096	/*
2097	* Grow the PGM pool.
2098	*/
2099	case VMMCALLRING3_PGM_POOL_GROW:
2100	{
2101	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2102	break;
2103	}
2104
2105	/*
2106	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2107	*/
2108	case VMMCALLRING3_PGM_MAP_CHUNK:
2109	{
2110	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2111	break;
2112	}
2113
2114	/*
2115	* Allocates more handy pages.
2116	*/
2117	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2118	{
2119	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2120	break;
2121	}
2122
2123	/*
2124	* Allocates a large page.
2125	*/
2126	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2127	{
2128	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2129	break;
2130	}
2131
2132	/*
2133	* Acquire the PGM lock.
2134	*/
2135	case VMMCALLRING3_PGM_LOCK:
2136	{
2137	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2138	break;
2139	}
2140
2141	/*
2142	* Acquire the MM hypervisor heap lock.
2143	*/
2144	case VMMCALLRING3_MMHYPER_LOCK:
2145	{
2146	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2147	break;
2148	}
2149
2150	/*
2151	* Flush REM handler notifications.
2152	*/
2153	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2154	{
2155	REMR3ReplayHandlerNotifications(pVM);
2156	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2157	break;
2158	}
2159
2160	/*
2161	* This is a noop. We just take this route to avoid unnecessary
2162	* tests in the loops.
2163	*/
2164	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2165	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2166	LogAlways(("FLUSH\n"));
2167	break;
2168
2169	/*
2170	* Set the VM error message.
2171	*/
2172	case VMMCALLRING3_VM_SET_ERROR:
2173	VMR3SetErrorWorker(pVM);
2174	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2175	break;
2176
2177	/*
2178	* Set the VM runtime error message.
2179	*/
2180	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2181	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2182	break;
2183
2184	/*
2185	* Signal a ring 0 hypervisor assertion.
2186	* Cancel the longjmp operation that's in progress.
2187	*/
2188	case VMMCALLRING3_VM_R0_ASSERTION:
2189	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2190	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2191	#ifdef RT_ARCH_X86
2192	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2193	#else
2194	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2195	#endif
2196	#ifdef VMM_R0_SWITCH_STACK
2197	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2198	#endif
2199	LogRel((pVM->vmm.s.szRing0AssertMsg1));
2200	LogRel((pVM->vmm.s.szRing0AssertMsg2));
2201	return VERR_VMM_RING0_ASSERTION;
2202
2203	/*
2204	* A forced switch to ring 0 for preemption purposes.
2205	*/
2206	case VMMCALLRING3_VM_R0_PREEMPT:
2207	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2208	break;
2209
2210	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2211	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2212	break;
2213
2214	default:
2215	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2216	return VERR_INTERNAL_ERROR;
2217	}
2218
2219	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2220	return VINF_SUCCESS;
2221	}
2222
2223
2224	/**
2225	* Displays the Force action Flags.
2226	*
2227	* @param pVM The VM handle.
2228	* @param pHlp The output helpers.
2229	* @param pszArgs The additional arguments (ignored).
2230	*/
2231	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2232	{
2233	int c;
2234	uint32_t f;
2235	#define PRINT_FLAG(prf,flag) do { \
2236	if (f & (prf##flag)) \
2237	{ \
2238	static const char *s_psz = #flag; \
2239	if (!(c % 6)) \
2240	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2241	else \
2242	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2243	c++; \
2244	f &= ~(prf##flag); \
2245	} \
2246	} while (0)
2247
2248	#define PRINT_GROUP(prf,grp,sfx) do { \
2249	if (f & (prf##grp##sfx)) \
2250	{ \
2251	static const char *s_psz = #grp; \
2252	if (!(c % 5)) \
2253	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2254	else \
2255	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2256	c++; \
2257	} \
2258	} while (0)
2259
2260	/*
2261	* The global flags.
2262	*/
2263	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2264	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2265
2266	/* show the flag mnemonics */
2267	c = 0;
2268	f = fGlobalForcedActions;
2269	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2270	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2271	PRINT_FLAG(VM_FF_,PDM_DMA);
2272	PRINT_FLAG(VM_FF_,DBGF);
2273	PRINT_FLAG(VM_FF_,REQUEST);
2274	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2275	PRINT_FLAG(VM_FF_,RESET);
2276	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2277	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2278	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2279	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2280	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2281	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2282	if (f)
2283	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2284	else
2285	pHlp->pfnPrintf(pHlp, "\n");
2286
2287	/* the groups */
2288	c = 0;
2289	f = fGlobalForcedActions;
2290	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2291	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2292	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2293	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2294	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2295	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2296	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2297	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2298	if (c)
2299	pHlp->pfnPrintf(pHlp, "\n");
2300
2301	/*
2302	* Per CPU flags.
2303	*/
2304	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2305	{
2306	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2307	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2308
2309	/* show the flag mnemonics */
2310	c = 0;
2311	f = fLocalForcedActions;
2312	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2313	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2314	PRINT_FLAG(VMCPU_FF_,TIMER);
2315	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2316	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2317	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2318	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2319	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2320	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2321	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2322	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2323	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2324	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2325	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2326	PRINT_FLAG(VMCPU_FF_,TO_R3);
2327	if (f)
2328	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2329	else
2330	pHlp->pfnPrintf(pHlp, "\n");
2331
2332	/* the groups */
2333	c = 0;
2334	f = fLocalForcedActions;
2335	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2336	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2337	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2338	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2339	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2340	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2341	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2342	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2343	PRINT_GROUP(VMCPU_FF_,HWACCM_TO_R3,_MASK);
2344	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2345	if (c)
2346	pHlp->pfnPrintf(pHlp, "\n");
2347	}
2348
2349	#undef PRINT_FLAG
2350	#undef PRINT_GROUP
2351	}
2352

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 37595

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