VMM.cpp@ 44410

Last change on this file since 44410 was 44394, checked in by vboxsync, 12 years ago
+VMMR3GetCpuByIdU, -FNATOMICHANDLER
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1	/* $Id: VMM.cpp 44394 2013-01-26 17:53:53Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*
48	* @sections sec_vmm_limits VMM Limits
49	*
50	* There are various resource limits imposed by the VMM and it's
51	* sub-components. We'll list some of them here.
52	*
53	* On 64-bit hosts:
54	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55	* can be increased up to 64K - 1.
56	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58	* - A VM can be assigned all the memory we can use (16TB), however, the
59	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61	*
62	* On 32-bit hosts:
63	* - Max 127 VMs. Imposed by GMM's per page structure.
64	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65	* ROM pages. The limit is imposed by the 28-bit page ID used
66	* internally in GMM. It is also limited by PAE.
67	* - A VM can be assigned all the memory GMM can allocate, however, the
68	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70	*
71	*/
72
73	/*******************************************************************************
74	* Header Files *
75	*******************************************************************************/
76	#define LOG_GROUP LOG_GROUP_VMM
77	#include <VBox/vmm/vmm.h>
78	#include <VBox/vmm/vmapi.h>
79	#include <VBox/vmm/pgm.h>
80	#include <VBox/vmm/cfgm.h>
81	#include <VBox/vmm/pdmqueue.h>
82	#include <VBox/vmm/pdmcritsect.h>
83	#include <VBox/vmm/pdmapi.h>
84	#include <VBox/vmm/cpum.h>
85	#include <VBox/vmm/mm.h>
86	#include <VBox/vmm/iom.h>
87	#include <VBox/vmm/trpm.h>
88	#include <VBox/vmm/selm.h>
89	#include <VBox/vmm/em.h>
90	#include <VBox/sup.h>
91	#include <VBox/vmm/dbgf.h>
92	#include <VBox/vmm/csam.h>
93	#include <VBox/vmm/patm.h>
94	#ifdef VBOX_WITH_REM
95	# include <VBox/vmm/rem.h>
96	#endif
97	#include <VBox/vmm/ssm.h>
98	#include <VBox/vmm/ftm.h>
99	#include <VBox/vmm/tm.h>
100	#include "VMMInternal.h"
101	#include "VMMSwitcher.h"
102	#include <VBox/vmm/vm.h>
103	#include <VBox/vmm/uvm.h>
104
105	#include <VBox/err.h>
106	#include <VBox/param.h>
107	#include <VBox/version.h>
108	#include <VBox/vmm/hm.h>
109	#include <iprt/assert.h>
110	#include <iprt/alloc.h>
111	#include <iprt/asm.h>
112	#include <iprt/time.h>
113	#include <iprt/semaphore.h>
114	#include <iprt/stream.h>
115	#include <iprt/string.h>
116	#include <iprt/stdarg.h>
117	#include <iprt/ctype.h>
118	#include <iprt/x86.h>
119
120
121
122	/*******************************************************************************
123	* Defined Constants And Macros *
124	*******************************************************************************/
125	/** The saved state version. */
126	#define VMM_SAVED_STATE_VERSION 4
127	/** The saved state version used by v3.0 and earlier. (Teleportation) */
128	#define VMM_SAVED_STATE_VERSION_3_0 3
129
130
131	/*******************************************************************************
132	* Internal Functions *
133	*******************************************************************************/
134	static int vmmR3InitStacks(PVM pVM);
135	static int vmmR3InitLoggers(PVM pVM);
136	static void vmmR3InitRegisterStats(PVM pVM);
137	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
138	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
139	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
140	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
141	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
142
143
144	/**
145	* Initializes the VMM.
146	*
147	* @returns VBox status code.
148	* @param pVM Pointer to the VM.
149	*/
150	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
151	{
152	LogFlow(("VMMR3Init\n"));
153
154	/*
155	* Assert alignment, sizes and order.
156	*/
157	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
158	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
159	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
160
161	/*
162	* Init basic VM VMM members.
163	*/
164	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
165	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
166	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
167	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
168	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
169	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
170
171	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
172	* The EMT yield interval. The EMT yielding is a hack we employ to play a
173	* bit nicer with the rest of the system (like for instance the GUI).
174	*/
175	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
176	23 /* Value arrived at after experimenting with the grub boot prompt. */);
177	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
178
179
180	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
181	* Controls whether we employ per-cpu preemption timers to limit the time
182	* spent executing guest code. This option is not available on all
183	* platforms and we will silently ignore this setting then. If we are
184	* running in VT-x mode, we will use the VMX-preemption timer instead of
185	* this one when possible.
186	*/
187	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
188	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
189	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
190
191	/*
192	* Initialize the VMM rendezvous semaphores.
193	*/
194	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
195	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
196	return VERR_NO_MEMORY;
197	for (VMCPUID i = 0; i < pVM->cCpus; i++)
198	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
199	for (VMCPUID i = 0; i < pVM->cCpus; i++)
200	{
201	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
202	AssertRCReturn(rc, rc);
203	}
204	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
205	AssertRCReturn(rc, rc);
206	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
207	AssertRCReturn(rc, rc);
208	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
209	AssertRCReturn(rc, rc);
210	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
211	AssertRCReturn(rc, rc);
212
213	/* GC switchers are enabled by default. Turned off by HM. */
214	pVM->vmm.s.fSwitcherDisabled = false;
215
216	/*
217	* Register the saved state data unit.
218	*/
219	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
220	NULL, NULL, NULL,
221	NULL, vmmR3Save, NULL,
222	NULL, vmmR3Load, NULL);
223	if (RT_FAILURE(rc))
224	return rc;
225
226	/*
227	* Register the Ring-0 VM handle with the session for fast ioctl calls.
228	*/
229	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
230	if (RT_FAILURE(rc))
231	return rc;
232
233	/*
234	* Init various sub-components.
235	*/
236	rc = vmmR3SwitcherInit(pVM);
237	if (RT_SUCCESS(rc))
238	{
239	rc = vmmR3InitStacks(pVM);
240	if (RT_SUCCESS(rc))
241	{
242	rc = vmmR3InitLoggers(pVM);
243
244	#ifdef VBOX_WITH_NMI
245	/*
246	* Allocate mapping for the host APIC.
247	*/
248	if (RT_SUCCESS(rc))
249	{
250	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
251	AssertRC(rc);
252	}
253	#endif
254	if (RT_SUCCESS(rc))
255	{
256	/*
257	* Debug info and statistics.
258	*/
259	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
260	vmmR3InitRegisterStats(pVM);
261	vmmInitFormatTypes();
262
263	return VINF_SUCCESS;
264	}
265	}
266	/** @todo: Need failure cleanup. */
267
268	//more todo in here?
269	//if (RT_SUCCESS(rc))
270	//{
271	//}
272	//int rc2 = vmmR3TermCoreCode(pVM);
273	//AssertRC(rc2));
274	}
275
276	return rc;
277	}
278
279
280	/**
281	* Allocate & setup the VMM RC stack(s) (for EMTs).
282	*
283	* The stacks are also used for long jumps in Ring-0.
284	*
285	* @returns VBox status code.
286	* @param pVM Pointer to the VM.
287	*
288	* @remarks The optional guard page gets it protection setup up during R3 init
289	* completion because of init order issues.
290	*/
291	static int vmmR3InitStacks(PVM pVM)
292	{
293	int rc = VINF_SUCCESS;
294	#ifdef VMM_R0_SWITCH_STACK
295	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
296	#else
297	uint32_t fFlags = 0;
298	#endif
299
300	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
301	{
302	PVMCPU pVCpu = &pVM->aCpus[idCpu];
303
304	#ifdef VBOX_STRICT_VMM_STACK
305	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
306	#else
307	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
308	#endif
309	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
310	if (RT_SUCCESS(rc))
311	{
312	#ifdef VBOX_STRICT_VMM_STACK
313	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
314	#endif
315	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
316	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
317	if (!VMMIsHwVirtExtForced(pVM))
318	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
319	else
320	#endif
321	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
322	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
323	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
324	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
325
326	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
327	}
328	}
329
330	return rc;
331	}
332
333
334	/**
335	* Initialize the loggers.
336	*
337	* @returns VBox status code.
338	* @param pVM Pointer to the VM.
339	*/
340	static int vmmR3InitLoggers(PVM pVM)
341	{
342	int rc;
343	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
344
345	/*
346	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
347	*/
348	#ifdef LOG_ENABLED
349	PRTLOGGER pLogger = RTLogDefaultInstance();
350	if (pLogger)
351	{
352	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
353	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
354	if (RT_FAILURE(rc))
355	return rc;
356	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
357
358	# ifdef VBOX_WITH_R0_LOGGING
359	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
360	for (VMCPUID i = 0; i < pVM->cCpus; i++)
361	{
362	PVMCPU pVCpu = &pVM->aCpus[i];
363	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
364	(void **)&pVCpu->vmm.s.pR0LoggerR3);
365	if (RT_FAILURE(rc))
366	return rc;
367	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
368	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
369	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
370	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
371	}
372	# endif
373	}
374	#endif /* LOG_ENABLED */
375
376	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
377	/*
378	* Allocate RC release logger instances (finalized in the relocator).
379	*/
380	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
381	if (pRelLogger)
382	{
383	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
384	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
385	if (RT_FAILURE(rc))
386	return rc;
387	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
388	}
389	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
390	return VINF_SUCCESS;
391	}
392
393
394	/**
395	* VMMR3Init worker that register the statistics with STAM.
396	*
397	* @param pVM The shared VM structure.
398	*/
399	static void vmmR3InitRegisterStats(PVM pVM)
400	{
401	/*
402	* Statistics.
403	*/
404	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
405	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
436	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
446	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
447	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
448	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
449	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
450	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
451	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
452	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
463
464	#ifdef VBOX_WITH_STATISTICS
465	for (VMCPUID i = 0; i < pVM->cCpus; i++)
466	{
467	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
468	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
469	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
470	}
471	#endif
472	}
473
474
475	/**
476	* Initializes the R0 VMM.
477	*
478	* @returns VBox status code.
479	* @param pVM Pointer to the VM.
480	*/
481	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
482	{
483	int rc;
484	PVMCPU pVCpu = VMMGetCpu(pVM);
485	Assert(pVCpu && pVCpu->idCpu == 0);
486
487	#ifdef LOG_ENABLED
488	/*
489	* Initialize the ring-0 logger if we haven't done so yet.
490	*/
491	if ( pVCpu->vmm.s.pR0LoggerR3
492	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
493	{
494	rc = VMMR3UpdateLoggers(pVM);
495	if (RT_FAILURE(rc))
496	return rc;
497	}
498	#endif
499
500	/*
501	* Call Ring-0 entry with init code.
502	*/
503	for (;;)
504	{
505	#ifdef NO_SUPCALLR0VMM
506	//rc = VERR_GENERAL_FAILURE;
507	rc = VINF_SUCCESS;
508	#else
509	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
510	#endif
511	/*
512	* Flush the logs.
513	*/
514	#ifdef LOG_ENABLED
515	if ( pVCpu->vmm.s.pR0LoggerR3
516	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
517	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
518	#endif
519	if (rc != VINF_VMM_CALL_HOST)
520	break;
521	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
522	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
523	break;
524	/* Resume R0 */
525	}
526
527	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
528	{
529	LogRel(("R0 init failed, rc=%Rra\n", rc));
530	if (RT_SUCCESS(rc))
531	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
532	}
533	return rc;
534	}
535
536
537	/**
538	* Initializes the RC VMM.
539	*
540	* @returns VBox status code.
541	* @param pVM Pointer to the VM.
542	*/
543	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
544	{
545	PVMCPU pVCpu = VMMGetCpu(pVM);
546	Assert(pVCpu && pVCpu->idCpu == 0);
547
548	/* In VMX mode, there's no need to init RC. */
549	if (pVM->vmm.s.fSwitcherDisabled)
550	return VINF_SUCCESS;
551
552	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
553
554	/*
555	* Call VMMGCInit():
556	* -# resolve the address.
557	* -# setup stackframe and EIP to use the trampoline.
558	* -# do a generic hypervisor call.
559	*/
560	RTRCPTR RCPtrEP;
561	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
562	if (RT_SUCCESS(rc))
563	{
564	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
565	uint64_t u64TS = RTTimeProgramStartNanoTS();
566	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
567	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
568	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
569	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
570	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
571	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
572	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
573	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
574	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
575
576	for (;;)
577	{
578	#ifdef NO_SUPCALLR0VMM
579	//rc = VERR_GENERAL_FAILURE;
580	rc = VINF_SUCCESS;
581	#else
582	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
583	#endif
584	#ifdef LOG_ENABLED
585	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
586	if ( pLogger
587	&& pLogger->offScratch > 0)
588	RTLogFlushRC(NULL, pLogger);
589	#endif
590	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
591	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
592	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
593	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
594	#endif
595	if (rc != VINF_VMM_CALL_HOST)
596	break;
597	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
598	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
599	break;
600	}
601
602	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
603	{
604	VMMR3FatalDump(pVM, pVCpu, rc);
605	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
606	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
607	}
608	AssertRC(rc);
609	}
610	return rc;
611	}
612
613
614	/**
615	* Called when an init phase completes.
616	*
617	* @returns VBox status code.
618	* @param pVM Pointer to the VM.
619	* @param enmWhat Which init phase.
620	*/
621	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
622	{
623	int rc = VINF_SUCCESS;
624
625	switch (enmWhat)
626	{
627	case VMINITCOMPLETED_RING3:
628	{
629	/*
630	* CPUM's post-initialization (APIC base MSR caching).
631	*/
632	rc = CPUMR3InitCompleted(pVM);
633	AssertRCReturn(rc, rc);
634
635	/*
636	* Set page attributes to r/w for stack pages.
637	*/
638	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
639	{
640	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
641	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
642	AssertRCReturn(rc, rc);
643	}
644
645	/*
646	* Create the EMT yield timer.
647	*/
648	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
649	AssertRCReturn(rc, rc);
650
651	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
652	AssertRCReturn(rc, rc);
653
654	#ifdef VBOX_WITH_NMI
655	/*
656	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
657	*/
658	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
659	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
660	AssertRCReturn(rc, rc);
661	#endif
662
663	#ifdef VBOX_STRICT_VMM_STACK
664	/*
665	* Setup the stack guard pages: Two inaccessible pages at each sides of the
666	* stack to catch over/under-flows.
667	*/
668	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
669	{
670	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
671
672	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
673	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
674
675	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
676	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
677	}
678	pVM->vmm.s.fStackGuardsStationed = true;
679	#endif
680	break;
681	}
682
683	case VMINITCOMPLETED_RING0:
684	{
685	/*
686	* Disable the periodic preemption timers if we can use the
687	* VMX-preemption timer instead.
688	*/
689	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
690	&& HMR3IsVmxPreemptionTimerUsed(pVM))
691	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
692	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
693
694	/*
695	* CPUM's post-initialization (print CPUIDs).
696	*/
697	CPUMR3LogCpuIds(pVM);
698	break;
699	}
700
701	default: /* shuts up gcc */
702	break;
703	}
704
705	return rc;
706	}
707
708
709	/**
710	* Terminate the VMM bits.
711	*
712	* @returns VINF_SUCCESS.
713	* @param pVM Pointer to the VM.
714	*/
715	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
716	{
717	PVMCPU pVCpu = VMMGetCpu(pVM);
718	Assert(pVCpu && pVCpu->idCpu == 0);
719
720	/*
721	* Call Ring-0 entry with termination code.
722	*/
723	int rc;
724	for (;;)
725	{
726	#ifdef NO_SUPCALLR0VMM
727	//rc = VERR_GENERAL_FAILURE;
728	rc = VINF_SUCCESS;
729	#else
730	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
731	#endif
732	/*
733	* Flush the logs.
734	*/
735	#ifdef LOG_ENABLED
736	if ( pVCpu->vmm.s.pR0LoggerR3
737	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
738	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
739	#endif
740	if (rc != VINF_VMM_CALL_HOST)
741	break;
742	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
743	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
744	break;
745	/* Resume R0 */
746	}
747	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
748	{
749	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
750	if (RT_SUCCESS(rc))
751	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
752	}
753
754	for (VMCPUID i = 0; i < pVM->cCpus; i++)
755	{
756	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
757	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
758	}
759	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
760	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
761	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
762	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
763	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
764	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
765	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
766	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
767
768	#ifdef VBOX_STRICT_VMM_STACK
769	/*
770	* Make the two stack guard pages present again.
771	*/
772	if (pVM->vmm.s.fStackGuardsStationed)
773	{
774	for (VMCPUID i = 0; i < pVM->cCpus; i++)
775	{
776	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
777	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
778	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
779	}
780	pVM->vmm.s.fStackGuardsStationed = false;
781	}
782	#endif
783
784	vmmTermFormatTypes();
785	return rc;
786	}
787
788
789	/**
790	* Applies relocations to data and code managed by this
791	* component. This function will be called at init and
792	* whenever the VMM need to relocate it self inside the GC.
793	*
794	* The VMM will need to apply relocations to the core code.
795	*
796	* @param pVM Pointer to the VM.
797	* @param offDelta The relocation delta.
798	*/
799	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
800	{
801	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
802
803	/*
804	* Recalc the RC address.
805	*/
806	#ifdef VBOX_WITH_RAW_MODE
807	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
808	#endif
809
810	/*
811	* The stack.
812	*/
813	for (VMCPUID i = 0; i < pVM->cCpus; i++)
814	{
815	PVMCPU pVCpu = &pVM->aCpus[i];
816
817	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
818
819	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
820	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
821	}
822
823	/*
824	* All the switchers.
825	*/
826	vmmR3SwitcherRelocate(pVM, offDelta);
827
828	/*
829	* Get other RC entry points.
830	*/
831	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
832	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
833
834	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
835	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
836
837	/*
838	* Update the logger.
839	*/
840	VMMR3UpdateLoggers(pVM);
841	}
842
843
844	/**
845	* Updates the settings for the RC and R0 loggers.
846	*
847	* @returns VBox status code.
848	* @param pVM Pointer to the VM.
849	*/
850	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
851	{
852	/*
853	* Simply clone the logger instance (for RC).
854	*/
855	int rc = VINF_SUCCESS;
856	RTRCPTR RCPtrLoggerFlush = 0;
857
858	if (pVM->vmm.s.pRCLoggerR3
859	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
860	\|\| pVM->vmm.s.pRCRelLoggerR3
861	#endif
862	)
863	{
864	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
865	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
866	}
867
868	if (pVM->vmm.s.pRCLoggerR3)
869	{
870	RTRCPTR RCPtrLoggerWrapper = 0;
871	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
872	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
873
874	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
875	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
876	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
877	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
878	}
879
880	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
881	if (pVM->vmm.s.pRCRelLoggerR3)
882	{
883	RTRCPTR RCPtrLoggerWrapper = 0;
884	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
885	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
886
887	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
888	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
889	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
890	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
891	}
892	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
893
894	#ifdef LOG_ENABLED
895	/*
896	* For the ring-0 EMT logger, we use a per-thread logger instance
897	* in ring-0. Only initialize it once.
898	*/
899	PRTLOGGER const pDefault = RTLogDefaultInstance();
900	for (VMCPUID i = 0; i < pVM->cCpus; i++)
901	{
902	PVMCPU pVCpu = &pVM->aCpus[i];
903	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
904	if (pR0LoggerR3)
905	{
906	if (!pR0LoggerR3->fCreated)
907	{
908	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
909	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
910	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
911
912	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
913	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
914	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
915
916	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
917	pfnLoggerWrapper, pfnLoggerFlush,
918	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
919	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
920
921	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
922	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
923	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
924	rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pfnLoggerPrefix, NIL_RTR0PTR);
925	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
926
927	pR0LoggerR3->idCpu = i;
928	pR0LoggerR3->fCreated = true;
929	pR0LoggerR3->fFlushingDisabled = false;
930
931	}
932
933	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger), pDefault,
934	RTLOGFLAGS_BUFFERED, UINT32_MAX);
935	AssertRC(rc);
936	}
937	}
938	#endif
939	return rc;
940	}
941
942
943	/**
944	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
945	*
946	* @returns Pointer to the buffer.
947	* @param pVM Pointer to the VM.
948	*/
949	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
950	{
951	if (HMIsEnabled(pVM))
952	return pVM->vmm.s.szRing0AssertMsg1;
953
954	RTRCPTR RCPtr;
955	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
956	if (RT_SUCCESS(rc))
957	return (const char *)MMHyperRCToR3(pVM, RCPtr);
958
959	return NULL;
960	}
961
962
963	/**
964	* Returns the VMCPU of the specified virtual CPU.
965	*
966	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
967	*
968	* @param pUVM The user mode VM handle.
969	* @param idCpu The ID of the virtual CPU.
970	*/
971	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
972	{
973	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
974	AssertReturn(idCpu < pUVM->cCpus, NULL);
975	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
976	return &pUVM->pVM->aCpus[idCpu];
977	}
978
979
980	/**
981	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
982	*
983	* @returns Pointer to the buffer.
984	* @param pVM Pointer to the VM.
985	*/
986	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
987	{
988	if (HMIsEnabled(pVM))
989	return pVM->vmm.s.szRing0AssertMsg2;
990
991	RTRCPTR RCPtr;
992	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
993	if (RT_SUCCESS(rc))
994	return (const char *)MMHyperRCToR3(pVM, RCPtr);
995
996	return NULL;
997	}
998
999
1000	/**
1001	* Execute state save operation.
1002	*
1003	* @returns VBox status code.
1004	* @param pVM Pointer to the VM.
1005	* @param pSSM SSM operation handle.
1006	*/
1007	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1008	{
1009	LogFlow(("vmmR3Save:\n"));
1010
1011	/*
1012	* Save the started/stopped state of all CPUs except 0 as it will always
1013	* be running. This avoids breaking the saved state version. :-)
1014	*/
1015	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1016	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1017
1018	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1019	}
1020
1021
1022	/**
1023	* Execute state load operation.
1024	*
1025	* @returns VBox status code.
1026	* @param pVM Pointer to the VM.
1027	* @param pSSM SSM operation handle.
1028	* @param uVersion Data layout version.
1029	* @param uPass The data pass.
1030	*/
1031	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1032	{
1033	LogFlow(("vmmR3Load:\n"));
1034	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1035
1036	/*
1037	* Validate version.
1038	*/
1039	if ( uVersion != VMM_SAVED_STATE_VERSION
1040	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1041	{
1042	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1043	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1044	}
1045
1046	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1047	{
1048	/* Ignore the stack bottom, stack pointer and stack bits. */
1049	RTRCPTR RCPtrIgnored;
1050	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1051	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1052	#ifdef RT_OS_DARWIN
1053	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1054	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1055	&& SSMR3HandleRevision(pSSM) >= 48858
1056	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1057	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1058	)
1059	SSMR3Skip(pSSM, 16384);
1060	else
1061	SSMR3Skip(pSSM, 8192);
1062	#else
1063	SSMR3Skip(pSSM, 8192);
1064	#endif
1065	}
1066
1067	/*
1068	* Restore the VMCPU states. VCPU 0 is always started.
1069	*/
1070	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1071	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1072	{
1073	bool fStarted;
1074	int rc = SSMR3GetBool(pSSM, &fStarted);
1075	if (RT_FAILURE(rc))
1076	return rc;
1077	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1078	}
1079
1080	/* terminator */
1081	uint32_t u32;
1082	int rc = SSMR3GetU32(pSSM, &u32);
1083	if (RT_FAILURE(rc))
1084	return rc;
1085	if (u32 != UINT32_MAX)
1086	{
1087	AssertMsgFailed(("u32=%#x\n", u32));
1088	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1089	}
1090	return VINF_SUCCESS;
1091	}
1092
1093
1094	/**
1095	* Resolve a builtin RC symbol.
1096	*
1097	* Called by PDM when loading or relocating RC modules.
1098	*
1099	* @returns VBox status
1100	* @param pVM Pointer to the VM.
1101	* @param pszSymbol Symbol to resolv
1102	* @param pRCPtrValue Where to store the symbol value.
1103	*
1104	* @remark This has to work before VMMR3Relocate() is called.
1105	*/
1106	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1107	{
1108	if (!strcmp(pszSymbol, "g_Logger"))
1109	{
1110	if (pVM->vmm.s.pRCLoggerR3)
1111	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1112	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1113	}
1114	else if (!strcmp(pszSymbol, "g_RelLogger"))
1115	{
1116	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1117	if (pVM->vmm.s.pRCRelLoggerR3)
1118	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1119	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1120	#else
1121	*pRCPtrValue = NIL_RTRCPTR;
1122	#endif
1123	}
1124	else
1125	return VERR_SYMBOL_NOT_FOUND;
1126	return VINF_SUCCESS;
1127	}
1128
1129
1130	/**
1131	* Suspends the CPU yielder.
1132	*
1133	* @param pVM Pointer to the VM.
1134	*/
1135	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1136	{
1137	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1138	if (!pVM->vmm.s.cYieldResumeMillies)
1139	{
1140	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1141	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1142	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1143	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1144	else
1145	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1146	TMTimerStop(pVM->vmm.s.pYieldTimer);
1147	}
1148	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1149	}
1150
1151
1152	/**
1153	* Stops the CPU yielder.
1154	*
1155	* @param pVM Pointer to the VM.
1156	*/
1157	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1158	{
1159	if (!pVM->vmm.s.cYieldResumeMillies)
1160	TMTimerStop(pVM->vmm.s.pYieldTimer);
1161	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1162	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1163	}
1164
1165
1166	/**
1167	* Resumes the CPU yielder when it has been a suspended or stopped.
1168	*
1169	* @param pVM Pointer to the VM.
1170	*/
1171	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1172	{
1173	if (pVM->vmm.s.cYieldResumeMillies)
1174	{
1175	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1176	pVM->vmm.s.cYieldResumeMillies = 0;
1177	}
1178	}
1179
1180
1181	/**
1182	* Internal timer callback function.
1183	*
1184	* @param pVM The VM.
1185	* @param pTimer The timer handle.
1186	* @param pvUser User argument specified upon timer creation.
1187	*/
1188	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1189	{
1190	NOREF(pvUser);
1191
1192	/*
1193	* This really needs some careful tuning. While we shouldn't be too greedy since
1194	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1195	* because that'll cause us to stop up.
1196	*
1197	* The current logic is to use the default interval when there is no lag worth
1198	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1199	*
1200	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1201	* so the lag is up to date.)
1202	*/
1203	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1204	if ( u64Lag < 50000000 /* 50ms */
1205	\|\| ( u64Lag < 1000000000 /* 1s */
1206	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1207	)
1208	{
1209	uint64_t u64Elapsed = RTTimeNanoTS();
1210	pVM->vmm.s.u64LastYield = u64Elapsed;
1211
1212	RTThreadYield();
1213
1214	#ifdef LOG_ENABLED
1215	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1216	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1217	#endif
1218	}
1219	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1220	}
1221
1222
1223	/**
1224	* Executes guest code in the raw-mode context.
1225	*
1226	* @param pVM Pointer to the VM.
1227	* @param pVCpu Pointer to the VMCPU.
1228	*/
1229	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1230	{
1231	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1232
1233	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1234
1235	/*
1236	* Set the hypervisor to resume executing a CPUM resume function
1237	* in CPUMRCA.asm.
1238	*/
1239	CPUMSetHyperState(pVCpu,
1240	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1241	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1242	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1243	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1244	0, /* eax */
1245	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1246
1247	/*
1248	* We hide log flushes (outer) and hypervisor interrupts (inner).
1249	*/
1250	for (;;)
1251	{
1252	#ifdef VBOX_STRICT
1253	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1254	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1255	PGMMapCheck(pVM);
1256	#endif
1257	int rc;
1258	do
1259	{
1260	#ifdef NO_SUPCALLR0VMM
1261	rc = VERR_GENERAL_FAILURE;
1262	#else
1263	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1264	if (RT_LIKELY(rc == VINF_SUCCESS))
1265	rc = pVCpu->vmm.s.iLastGZRc;
1266	#endif
1267	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1268
1269	/*
1270	* Flush the logs.
1271	*/
1272	#ifdef LOG_ENABLED
1273	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1274	if ( pLogger
1275	&& pLogger->offScratch > 0)
1276	RTLogFlushRC(NULL, pLogger);
1277	#endif
1278	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1279	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1280	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1281	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1282	#endif
1283	if (rc != VINF_VMM_CALL_HOST)
1284	{
1285	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1286	return rc;
1287	}
1288	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1289	if (RT_FAILURE(rc))
1290	return rc;
1291	/* Resume GC */
1292	}
1293	}
1294
1295
1296	/**
1297	* Executes guest code (Intel VT-x and AMD-V).
1298	*
1299	* @param pVM Pointer to the VM.
1300	* @param pVCpu Pointer to the VMCPU.
1301	*/
1302	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1303	{
1304	Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1305
1306	for (;;)
1307	{
1308	int rc;
1309	do
1310	{
1311	#ifdef NO_SUPCALLR0VMM
1312	rc = VERR_GENERAL_FAILURE;
1313	#else
1314	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1315	if (RT_LIKELY(rc == VINF_SUCCESS))
1316	rc = pVCpu->vmm.s.iLastGZRc;
1317	#endif
1318	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1319
1320	#if 0 /* todo triggers too often */
1321	Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1322	#endif
1323
1324	#ifdef LOG_ENABLED
1325	/*
1326	* Flush the log
1327	*/
1328	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1329	if ( pR0LoggerR3
1330	&& pR0LoggerR3->Logger.offScratch > 0)
1331	RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1332	#endif /* !LOG_ENABLED */
1333	if (rc != VINF_VMM_CALL_HOST)
1334	{
1335	Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1336	return rc;
1337	}
1338	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1339	if (RT_FAILURE(rc))
1340	return rc;
1341	/* Resume R0 */
1342	}
1343	}
1344
1345	/**
1346	* VCPU worker for VMMSendSipi.
1347	*
1348	* @param pVM Pointer to the VM.
1349	* @param idCpu Virtual CPU to perform SIPI on
1350	* @param uVector SIPI vector
1351	*/
1352	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1353	{
1354	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1355	VMCPU_ASSERT_EMT(pVCpu);
1356
1357	/** @todo what are we supposed to do if the processor is already running? */
1358	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1359	return VERR_ACCESS_DENIED;
1360
1361
1362	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1363
1364	pCtx->cs.Sel = uVector << 8;
1365	pCtx->cs.ValidSel = uVector << 8;
1366	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1367	pCtx->cs.u64Base = uVector << 12;
1368	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1369	pCtx->rip = 0;
1370
1371	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", uVector));
1372
1373	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1374	EMSetState(pVCpu, EMSTATE_HALTED);
1375	return VINF_EM_RESCHEDULE;
1376	# else /* And if we go the VMCPU::enmState way it can stay here. */
1377	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1378	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1379	return VINF_SUCCESS;
1380	# endif
1381	}
1382
1383	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1384	{
1385	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1386	VMCPU_ASSERT_EMT(pVCpu);
1387
1388	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1389	CPUMR3ResetCpu(pVCpu);
1390	return VINF_EM_WAIT_SIPI;
1391	}
1392
1393	/**
1394	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1395	* and unhalting processor
1396	*
1397	* @param pVM Pointer to the VM.
1398	* @param idCpu Virtual CPU to perform SIPI on
1399	* @param uVector SIPI vector
1400	*/
1401	VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1402	{
1403	AssertReturnVoid(idCpu < pVM->cCpus);
1404
1405	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1406	AssertRC(rc);
1407	}
1408
1409	/**
1410	* Sends init IPI to the virtual CPU.
1411	*
1412	* @param pVM Pointer to the VM.
1413	* @param idCpu Virtual CPU to perform int IPI on
1414	*/
1415	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1416	{
1417	AssertReturnVoid(idCpu < pVM->cCpus);
1418
1419	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1420	AssertRC(rc);
1421	}
1422
1423	/**
1424	* Registers the guest memory range that can be used for patching
1425	*
1426	* @returns VBox status code.
1427	* @param pVM Pointer to the VM.
1428	* @param pPatchMem Patch memory range
1429	* @param cbPatchMem Size of the memory range
1430	*/
1431	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1432	{
1433	VM_ASSERT_EMT(pVM);
1434	if (HMIsEnabled(pVM))
1435	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1436
1437	return VERR_NOT_SUPPORTED;
1438	}
1439
1440	/**
1441	* Deregisters the guest memory range that can be used for patching
1442	*
1443	* @returns VBox status code.
1444	* @param pVM Pointer to the VM.
1445	* @param pPatchMem Patch memory range
1446	* @param cbPatchMem Size of the memory range
1447	*/
1448	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1449	{
1450	if (HMIsEnabled(pVM))
1451	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1452
1453	return VINF_SUCCESS;
1454	}
1455
1456
1457	/**
1458	* Count returns and have the last non-caller EMT wake up the caller.
1459	*
1460	* @returns VBox strict informational status code for EM scheduling. No failures
1461	* will be returned here, those are for the caller only.
1462	*
1463	* @param pVM Pointer to the VM.
1464	*/
1465	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1466	{
1467	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1468	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1469	if (cReturned == pVM->cCpus - 1U)
1470	{
1471	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1472	AssertLogRelRC(rc);
1473	}
1474
1475	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1476	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1477	("%Rrc\n", rcRet),
1478	VERR_IPE_UNEXPECTED_INFO_STATUS);
1479	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1480	}
1481
1482
1483	/**
1484	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1485	*
1486	* @returns VBox strict informational status code for EM scheduling. No failures
1487	* will be returned here, those are for the caller only. When
1488	* fIsCaller is set, VINF_SUCCESS is always returned.
1489	*
1490	* @param pVM Pointer to the VM.
1491	* @param pVCpu The VMCPU structure for the calling EMT.
1492	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1493	* not.
1494	* @param fFlags The flags.
1495	* @param pfnRendezvous The callback.
1496	* @param pvUser The user argument for the callback.
1497	*/
1498	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1499	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1500	{
1501	int rc;
1502
1503	/*
1504	* Enter, the last EMT triggers the next callback phase.
1505	*/
1506	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1507	if (cEntered != pVM->cCpus)
1508	{
1509	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1510	{
1511	/* Wait for our turn. */
1512	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1513	AssertLogRelRC(rc);
1514	}
1515	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1516	{
1517	/* Wait for the last EMT to arrive and wake everyone up. */
1518	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1519	AssertLogRelRC(rc);
1520	}
1521	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1522	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1523	{
1524	/* Wait for our turn. */
1525	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1526	AssertLogRelRC(rc);
1527	}
1528	else
1529	{
1530	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1531
1532	/*
1533	* The execute once is handled specially to optimize the code flow.
1534	*
1535	* The last EMT to arrive will perform the callback and the other
1536	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1537	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1538	* returns, that EMT will initiate the normal return sequence.
1539	*/
1540	if (!fIsCaller)
1541	{
1542	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1543	AssertLogRelRC(rc);
1544
1545	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1546	}
1547	return VINF_SUCCESS;
1548	}
1549	}
1550	else
1551	{
1552	/*
1553	* All EMTs are waiting, clear the FF and take action according to the
1554	* execution method.
1555	*/
1556	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1557
1558	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1559	{
1560	/* Wake up everyone. */
1561	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1562	AssertLogRelRC(rc);
1563	}
1564	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1565	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1566	{
1567	/* Figure out who to wake up and wake it up. If it's ourself, then
1568	it's easy otherwise wait for our turn. */
1569	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1570	? 0
1571	: pVM->cCpus - 1U;
1572	if (pVCpu->idCpu != iFirst)
1573	{
1574	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1575	AssertLogRelRC(rc);
1576	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1577	AssertLogRelRC(rc);
1578	}
1579	}
1580	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1581	}
1582
1583
1584	/*
1585	* Do the callback and update the status if necessary.
1586	*/
1587	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1588	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1589	{
1590	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1591	if (rcStrict != VINF_SUCCESS)
1592	{
1593	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1594	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1595	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1596	int32_t i32RendezvousStatus;
1597	do
1598	{
1599	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1600	if ( rcStrict == i32RendezvousStatus
1601	\|\| RT_FAILURE(i32RendezvousStatus)
1602	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1603	&& rcStrict > i32RendezvousStatus))
1604	break;
1605	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1606	}
1607	}
1608
1609	/*
1610	* Increment the done counter and take action depending on whether we're
1611	* the last to finish callback execution.
1612	*/
1613	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1614	if ( cDone != pVM->cCpus
1615	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1616	{
1617	/* Signal the next EMT? */
1618	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1619	{
1620	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1621	AssertLogRelRC(rc);
1622	}
1623	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1624	{
1625	Assert(cDone == pVCpu->idCpu + 1U);
1626	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1627	AssertLogRelRC(rc);
1628	}
1629	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1630	{
1631	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1632	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1633	AssertLogRelRC(rc);
1634	}
1635
1636	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1637	if (!fIsCaller)
1638	{
1639	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1640	AssertLogRelRC(rc);
1641	}
1642	}
1643	else
1644	{
1645	/* Callback execution is all done, tell the rest to return. */
1646	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1647	AssertLogRelRC(rc);
1648	}
1649
1650	if (!fIsCaller)
1651	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1652	return VINF_SUCCESS;
1653	}
1654
1655
1656	/**
1657	* Called in response to VM_FF_EMT_RENDEZVOUS.
1658	*
1659	* @returns VBox strict status code - EM scheduling. No errors will be returned
1660	* here, nor will any non-EM scheduling status codes be returned.
1661	*
1662	* @param pVM Pointer to the VM.
1663	* @param pVCpu The handle of the calling EMT.
1664	*
1665	* @thread EMT
1666	*/
1667	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1668	{
1669	Assert(!pVCpu->vmm.s.fInRendezvous);
1670	pVCpu->vmm.s.fInRendezvous = true;
1671	int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1672	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1673	pVCpu->vmm.s.fInRendezvous = false;
1674	return rc;
1675	}
1676
1677
1678	/**
1679	* EMT rendezvous.
1680	*
1681	* Gathers all the EMTs and execute some code on each of them, either in a one
1682	* by one fashion or all at once.
1683	*
1684	* @returns VBox strict status code. This will be the first error,
1685	* VINF_SUCCESS, or an EM scheduling status code.
1686	*
1687	* @param pVM Pointer to the VM.
1688	* @param fFlags Flags indicating execution methods. See
1689	* grp_VMMR3EmtRendezvous_fFlags.
1690	* @param pfnRendezvous The callback.
1691	* @param pvUser User argument for the callback.
1692	*
1693	* @thread Any.
1694	*/
1695	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1696	{
1697	/*
1698	* Validate input.
1699	*/
1700	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1701	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1702	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1703	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1704	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1705	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1706	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1707	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1708
1709	VBOXSTRICTRC rcStrict;
1710	PVMCPU pVCpu = VMMGetCpu(pVM);
1711	if (!pVCpu)
1712	/*
1713	* Forward the request to an EMT thread.
1714	*/
1715	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1716	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1717	else if (pVM->cCpus == 1)
1718	{
1719	/*
1720	* Shortcut for the single EMT case.
1721	*/
1722	AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1723	pVCpu->vmm.s.fInRendezvous = true;
1724	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1725	pVCpu->vmm.s.fInRendezvous = false;
1726	}
1727	else
1728	{
1729	/*
1730	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1731	* lookout of the RENDEZVOUS FF.
1732	*/
1733	int rc;
1734	rcStrict = VINF_SUCCESS;
1735	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1736	{
1737	AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1738
1739	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1740	{
1741	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1742	{
1743	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1744	if ( rc != VINF_SUCCESS
1745	&& ( rcStrict == VINF_SUCCESS
1746	\|\| rcStrict > rc))
1747	rcStrict = rc;
1748	/** @todo Perhaps deal with termination here? */
1749	}
1750	ASMNopPause();
1751	}
1752	}
1753	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1754	Assert(!pVCpu->vmm.s.fInRendezvous);
1755	pVCpu->vmm.s.fInRendezvous = true;
1756
1757	/*
1758	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1759	*/
1760	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1761	{
1762	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1763	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1764	}
1765	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1766	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1767	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1768	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1769	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1770	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1771	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1772	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1773	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1774	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1775	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1776
1777	/*
1778	* Set the FF and poke the other EMTs.
1779	*/
1780	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1781	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1782
1783	/*
1784	* Do the same ourselves.
1785	*/
1786	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1787
1788	/*
1789	* The caller waits for the other EMTs to be done and return before doing
1790	* the cleanup. This makes away with wakeup / reset races we would otherwise
1791	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1792	*/
1793	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1794	AssertLogRelRC(rc);
1795
1796	/*
1797	* Get the return code and clean up a little bit.
1798	*/
1799	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1800	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1801
1802	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1803	pVCpu->vmm.s.fInRendezvous = false;
1804
1805	/*
1806	* Merge rcStrict and rcMy.
1807	*/
1808	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1809	if ( rcMy != VINF_SUCCESS
1810	&& ( rcStrict == VINF_SUCCESS
1811	\|\| rcStrict > rcMy))
1812	rcStrict = rcMy;
1813	}
1814
1815	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1816	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1817	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1818	VERR_IPE_UNEXPECTED_INFO_STATUS);
1819	return VBOXSTRICTRC_VAL(rcStrict);
1820	}
1821
1822
1823	/**
1824	* Disables/enables EMT rendezvous.
1825	*
1826	* This is used to make sure EMT rendezvous does not take place while
1827	* processing a priority request.
1828	*
1829	* @returns Old rendezvous-disabled state.
1830	* @param pVCpu The handle of the calling EMT.
1831	* @param fDisabled True if disabled, false if enabled.
1832	*/
1833	VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1834	{
1835	VMCPU_ASSERT_EMT(pVCpu);
1836	bool fOld = pVCpu->vmm.s.fInRendezvous;
1837	pVCpu->vmm.s.fInRendezvous = fDisabled;
1838	return fOld;
1839	}
1840
1841
1842	/**
1843	* Read from the ring 0 jump buffer stack
1844	*
1845	* @returns VBox status code.
1846	*
1847	* @param pVM Pointer to the VM.
1848	* @param idCpu The ID of the source CPU context (for the address).
1849	* @param R0Addr Where to start reading.
1850	* @param pvBuf Where to store the data we've read.
1851	* @param cbRead The number of bytes to read.
1852	*/
1853	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1854	{
1855	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1856	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1857
1858	#ifdef VMM_R0_SWITCH_STACK
1859	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1860	#else
1861	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1862	#endif
1863	if ( off > VMM_STACK_SIZE
1864	\|\| off + cbRead >= VMM_STACK_SIZE)
1865	return VERR_INVALID_POINTER;
1866
1867	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1868	return VINF_SUCCESS;
1869	}
1870
1871
1872	/**
1873	* Calls a RC function.
1874	*
1875	* @param pVM Pointer to the VM.
1876	* @param RCPtrEntry The address of the RC function.
1877	* @param cArgs The number of arguments in the ....
1878	* @param ... Arguments to the function.
1879	*/
1880	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1881	{
1882	va_list args;
1883	va_start(args, cArgs);
1884	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1885	va_end(args);
1886	return rc;
1887	}
1888
1889
1890	/**
1891	* Calls a RC function.
1892	*
1893	* @param pVM Pointer to the VM.
1894	* @param RCPtrEntry The address of the RC function.
1895	* @param cArgs The number of arguments in the ....
1896	* @param args Arguments to the function.
1897	*/
1898	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1899	{
1900	/* Raw mode implies 1 VCPU. */
1901	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1902	PVMCPU pVCpu = &pVM->aCpus[0];
1903
1904	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1905
1906	/*
1907	* Setup the call frame using the trampoline.
1908	*/
1909	CPUMSetHyperState(pVCpu,
1910	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1911	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1912	RCPtrEntry, /* eax */
1913	cArgs /* edx */
1914	);
1915
1916	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1917	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1918	int i = cArgs;
1919	while (i-- > 0)
1920	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1921
1922	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1923	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1924
1925	/*
1926	* We hide log flushes (outer) and hypervisor interrupts (inner).
1927	*/
1928	for (;;)
1929	{
1930	int rc;
1931	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1932	do
1933	{
1934	#ifdef NO_SUPCALLR0VMM
1935	rc = VERR_GENERAL_FAILURE;
1936	#else
1937	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1938	if (RT_LIKELY(rc == VINF_SUCCESS))
1939	rc = pVCpu->vmm.s.iLastGZRc;
1940	#endif
1941	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1942
1943	/*
1944	* Flush the loggers.
1945	*/
1946	#ifdef LOG_ENABLED
1947	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1948	if ( pLogger
1949	&& pLogger->offScratch > 0)
1950	RTLogFlushRC(NULL, pLogger);
1951	#endif
1952	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1953	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1954	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1955	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1956	#endif
1957	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1958	VMMR3FatalDump(pVM, pVCpu, rc);
1959	if (rc != VINF_VMM_CALL_HOST)
1960	{
1961	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1962	return rc;
1963	}
1964	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1965	if (RT_FAILURE(rc))
1966	return rc;
1967	}
1968	}
1969
1970
1971	/**
1972	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1973	*
1974	* @returns VBox status code.
1975	* @param pVM Pointer to the VM.
1976	* @param uOperation Operation to execute.
1977	* @param u64Arg Constant argument.
1978	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1979	* details.
1980	*/
1981	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1982	{
1983	PVMCPU pVCpu = VMMGetCpu(pVM);
1984	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1985
1986	/*
1987	* Call Ring-0 entry with init code.
1988	*/
1989	int rc;
1990	for (;;)
1991	{
1992	#ifdef NO_SUPCALLR0VMM
1993	rc = VERR_GENERAL_FAILURE;
1994	#else
1995	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
1996	#endif
1997	/*
1998	* Flush the logs.
1999	*/
2000	#ifdef LOG_ENABLED
2001	if ( pVCpu->vmm.s.pR0LoggerR3
2002	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2003	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2004	#endif
2005	if (rc != VINF_VMM_CALL_HOST)
2006	break;
2007	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2008	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2009	break;
2010	/* Resume R0 */
2011	}
2012
2013	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2014	("uOperation=%u rc=%Rrc\n", uOperation, rc),
2015	VERR_IPE_UNEXPECTED_INFO_STATUS);
2016	return rc;
2017	}
2018
2019
2020	/**
2021	* Resumes executing hypervisor code when interrupted by a queue flush or a
2022	* debug event.
2023	*
2024	* @returns VBox status code.
2025	* @param pVM Pointer to the VM.
2026	* @param pVCpu Pointer to the VMCPU.
2027	*/
2028	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2029	{
2030	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2031	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2032
2033	/*
2034	* We hide log flushes (outer) and hypervisor interrupts (inner).
2035	*/
2036	for (;;)
2037	{
2038	int rc;
2039	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2040	do
2041	{
2042	#ifdef NO_SUPCALLR0VMM
2043	rc = VERR_GENERAL_FAILURE;
2044	#else
2045	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2046	if (RT_LIKELY(rc == VINF_SUCCESS))
2047	rc = pVCpu->vmm.s.iLastGZRc;
2048	#endif
2049	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2050
2051	/*
2052	* Flush the loggers.
2053	*/
2054	#ifdef LOG_ENABLED
2055	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2056	if ( pLogger
2057	&& pLogger->offScratch > 0)
2058	RTLogFlushRC(NULL, pLogger);
2059	#endif
2060	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2061	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2062	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2063	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2064	#endif
2065	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2066	VMMR3FatalDump(pVM, pVCpu, rc);
2067	if (rc != VINF_VMM_CALL_HOST)
2068	{
2069	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2070	return rc;
2071	}
2072	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2073	if (RT_FAILURE(rc))
2074	return rc;
2075	}
2076	}
2077
2078
2079	/**
2080	* Service a call to the ring-3 host code.
2081	*
2082	* @returns VBox status code.
2083	* @param pVM Pointer to the VM.
2084	* @param pVCpu Pointer to the VMCPU.
2085	* @remark Careful with critsects.
2086	*/
2087	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2088	{
2089	/*
2090	* We must also check for pending critsect exits or else we can deadlock
2091	* when entering other critsects here.
2092	*/
2093	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2094	PDMCritSectFF(pVCpu);
2095
2096	switch (pVCpu->vmm.s.enmCallRing3Operation)
2097	{
2098	/*
2099	* Acquire a critical section.
2100	*/
2101	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2102	{
2103	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2104	true /fCallRing3/);
2105	break;
2106	}
2107
2108	/*
2109	* Acquire the PDM lock.
2110	*/
2111	case VMMCALLRING3_PDM_LOCK:
2112	{
2113	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2114	break;
2115	}
2116
2117	/*
2118	* Grow the PGM pool.
2119	*/
2120	case VMMCALLRING3_PGM_POOL_GROW:
2121	{
2122	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2123	break;
2124	}
2125
2126	/*
2127	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2128	*/
2129	case VMMCALLRING3_PGM_MAP_CHUNK:
2130	{
2131	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2132	break;
2133	}
2134
2135	/*
2136	* Allocates more handy pages.
2137	*/
2138	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2139	{
2140	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2141	break;
2142	}
2143
2144	/*
2145	* Allocates a large page.
2146	*/
2147	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2148	{
2149	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2150	break;
2151	}
2152
2153	/*
2154	* Acquire the PGM lock.
2155	*/
2156	case VMMCALLRING3_PGM_LOCK:
2157	{
2158	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2159	break;
2160	}
2161
2162	/*
2163	* Acquire the MM hypervisor heap lock.
2164	*/
2165	case VMMCALLRING3_MMHYPER_LOCK:
2166	{
2167	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2168	break;
2169	}
2170
2171	#ifdef VBOX_WITH_REM
2172	/*
2173	* Flush REM handler notifications.
2174	*/
2175	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2176	{
2177	REMR3ReplayHandlerNotifications(pVM);
2178	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2179	break;
2180	}
2181	#endif
2182
2183	/*
2184	* This is a noop. We just take this route to avoid unnecessary
2185	* tests in the loops.
2186	*/
2187	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2188	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2189	LogAlways(("FLUSH\n"));
2190	break;
2191
2192	/*
2193	* Set the VM error message.
2194	*/
2195	case VMMCALLRING3_VM_SET_ERROR:
2196	VMR3SetErrorWorker(pVM);
2197	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2198	break;
2199
2200	/*
2201	* Set the VM runtime error message.
2202	*/
2203	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2204	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2205	break;
2206
2207	/*
2208	* Signal a ring 0 hypervisor assertion.
2209	* Cancel the longjmp operation that's in progress.
2210	*/
2211	case VMMCALLRING3_VM_R0_ASSERTION:
2212	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2213	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2214	#ifdef RT_ARCH_X86
2215	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2216	#else
2217	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2218	#endif
2219	#ifdef VMM_R0_SWITCH_STACK
2220	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2221	#endif
2222	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2223	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2224	return VERR_VMM_RING0_ASSERTION;
2225
2226	/*
2227	* A forced switch to ring 0 for preemption purposes.
2228	*/
2229	case VMMCALLRING3_VM_R0_PREEMPT:
2230	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2231	break;
2232
2233	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2234	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2235	break;
2236
2237	default:
2238	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2239	return VERR_VMM_UNKNOWN_RING3_CALL;
2240	}
2241
2242	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2243	return VINF_SUCCESS;
2244	}
2245
2246
2247	/**
2248	* Displays the Force action Flags.
2249	*
2250	* @param pVM Pointer to the VM.
2251	* @param pHlp The output helpers.
2252	* @param pszArgs The additional arguments (ignored).
2253	*/
2254	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2255	{
2256	int c;
2257	uint32_t f;
2258	NOREF(pszArgs);
2259
2260	#define PRINT_FLAG(prf,flag) do { \
2261	if (f & (prf##flag)) \
2262	{ \
2263	static const char *s_psz = #flag; \
2264	if (!(c % 6)) \
2265	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2266	else \
2267	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2268	c++; \
2269	f &= ~(prf##flag); \
2270	} \
2271	} while (0)
2272
2273	#define PRINT_GROUP(prf,grp,sfx) do { \
2274	if (f & (prf##grp##sfx)) \
2275	{ \
2276	static const char *s_psz = #grp; \
2277	if (!(c % 5)) \
2278	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2279	else \
2280	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2281	c++; \
2282	} \
2283	} while (0)
2284
2285	/*
2286	* The global flags.
2287	*/
2288	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2289	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2290
2291	/* show the flag mnemonics */
2292	c = 0;
2293	f = fGlobalForcedActions;
2294	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2295	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2296	PRINT_FLAG(VM_FF_,PDM_DMA);
2297	PRINT_FLAG(VM_FF_,DBGF);
2298	PRINT_FLAG(VM_FF_,REQUEST);
2299	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2300	PRINT_FLAG(VM_FF_,RESET);
2301	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2302	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2303	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2304	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2305	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2306	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2307	if (f)
2308	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2309	else
2310	pHlp->pfnPrintf(pHlp, "\n");
2311
2312	/* the groups */
2313	c = 0;
2314	f = fGlobalForcedActions;
2315	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2316	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2317	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2318	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2319	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2320	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2321	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2322	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2323	if (c)
2324	pHlp->pfnPrintf(pHlp, "\n");
2325
2326	/*
2327	* Per CPU flags.
2328	*/
2329	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2330	{
2331	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2332	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2333
2334	/* show the flag mnemonics */
2335	c = 0;
2336	f = fLocalForcedActions;
2337	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2338	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2339	PRINT_FLAG(VMCPU_FF_,TIMER);
2340	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2341	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2342	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2343	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2344	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2345	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2346	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2347	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2348	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2349	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2350	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2351	PRINT_FLAG(VMCPU_FF_,TO_R3);
2352	if (f)
2353	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2354	else
2355	pHlp->pfnPrintf(pHlp, "\n");
2356
2357	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2358	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2359
2360	/* the groups */
2361	c = 0;
2362	f = fLocalForcedActions;
2363	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2364	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2365	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2366	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2367	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2368	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2369	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2370	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2371	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2372	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2373	if (c)
2374	pHlp->pfnPrintf(pHlp, "\n");
2375	}
2376
2377	#undef PRINT_FLAG
2378	#undef PRINT_GROUP
2379	}
2380

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 44410

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