VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 45203

Last change on this file since 45203 was 45152, checked in by vboxsync, 12 years ago

PDMCritSectRw: Early morphing stage - untested, ring-3 only.
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1/* $Id: VMM.cpp 45152 2013-03-23 20:36:23Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmapi.h>
84#include <VBox/vmm/cpum.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/iom.h>
87#include <VBox/vmm/trpm.h>
88#include <VBox/vmm/selm.h>
89#include <VBox/vmm/em.h>
90#include <VBox/sup.h>
91#include <VBox/vmm/dbgf.h>
92#include <VBox/vmm/csam.h>
93#include <VBox/vmm/patm.h>
94#ifdef VBOX_WITH_REM
95# include <VBox/vmm/rem.h>
96#endif
97#include <VBox/vmm/ssm.h>
98#include <VBox/vmm/ftm.h>
99#include <VBox/vmm/tm.h>
100#include "VMMInternal.h"
101#include "VMMSwitcher.h"
102#include <VBox/vmm/vm.h>
103#include <VBox/vmm/uvm.h>
104
105#include <VBox/err.h>
106#include <VBox/param.h>
107#include <VBox/version.h>
108#include <VBox/vmm/hm.h>
109#include <iprt/assert.h>
110#include <iprt/alloc.h>
111#include <iprt/asm.h>
112#include <iprt/time.h>
113#include <iprt/semaphore.h>
114#include <iprt/stream.h>
115#include <iprt/string.h>
116#include <iprt/stdarg.h>
117#include <iprt/ctype.h>
118#include <iprt/x86.h>
119
120
121
122/*******************************************************************************
123* Defined Constants And Macros *
124*******************************************************************************/
125/** The saved state version. */
126#define VMM_SAVED_STATE_VERSION 4
127/** The saved state version used by v3.0 and earlier. (Teleportation) */
128#define VMM_SAVED_STATE_VERSION_3_0 3
129
130
131/*******************************************************************************
132* Internal Functions *
133*******************************************************************************/
134static int vmmR3InitStacks(PVM pVM);
135static int vmmR3InitLoggers(PVM pVM);
136static void vmmR3InitRegisterStats(PVM pVM);
137static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
138static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
139static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
140static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
141static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
142
143
144/**
145 * Initializes the VMM.
146 *
147 * @returns VBox status code.
148 * @param pVM Pointer to the VM.
149 */
150VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
151{
152 LogFlow(("VMMR3Init\n"));
153
154 /*
155 * Assert alignment, sizes and order.
156 */
157 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
158 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
159 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
160
161 /*
162 * Init basic VM VMM members.
163 */
164 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
165 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
166 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
167 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
168 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
169 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
170
171 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
172 * The EMT yield interval. The EMT yielding is a hack we employ to play a
173 * bit nicer with the rest of the system (like for instance the GUI).
174 */
175 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
176 23 /* Value arrived at after experimenting with the grub boot prompt. */);
177 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
178
179
180 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
181 * Controls whether we employ per-cpu preemption timers to limit the time
182 * spent executing guest code. This option is not available on all
183 * platforms and we will silently ignore this setting then. If we are
184 * running in VT-x mode, we will use the VMX-preemption timer instead of
185 * this one when possible.
186 */
187 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
188 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
189 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
190
191 /*
192 * Initialize the VMM rendezvous semaphores.
193 */
194 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
195 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
196 return VERR_NO_MEMORY;
197 for (VMCPUID i = 0; i < pVM->cCpus; i++)
198 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
199 for (VMCPUID i = 0; i < pVM->cCpus; i++)
200 {
201 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
202 AssertRCReturn(rc, rc);
203 }
204 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
205 AssertRCReturn(rc, rc);
206 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
207 AssertRCReturn(rc, rc);
208 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
209 AssertRCReturn(rc, rc);
210 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
211 AssertRCReturn(rc, rc);
212
213 /* GC switchers are enabled by default. Turned off by HM. */
214 pVM->vmm.s.fSwitcherDisabled = false;
215
216 /*
217 * Register the saved state data unit.
218 */
219 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
220 NULL, NULL, NULL,
221 NULL, vmmR3Save, NULL,
222 NULL, vmmR3Load, NULL);
223 if (RT_FAILURE(rc))
224 return rc;
225
226 /*
227 * Register the Ring-0 VM handle with the session for fast ioctl calls.
228 */
229 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
230 if (RT_FAILURE(rc))
231 return rc;
232
233 /*
234 * Init various sub-components.
235 */
236 rc = vmmR3SwitcherInit(pVM);
237 if (RT_SUCCESS(rc))
238 {
239 rc = vmmR3InitStacks(pVM);
240 if (RT_SUCCESS(rc))
241 {
242 rc = vmmR3InitLoggers(pVM);
243
244#ifdef VBOX_WITH_NMI
245 /*
246 * Allocate mapping for the host APIC.
247 */
248 if (RT_SUCCESS(rc))
249 {
250 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
251 AssertRC(rc);
252 }
253#endif
254 if (RT_SUCCESS(rc))
255 {
256 /*
257 * Debug info and statistics.
258 */
259 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
260 vmmR3InitRegisterStats(pVM);
261 vmmInitFormatTypes();
262
263 return VINF_SUCCESS;
264 }
265 }
266 /** @todo: Need failure cleanup. */
267
268 //more todo in here?
269 //if (RT_SUCCESS(rc))
270 //{
271 //}
272 //int rc2 = vmmR3TermCoreCode(pVM);
273 //AssertRC(rc2));
274 }
275
276 return rc;
277}
278
279
280/**
281 * Allocate & setup the VMM RC stack(s) (for EMTs).
282 *
283 * The stacks are also used for long jumps in Ring-0.
284 *
285 * @returns VBox status code.
286 * @param pVM Pointer to the VM.
287 *
288 * @remarks The optional guard page gets it protection setup up during R3 init
289 * completion because of init order issues.
290 */
291static int vmmR3InitStacks(PVM pVM)
292{
293 int rc = VINF_SUCCESS;
294#ifdef VMM_R0_SWITCH_STACK
295 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
296#else
297 uint32_t fFlags = 0;
298#endif
299
300 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
301 {
302 PVMCPU pVCpu = &pVM->aCpus[idCpu];
303
304#ifdef VBOX_STRICT_VMM_STACK
305 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
306#else
307 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
308#endif
309 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
310 if (RT_SUCCESS(rc))
311 {
312#ifdef VBOX_STRICT_VMM_STACK
313 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
314#endif
315#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
316 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
317 if (!VMMIsHwVirtExtForced(pVM))
318 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
319 else
320#endif
321 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
322 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
323 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
324 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
325
326 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
327 }
328 }
329
330 return rc;
331}
332
333
334/**
335 * Initialize the loggers.
336 *
337 * @returns VBox status code.
338 * @param pVM Pointer to the VM.
339 */
340static int vmmR3InitLoggers(PVM pVM)
341{
342 int rc;
343#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
344
345 /*
346 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
347 */
348#ifdef LOG_ENABLED
349 PRTLOGGER pLogger = RTLogDefaultInstance();
350 if (pLogger)
351 {
352 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
353 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
354 if (RT_FAILURE(rc))
355 return rc;
356 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
357
358# ifdef VBOX_WITH_R0_LOGGING
359 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
360 for (VMCPUID i = 0; i < pVM->cCpus; i++)
361 {
362 PVMCPU pVCpu = &pVM->aCpus[i];
363 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
364 (void **)&pVCpu->vmm.s.pR0LoggerR3);
365 if (RT_FAILURE(rc))
366 return rc;
367 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
368 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
369 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
370 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
371 }
372# endif
373 }
374#endif /* LOG_ENABLED */
375
376#ifdef VBOX_WITH_RC_RELEASE_LOGGING
377 /*
378 * Allocate RC release logger instances (finalized in the relocator).
379 */
380 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
381 if (pRelLogger)
382 {
383 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
384 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
385 if (RT_FAILURE(rc))
386 return rc;
387 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
388 }
389#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
390 return VINF_SUCCESS;
391}
392
393
394/**
395 * VMMR3Init worker that register the statistics with STAM.
396 *
397 * @param pVM The shared VM structure.
398 */
399static void vmmR3InitRegisterStats(PVM pVM)
400{
401 /*
402 * Statistics.
403 */
404 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
405 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
406 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
407 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
408 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
463
464#ifdef VBOX_WITH_STATISTICS
465 for (VMCPUID i = 0; i < pVM->cCpus; i++)
466 {
467 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
468 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
469 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
470 }
471#endif
472}
473
474
475/**
476 * Initializes the R0 VMM.
477 *
478 * @returns VBox status code.
479 * @param pVM Pointer to the VM.
480 */
481VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
482{
483 int rc;
484 PVMCPU pVCpu = VMMGetCpu(pVM);
485 Assert(pVCpu && pVCpu->idCpu == 0);
486
487#ifdef LOG_ENABLED
488 /*
489 * Initialize the ring-0 logger if we haven't done so yet.
490 */
491 if ( pVCpu->vmm.s.pR0LoggerR3
492 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
493 {
494 rc = VMMR3UpdateLoggers(pVM);
495 if (RT_FAILURE(rc))
496 return rc;
497 }
498#endif
499
500 /*
501 * Call Ring-0 entry with init code.
502 */
503 for (;;)
504 {
505#ifdef NO_SUPCALLR0VMM
506 //rc = VERR_GENERAL_FAILURE;
507 rc = VINF_SUCCESS;
508#else
509 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
510#endif
511 /*
512 * Flush the logs.
513 */
514#ifdef LOG_ENABLED
515 if ( pVCpu->vmm.s.pR0LoggerR3
516 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
517 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
518#endif
519 if (rc != VINF_VMM_CALL_HOST)
520 break;
521 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
522 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
523 break;
524 /* Resume R0 */
525 }
526
527 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
528 {
529 LogRel(("R0 init failed, rc=%Rra\n", rc));
530 if (RT_SUCCESS(rc))
531 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
532 }
533 return rc;
534}
535
536
537/**
538 * Initializes the RC VMM.
539 *
540 * @returns VBox status code.
541 * @param pVM Pointer to the VM.
542 */
543VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
544{
545 PVMCPU pVCpu = VMMGetCpu(pVM);
546 Assert(pVCpu && pVCpu->idCpu == 0);
547
548 /* In VMX mode, there's no need to init RC. */
549 if (pVM->vmm.s.fSwitcherDisabled)
550 return VINF_SUCCESS;
551
552 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
553
554 /*
555 * Call VMMGCInit():
556 * -# resolve the address.
557 * -# setup stackframe and EIP to use the trampoline.
558 * -# do a generic hypervisor call.
559 */
560 RTRCPTR RCPtrEP;
561 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
562 if (RT_SUCCESS(rc))
563 {
564 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
565 uint64_t u64TS = RTTimeProgramStartNanoTS();
566 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
567 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
568 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
569 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
570 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
571 CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
572 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
573 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
574 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
575
576 for (;;)
577 {
578#ifdef NO_SUPCALLR0VMM
579 //rc = VERR_GENERAL_FAILURE;
580 rc = VINF_SUCCESS;
581#else
582 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
583#endif
584#ifdef LOG_ENABLED
585 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
586 if ( pLogger
587 && pLogger->offScratch > 0)
588 RTLogFlushRC(NULL, pLogger);
589#endif
590#ifdef VBOX_WITH_RC_RELEASE_LOGGING
591 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
592 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
593 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
594#endif
595 if (rc != VINF_VMM_CALL_HOST)
596 break;
597 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
598 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
599 break;
600 }
601
602 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
603 {
604 VMMR3FatalDump(pVM, pVCpu, rc);
605 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
606 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
607 }
608 AssertRC(rc);
609 }
610 return rc;
611}
612
613
614/**
615 * Called when an init phase completes.
616 *
617 * @returns VBox status code.
618 * @param pVM Pointer to the VM.
619 * @param enmWhat Which init phase.
620 */
621VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
622{
623 int rc = VINF_SUCCESS;
624
625 switch (enmWhat)
626 {
627 case VMINITCOMPLETED_RING3:
628 {
629 /*
630 * CPUM's post-initialization (APIC base MSR caching).
631 */
632 rc = CPUMR3InitCompleted(pVM);
633 AssertRCReturn(rc, rc);
634
635 /*
636 * Set page attributes to r/w for stack pages.
637 */
638 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
639 {
640 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
641 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
642 AssertRCReturn(rc, rc);
643 }
644
645 /*
646 * Create the EMT yield timer.
647 */
648 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
649 AssertRCReturn(rc, rc);
650
651 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
652 AssertRCReturn(rc, rc);
653
654#ifdef VBOX_WITH_NMI
655 /*
656 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
657 */
658 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
659 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
660 AssertRCReturn(rc, rc);
661#endif
662
663#ifdef VBOX_STRICT_VMM_STACK
664 /*
665 * Setup the stack guard pages: Two inaccessible pages at each sides of the
666 * stack to catch over/under-flows.
667 */
668 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
669 {
670 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
671
672 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
673 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
674
675 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
676 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
677 }
678 pVM->vmm.s.fStackGuardsStationed = true;
679#endif
680 break;
681 }
682
683 case VMINITCOMPLETED_RING0:
684 {
685 /*
686 * Disable the periodic preemption timers if we can use the
687 * VMX-preemption timer instead.
688 */
689 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
690 && HMR3IsVmxPreemptionTimerUsed(pVM))
691 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
692 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
693
694 /*
695 * CPUM's post-initialization (print CPUIDs).
696 */
697 CPUMR3LogCpuIds(pVM);
698 break;
699 }
700
701 default: /* shuts up gcc */
702 break;
703 }
704
705 return rc;
706}
707
708
709/**
710 * Terminate the VMM bits.
711 *
712 * @returns VINF_SUCCESS.
713 * @param pVM Pointer to the VM.
714 */
715VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
716{
717 PVMCPU pVCpu = VMMGetCpu(pVM);
718 Assert(pVCpu && pVCpu->idCpu == 0);
719
720 /*
721 * Call Ring-0 entry with termination code.
722 */
723 int rc;
724 for (;;)
725 {
726#ifdef NO_SUPCALLR0VMM
727 //rc = VERR_GENERAL_FAILURE;
728 rc = VINF_SUCCESS;
729#else
730 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
731#endif
732 /*
733 * Flush the logs.
734 */
735#ifdef LOG_ENABLED
736 if ( pVCpu->vmm.s.pR0LoggerR3
737 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
738 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
739#endif
740 if (rc != VINF_VMM_CALL_HOST)
741 break;
742 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
743 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
744 break;
745 /* Resume R0 */
746 }
747 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
748 {
749 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
750 if (RT_SUCCESS(rc))
751 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
752 }
753
754 for (VMCPUID i = 0; i < pVM->cCpus; i++)
755 {
756 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
757 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
758 }
759 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
760 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
761 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
762 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
763 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
764 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
765 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
766 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
767
768#ifdef VBOX_STRICT_VMM_STACK
769 /*
770 * Make the two stack guard pages present again.
771 */
772 if (pVM->vmm.s.fStackGuardsStationed)
773 {
774 for (VMCPUID i = 0; i < pVM->cCpus; i++)
775 {
776 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
777 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
778 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
779 }
780 pVM->vmm.s.fStackGuardsStationed = false;
781 }
782#endif
783
784 vmmTermFormatTypes();
785 return rc;
786}
787
788
789/**
790 * Applies relocations to data and code managed by this
791 * component. This function will be called at init and
792 * whenever the VMM need to relocate it self inside the GC.
793 *
794 * The VMM will need to apply relocations to the core code.
795 *
796 * @param pVM Pointer to the VM.
797 * @param offDelta The relocation delta.
798 */
799VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
800{
801 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
802
803 /*
804 * Recalc the RC address.
805 */
806#ifdef VBOX_WITH_RAW_MODE
807 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
808#endif
809
810 /*
811 * The stack.
812 */
813 for (VMCPUID i = 0; i < pVM->cCpus; i++)
814 {
815 PVMCPU pVCpu = &pVM->aCpus[i];
816
817 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
818
819 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
820 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
821 }
822
823 /*
824 * All the switchers.
825 */
826 vmmR3SwitcherRelocate(pVM, offDelta);
827
828 /*
829 * Get other RC entry points.
830 */
831 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
832 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
833
834 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
835 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
836
837 /*
838 * Update the logger.
839 */
840 VMMR3UpdateLoggers(pVM);
841}
842
843
844/**
845 * Updates the settings for the RC and R0 loggers.
846 *
847 * @returns VBox status code.
848 * @param pVM Pointer to the VM.
849 */
850VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
851{
852 /*
853 * Simply clone the logger instance (for RC).
854 */
855 int rc = VINF_SUCCESS;
856 RTRCPTR RCPtrLoggerFlush = 0;
857
858 if (pVM->vmm.s.pRCLoggerR3
859#ifdef VBOX_WITH_RC_RELEASE_LOGGING
860 || pVM->vmm.s.pRCRelLoggerR3
861#endif
862 )
863 {
864 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
865 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
866 }
867
868 if (pVM->vmm.s.pRCLoggerR3)
869 {
870 RTRCPTR RCPtrLoggerWrapper = 0;
871 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
872 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
873
874 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
875 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
876 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
877 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
878 }
879
880#ifdef VBOX_WITH_RC_RELEASE_LOGGING
881 if (pVM->vmm.s.pRCRelLoggerR3)
882 {
883 RTRCPTR RCPtrLoggerWrapper = 0;
884 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
885 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
886
887 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
888 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
889 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
890 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
891 }
892#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
893
894#ifdef LOG_ENABLED
895 /*
896 * For the ring-0 EMT logger, we use a per-thread logger instance
897 * in ring-0. Only initialize it once.
898 */
899 PRTLOGGER const pDefault = RTLogDefaultInstance();
900 for (VMCPUID i = 0; i < pVM->cCpus; i++)
901 {
902 PVMCPU pVCpu = &pVM->aCpus[i];
903 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
904 if (pR0LoggerR3)
905 {
906 if (!pR0LoggerR3->fCreated)
907 {
908 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
909 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
910 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
911
912 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
913 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
914 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
915
916 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
917 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
918 pfnLoggerWrapper, pfnLoggerFlush,
919 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
920 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
921
922 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
923 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
924 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
925 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
926 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
927 pfnLoggerPrefix, NIL_RTR0PTR);
928 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
929
930 pR0LoggerR3->idCpu = i;
931 pR0LoggerR3->fCreated = true;
932 pR0LoggerR3->fFlushingDisabled = false;
933
934 }
935
936 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
937 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
938 AssertRC(rc);
939 }
940 }
941#endif
942 return rc;
943}
944
945
946/**
947 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
948 *
949 * @returns Pointer to the buffer.
950 * @param pVM Pointer to the VM.
951 */
952VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
953{
954 if (HMIsEnabled(pVM))
955 return pVM->vmm.s.szRing0AssertMsg1;
956
957 RTRCPTR RCPtr;
958 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
959 if (RT_SUCCESS(rc))
960 return (const char *)MMHyperRCToR3(pVM, RCPtr);
961
962 return NULL;
963}
964
965
966/**
967 * Returns the VMCPU of the specified virtual CPU.
968 *
969 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
970 *
971 * @param pUVM The user mode VM handle.
972 * @param idCpu The ID of the virtual CPU.
973 */
974VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
975{
976 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
977 AssertReturn(idCpu < pUVM->cCpus, NULL);
978 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
979 return &pUVM->pVM->aCpus[idCpu];
980}
981
982
983/**
984 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
985 *
986 * @returns Pointer to the buffer.
987 * @param pVM Pointer to the VM.
988 */
989VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
990{
991 if (HMIsEnabled(pVM))
992 return pVM->vmm.s.szRing0AssertMsg2;
993
994 RTRCPTR RCPtr;
995 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
996 if (RT_SUCCESS(rc))
997 return (const char *)MMHyperRCToR3(pVM, RCPtr);
998
999 return NULL;
1000}
1001
1002
1003/**
1004 * Execute state save operation.
1005 *
1006 * @returns VBox status code.
1007 * @param pVM Pointer to the VM.
1008 * @param pSSM SSM operation handle.
1009 */
1010static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1011{
1012 LogFlow(("vmmR3Save:\n"));
1013
1014 /*
1015 * Save the started/stopped state of all CPUs except 0 as it will always
1016 * be running. This avoids breaking the saved state version. :-)
1017 */
1018 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1019 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1020
1021 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1022}
1023
1024
1025/**
1026 * Execute state load operation.
1027 *
1028 * @returns VBox status code.
1029 * @param pVM Pointer to the VM.
1030 * @param pSSM SSM operation handle.
1031 * @param uVersion Data layout version.
1032 * @param uPass The data pass.
1033 */
1034static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1035{
1036 LogFlow(("vmmR3Load:\n"));
1037 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1038
1039 /*
1040 * Validate version.
1041 */
1042 if ( uVersion != VMM_SAVED_STATE_VERSION
1043 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1044 {
1045 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1046 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1047 }
1048
1049 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1050 {
1051 /* Ignore the stack bottom, stack pointer and stack bits. */
1052 RTRCPTR RCPtrIgnored;
1053 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1054 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1055#ifdef RT_OS_DARWIN
1056 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1057 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1058 && SSMR3HandleRevision(pSSM) >= 48858
1059 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1060 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1061 )
1062 SSMR3Skip(pSSM, 16384);
1063 else
1064 SSMR3Skip(pSSM, 8192);
1065#else
1066 SSMR3Skip(pSSM, 8192);
1067#endif
1068 }
1069
1070 /*
1071 * Restore the VMCPU states. VCPU 0 is always started.
1072 */
1073 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1074 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1075 {
1076 bool fStarted;
1077 int rc = SSMR3GetBool(pSSM, &fStarted);
1078 if (RT_FAILURE(rc))
1079 return rc;
1080 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1081 }
1082
1083 /* terminator */
1084 uint32_t u32;
1085 int rc = SSMR3GetU32(pSSM, &u32);
1086 if (RT_FAILURE(rc))
1087 return rc;
1088 if (u32 != UINT32_MAX)
1089 {
1090 AssertMsgFailed(("u32=%#x\n", u32));
1091 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1092 }
1093 return VINF_SUCCESS;
1094}
1095
1096
1097/**
1098 * Resolve a builtin RC symbol.
1099 *
1100 * Called by PDM when loading or relocating RC modules.
1101 *
1102 * @returns VBox status
1103 * @param pVM Pointer to the VM.
1104 * @param pszSymbol Symbol to resolv
1105 * @param pRCPtrValue Where to store the symbol value.
1106 *
1107 * @remark This has to work before VMMR3Relocate() is called.
1108 */
1109VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1110{
1111 if (!strcmp(pszSymbol, "g_Logger"))
1112 {
1113 if (pVM->vmm.s.pRCLoggerR3)
1114 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1115 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1116 }
1117 else if (!strcmp(pszSymbol, "g_RelLogger"))
1118 {
1119#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1120 if (pVM->vmm.s.pRCRelLoggerR3)
1121 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1122 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1123#else
1124 *pRCPtrValue = NIL_RTRCPTR;
1125#endif
1126 }
1127 else
1128 return VERR_SYMBOL_NOT_FOUND;
1129 return VINF_SUCCESS;
1130}
1131
1132
1133/**
1134 * Suspends the CPU yielder.
1135 *
1136 * @param pVM Pointer to the VM.
1137 */
1138VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1139{
1140 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1141 if (!pVM->vmm.s.cYieldResumeMillies)
1142 {
1143 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1144 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1145 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1146 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1147 else
1148 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1149 TMTimerStop(pVM->vmm.s.pYieldTimer);
1150 }
1151 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1152}
1153
1154
1155/**
1156 * Stops the CPU yielder.
1157 *
1158 * @param pVM Pointer to the VM.
1159 */
1160VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1161{
1162 if (!pVM->vmm.s.cYieldResumeMillies)
1163 TMTimerStop(pVM->vmm.s.pYieldTimer);
1164 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1165 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1166}
1167
1168
1169/**
1170 * Resumes the CPU yielder when it has been a suspended or stopped.
1171 *
1172 * @param pVM Pointer to the VM.
1173 */
1174VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1175{
1176 if (pVM->vmm.s.cYieldResumeMillies)
1177 {
1178 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1179 pVM->vmm.s.cYieldResumeMillies = 0;
1180 }
1181}
1182
1183
1184/**
1185 * Internal timer callback function.
1186 *
1187 * @param pVM The VM.
1188 * @param pTimer The timer handle.
1189 * @param pvUser User argument specified upon timer creation.
1190 */
1191static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1192{
1193 NOREF(pvUser);
1194
1195 /*
1196 * This really needs some careful tuning. While we shouldn't be too greedy since
1197 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1198 * because that'll cause us to stop up.
1199 *
1200 * The current logic is to use the default interval when there is no lag worth
1201 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1202 *
1203 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1204 * so the lag is up to date.)
1205 */
1206 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1207 if ( u64Lag < 50000000 /* 50ms */
1208 || ( u64Lag < 1000000000 /* 1s */
1209 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1210 )
1211 {
1212 uint64_t u64Elapsed = RTTimeNanoTS();
1213 pVM->vmm.s.u64LastYield = u64Elapsed;
1214
1215 RTThreadYield();
1216
1217#ifdef LOG_ENABLED
1218 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1219 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1220#endif
1221 }
1222 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1223}
1224
1225
1226/**
1227 * Executes guest code in the raw-mode context.
1228 *
1229 * @param pVM Pointer to the VM.
1230 * @param pVCpu Pointer to the VMCPU.
1231 */
1232VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1233{
1234 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1235
1236 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1237
1238 /*
1239 * Set the hypervisor to resume executing a CPUM resume function
1240 * in CPUMRCA.asm.
1241 */
1242 CPUMSetHyperState(pVCpu,
1243 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1244 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1245 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1246 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1247 0, /* eax */
1248 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1249
1250 /*
1251 * We hide log flushes (outer) and hypervisor interrupts (inner).
1252 */
1253 for (;;)
1254 {
1255#ifdef VBOX_STRICT
1256 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1257 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1258 PGMMapCheck(pVM);
1259#endif
1260 int rc;
1261 do
1262 {
1263#ifdef NO_SUPCALLR0VMM
1264 rc = VERR_GENERAL_FAILURE;
1265#else
1266 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1267 if (RT_LIKELY(rc == VINF_SUCCESS))
1268 rc = pVCpu->vmm.s.iLastGZRc;
1269#endif
1270 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1271
1272 /*
1273 * Flush the logs.
1274 */
1275#ifdef LOG_ENABLED
1276 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1277 if ( pLogger
1278 && pLogger->offScratch > 0)
1279 RTLogFlushRC(NULL, pLogger);
1280#endif
1281#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1282 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1283 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1284 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1285#endif
1286 if (rc != VINF_VMM_CALL_HOST)
1287 {
1288 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1289 return rc;
1290 }
1291 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1292 if (RT_FAILURE(rc))
1293 return rc;
1294 /* Resume GC */
1295 }
1296}
1297
1298
1299/**
1300 * Executes guest code (Intel VT-x and AMD-V).
1301 *
1302 * @param pVM Pointer to the VM.
1303 * @param pVCpu Pointer to the VMCPU.
1304 */
1305VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1306{
1307 Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1308
1309 for (;;)
1310 {
1311 int rc;
1312 do
1313 {
1314#ifdef NO_SUPCALLR0VMM
1315 rc = VERR_GENERAL_FAILURE;
1316#else
1317 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1318 if (RT_LIKELY(rc == VINF_SUCCESS))
1319 rc = pVCpu->vmm.s.iLastGZRc;
1320#endif
1321 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1322
1323#if 0 /* todo triggers too often */
1324 Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1325#endif
1326
1327#ifdef LOG_ENABLED
1328 /*
1329 * Flush the log
1330 */
1331 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1332 if ( pR0LoggerR3
1333 && pR0LoggerR3->Logger.offScratch > 0)
1334 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1335#endif /* !LOG_ENABLED */
1336 if (rc != VINF_VMM_CALL_HOST)
1337 {
1338 Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1339 return rc;
1340 }
1341 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1342 if (RT_FAILURE(rc))
1343 return rc;
1344 /* Resume R0 */
1345 }
1346}
1347
1348/**
1349 * VCPU worker for VMMSendSipi.
1350 *
1351 * @param pVM Pointer to the VM.
1352 * @param idCpu Virtual CPU to perform SIPI on
1353 * @param uVector SIPI vector
1354 */
1355DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1356{
1357 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1358 VMCPU_ASSERT_EMT(pVCpu);
1359
1360 /** @todo what are we supposed to do if the processor is already running? */
1361 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1362 return VERR_ACCESS_DENIED;
1363
1364
1365 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1366
1367 pCtx->cs.Sel = uVector << 8;
1368 pCtx->cs.ValidSel = uVector << 8;
1369 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1370 pCtx->cs.u64Base = uVector << 12;
1371 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1372 pCtx->rip = 0;
1373
1374 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1375
1376# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1377 EMSetState(pVCpu, EMSTATE_HALTED);
1378 return VINF_EM_RESCHEDULE;
1379# else /* And if we go the VMCPU::enmState way it can stay here. */
1380 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1381 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1382 return VINF_SUCCESS;
1383# endif
1384}
1385
1386DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1387{
1388 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1389 VMCPU_ASSERT_EMT(pVCpu);
1390
1391 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1392
1393 PGMR3ResetCpu(pVM, pVCpu);
1394 CPUMR3ResetCpu(pVCpu);
1395
1396 return VINF_EM_WAIT_SIPI;
1397}
1398
1399/**
1400 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1401 * and unhalting processor
1402 *
1403 * @param pVM Pointer to the VM.
1404 * @param idCpu Virtual CPU to perform SIPI on
1405 * @param uVector SIPI vector
1406 */
1407VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1408{
1409 AssertReturnVoid(idCpu < pVM->cCpus);
1410
1411 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1412 AssertRC(rc);
1413}
1414
1415/**
1416 * Sends init IPI to the virtual CPU.
1417 *
1418 * @param pVM Pointer to the VM.
1419 * @param idCpu Virtual CPU to perform int IPI on
1420 */
1421VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1422{
1423 AssertReturnVoid(idCpu < pVM->cCpus);
1424
1425 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1426 AssertRC(rc);
1427}
1428
1429/**
1430 * Registers the guest memory range that can be used for patching
1431 *
1432 * @returns VBox status code.
1433 * @param pVM Pointer to the VM.
1434 * @param pPatchMem Patch memory range
1435 * @param cbPatchMem Size of the memory range
1436 */
1437VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1438{
1439 VM_ASSERT_EMT(pVM);
1440 if (HMIsEnabled(pVM))
1441 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1442
1443 return VERR_NOT_SUPPORTED;
1444}
1445
1446/**
1447 * Deregisters the guest memory range that can be used for patching
1448 *
1449 * @returns VBox status code.
1450 * @param pVM Pointer to the VM.
1451 * @param pPatchMem Patch memory range
1452 * @param cbPatchMem Size of the memory range
1453 */
1454VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1455{
1456 if (HMIsEnabled(pVM))
1457 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1458
1459 return VINF_SUCCESS;
1460}
1461
1462
1463/**
1464 * Count returns and have the last non-caller EMT wake up the caller.
1465 *
1466 * @returns VBox strict informational status code for EM scheduling. No failures
1467 * will be returned here, those are for the caller only.
1468 *
1469 * @param pVM Pointer to the VM.
1470 */
1471DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1472{
1473 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1474 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1475 if (cReturned == pVM->cCpus - 1U)
1476 {
1477 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1478 AssertLogRelRC(rc);
1479 }
1480
1481 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1482 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1483 ("%Rrc\n", rcRet),
1484 VERR_IPE_UNEXPECTED_INFO_STATUS);
1485 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1486}
1487
1488
1489/**
1490 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1491 *
1492 * @returns VBox strict informational status code for EM scheduling. No failures
1493 * will be returned here, those are for the caller only. When
1494 * fIsCaller is set, VINF_SUCCESS is always returned.
1495 *
1496 * @param pVM Pointer to the VM.
1497 * @param pVCpu The VMCPU structure for the calling EMT.
1498 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1499 * not.
1500 * @param fFlags The flags.
1501 * @param pfnRendezvous The callback.
1502 * @param pvUser The user argument for the callback.
1503 */
1504static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1505 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1506{
1507 int rc;
1508
1509 /*
1510 * Enter, the last EMT triggers the next callback phase.
1511 */
1512 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1513 if (cEntered != pVM->cCpus)
1514 {
1515 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1516 {
1517 /* Wait for our turn. */
1518 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1519 AssertLogRelRC(rc);
1520 }
1521 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1522 {
1523 /* Wait for the last EMT to arrive and wake everyone up. */
1524 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1525 AssertLogRelRC(rc);
1526 }
1527 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1528 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1529 {
1530 /* Wait for our turn. */
1531 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1532 AssertLogRelRC(rc);
1533 }
1534 else
1535 {
1536 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1537
1538 /*
1539 * The execute once is handled specially to optimize the code flow.
1540 *
1541 * The last EMT to arrive will perform the callback and the other
1542 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1543 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1544 * returns, that EMT will initiate the normal return sequence.
1545 */
1546 if (!fIsCaller)
1547 {
1548 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1549 AssertLogRelRC(rc);
1550
1551 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1552 }
1553 return VINF_SUCCESS;
1554 }
1555 }
1556 else
1557 {
1558 /*
1559 * All EMTs are waiting, clear the FF and take action according to the
1560 * execution method.
1561 */
1562 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1563
1564 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1565 {
1566 /* Wake up everyone. */
1567 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1568 AssertLogRelRC(rc);
1569 }
1570 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1571 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1572 {
1573 /* Figure out who to wake up and wake it up. If it's ourself, then
1574 it's easy otherwise wait for our turn. */
1575 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1576 ? 0
1577 : pVM->cCpus - 1U;
1578 if (pVCpu->idCpu != iFirst)
1579 {
1580 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1581 AssertLogRelRC(rc);
1582 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1583 AssertLogRelRC(rc);
1584 }
1585 }
1586 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1587 }
1588
1589
1590 /*
1591 * Do the callback and update the status if necessary.
1592 */
1593 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1594 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1595 {
1596 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1597 if (rcStrict != VINF_SUCCESS)
1598 {
1599 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1600 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1601 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1602 int32_t i32RendezvousStatus;
1603 do
1604 {
1605 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1606 if ( rcStrict == i32RendezvousStatus
1607 || RT_FAILURE(i32RendezvousStatus)
1608 || ( i32RendezvousStatus != VINF_SUCCESS
1609 && rcStrict > i32RendezvousStatus))
1610 break;
1611 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1612 }
1613 }
1614
1615 /*
1616 * Increment the done counter and take action depending on whether we're
1617 * the last to finish callback execution.
1618 */
1619 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1620 if ( cDone != pVM->cCpus
1621 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1622 {
1623 /* Signal the next EMT? */
1624 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1625 {
1626 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1627 AssertLogRelRC(rc);
1628 }
1629 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1630 {
1631 Assert(cDone == pVCpu->idCpu + 1U);
1632 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1633 AssertLogRelRC(rc);
1634 }
1635 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1636 {
1637 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1638 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1639 AssertLogRelRC(rc);
1640 }
1641
1642 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1643 if (!fIsCaller)
1644 {
1645 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1646 AssertLogRelRC(rc);
1647 }
1648 }
1649 else
1650 {
1651 /* Callback execution is all done, tell the rest to return. */
1652 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1653 AssertLogRelRC(rc);
1654 }
1655
1656 if (!fIsCaller)
1657 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1658 return VINF_SUCCESS;
1659}
1660
1661
1662/**
1663 * Called in response to VM_FF_EMT_RENDEZVOUS.
1664 *
1665 * @returns VBox strict status code - EM scheduling. No errors will be returned
1666 * here, nor will any non-EM scheduling status codes be returned.
1667 *
1668 * @param pVM Pointer to the VM.
1669 * @param pVCpu The handle of the calling EMT.
1670 *
1671 * @thread EMT
1672 */
1673VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1674{
1675 Assert(!pVCpu->vmm.s.fInRendezvous);
1676 pVCpu->vmm.s.fInRendezvous = true;
1677 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1678 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1679 pVCpu->vmm.s.fInRendezvous = false;
1680 return rc;
1681}
1682
1683
1684/**
1685 * EMT rendezvous.
1686 *
1687 * Gathers all the EMTs and execute some code on each of them, either in a one
1688 * by one fashion or all at once.
1689 *
1690 * @returns VBox strict status code. This will be the first error,
1691 * VINF_SUCCESS, or an EM scheduling status code.
1692 *
1693 * @param pVM Pointer to the VM.
1694 * @param fFlags Flags indicating execution methods. See
1695 * grp_VMMR3EmtRendezvous_fFlags.
1696 * @param pfnRendezvous The callback.
1697 * @param pvUser User argument for the callback.
1698 *
1699 * @thread Any.
1700 */
1701VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1702{
1703 /*
1704 * Validate input.
1705 */
1706 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1707 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1708 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1709 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1710 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1711 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1712 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1713 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1714
1715 VBOXSTRICTRC rcStrict;
1716 PVMCPU pVCpu = VMMGetCpu(pVM);
1717 if (!pVCpu)
1718 /*
1719 * Forward the request to an EMT thread.
1720 */
1721 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1722 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1723 else if (pVM->cCpus == 1)
1724 {
1725 /*
1726 * Shortcut for the single EMT case.
1727 */
1728 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1729 pVCpu->vmm.s.fInRendezvous = true;
1730 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1731 pVCpu->vmm.s.fInRendezvous = false;
1732 }
1733 else
1734 {
1735 /*
1736 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1737 * lookout of the RENDEZVOUS FF.
1738 */
1739 int rc;
1740 rcStrict = VINF_SUCCESS;
1741 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1742 {
1743 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1744
1745 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1746 {
1747 if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1748 {
1749 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1750 if ( rc != VINF_SUCCESS
1751 && ( rcStrict == VINF_SUCCESS
1752 || rcStrict > rc))
1753 rcStrict = rc;
1754 /** @todo Perhaps deal with termination here? */
1755 }
1756 ASMNopPause();
1757 }
1758 }
1759 Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1760 Assert(!pVCpu->vmm.s.fInRendezvous);
1761 pVCpu->vmm.s.fInRendezvous = true;
1762
1763 /*
1764 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1765 */
1766 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1767 {
1768 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1769 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1770 }
1771 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1772 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1773 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1774 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1775 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1776 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1777 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1778 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1779 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1780 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1781 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1782
1783 /*
1784 * Set the FF and poke the other EMTs.
1785 */
1786 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1787 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1788
1789 /*
1790 * Do the same ourselves.
1791 */
1792 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1793
1794 /*
1795 * The caller waits for the other EMTs to be done and return before doing
1796 * the cleanup. This makes away with wakeup / reset races we would otherwise
1797 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1798 */
1799 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1800 AssertLogRelRC(rc);
1801
1802 /*
1803 * Get the return code and clean up a little bit.
1804 */
1805 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1806 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1807
1808 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1809 pVCpu->vmm.s.fInRendezvous = false;
1810
1811 /*
1812 * Merge rcStrict and rcMy.
1813 */
1814 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1815 if ( rcMy != VINF_SUCCESS
1816 && ( rcStrict == VINF_SUCCESS
1817 || rcStrict > rcMy))
1818 rcStrict = rcMy;
1819 }
1820
1821 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1822 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1823 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1824 VERR_IPE_UNEXPECTED_INFO_STATUS);
1825 return VBOXSTRICTRC_VAL(rcStrict);
1826}
1827
1828
1829/**
1830 * Disables/enables EMT rendezvous.
1831 *
1832 * This is used to make sure EMT rendezvous does not take place while
1833 * processing a priority request.
1834 *
1835 * @returns Old rendezvous-disabled state.
1836 * @param pVCpu The handle of the calling EMT.
1837 * @param fDisabled True if disabled, false if enabled.
1838 */
1839VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1840{
1841 VMCPU_ASSERT_EMT(pVCpu);
1842 bool fOld = pVCpu->vmm.s.fInRendezvous;
1843 pVCpu->vmm.s.fInRendezvous = fDisabled;
1844 return fOld;
1845}
1846
1847
1848/**
1849 * Read from the ring 0 jump buffer stack
1850 *
1851 * @returns VBox status code.
1852 *
1853 * @param pVM Pointer to the VM.
1854 * @param idCpu The ID of the source CPU context (for the address).
1855 * @param R0Addr Where to start reading.
1856 * @param pvBuf Where to store the data we've read.
1857 * @param cbRead The number of bytes to read.
1858 */
1859VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1860{
1861 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1862 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1863
1864#ifdef VMM_R0_SWITCH_STACK
1865 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1866#else
1867 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1868#endif
1869 if ( off > VMM_STACK_SIZE
1870 || off + cbRead >= VMM_STACK_SIZE)
1871 return VERR_INVALID_POINTER;
1872
1873 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1874 return VINF_SUCCESS;
1875}
1876
1877
1878/**
1879 * Calls a RC function.
1880 *
1881 * @param pVM Pointer to the VM.
1882 * @param RCPtrEntry The address of the RC function.
1883 * @param cArgs The number of arguments in the ....
1884 * @param ... Arguments to the function.
1885 */
1886VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1887{
1888 va_list args;
1889 va_start(args, cArgs);
1890 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1891 va_end(args);
1892 return rc;
1893}
1894
1895
1896/**
1897 * Calls a RC function.
1898 *
1899 * @param pVM Pointer to the VM.
1900 * @param RCPtrEntry The address of the RC function.
1901 * @param cArgs The number of arguments in the ....
1902 * @param args Arguments to the function.
1903 */
1904VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1905{
1906 /* Raw mode implies 1 VCPU. */
1907 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1908 PVMCPU pVCpu = &pVM->aCpus[0];
1909
1910 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1911
1912 /*
1913 * Setup the call frame using the trampoline.
1914 */
1915 CPUMSetHyperState(pVCpu,
1916 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1917 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1918 RCPtrEntry, /* eax */
1919 cArgs /* edx */
1920 );
1921
1922 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1923 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1924 int i = cArgs;
1925 while (i-- > 0)
1926 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1927
1928 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1929 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1930
1931 /*
1932 * We hide log flushes (outer) and hypervisor interrupts (inner).
1933 */
1934 for (;;)
1935 {
1936 int rc;
1937 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1938 do
1939 {
1940#ifdef NO_SUPCALLR0VMM
1941 rc = VERR_GENERAL_FAILURE;
1942#else
1943 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1944 if (RT_LIKELY(rc == VINF_SUCCESS))
1945 rc = pVCpu->vmm.s.iLastGZRc;
1946#endif
1947 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1948
1949 /*
1950 * Flush the loggers.
1951 */
1952#ifdef LOG_ENABLED
1953 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1954 if ( pLogger
1955 && pLogger->offScratch > 0)
1956 RTLogFlushRC(NULL, pLogger);
1957#endif
1958#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1959 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1960 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1961 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1962#endif
1963 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1964 VMMR3FatalDump(pVM, pVCpu, rc);
1965 if (rc != VINF_VMM_CALL_HOST)
1966 {
1967 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1968 return rc;
1969 }
1970 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1971 if (RT_FAILURE(rc))
1972 return rc;
1973 }
1974}
1975
1976
1977/**
1978 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1979 *
1980 * @returns VBox status code.
1981 * @param pVM Pointer to the VM.
1982 * @param uOperation Operation to execute.
1983 * @param u64Arg Constant argument.
1984 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1985 * details.
1986 */
1987VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1988{
1989 PVMCPU pVCpu = VMMGetCpu(pVM);
1990 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1991
1992 /*
1993 * Call Ring-0 entry with init code.
1994 */
1995 int rc;
1996 for (;;)
1997 {
1998#ifdef NO_SUPCALLR0VMM
1999 rc = VERR_GENERAL_FAILURE;
2000#else
2001 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2002#endif
2003 /*
2004 * Flush the logs.
2005 */
2006#ifdef LOG_ENABLED
2007 if ( pVCpu->vmm.s.pR0LoggerR3
2008 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2009 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2010#endif
2011 if (rc != VINF_VMM_CALL_HOST)
2012 break;
2013 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2014 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2015 break;
2016 /* Resume R0 */
2017 }
2018
2019 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2020 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
2021 VERR_IPE_UNEXPECTED_INFO_STATUS);
2022 return rc;
2023}
2024
2025
2026/**
2027 * Resumes executing hypervisor code when interrupted by a queue flush or a
2028 * debug event.
2029 *
2030 * @returns VBox status code.
2031 * @param pVM Pointer to the VM.
2032 * @param pVCpu Pointer to the VMCPU.
2033 */
2034VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2035{
2036 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2037 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2038
2039 /*
2040 * We hide log flushes (outer) and hypervisor interrupts (inner).
2041 */
2042 for (;;)
2043 {
2044 int rc;
2045 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2046 do
2047 {
2048#ifdef NO_SUPCALLR0VMM
2049 rc = VERR_GENERAL_FAILURE;
2050#else
2051 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2052 if (RT_LIKELY(rc == VINF_SUCCESS))
2053 rc = pVCpu->vmm.s.iLastGZRc;
2054#endif
2055 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2056
2057 /*
2058 * Flush the loggers.
2059 */
2060#ifdef LOG_ENABLED
2061 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2062 if ( pLogger
2063 && pLogger->offScratch > 0)
2064 RTLogFlushRC(NULL, pLogger);
2065#endif
2066#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2067 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2068 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2069 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2070#endif
2071 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2072 VMMR3FatalDump(pVM, pVCpu, rc);
2073 if (rc != VINF_VMM_CALL_HOST)
2074 {
2075 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2076 return rc;
2077 }
2078 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2079 if (RT_FAILURE(rc))
2080 return rc;
2081 }
2082}
2083
2084
2085/**
2086 * Service a call to the ring-3 host code.
2087 *
2088 * @returns VBox status code.
2089 * @param pVM Pointer to the VM.
2090 * @param pVCpu Pointer to the VMCPU.
2091 * @remark Careful with critsects.
2092 */
2093static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2094{
2095 /*
2096 * We must also check for pending critsect exits or else we can deadlock
2097 * when entering other critsects here.
2098 */
2099 if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2100 PDMCritSectBothFF(pVCpu);
2101
2102 switch (pVCpu->vmm.s.enmCallRing3Operation)
2103 {
2104 /*
2105 * Acquire a critical section.
2106 */
2107 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2108 {
2109 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2110 true /*fCallRing3*/);
2111 break;
2112 }
2113
2114 /*
2115 * Acquire the PDM lock.
2116 */
2117 case VMMCALLRING3_PDM_LOCK:
2118 {
2119 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2120 break;
2121 }
2122
2123 /*
2124 * Grow the PGM pool.
2125 */
2126 case VMMCALLRING3_PGM_POOL_GROW:
2127 {
2128 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2129 break;
2130 }
2131
2132 /*
2133 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2134 */
2135 case VMMCALLRING3_PGM_MAP_CHUNK:
2136 {
2137 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2138 break;
2139 }
2140
2141 /*
2142 * Allocates more handy pages.
2143 */
2144 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2145 {
2146 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2147 break;
2148 }
2149
2150 /*
2151 * Allocates a large page.
2152 */
2153 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2154 {
2155 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2156 break;
2157 }
2158
2159 /*
2160 * Acquire the PGM lock.
2161 */
2162 case VMMCALLRING3_PGM_LOCK:
2163 {
2164 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2165 break;
2166 }
2167
2168 /*
2169 * Acquire the MM hypervisor heap lock.
2170 */
2171 case VMMCALLRING3_MMHYPER_LOCK:
2172 {
2173 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2174 break;
2175 }
2176
2177#ifdef VBOX_WITH_REM
2178 /*
2179 * Flush REM handler notifications.
2180 */
2181 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2182 {
2183 REMR3ReplayHandlerNotifications(pVM);
2184 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2185 break;
2186 }
2187#endif
2188
2189 /*
2190 * This is a noop. We just take this route to avoid unnecessary
2191 * tests in the loops.
2192 */
2193 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2194 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2195 LogAlways(("*FLUSH*\n"));
2196 break;
2197
2198 /*
2199 * Set the VM error message.
2200 */
2201 case VMMCALLRING3_VM_SET_ERROR:
2202 VMR3SetErrorWorker(pVM);
2203 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2204 break;
2205
2206 /*
2207 * Set the VM runtime error message.
2208 */
2209 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2210 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2211 break;
2212
2213 /*
2214 * Signal a ring 0 hypervisor assertion.
2215 * Cancel the longjmp operation that's in progress.
2216 */
2217 case VMMCALLRING3_VM_R0_ASSERTION:
2218 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2219 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2220#ifdef RT_ARCH_X86
2221 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2222#else
2223 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2224#endif
2225#ifdef VMM_R0_SWITCH_STACK
2226 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2227#endif
2228 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2229 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2230 return VERR_VMM_RING0_ASSERTION;
2231
2232 /*
2233 * A forced switch to ring 0 for preemption purposes.
2234 */
2235 case VMMCALLRING3_VM_R0_PREEMPT:
2236 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2237 break;
2238
2239 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2240 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2241 break;
2242
2243 default:
2244 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2245 return VERR_VMM_UNKNOWN_RING3_CALL;
2246 }
2247
2248 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2249 return VINF_SUCCESS;
2250}
2251
2252
2253/**
2254 * Displays the Force action Flags.
2255 *
2256 * @param pVM Pointer to the VM.
2257 * @param pHlp The output helpers.
2258 * @param pszArgs The additional arguments (ignored).
2259 */
2260static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2261{
2262 int c;
2263 uint32_t f;
2264 NOREF(pszArgs);
2265
2266#define PRINT_FLAG(prf,flag) do { \
2267 if (f & (prf##flag)) \
2268 { \
2269 static const char *s_psz = #flag; \
2270 if (!(c % 6)) \
2271 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2272 else \
2273 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2274 c++; \
2275 f &= ~(prf##flag); \
2276 } \
2277 } while (0)
2278
2279#define PRINT_GROUP(prf,grp,sfx) do { \
2280 if (f & (prf##grp##sfx)) \
2281 { \
2282 static const char *s_psz = #grp; \
2283 if (!(c % 5)) \
2284 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2285 else \
2286 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2287 c++; \
2288 } \
2289 } while (0)
2290
2291 /*
2292 * The global flags.
2293 */
2294 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2295 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2296
2297 /* show the flag mnemonics */
2298 c = 0;
2299 f = fGlobalForcedActions;
2300 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2301 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2302 PRINT_FLAG(VM_FF_,PDM_DMA);
2303 PRINT_FLAG(VM_FF_,DBGF);
2304 PRINT_FLAG(VM_FF_,REQUEST);
2305 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2306 PRINT_FLAG(VM_FF_,RESET);
2307 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2308 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2309 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2310 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2311 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2312 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2313 if (f)
2314 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2315 else
2316 pHlp->pfnPrintf(pHlp, "\n");
2317
2318 /* the groups */
2319 c = 0;
2320 f = fGlobalForcedActions;
2321 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2322 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2323 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2324 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2325 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2326 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2327 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2328 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2329 if (c)
2330 pHlp->pfnPrintf(pHlp, "\n");
2331
2332 /*
2333 * Per CPU flags.
2334 */
2335 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2336 {
2337 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2338 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2339
2340 /* show the flag mnemonics */
2341 c = 0;
2342 f = fLocalForcedActions;
2343 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2344 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2345 PRINT_FLAG(VMCPU_FF_,TIMER);
2346 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2347 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2348 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2349 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2350 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2351 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2352 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2353 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2354 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2355 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2356 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2357 PRINT_FLAG(VMCPU_FF_,TO_R3);
2358 if (f)
2359 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2360 else
2361 pHlp->pfnPrintf(pHlp, "\n");
2362
2363 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2364 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2365
2366 /* the groups */
2367 c = 0;
2368 f = fLocalForcedActions;
2369 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2370 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2371 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2372 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2373 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2374 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2375 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2376 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2377 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2378 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2379 if (c)
2380 pHlp->pfnPrintf(pHlp, "\n");
2381 }
2382
2383#undef PRINT_FLAG
2384#undef PRINT_GROUP
2385}
2386
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