VMM.cpp@ 45457

Last change on this file since 45457 was 45293, checked in by vboxsync, 12 years ago
PGMCritSectRw: Prep for ring-0 and raw-mode context operation.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 88.1 KB

Line
1	/* $Id: VMM.cpp 45293 2013-04-02 18:42:50Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually.
27	*
28	* @see grp_vmm, grp_vm
29	*
30	*
31	* @section sec_vmmstate VMM State
32	*
33	* @image html VM_Statechart_Diagram.gif
34	*
35	* To be written.
36	*
37	*
38	* @subsection subsec_vmm_init VMM Initialization
39	*
40	* To be written.
41	*
42	*
43	* @subsection subsec_vmm_term VMM Termination
44	*
45	* To be written.
46	*
47	*
48	* @sections sec_vmm_limits VMM Limits
49	*
50	* There are various resource limits imposed by the VMM and it's
51	* sub-components. We'll list some of them here.
52	*
53	* On 64-bit hosts:
54	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55	* can be increased up to 64K - 1.
56	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58	* - A VM can be assigned all the memory we can use (16TB), however, the
59	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61	*
62	* On 32-bit hosts:
63	* - Max 127 VMs. Imposed by GMM's per page structure.
64	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65	* ROM pages. The limit is imposed by the 28-bit page ID used
66	* internally in GMM. It is also limited by PAE.
67	* - A VM can be assigned all the memory GMM can allocate, however, the
68	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70	*
71	*/
72
73	/*******************************************************************************
74	* Header Files *
75	*******************************************************************************/
76	#define LOG_GROUP LOG_GROUP_VMM
77	#include <VBox/vmm/vmm.h>
78	#include <VBox/vmm/vmapi.h>
79	#include <VBox/vmm/pgm.h>
80	#include <VBox/vmm/cfgm.h>
81	#include <VBox/vmm/pdmqueue.h>
82	#include <VBox/vmm/pdmcritsect.h>
83	#include <VBox/vmm/pdmcritsectrw.h>
84	#include <VBox/vmm/pdmapi.h>
85	#include <VBox/vmm/cpum.h>
86	#include <VBox/vmm/mm.h>
87	#include <VBox/vmm/iom.h>
88	#include <VBox/vmm/trpm.h>
89	#include <VBox/vmm/selm.h>
90	#include <VBox/vmm/em.h>
91	#include <VBox/sup.h>
92	#include <VBox/vmm/dbgf.h>
93	#include <VBox/vmm/csam.h>
94	#include <VBox/vmm/patm.h>
95	#ifdef VBOX_WITH_REM
96	# include <VBox/vmm/rem.h>
97	#endif
98	#include <VBox/vmm/ssm.h>
99	#include <VBox/vmm/ftm.h>
100	#include <VBox/vmm/tm.h>
101	#include "VMMInternal.h"
102	#include "VMMSwitcher.h"
103	#include <VBox/vmm/vm.h>
104	#include <VBox/vmm/uvm.h>
105
106	#include <VBox/err.h>
107	#include <VBox/param.h>
108	#include <VBox/version.h>
109	#include <VBox/vmm/hm.h>
110	#include <iprt/assert.h>
111	#include <iprt/alloc.h>
112	#include <iprt/asm.h>
113	#include <iprt/time.h>
114	#include <iprt/semaphore.h>
115	#include <iprt/stream.h>
116	#include <iprt/string.h>
117	#include <iprt/stdarg.h>
118	#include <iprt/ctype.h>
119	#include <iprt/x86.h>
120
121
122
123	/*******************************************************************************
124	* Defined Constants And Macros *
125	*******************************************************************************/
126	/** The saved state version. */
127	#define VMM_SAVED_STATE_VERSION 4
128	/** The saved state version used by v3.0 and earlier. (Teleportation) */
129	#define VMM_SAVED_STATE_VERSION_3_0 3
130
131
132	/*******************************************************************************
133	* Internal Functions *
134	*******************************************************************************/
135	static int vmmR3InitStacks(PVM pVM);
136	static int vmmR3InitLoggers(PVM pVM);
137	static void vmmR3InitRegisterStats(PVM pVM);
138	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
139	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
140	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
141	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
142	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
143
144
145	/**
146	* Initializes the VMM.
147	*
148	* @returns VBox status code.
149	* @param pVM Pointer to the VM.
150	*/
151	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
152	{
153	LogFlow(("VMMR3Init\n"));
154
155	/*
156	* Assert alignment, sizes and order.
157	*/
158	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
159	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
160	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
161
162	/*
163	* Init basic VM VMM members.
164	*/
165	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
166	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
167	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
168	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
169	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
170	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
171
172	/** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
173	* The EMT yield interval. The EMT yielding is a hack we employ to play a
174	* bit nicer with the rest of the system (like for instance the GUI).
175	*/
176	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
177	23 /* Value arrived at after experimenting with the grub boot prompt. */);
178	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
179
180
181	/** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
182	* Controls whether we employ per-cpu preemption timers to limit the time
183	* spent executing guest code. This option is not available on all
184	* platforms and we will silently ignore this setting then. If we are
185	* running in VT-x mode, we will use the VMX-preemption timer instead of
186	* this one when possible.
187	*/
188	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
189	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
190	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
191
192	/*
193	* Initialize the VMM rendezvous semaphores.
194	*/
195	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
196	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
197	return VERR_NO_MEMORY;
198	for (VMCPUID i = 0; i < pVM->cCpus; i++)
199	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
200	for (VMCPUID i = 0; i < pVM->cCpus; i++)
201	{
202	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
203	AssertRCReturn(rc, rc);
204	}
205	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
206	AssertRCReturn(rc, rc);
207	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
208	AssertRCReturn(rc, rc);
209	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
210	AssertRCReturn(rc, rc);
211	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
212	AssertRCReturn(rc, rc);
213
214	/* GC switchers are enabled by default. Turned off by HM. */
215	pVM->vmm.s.fSwitcherDisabled = false;
216
217	/*
218	* Register the saved state data unit.
219	*/
220	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
221	NULL, NULL, NULL,
222	NULL, vmmR3Save, NULL,
223	NULL, vmmR3Load, NULL);
224	if (RT_FAILURE(rc))
225	return rc;
226
227	/*
228	* Register the Ring-0 VM handle with the session for fast ioctl calls.
229	*/
230	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
231	if (RT_FAILURE(rc))
232	return rc;
233
234	/*
235	* Init various sub-components.
236	*/
237	rc = vmmR3SwitcherInit(pVM);
238	if (RT_SUCCESS(rc))
239	{
240	rc = vmmR3InitStacks(pVM);
241	if (RT_SUCCESS(rc))
242	{
243	rc = vmmR3InitLoggers(pVM);
244
245	#ifdef VBOX_WITH_NMI
246	/*
247	* Allocate mapping for the host APIC.
248	*/
249	if (RT_SUCCESS(rc))
250	{
251	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
252	AssertRC(rc);
253	}
254	#endif
255	if (RT_SUCCESS(rc))
256	{
257	/*
258	* Debug info and statistics.
259	*/
260	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
261	vmmR3InitRegisterStats(pVM);
262	vmmInitFormatTypes();
263
264	return VINF_SUCCESS;
265	}
266	}
267	/** @todo: Need failure cleanup. */
268
269	//more todo in here?
270	//if (RT_SUCCESS(rc))
271	//{
272	//}
273	//int rc2 = vmmR3TermCoreCode(pVM);
274	//AssertRC(rc2));
275	}
276
277	return rc;
278	}
279
280
281	/**
282	* Allocate & setup the VMM RC stack(s) (for EMTs).
283	*
284	* The stacks are also used for long jumps in Ring-0.
285	*
286	* @returns VBox status code.
287	* @param pVM Pointer to the VM.
288	*
289	* @remarks The optional guard page gets it protection setup up during R3 init
290	* completion because of init order issues.
291	*/
292	static int vmmR3InitStacks(PVM pVM)
293	{
294	int rc = VINF_SUCCESS;
295	#ifdef VMM_R0_SWITCH_STACK
296	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
297	#else
298	uint32_t fFlags = 0;
299	#endif
300
301	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
302	{
303	PVMCPU pVCpu = &pVM->aCpus[idCpu];
304
305	#ifdef VBOX_STRICT_VMM_STACK
306	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
307	#else
308	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
309	#endif
310	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
311	if (RT_SUCCESS(rc))
312	{
313	#ifdef VBOX_STRICT_VMM_STACK
314	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
315	#endif
316	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
317	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
318	if (!VMMIsHwVirtExtForced(pVM))
319	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
320	else
321	#endif
322	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
323	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
324	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
325	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
326
327	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
328	}
329	}
330
331	return rc;
332	}
333
334
335	/**
336	* Initialize the loggers.
337	*
338	* @returns VBox status code.
339	* @param pVM Pointer to the VM.
340	*/
341	static int vmmR3InitLoggers(PVM pVM)
342	{
343	int rc;
344	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
345
346	/*
347	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
348	*/
349	#ifdef LOG_ENABLED
350	PRTLOGGER pLogger = RTLogDefaultInstance();
351	if (pLogger)
352	{
353	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
354	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
355	if (RT_FAILURE(rc))
356	return rc;
357	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
358
359	# ifdef VBOX_WITH_R0_LOGGING
360	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
361	for (VMCPUID i = 0; i < pVM->cCpus; i++)
362	{
363	PVMCPU pVCpu = &pVM->aCpus[i];
364	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
365	(void **)&pVCpu->vmm.s.pR0LoggerR3);
366	if (RT_FAILURE(rc))
367	return rc;
368	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
369	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
370	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
371	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
372	}
373	# endif
374	}
375	#endif /* LOG_ENABLED */
376
377	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
378	/*
379	* Allocate RC release logger instances (finalized in the relocator).
380	*/
381	PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
382	if (pRelLogger)
383	{
384	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
385	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
386	if (RT_FAILURE(rc))
387	return rc;
388	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
389	}
390	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
391	return VINF_SUCCESS;
392	}
393
394
395	/**
396	* VMMR3Init worker that register the statistics with STAM.
397	*
398	* @param pVM The shared VM structure.
399	*/
400	static void vmmR3InitRegisterStats(PVM pVM)
401	{
402	/*
403	* Statistics.
404	*/
405	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
406	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
407	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
408	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
409	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
410	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
411	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
412	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
413	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
414	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
415	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
416	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
417	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
418	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
419	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
420	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
421	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
422	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
423	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
424	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
425	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
426	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
427	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
428	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
429	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
430	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
431	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
432	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
433	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
434	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
435	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
436	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
437	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
438	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
439	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
440	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
446	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
447	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
448	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
449	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
450	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
451	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
452	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
464
465	#ifdef VBOX_WITH_STATISTICS
466	for (VMCPUID i = 0; i < pVM->cCpus; i++)
467	{
468	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
469	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
470	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
471	}
472	#endif
473	}
474
475
476	/**
477	* Initializes the R0 VMM.
478	*
479	* @returns VBox status code.
480	* @param pVM Pointer to the VM.
481	*/
482	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
483	{
484	int rc;
485	PVMCPU pVCpu = VMMGetCpu(pVM);
486	Assert(pVCpu && pVCpu->idCpu == 0);
487
488	#ifdef LOG_ENABLED
489	/*
490	* Initialize the ring-0 logger if we haven't done so yet.
491	*/
492	if ( pVCpu->vmm.s.pR0LoggerR3
493	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
494	{
495	rc = VMMR3UpdateLoggers(pVM);
496	if (RT_FAILURE(rc))
497	return rc;
498	}
499	#endif
500
501	/*
502	* Call Ring-0 entry with init code.
503	*/
504	for (;;)
505	{
506	#ifdef NO_SUPCALLR0VMM
507	//rc = VERR_GENERAL_FAILURE;
508	rc = VINF_SUCCESS;
509	#else
510	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, VMMGetSvnRev(), NULL);
511	#endif
512	/*
513	* Flush the logs.
514	*/
515	#ifdef LOG_ENABLED
516	if ( pVCpu->vmm.s.pR0LoggerR3
517	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
518	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
519	#endif
520	if (rc != VINF_VMM_CALL_HOST)
521	break;
522	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
523	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
524	break;
525	/* Resume R0 */
526	}
527
528	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
529	{
530	LogRel(("R0 init failed, rc=%Rra\n", rc));
531	if (RT_SUCCESS(rc))
532	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
533	}
534	return rc;
535	}
536
537
538	/**
539	* Initializes the RC VMM.
540	*
541	* @returns VBox status code.
542	* @param pVM Pointer to the VM.
543	*/
544	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
545	{
546	PVMCPU pVCpu = VMMGetCpu(pVM);
547	Assert(pVCpu && pVCpu->idCpu == 0);
548
549	/* In VMX mode, there's no need to init RC. */
550	if (pVM->vmm.s.fSwitcherDisabled)
551	return VINF_SUCCESS;
552
553	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
554
555	/*
556	* Call VMMGCInit():
557	* -# resolve the address.
558	* -# setup stackframe and EIP to use the trampoline.
559	* -# do a generic hypervisor call.
560	*/
561	RTRCPTR RCPtrEP;
562	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
563	if (RT_SUCCESS(rc))
564	{
565	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
566	uint64_t u64TS = RTTimeProgramStartNanoTS();
567	CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 3: The program startup TS - Hi. */
568	CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 3: The program startup TS - Lo. */
569	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
570	CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
571	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
572	CPUMPushHyper(pVCpu, 5 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
573	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
574	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
575	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
576
577	for (;;)
578	{
579	#ifdef NO_SUPCALLR0VMM
580	//rc = VERR_GENERAL_FAILURE;
581	rc = VINF_SUCCESS;
582	#else
583	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
584	#endif
585	#ifdef LOG_ENABLED
586	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
587	if ( pLogger
588	&& pLogger->offScratch > 0)
589	RTLogFlushRC(NULL, pLogger);
590	#endif
591	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
592	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
593	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
594	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
595	#endif
596	if (rc != VINF_VMM_CALL_HOST)
597	break;
598	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
599	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
600	break;
601	}
602
603	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
604	{
605	VMMR3FatalDump(pVM, pVCpu, rc);
606	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
607	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
608	}
609	AssertRC(rc);
610	}
611	return rc;
612	}
613
614
615	/**
616	* Called when an init phase completes.
617	*
618	* @returns VBox status code.
619	* @param pVM Pointer to the VM.
620	* @param enmWhat Which init phase.
621	*/
622	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
623	{
624	int rc = VINF_SUCCESS;
625
626	switch (enmWhat)
627	{
628	case VMINITCOMPLETED_RING3:
629	{
630	/*
631	* CPUM's post-initialization (APIC base MSR caching).
632	*/
633	rc = CPUMR3InitCompleted(pVM);
634	AssertRCReturn(rc, rc);
635
636	/*
637	* Set page attributes to r/w for stack pages.
638	*/
639	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
640	{
641	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
642	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
643	AssertRCReturn(rc, rc);
644	}
645
646	/*
647	* Create the EMT yield timer.
648	*/
649	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
650	AssertRCReturn(rc, rc);
651
652	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
653	AssertRCReturn(rc, rc);
654
655	#ifdef VBOX_WITH_NMI
656	/*
657	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
658	*/
659	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
660	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
661	AssertRCReturn(rc, rc);
662	#endif
663
664	#ifdef VBOX_STRICT_VMM_STACK
665	/*
666	* Setup the stack guard pages: Two inaccessible pages at each sides of the
667	* stack to catch over/under-flows.
668	*/
669	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
670	{
671	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
672
673	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
674	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
675
676	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
677	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
678	}
679	pVM->vmm.s.fStackGuardsStationed = true;
680	#endif
681	break;
682	}
683
684	case VMINITCOMPLETED_RING0:
685	{
686	/*
687	* Disable the periodic preemption timers if we can use the
688	* VMX-preemption timer instead.
689	*/
690	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
691	&& HMR3IsVmxPreemptionTimerUsed(pVM))
692	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
693	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
694
695	/*
696	* CPUM's post-initialization (print CPUIDs).
697	*/
698	CPUMR3LogCpuIds(pVM);
699	break;
700	}
701
702	default: /* shuts up gcc */
703	break;
704	}
705
706	return rc;
707	}
708
709
710	/**
711	* Terminate the VMM bits.
712	*
713	* @returns VINF_SUCCESS.
714	* @param pVM Pointer to the VM.
715	*/
716	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
717	{
718	PVMCPU pVCpu = VMMGetCpu(pVM);
719	Assert(pVCpu && pVCpu->idCpu == 0);
720
721	/*
722	* Call Ring-0 entry with termination code.
723	*/
724	int rc;
725	for (;;)
726	{
727	#ifdef NO_SUPCALLR0VMM
728	//rc = VERR_GENERAL_FAILURE;
729	rc = VINF_SUCCESS;
730	#else
731	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
732	#endif
733	/*
734	* Flush the logs.
735	*/
736	#ifdef LOG_ENABLED
737	if ( pVCpu->vmm.s.pR0LoggerR3
738	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
739	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
740	#endif
741	if (rc != VINF_VMM_CALL_HOST)
742	break;
743	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
744	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
745	break;
746	/* Resume R0 */
747	}
748	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
749	{
750	LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
751	if (RT_SUCCESS(rc))
752	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
753	}
754
755	for (VMCPUID i = 0; i < pVM->cCpus; i++)
756	{
757	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
758	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
759	}
760	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
761	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
762	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
763	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
764	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
765	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
766	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
767	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
768
769	#ifdef VBOX_STRICT_VMM_STACK
770	/*
771	* Make the two stack guard pages present again.
772	*/
773	if (pVM->vmm.s.fStackGuardsStationed)
774	{
775	for (VMCPUID i = 0; i < pVM->cCpus; i++)
776	{
777	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
778	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
779	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
780	}
781	pVM->vmm.s.fStackGuardsStationed = false;
782	}
783	#endif
784
785	vmmTermFormatTypes();
786	return rc;
787	}
788
789
790	/**
791	* Applies relocations to data and code managed by this
792	* component. This function will be called at init and
793	* whenever the VMM need to relocate it self inside the GC.
794	*
795	* The VMM will need to apply relocations to the core code.
796	*
797	* @param pVM Pointer to the VM.
798	* @param offDelta The relocation delta.
799	*/
800	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
801	{
802	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
803
804	/*
805	* Recalc the RC address.
806	*/
807	#ifdef VBOX_WITH_RAW_MODE
808	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
809	#endif
810
811	/*
812	* The stack.
813	*/
814	for (VMCPUID i = 0; i < pVM->cCpus; i++)
815	{
816	PVMCPU pVCpu = &pVM->aCpus[i];
817
818	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
819
820	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
821	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
822	}
823
824	/*
825	* All the switchers.
826	*/
827	vmmR3SwitcherRelocate(pVM, offDelta);
828
829	/*
830	* Get other RC entry points.
831	*/
832	int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
833	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
834
835	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
836	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
837
838	/*
839	* Update the logger.
840	*/
841	VMMR3UpdateLoggers(pVM);
842	}
843
844
845	/**
846	* Updates the settings for the RC and R0 loggers.
847	*
848	* @returns VBox status code.
849	* @param pVM Pointer to the VM.
850	*/
851	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
852	{
853	/*
854	* Simply clone the logger instance (for RC).
855	*/
856	int rc = VINF_SUCCESS;
857	RTRCPTR RCPtrLoggerFlush = 0;
858
859	if (pVM->vmm.s.pRCLoggerR3
860	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
861	\|\| pVM->vmm.s.pRCRelLoggerR3
862	#endif
863	)
864	{
865	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
866	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
867	}
868
869	if (pVM->vmm.s.pRCLoggerR3)
870	{
871	RTRCPTR RCPtrLoggerWrapper = 0;
872	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
873	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
874
875	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
876	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
877	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
878	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
879	}
880
881	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
882	if (pVM->vmm.s.pRCRelLoggerR3)
883	{
884	RTRCPTR RCPtrLoggerWrapper = 0;
885	rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
886	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
887
888	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
889	rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
890	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
891	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
892	}
893	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
894
895	#ifdef LOG_ENABLED
896	/*
897	* For the ring-0 EMT logger, we use a per-thread logger instance
898	* in ring-0. Only initialize it once.
899	*/
900	PRTLOGGER const pDefault = RTLogDefaultInstance();
901	for (VMCPUID i = 0; i < pVM->cCpus; i++)
902	{
903	PVMCPU pVCpu = &pVM->aCpus[i];
904	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
905	if (pR0LoggerR3)
906	{
907	if (!pR0LoggerR3->fCreated)
908	{
909	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
910	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
911	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
912
913	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
914	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
915	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
916
917	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
918	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
919	pfnLoggerWrapper, pfnLoggerFlush,
920	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
921	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
922
923	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
924	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
925	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
926	rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
927	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
928	pfnLoggerPrefix, NIL_RTR0PTR);
929	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
930
931	pR0LoggerR3->idCpu = i;
932	pR0LoggerR3->fCreated = true;
933	pR0LoggerR3->fFlushingDisabled = false;
934
935	}
936
937	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
938	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
939	AssertRC(rc);
940	}
941	}
942	#endif
943	return rc;
944	}
945
946
947	/**
948	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
949	*
950	* @returns Pointer to the buffer.
951	* @param pVM Pointer to the VM.
952	*/
953	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
954	{
955	if (HMIsEnabled(pVM))
956	return pVM->vmm.s.szRing0AssertMsg1;
957
958	RTRCPTR RCPtr;
959	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
960	if (RT_SUCCESS(rc))
961	return (const char *)MMHyperRCToR3(pVM, RCPtr);
962
963	return NULL;
964	}
965
966
967	/**
968	* Returns the VMCPU of the specified virtual CPU.
969	*
970	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
971	*
972	* @param pUVM The user mode VM handle.
973	* @param idCpu The ID of the virtual CPU.
974	*/
975	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
976	{
977	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
978	AssertReturn(idCpu < pUVM->cCpus, NULL);
979	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
980	return &pUVM->pVM->aCpus[idCpu];
981	}
982
983
984	/**
985	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
986	*
987	* @returns Pointer to the buffer.
988	* @param pVM Pointer to the VM.
989	*/
990	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
991	{
992	if (HMIsEnabled(pVM))
993	return pVM->vmm.s.szRing0AssertMsg2;
994
995	RTRCPTR RCPtr;
996	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
997	if (RT_SUCCESS(rc))
998	return (const char *)MMHyperRCToR3(pVM, RCPtr);
999
1000	return NULL;
1001	}
1002
1003
1004	/**
1005	* Execute state save operation.
1006	*
1007	* @returns VBox status code.
1008	* @param pVM Pointer to the VM.
1009	* @param pSSM SSM operation handle.
1010	*/
1011	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1012	{
1013	LogFlow(("vmmR3Save:\n"));
1014
1015	/*
1016	* Save the started/stopped state of all CPUs except 0 as it will always
1017	* be running. This avoids breaking the saved state version. :-)
1018	*/
1019	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1020	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1021
1022	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1023	}
1024
1025
1026	/**
1027	* Execute state load operation.
1028	*
1029	* @returns VBox status code.
1030	* @param pVM Pointer to the VM.
1031	* @param pSSM SSM operation handle.
1032	* @param uVersion Data layout version.
1033	* @param uPass The data pass.
1034	*/
1035	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1036	{
1037	LogFlow(("vmmR3Load:\n"));
1038	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1039
1040	/*
1041	* Validate version.
1042	*/
1043	if ( uVersion != VMM_SAVED_STATE_VERSION
1044	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1045	{
1046	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1047	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1048	}
1049
1050	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1051	{
1052	/* Ignore the stack bottom, stack pointer and stack bits. */
1053	RTRCPTR RCPtrIgnored;
1054	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1055	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1056	#ifdef RT_OS_DARWIN
1057	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1058	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1059	&& SSMR3HandleRevision(pSSM) >= 48858
1060	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1061	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1062	)
1063	SSMR3Skip(pSSM, 16384);
1064	else
1065	SSMR3Skip(pSSM, 8192);
1066	#else
1067	SSMR3Skip(pSSM, 8192);
1068	#endif
1069	}
1070
1071	/*
1072	* Restore the VMCPU states. VCPU 0 is always started.
1073	*/
1074	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1075	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1076	{
1077	bool fStarted;
1078	int rc = SSMR3GetBool(pSSM, &fStarted);
1079	if (RT_FAILURE(rc))
1080	return rc;
1081	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1082	}
1083
1084	/* terminator */
1085	uint32_t u32;
1086	int rc = SSMR3GetU32(pSSM, &u32);
1087	if (RT_FAILURE(rc))
1088	return rc;
1089	if (u32 != UINT32_MAX)
1090	{
1091	AssertMsgFailed(("u32=%#x\n", u32));
1092	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1093	}
1094	return VINF_SUCCESS;
1095	}
1096
1097
1098	/**
1099	* Resolve a builtin RC symbol.
1100	*
1101	* Called by PDM when loading or relocating RC modules.
1102	*
1103	* @returns VBox status
1104	* @param pVM Pointer to the VM.
1105	* @param pszSymbol Symbol to resolv
1106	* @param pRCPtrValue Where to store the symbol value.
1107	*
1108	* @remark This has to work before VMMR3Relocate() is called.
1109	*/
1110	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1111	{
1112	if (!strcmp(pszSymbol, "g_Logger"))
1113	{
1114	if (pVM->vmm.s.pRCLoggerR3)
1115	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1116	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1117	}
1118	else if (!strcmp(pszSymbol, "g_RelLogger"))
1119	{
1120	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1121	if (pVM->vmm.s.pRCRelLoggerR3)
1122	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1123	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1124	#else
1125	*pRCPtrValue = NIL_RTRCPTR;
1126	#endif
1127	}
1128	else
1129	return VERR_SYMBOL_NOT_FOUND;
1130	return VINF_SUCCESS;
1131	}
1132
1133
1134	/**
1135	* Suspends the CPU yielder.
1136	*
1137	* @param pVM Pointer to the VM.
1138	*/
1139	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1140	{
1141	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1142	if (!pVM->vmm.s.cYieldResumeMillies)
1143	{
1144	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1145	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1146	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1147	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1148	else
1149	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1150	TMTimerStop(pVM->vmm.s.pYieldTimer);
1151	}
1152	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1153	}
1154
1155
1156	/**
1157	* Stops the CPU yielder.
1158	*
1159	* @param pVM Pointer to the VM.
1160	*/
1161	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1162	{
1163	if (!pVM->vmm.s.cYieldResumeMillies)
1164	TMTimerStop(pVM->vmm.s.pYieldTimer);
1165	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1166	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1167	}
1168
1169
1170	/**
1171	* Resumes the CPU yielder when it has been a suspended or stopped.
1172	*
1173	* @param pVM Pointer to the VM.
1174	*/
1175	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1176	{
1177	if (pVM->vmm.s.cYieldResumeMillies)
1178	{
1179	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1180	pVM->vmm.s.cYieldResumeMillies = 0;
1181	}
1182	}
1183
1184
1185	/**
1186	* Internal timer callback function.
1187	*
1188	* @param pVM The VM.
1189	* @param pTimer The timer handle.
1190	* @param pvUser User argument specified upon timer creation.
1191	*/
1192	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1193	{
1194	NOREF(pvUser);
1195
1196	/*
1197	* This really needs some careful tuning. While we shouldn't be too greedy since
1198	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1199	* because that'll cause us to stop up.
1200	*
1201	* The current logic is to use the default interval when there is no lag worth
1202	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1203	*
1204	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1205	* so the lag is up to date.)
1206	*/
1207	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1208	if ( u64Lag < 50000000 /* 50ms */
1209	\|\| ( u64Lag < 1000000000 /* 1s */
1210	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1211	)
1212	{
1213	uint64_t u64Elapsed = RTTimeNanoTS();
1214	pVM->vmm.s.u64LastYield = u64Elapsed;
1215
1216	RTThreadYield();
1217
1218	#ifdef LOG_ENABLED
1219	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1220	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1221	#endif
1222	}
1223	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1224	}
1225
1226
1227	/**
1228	* Executes guest code in the raw-mode context.
1229	*
1230	* @param pVM Pointer to the VM.
1231	* @param pVCpu Pointer to the VMCPU.
1232	*/
1233	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1234	{
1235	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1236
1237	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1238
1239	/*
1240	* Set the hypervisor to resume executing a CPUM resume function
1241	* in CPUMRCA.asm.
1242	*/
1243	CPUMSetHyperState(pVCpu,
1244	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1245	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1246	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1247	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1248	0, /* eax */
1249	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1250
1251	/*
1252	* We hide log flushes (outer) and hypervisor interrupts (inner).
1253	*/
1254	for (;;)
1255	{
1256	#ifdef VBOX_STRICT
1257	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1258	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1259	PGMMapCheck(pVM);
1260	# ifdef VBOX_WITH_SAFE_STR
1261	SELMR3CheckShadowTR(pVM);
1262	# endif
1263	#endif
1264	int rc;
1265	do
1266	{
1267	#ifdef NO_SUPCALLR0VMM
1268	rc = VERR_GENERAL_FAILURE;
1269	#else
1270	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1271	if (RT_LIKELY(rc == VINF_SUCCESS))
1272	rc = pVCpu->vmm.s.iLastGZRc;
1273	#endif
1274	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1275
1276	/*
1277	* Flush the logs.
1278	*/
1279	#ifdef LOG_ENABLED
1280	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1281	if ( pLogger
1282	&& pLogger->offScratch > 0)
1283	RTLogFlushRC(NULL, pLogger);
1284	#endif
1285	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1286	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1287	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1288	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1289	#endif
1290	if (rc != VINF_VMM_CALL_HOST)
1291	{
1292	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1293	return rc;
1294	}
1295	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1296	if (RT_FAILURE(rc))
1297	return rc;
1298	/* Resume GC */
1299	}
1300	}
1301
1302
1303	/**
1304	* Executes guest code (Intel VT-x and AMD-V).
1305	*
1306	* @param pVM Pointer to the VM.
1307	* @param pVCpu Pointer to the VMCPU.
1308	*/
1309	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1310	{
1311	Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1312
1313	for (;;)
1314	{
1315	int rc;
1316	do
1317	{
1318	#ifdef NO_SUPCALLR0VMM
1319	rc = VERR_GENERAL_FAILURE;
1320	#else
1321	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1322	if (RT_LIKELY(rc == VINF_SUCCESS))
1323	rc = pVCpu->vmm.s.iLastGZRc;
1324	#endif
1325	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1326
1327	#if 0 /* todo triggers too often */
1328	Assert(!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TO_R3));
1329	#endif
1330
1331	#ifdef LOG_ENABLED
1332	/*
1333	* Flush the log
1334	*/
1335	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1336	if ( pR0LoggerR3
1337	&& pR0LoggerR3->Logger.offScratch > 0)
1338	RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1339	#endif /* !LOG_ENABLED */
1340	if (rc != VINF_VMM_CALL_HOST)
1341	{
1342	Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1343	return rc;
1344	}
1345	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1346	if (RT_FAILURE(rc))
1347	return rc;
1348	/* Resume R0 */
1349	}
1350	}
1351
1352	/**
1353	* VCPU worker for VMMSendSipi.
1354	*
1355	* @param pVM Pointer to the VM.
1356	* @param idCpu Virtual CPU to perform SIPI on
1357	* @param uVector SIPI vector
1358	*/
1359	DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1360	{
1361	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1362	VMCPU_ASSERT_EMT(pVCpu);
1363
1364	/** @todo what are we supposed to do if the processor is already running? */
1365	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1366	return VERR_ACCESS_DENIED;
1367
1368
1369	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1370
1371	pCtx->cs.Sel = uVector << 8;
1372	pCtx->cs.ValidSel = uVector << 8;
1373	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1374	pCtx->cs.u64Base = uVector << 12;
1375	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1376	pCtx->rip = 0;
1377
1378	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1379
1380	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1381	EMSetState(pVCpu, EMSTATE_HALTED);
1382	return VINF_EM_RESCHEDULE;
1383	# else /* And if we go the VMCPU::enmState way it can stay here. */
1384	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1385	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1386	return VINF_SUCCESS;
1387	# endif
1388	}
1389
1390	DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1391	{
1392	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1393	VMCPU_ASSERT_EMT(pVCpu);
1394
1395	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1396
1397	PGMR3ResetCpu(pVM, pVCpu);
1398	CPUMR3ResetCpu(pVCpu);
1399
1400	return VINF_EM_WAIT_SIPI;
1401	}
1402
1403	/**
1404	* Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1405	* and unhalting processor
1406	*
1407	* @param pVM Pointer to the VM.
1408	* @param idCpu Virtual CPU to perform SIPI on
1409	* @param uVector SIPI vector
1410	*/
1411	VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1412	{
1413	AssertReturnVoid(idCpu < pVM->cCpus);
1414
1415	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1416	AssertRC(rc);
1417	}
1418
1419	/**
1420	* Sends init IPI to the virtual CPU.
1421	*
1422	* @param pVM Pointer to the VM.
1423	* @param idCpu Virtual CPU to perform int IPI on
1424	*/
1425	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1426	{
1427	AssertReturnVoid(idCpu < pVM->cCpus);
1428
1429	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1430	AssertRC(rc);
1431	}
1432
1433	/**
1434	* Registers the guest memory range that can be used for patching
1435	*
1436	* @returns VBox status code.
1437	* @param pVM Pointer to the VM.
1438	* @param pPatchMem Patch memory range
1439	* @param cbPatchMem Size of the memory range
1440	*/
1441	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1442	{
1443	VM_ASSERT_EMT(pVM);
1444	if (HMIsEnabled(pVM))
1445	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1446
1447	return VERR_NOT_SUPPORTED;
1448	}
1449
1450	/**
1451	* Deregisters the guest memory range that can be used for patching
1452	*
1453	* @returns VBox status code.
1454	* @param pVM Pointer to the VM.
1455	* @param pPatchMem Patch memory range
1456	* @param cbPatchMem Size of the memory range
1457	*/
1458	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1459	{
1460	if (HMIsEnabled(pVM))
1461	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1462
1463	return VINF_SUCCESS;
1464	}
1465
1466
1467	/**
1468	* Count returns and have the last non-caller EMT wake up the caller.
1469	*
1470	* @returns VBox strict informational status code for EM scheduling. No failures
1471	* will be returned here, those are for the caller only.
1472	*
1473	* @param pVM Pointer to the VM.
1474	*/
1475	DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1476	{
1477	int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1478	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1479	if (cReturned == pVM->cCpus - 1U)
1480	{
1481	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1482	AssertLogRelRC(rc);
1483	}
1484
1485	AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1486	\|\| (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1487	("%Rrc\n", rcRet),
1488	VERR_IPE_UNEXPECTED_INFO_STATUS);
1489	return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1490	}
1491
1492
1493	/**
1494	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1495	*
1496	* @returns VBox strict informational status code for EM scheduling. No failures
1497	* will be returned here, those are for the caller only. When
1498	* fIsCaller is set, VINF_SUCCESS is always returned.
1499	*
1500	* @param pVM Pointer to the VM.
1501	* @param pVCpu The VMCPU structure for the calling EMT.
1502	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1503	* not.
1504	* @param fFlags The flags.
1505	* @param pfnRendezvous The callback.
1506	* @param pvUser The user argument for the callback.
1507	*/
1508	static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1509	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1510	{
1511	int rc;
1512
1513	/*
1514	* Enter, the last EMT triggers the next callback phase.
1515	*/
1516	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1517	if (cEntered != pVM->cCpus)
1518	{
1519	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1520	{
1521	/* Wait for our turn. */
1522	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1523	AssertLogRelRC(rc);
1524	}
1525	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1526	{
1527	/* Wait for the last EMT to arrive and wake everyone up. */
1528	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1529	AssertLogRelRC(rc);
1530	}
1531	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1532	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1533	{
1534	/* Wait for our turn. */
1535	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1536	AssertLogRelRC(rc);
1537	}
1538	else
1539	{
1540	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1541
1542	/*
1543	* The execute once is handled specially to optimize the code flow.
1544	*
1545	* The last EMT to arrive will perform the callback and the other
1546	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1547	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1548	* returns, that EMT will initiate the normal return sequence.
1549	*/
1550	if (!fIsCaller)
1551	{
1552	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1553	AssertLogRelRC(rc);
1554
1555	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1556	}
1557	return VINF_SUCCESS;
1558	}
1559	}
1560	else
1561	{
1562	/*
1563	* All EMTs are waiting, clear the FF and take action according to the
1564	* execution method.
1565	*/
1566	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1567
1568	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1569	{
1570	/* Wake up everyone. */
1571	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1572	AssertLogRelRC(rc);
1573	}
1574	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1575	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1576	{
1577	/* Figure out who to wake up and wake it up. If it's ourself, then
1578	it's easy otherwise wait for our turn. */
1579	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1580	? 0
1581	: pVM->cCpus - 1U;
1582	if (pVCpu->idCpu != iFirst)
1583	{
1584	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1585	AssertLogRelRC(rc);
1586	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1587	AssertLogRelRC(rc);
1588	}
1589	}
1590	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1591	}
1592
1593
1594	/*
1595	* Do the callback and update the status if necessary.
1596	*/
1597	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1598	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1599	{
1600	VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1601	if (rcStrict != VINF_SUCCESS)
1602	{
1603	AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1604	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1605	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1606	int32_t i32RendezvousStatus;
1607	do
1608	{
1609	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1610	if ( rcStrict == i32RendezvousStatus
1611	\|\| RT_FAILURE(i32RendezvousStatus)
1612	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1613	&& rcStrict > i32RendezvousStatus))
1614	break;
1615	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1616	}
1617	}
1618
1619	/*
1620	* Increment the done counter and take action depending on whether we're
1621	* the last to finish callback execution.
1622	*/
1623	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1624	if ( cDone != pVM->cCpus
1625	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1626	{
1627	/* Signal the next EMT? */
1628	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1629	{
1630	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1631	AssertLogRelRC(rc);
1632	}
1633	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1634	{
1635	Assert(cDone == pVCpu->idCpu + 1U);
1636	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1637	AssertLogRelRC(rc);
1638	}
1639	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1640	{
1641	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1642	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1643	AssertLogRelRC(rc);
1644	}
1645
1646	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1647	if (!fIsCaller)
1648	{
1649	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1650	AssertLogRelRC(rc);
1651	}
1652	}
1653	else
1654	{
1655	/* Callback execution is all done, tell the rest to return. */
1656	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1657	AssertLogRelRC(rc);
1658	}
1659
1660	if (!fIsCaller)
1661	return vmmR3EmtRendezvousNonCallerReturn(pVM);
1662	return VINF_SUCCESS;
1663	}
1664
1665
1666	/**
1667	* Called in response to VM_FF_EMT_RENDEZVOUS.
1668	*
1669	* @returns VBox strict status code - EM scheduling. No errors will be returned
1670	* here, nor will any non-EM scheduling status codes be returned.
1671	*
1672	* @param pVM Pointer to the VM.
1673	* @param pVCpu The handle of the calling EMT.
1674	*
1675	* @thread EMT
1676	*/
1677	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1678	{
1679	Assert(!pVCpu->vmm.s.fInRendezvous);
1680	pVCpu->vmm.s.fInRendezvous = true;
1681	int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1682	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1683	pVCpu->vmm.s.fInRendezvous = false;
1684	return rc;
1685	}
1686
1687
1688	/**
1689	* EMT rendezvous.
1690	*
1691	* Gathers all the EMTs and execute some code on each of them, either in a one
1692	* by one fashion or all at once.
1693	*
1694	* @returns VBox strict status code. This will be the first error,
1695	* VINF_SUCCESS, or an EM scheduling status code.
1696	*
1697	* @param pVM Pointer to the VM.
1698	* @param fFlags Flags indicating execution methods. See
1699	* grp_VMMR3EmtRendezvous_fFlags.
1700	* @param pfnRendezvous The callback.
1701	* @param pvUser User argument for the callback.
1702	*
1703	* @thread Any.
1704	*/
1705	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1706	{
1707	/*
1708	* Validate input.
1709	*/
1710	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1711	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1712	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1713	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1714	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1715	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1716	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1717	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1718
1719	VBOXSTRICTRC rcStrict;
1720	PVMCPU pVCpu = VMMGetCpu(pVM);
1721	if (!pVCpu)
1722	/*
1723	* Forward the request to an EMT thread.
1724	*/
1725	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1726	(PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1727	else if (pVM->cCpus == 1)
1728	{
1729	/*
1730	* Shortcut for the single EMT case.
1731	*/
1732	AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1733	pVCpu->vmm.s.fInRendezvous = true;
1734	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1735	pVCpu->vmm.s.fInRendezvous = false;
1736	}
1737	else
1738	{
1739	/*
1740	* Spin lock. If busy, wait for the other EMT to finish while keeping a
1741	* lookout of the RENDEZVOUS FF.
1742	*/
1743	int rc;
1744	rcStrict = VINF_SUCCESS;
1745	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1746	{
1747	AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1748
1749	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1750	{
1751	if (VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1752	{
1753	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1754	if ( rc != VINF_SUCCESS
1755	&& ( rcStrict == VINF_SUCCESS
1756	\|\| rcStrict > rc))
1757	rcStrict = rc;
1758	/** @todo Perhaps deal with termination here? */
1759	}
1760	ASMNopPause();
1761	}
1762	}
1763	Assert(!VM_FF_ISPENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1764	Assert(!pVCpu->vmm.s.fInRendezvous);
1765	pVCpu->vmm.s.fInRendezvous = true;
1766
1767	/*
1768	* Clear the slate. This is a semaphore ping-pong orgy. :-)
1769	*/
1770	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1771	{
1772	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1773	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1774	}
1775	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1776	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1777	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1778	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
1779	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1780	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1781	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1782	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1783	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1784	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1785	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1786
1787	/*
1788	* Set the FF and poke the other EMTs.
1789	*/
1790	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1791	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1792
1793	/*
1794	* Do the same ourselves.
1795	*/
1796	vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1797
1798	/*
1799	* The caller waits for the other EMTs to be done and return before doing
1800	* the cleanup. This makes away with wakeup / reset races we would otherwise
1801	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1802	*/
1803	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1804	AssertLogRelRC(rc);
1805
1806	/*
1807	* Get the return code and clean up a little bit.
1808	*/
1809	int rcMy = pVM->vmm.s.i32RendezvousStatus;
1810	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1811
1812	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1813	pVCpu->vmm.s.fInRendezvous = false;
1814
1815	/*
1816	* Merge rcStrict and rcMy.
1817	*/
1818	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1819	if ( rcMy != VINF_SUCCESS
1820	&& ( rcStrict == VINF_SUCCESS
1821	\|\| rcStrict > rcMy))
1822	rcStrict = rcMy;
1823	}
1824
1825	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1826	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1827	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1828	VERR_IPE_UNEXPECTED_INFO_STATUS);
1829	return VBOXSTRICTRC_VAL(rcStrict);
1830	}
1831
1832
1833	/**
1834	* Disables/enables EMT rendezvous.
1835	*
1836	* This is used to make sure EMT rendezvous does not take place while
1837	* processing a priority request.
1838	*
1839	* @returns Old rendezvous-disabled state.
1840	* @param pVCpu The handle of the calling EMT.
1841	* @param fDisabled True if disabled, false if enabled.
1842	*/
1843	VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1844	{
1845	VMCPU_ASSERT_EMT(pVCpu);
1846	bool fOld = pVCpu->vmm.s.fInRendezvous;
1847	pVCpu->vmm.s.fInRendezvous = fDisabled;
1848	return fOld;
1849	}
1850
1851
1852	/**
1853	* Read from the ring 0 jump buffer stack
1854	*
1855	* @returns VBox status code.
1856	*
1857	* @param pVM Pointer to the VM.
1858	* @param idCpu The ID of the source CPU context (for the address).
1859	* @param R0Addr Where to start reading.
1860	* @param pvBuf Where to store the data we've read.
1861	* @param cbRead The number of bytes to read.
1862	*/
1863	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1864	{
1865	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1866	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1867
1868	#ifdef VMM_R0_SWITCH_STACK
1869	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1870	#else
1871	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1872	#endif
1873	if ( off > VMM_STACK_SIZE
1874	\|\| off + cbRead >= VMM_STACK_SIZE)
1875	return VERR_INVALID_POINTER;
1876
1877	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1878	return VINF_SUCCESS;
1879	}
1880
1881
1882	/**
1883	* Calls a RC function.
1884	*
1885	* @param pVM Pointer to the VM.
1886	* @param RCPtrEntry The address of the RC function.
1887	* @param cArgs The number of arguments in the ....
1888	* @param ... Arguments to the function.
1889	*/
1890	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1891	{
1892	va_list args;
1893	va_start(args, cArgs);
1894	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1895	va_end(args);
1896	return rc;
1897	}
1898
1899
1900	/**
1901	* Calls a RC function.
1902	*
1903	* @param pVM Pointer to the VM.
1904	* @param RCPtrEntry The address of the RC function.
1905	* @param cArgs The number of arguments in the ....
1906	* @param args Arguments to the function.
1907	*/
1908	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1909	{
1910	/* Raw mode implies 1 VCPU. */
1911	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1912	PVMCPU pVCpu = &pVM->aCpus[0];
1913
1914	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1915
1916	/*
1917	* Setup the call frame using the trampoline.
1918	*/
1919	CPUMSetHyperState(pVCpu,
1920	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1921	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1922	RCPtrEntry, /* eax */
1923	cArgs /* edx */
1924	);
1925
1926	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1927	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1928	int i = cArgs;
1929	while (i-- > 0)
1930	*pFrame++ = va_arg(args, RTGCUINTPTR32);
1931
1932	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1933	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1934
1935	/*
1936	* We hide log flushes (outer) and hypervisor interrupts (inner).
1937	*/
1938	for (;;)
1939	{
1940	int rc;
1941	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1942	do
1943	{
1944	#ifdef NO_SUPCALLR0VMM
1945	rc = VERR_GENERAL_FAILURE;
1946	#else
1947	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1948	if (RT_LIKELY(rc == VINF_SUCCESS))
1949	rc = pVCpu->vmm.s.iLastGZRc;
1950	#endif
1951	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1952
1953	/*
1954	* Flush the loggers.
1955	*/
1956	#ifdef LOG_ENABLED
1957	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1958	if ( pLogger
1959	&& pLogger->offScratch > 0)
1960	RTLogFlushRC(NULL, pLogger);
1961	#endif
1962	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1963	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1964	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1965	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1966	#endif
1967	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
1968	VMMR3FatalDump(pVM, pVCpu, rc);
1969	if (rc != VINF_VMM_CALL_HOST)
1970	{
1971	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1972	return rc;
1973	}
1974	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1975	if (RT_FAILURE(rc))
1976	return rc;
1977	}
1978	}
1979
1980
1981	/**
1982	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
1983	*
1984	* @returns VBox status code.
1985	* @param pVM Pointer to the VM.
1986	* @param uOperation Operation to execute.
1987	* @param u64Arg Constant argument.
1988	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
1989	* details.
1990	*/
1991	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
1992	{
1993	PVMCPU pVCpu = VMMGetCpu(pVM);
1994	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
1995
1996	/*
1997	* Call Ring-0 entry with init code.
1998	*/
1999	int rc;
2000	for (;;)
2001	{
2002	#ifdef NO_SUPCALLR0VMM
2003	rc = VERR_GENERAL_FAILURE;
2004	#else
2005	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2006	#endif
2007	/*
2008	* Flush the logs.
2009	*/
2010	#ifdef LOG_ENABLED
2011	if ( pVCpu->vmm.s.pR0LoggerR3
2012	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2013	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2014	#endif
2015	if (rc != VINF_VMM_CALL_HOST)
2016	break;
2017	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2018	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2019	break;
2020	/* Resume R0 */
2021	}
2022
2023	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2024	("uOperation=%u rc=%Rrc\n", uOperation, rc),
2025	VERR_IPE_UNEXPECTED_INFO_STATUS);
2026	return rc;
2027	}
2028
2029
2030	/**
2031	* Resumes executing hypervisor code when interrupted by a queue flush or a
2032	* debug event.
2033	*
2034	* @returns VBox status code.
2035	* @param pVM Pointer to the VM.
2036	* @param pVCpu Pointer to the VMCPU.
2037	*/
2038	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2039	{
2040	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2041	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2042
2043	/*
2044	* We hide log flushes (outer) and hypervisor interrupts (inner).
2045	*/
2046	for (;;)
2047	{
2048	int rc;
2049	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2050	do
2051	{
2052	#ifdef NO_SUPCALLR0VMM
2053	rc = VERR_GENERAL_FAILURE;
2054	#else
2055	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2056	if (RT_LIKELY(rc == VINF_SUCCESS))
2057	rc = pVCpu->vmm.s.iLastGZRc;
2058	#endif
2059	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2060
2061	/*
2062	* Flush the loggers.
2063	*/
2064	#ifdef LOG_ENABLED
2065	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2066	if ( pLogger
2067	&& pLogger->offScratch > 0)
2068	RTLogFlushRC(NULL, pLogger);
2069	#endif
2070	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2071	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2072	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2073	RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2074	#endif
2075	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2076	VMMR3FatalDump(pVM, pVCpu, rc);
2077	if (rc != VINF_VMM_CALL_HOST)
2078	{
2079	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2080	return rc;
2081	}
2082	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2083	if (RT_FAILURE(rc))
2084	return rc;
2085	}
2086	}
2087
2088
2089	/**
2090	* Service a call to the ring-3 host code.
2091	*
2092	* @returns VBox status code.
2093	* @param pVM Pointer to the VM.
2094	* @param pVCpu Pointer to the VMCPU.
2095	* @remark Careful with critsects.
2096	*/
2097	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2098	{
2099	/*
2100	* We must also check for pending critsect exits or else we can deadlock
2101	* when entering other critsects here.
2102	*/
2103	if (VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2104	PDMCritSectBothFF(pVCpu);
2105
2106	switch (pVCpu->vmm.s.enmCallRing3Operation)
2107	{
2108	/*
2109	* Acquire a critical section.
2110	*/
2111	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2112	{
2113	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2114	true /fCallRing3/);
2115	break;
2116	}
2117
2118	/*
2119	* Enter a r/w critical section exclusively.
2120	*/
2121	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2122	{
2123	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2124	true /fCallRing3/);
2125	break;
2126	}
2127
2128	/*
2129	* Enter a r/w critical section shared.
2130	*/
2131	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2132	{
2133	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2134	true /fCallRing3/);
2135	break;
2136	}
2137
2138	/*
2139	* Acquire the PDM lock.
2140	*/
2141	case VMMCALLRING3_PDM_LOCK:
2142	{
2143	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2144	break;
2145	}
2146
2147	/*
2148	* Grow the PGM pool.
2149	*/
2150	case VMMCALLRING3_PGM_POOL_GROW:
2151	{
2152	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2153	break;
2154	}
2155
2156	/*
2157	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2158	*/
2159	case VMMCALLRING3_PGM_MAP_CHUNK:
2160	{
2161	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2162	break;
2163	}
2164
2165	/*
2166	* Allocates more handy pages.
2167	*/
2168	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2169	{
2170	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2171	break;
2172	}
2173
2174	/*
2175	* Allocates a large page.
2176	*/
2177	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2178	{
2179	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2180	break;
2181	}
2182
2183	/*
2184	* Acquire the PGM lock.
2185	*/
2186	case VMMCALLRING3_PGM_LOCK:
2187	{
2188	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2189	break;
2190	}
2191
2192	/*
2193	* Acquire the MM hypervisor heap lock.
2194	*/
2195	case VMMCALLRING3_MMHYPER_LOCK:
2196	{
2197	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2198	break;
2199	}
2200
2201	#ifdef VBOX_WITH_REM
2202	/*
2203	* Flush REM handler notifications.
2204	*/
2205	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2206	{
2207	REMR3ReplayHandlerNotifications(pVM);
2208	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2209	break;
2210	}
2211	#endif
2212
2213	/*
2214	* This is a noop. We just take this route to avoid unnecessary
2215	* tests in the loops.
2216	*/
2217	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2218	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2219	LogAlways(("FLUSH\n"));
2220	break;
2221
2222	/*
2223	* Set the VM error message.
2224	*/
2225	case VMMCALLRING3_VM_SET_ERROR:
2226	VMR3SetErrorWorker(pVM);
2227	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2228	break;
2229
2230	/*
2231	* Set the VM runtime error message.
2232	*/
2233	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2234	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2235	break;
2236
2237	/*
2238	* Signal a ring 0 hypervisor assertion.
2239	* Cancel the longjmp operation that's in progress.
2240	*/
2241	case VMMCALLRING3_VM_R0_ASSERTION:
2242	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2243	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2244	#ifdef RT_ARCH_X86
2245	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2246	#else
2247	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2248	#endif
2249	#ifdef VMM_R0_SWITCH_STACK
2250	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2251	#endif
2252	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2253	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2254	return VERR_VMM_RING0_ASSERTION;
2255
2256	/*
2257	* A forced switch to ring 0 for preemption purposes.
2258	*/
2259	case VMMCALLRING3_VM_R0_PREEMPT:
2260	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2261	break;
2262
2263	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2264	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2265	break;
2266
2267	default:
2268	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2269	return VERR_VMM_UNKNOWN_RING3_CALL;
2270	}
2271
2272	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2273	return VINF_SUCCESS;
2274	}
2275
2276
2277	/**
2278	* Displays the Force action Flags.
2279	*
2280	* @param pVM Pointer to the VM.
2281	* @param pHlp The output helpers.
2282	* @param pszArgs The additional arguments (ignored).
2283	*/
2284	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2285	{
2286	int c;
2287	uint32_t f;
2288	NOREF(pszArgs);
2289
2290	#define PRINT_FLAG(prf,flag) do { \
2291	if (f & (prf##flag)) \
2292	{ \
2293	static const char *s_psz = #flag; \
2294	if (!(c % 6)) \
2295	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2296	else \
2297	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2298	c++; \
2299	f &= ~(prf##flag); \
2300	} \
2301	} while (0)
2302
2303	#define PRINT_GROUP(prf,grp,sfx) do { \
2304	if (f & (prf##grp##sfx)) \
2305	{ \
2306	static const char *s_psz = #grp; \
2307	if (!(c % 5)) \
2308	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2309	else \
2310	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2311	c++; \
2312	} \
2313	} while (0)
2314
2315	/*
2316	* The global flags.
2317	*/
2318	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2319	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2320
2321	/* show the flag mnemonics */
2322	c = 0;
2323	f = fGlobalForcedActions;
2324	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2325	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2326	PRINT_FLAG(VM_FF_,PDM_DMA);
2327	PRINT_FLAG(VM_FF_,DBGF);
2328	PRINT_FLAG(VM_FF_,REQUEST);
2329	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2330	PRINT_FLAG(VM_FF_,RESET);
2331	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2332	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2333	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2334	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2335	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2336	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2337	if (f)
2338	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2339	else
2340	pHlp->pfnPrintf(pHlp, "\n");
2341
2342	/* the groups */
2343	c = 0;
2344	f = fGlobalForcedActions;
2345	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2346	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2347	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2348	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2349	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2350	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2351	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2352	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2353	if (c)
2354	pHlp->pfnPrintf(pHlp, "\n");
2355
2356	/*
2357	* Per CPU flags.
2358	*/
2359	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2360	{
2361	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2362	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2363
2364	/* show the flag mnemonics */
2365	c = 0;
2366	f = fLocalForcedActions;
2367	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2368	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2369	PRINT_FLAG(VMCPU_FF_,TIMER);
2370	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2371	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2372	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2373	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2374	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2375	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2376	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2377	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2378	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2379	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2380	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2381	PRINT_FLAG(VMCPU_FF_,TO_R3);
2382	if (f)
2383	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2384	else
2385	pHlp->pfnPrintf(pHlp, "\n");
2386
2387	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2388	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2389
2390	/* the groups */
2391	c = 0;
2392	f = fLocalForcedActions;
2393	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2394	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2395	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2396	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2397	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2398	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2399	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2400	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2401	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2402	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2403	if (c)
2404	pHlp->pfnPrintf(pHlp, "\n");
2405	}
2406
2407	#undef PRINT_FLAG
2408	#undef PRINT_GROUP
2409	}
2410

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 45457

Download in other formats: