VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 53399

Last change on this file since 53399 was 53300, checked in by vboxsync, 10 years ago

VMM: logging fix
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1/* $Id: VMM.cpp 53300 2014-11-11 08:47:46Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2014 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmcritsectrw.h>
84#include <VBox/vmm/pdmapi.h>
85#include <VBox/vmm/cpum.h>
86#include <VBox/vmm/gim.h>
87#include <VBox/vmm/mm.h>
88#include <VBox/vmm/iom.h>
89#include <VBox/vmm/trpm.h>
90#include <VBox/vmm/selm.h>
91#include <VBox/vmm/em.h>
92#include <VBox/sup.h>
93#include <VBox/vmm/dbgf.h>
94#include <VBox/vmm/csam.h>
95#include <VBox/vmm/patm.h>
96#ifdef VBOX_WITH_REM
97# include <VBox/vmm/rem.h>
98#endif
99#include <VBox/vmm/ssm.h>
100#include <VBox/vmm/ftm.h>
101#include <VBox/vmm/tm.h>
102#include "VMMInternal.h"
103#include "VMMSwitcher.h"
104#include <VBox/vmm/vm.h>
105#include <VBox/vmm/uvm.h>
106
107#include <VBox/err.h>
108#include <VBox/param.h>
109#include <VBox/version.h>
110#include <VBox/vmm/hm.h>
111#include <iprt/assert.h>
112#include <iprt/alloc.h>
113#include <iprt/asm.h>
114#include <iprt/time.h>
115#include <iprt/semaphore.h>
116#include <iprt/stream.h>
117#include <iprt/string.h>
118#include <iprt/stdarg.h>
119#include <iprt/ctype.h>
120#include <iprt/x86.h>
121
122
123
124/*******************************************************************************
125* Defined Constants And Macros *
126*******************************************************************************/
127/** The saved state version. */
128#define VMM_SAVED_STATE_VERSION 4
129/** The saved state version used by v3.0 and earlier. (Teleportation) */
130#define VMM_SAVED_STATE_VERSION_3_0 3
131
132
133/*******************************************************************************
134* Internal Functions *
135*******************************************************************************/
136static int vmmR3InitStacks(PVM pVM);
137static int vmmR3InitLoggers(PVM pVM);
138static void vmmR3InitRegisterStats(PVM pVM);
139static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
140static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
141static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
142static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
143static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
144
145
146/**
147 * Initializes the VMM.
148 *
149 * @returns VBox status code.
150 * @param pVM Pointer to the VM.
151 */
152VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
153{
154 LogFlow(("VMMR3Init\n"));
155
156 /*
157 * Assert alignment, sizes and order.
158 */
159 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
160 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
161 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
162
163 /*
164 * Init basic VM VMM members.
165 */
166 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
167 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
168 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
169 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
170 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
171 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
172
173 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
174 * The EMT yield interval. The EMT yielding is a hack we employ to play a
175 * bit nicer with the rest of the system (like for instance the GUI).
176 */
177 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
178 23 /* Value arrived at after experimenting with the grub boot prompt. */);
179 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
180
181
182 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
183 * Controls whether we employ per-cpu preemption timers to limit the time
184 * spent executing guest code. This option is not available on all
185 * platforms and we will silently ignore this setting then. If we are
186 * running in VT-x mode, we will use the VMX-preemption timer instead of
187 * this one when possible.
188 */
189 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
190 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
191 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
192
193 /*
194 * Initialize the VMM rendezvous semaphores.
195 */
196 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
197 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
198 return VERR_NO_MEMORY;
199 for (VMCPUID i = 0; i < pVM->cCpus; i++)
200 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
201 for (VMCPUID i = 0; i < pVM->cCpus; i++)
202 {
203 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
204 AssertRCReturn(rc, rc);
205 }
206 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
207 AssertRCReturn(rc, rc);
208 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
209 AssertRCReturn(rc, rc);
210 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
211 AssertRCReturn(rc, rc);
212 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
213 AssertRCReturn(rc, rc);
214
215 /*
216 * Register the saved state data unit.
217 */
218 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
219 NULL, NULL, NULL,
220 NULL, vmmR3Save, NULL,
221 NULL, vmmR3Load, NULL);
222 if (RT_FAILURE(rc))
223 return rc;
224
225 /*
226 * Register the Ring-0 VM handle with the session for fast ioctl calls.
227 */
228 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
229 if (RT_FAILURE(rc))
230 return rc;
231
232 /*
233 * Init various sub-components.
234 */
235 rc = vmmR3SwitcherInit(pVM);
236 if (RT_SUCCESS(rc))
237 {
238 rc = vmmR3InitStacks(pVM);
239 if (RT_SUCCESS(rc))
240 {
241 rc = vmmR3InitLoggers(pVM);
242
243#ifdef VBOX_WITH_NMI
244 /*
245 * Allocate mapping for the host APIC.
246 */
247 if (RT_SUCCESS(rc))
248 {
249 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
250 AssertRC(rc);
251 }
252#endif
253 if (RT_SUCCESS(rc))
254 {
255 /*
256 * Debug info and statistics.
257 */
258 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
259 vmmR3InitRegisterStats(pVM);
260 vmmInitFormatTypes();
261
262 return VINF_SUCCESS;
263 }
264 }
265 /** @todo: Need failure cleanup. */
266
267 //more todo in here?
268 //if (RT_SUCCESS(rc))
269 //{
270 //}
271 //int rc2 = vmmR3TermCoreCode(pVM);
272 //AssertRC(rc2));
273 }
274
275 return rc;
276}
277
278
279/**
280 * Allocate & setup the VMM RC stack(s) (for EMTs).
281 *
282 * The stacks are also used for long jumps in Ring-0.
283 *
284 * @returns VBox status code.
285 * @param pVM Pointer to the VM.
286 *
287 * @remarks The optional guard page gets it protection setup up during R3 init
288 * completion because of init order issues.
289 */
290static int vmmR3InitStacks(PVM pVM)
291{
292 int rc = VINF_SUCCESS;
293#ifdef VMM_R0_SWITCH_STACK
294 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
295#else
296 uint32_t fFlags = 0;
297#endif
298
299 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
300 {
301 PVMCPU pVCpu = &pVM->aCpus[idCpu];
302
303#ifdef VBOX_STRICT_VMM_STACK
304 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
305#else
306 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
307#endif
308 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
309 if (RT_SUCCESS(rc))
310 {
311#ifdef VBOX_STRICT_VMM_STACK
312 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
313#endif
314#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
315 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
316 if (!HMIsEnabled(pVM))
317 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
318 else
319#endif
320 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
321 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
322 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
323 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
324
325 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
326 }
327 }
328
329 return rc;
330}
331
332
333/**
334 * Initialize the loggers.
335 *
336 * @returns VBox status code.
337 * @param pVM Pointer to the VM.
338 */
339static int vmmR3InitLoggers(PVM pVM)
340{
341 int rc;
342#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
343
344 /*
345 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
346 */
347#ifdef LOG_ENABLED
348 PRTLOGGER pLogger = RTLogDefaultInstance();
349 if (pLogger)
350 {
351 if (!HMIsEnabled(pVM))
352 {
353 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
354 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
355 if (RT_FAILURE(rc))
356 return rc;
357 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
358 }
359
360# ifdef VBOX_WITH_R0_LOGGING
361 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
362 for (VMCPUID i = 0; i < pVM->cCpus; i++)
363 {
364 PVMCPU pVCpu = &pVM->aCpus[i];
365 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
366 (void **)&pVCpu->vmm.s.pR0LoggerR3);
367 if (RT_FAILURE(rc))
368 return rc;
369 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
370 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
371 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
372 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
373 }
374# endif
375 }
376#endif /* LOG_ENABLED */
377
378#ifdef VBOX_WITH_RC_RELEASE_LOGGING
379 /*
380 * Allocate RC release logger instances (finalized in the relocator).
381 */
382 if (!HMIsEnabled(pVM))
383 {
384 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
385 if (pRelLogger)
386 {
387 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
388 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
389 if (RT_FAILURE(rc))
390 return rc;
391 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
392 }
393 }
394#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
395 return VINF_SUCCESS;
396}
397
398
399/**
400 * VMMR3Init worker that register the statistics with STAM.
401 *
402 * @param pVM The shared VM structure.
403 */
404static void vmmR3InitRegisterStats(PVM pVM)
405{
406 /*
407 * Statistics.
408 */
409 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
468
469#ifdef VBOX_WITH_STATISTICS
470 for (VMCPUID i = 0; i < pVM->cCpus; i++)
471 {
472 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
473 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
474 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
475 }
476#endif
477}
478
479
480/**
481 * Initializes the R0 VMM.
482 *
483 * @returns VBox status code.
484 * @param pVM Pointer to the VM.
485 */
486VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
487{
488 int rc;
489 PVMCPU pVCpu = VMMGetCpu(pVM);
490 Assert(pVCpu && pVCpu->idCpu == 0);
491
492#ifdef LOG_ENABLED
493 /*
494 * Initialize the ring-0 logger if we haven't done so yet.
495 */
496 if ( pVCpu->vmm.s.pR0LoggerR3
497 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
498 {
499 rc = VMMR3UpdateLoggers(pVM);
500 if (RT_FAILURE(rc))
501 return rc;
502 }
503#endif
504
505 /*
506 * Call Ring-0 entry with init code.
507 */
508 for (;;)
509 {
510#ifdef NO_SUPCALLR0VMM
511 //rc = VERR_GENERAL_FAILURE;
512 rc = VINF_SUCCESS;
513#else
514 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT,
515 RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
516#endif
517 /*
518 * Flush the logs.
519 */
520#ifdef LOG_ENABLED
521 if ( pVCpu->vmm.s.pR0LoggerR3
522 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
523 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
524#endif
525 if (rc != VINF_VMM_CALL_HOST)
526 break;
527 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
528 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
529 break;
530 /* Resume R0 */
531 }
532
533 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
534 {
535 LogRel(("R0 init failed, rc=%Rra\n", rc));
536 if (RT_SUCCESS(rc))
537 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
538 }
539
540 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
541 if (pVM->aCpus[0].vmm.s.hR0ThreadCtx != NIL_RTTHREADCTX)
542 LogRel(("VMM: Thread-context hooks enabled!\n"));
543 else
544 LogRel(("VMM: Thread-context hooks unavailable.\n"));
545
546 return rc;
547}
548
549
550#ifdef VBOX_WITH_RAW_MODE
551/**
552 * Initializes the RC VMM.
553 *
554 * @returns VBox status code.
555 * @param pVM Pointer to the VM.
556 */
557VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
558{
559 PVMCPU pVCpu = VMMGetCpu(pVM);
560 Assert(pVCpu && pVCpu->idCpu == 0);
561
562 /* In VMX mode, there's no need to init RC. */
563 if (HMIsEnabled(pVM))
564 return VINF_SUCCESS;
565
566 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
567
568 /*
569 * Call VMMGCInit():
570 * -# resolve the address.
571 * -# setup stackframe and EIP to use the trampoline.
572 * -# do a generic hypervisor call.
573 */
574 RTRCPTR RCPtrEP;
575 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
576 if (RT_SUCCESS(rc))
577 {
578 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
579 uint64_t u64TS = RTTimeProgramStartNanoTS();
580 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 4: The program startup TS - Hi. */
581 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 4: The program startup TS - Lo. */
582 CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
583 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
584 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
585 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
586 CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
587 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
588 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
589 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
590
591 for (;;)
592 {
593#ifdef NO_SUPCALLR0VMM
594 //rc = VERR_GENERAL_FAILURE;
595 rc = VINF_SUCCESS;
596#else
597 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
598#endif
599#ifdef LOG_ENABLED
600 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
601 if ( pLogger
602 && pLogger->offScratch > 0)
603 RTLogFlushRC(NULL, pLogger);
604#endif
605#ifdef VBOX_WITH_RC_RELEASE_LOGGING
606 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
607 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
608 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
609#endif
610 if (rc != VINF_VMM_CALL_HOST)
611 break;
612 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
613 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
614 break;
615 }
616
617 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
618 {
619 VMMR3FatalDump(pVM, pVCpu, rc);
620 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
621 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
622 }
623 AssertRC(rc);
624 }
625 return rc;
626}
627#endif /* VBOX_WITH_RAW_MODE */
628
629
630/**
631 * Called when an init phase completes.
632 *
633 * @returns VBox status code.
634 * @param pVM Pointer to the VM.
635 * @param enmWhat Which init phase.
636 */
637VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
638{
639 int rc = VINF_SUCCESS;
640
641 switch (enmWhat)
642 {
643 case VMINITCOMPLETED_RING3:
644 {
645 /*
646 * CPUM's post-initialization (APIC base MSR caching).
647 */
648 rc = CPUMR3InitCompleted(pVM);
649 AssertRCReturn(rc, rc);
650
651 /*
652 * Set page attributes to r/w for stack pages.
653 */
654 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
655 {
656 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
657 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
658 AssertRCReturn(rc, rc);
659 }
660
661 /*
662 * Create the EMT yield timer.
663 */
664 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
665 AssertRCReturn(rc, rc);
666
667 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
668 AssertRCReturn(rc, rc);
669
670#ifdef VBOX_WITH_NMI
671 /*
672 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
673 */
674 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
675 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
676 AssertRCReturn(rc, rc);
677#endif
678
679#ifdef VBOX_STRICT_VMM_STACK
680 /*
681 * Setup the stack guard pages: Two inaccessible pages at each sides of the
682 * stack to catch over/under-flows.
683 */
684 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
685 {
686 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
687
688 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
689 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
690
691 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
692 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
693 }
694 pVM->vmm.s.fStackGuardsStationed = true;
695#endif
696 break;
697 }
698
699 case VMINITCOMPLETED_HM:
700 {
701 /*
702 * Disable the periodic preemption timers if we can use the
703 * VMX-preemption timer instead.
704 */
705 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
706 && HMR3IsVmxPreemptionTimerUsed(pVM))
707 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
708 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
709
710 /*
711 * Last chance for GIM to update its CPUID leafs if it requires knowledge/information
712 * from HM initialization.
713 */
714 rc = GIMR3InitCompleted(pVM);
715 AssertRCReturn(rc, rc);
716
717 /*
718 * CPUM's post-initialization (print CPUIDs).
719 */
720 CPUMR3LogCpuIds(pVM);
721 break;
722 }
723
724 default: /* shuts up gcc */
725 break;
726 }
727
728 return rc;
729}
730
731
732/**
733 * Terminate the VMM bits.
734 *
735 * @returns VINF_SUCCESS.
736 * @param pVM Pointer to the VM.
737 */
738VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
739{
740 PVMCPU pVCpu = VMMGetCpu(pVM);
741 Assert(pVCpu && pVCpu->idCpu == 0);
742
743 /*
744 * Call Ring-0 entry with termination code.
745 */
746 int rc;
747 for (;;)
748 {
749#ifdef NO_SUPCALLR0VMM
750 //rc = VERR_GENERAL_FAILURE;
751 rc = VINF_SUCCESS;
752#else
753 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
754#endif
755 /*
756 * Flush the logs.
757 */
758#ifdef LOG_ENABLED
759 if ( pVCpu->vmm.s.pR0LoggerR3
760 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
761 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
762#endif
763 if (rc != VINF_VMM_CALL_HOST)
764 break;
765 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
766 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
767 break;
768 /* Resume R0 */
769 }
770 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
771 {
772 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
773 if (RT_SUCCESS(rc))
774 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
775 }
776
777 for (VMCPUID i = 0; i < pVM->cCpus; i++)
778 {
779 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
780 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
781 }
782 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
783 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
784 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
785 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
786 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
787 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
788 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
789 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
790
791#ifdef VBOX_STRICT_VMM_STACK
792 /*
793 * Make the two stack guard pages present again.
794 */
795 if (pVM->vmm.s.fStackGuardsStationed)
796 {
797 for (VMCPUID i = 0; i < pVM->cCpus; i++)
798 {
799 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
800 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
801 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
802 }
803 pVM->vmm.s.fStackGuardsStationed = false;
804 }
805#endif
806
807 vmmTermFormatTypes();
808 return rc;
809}
810
811
812/**
813 * Applies relocations to data and code managed by this
814 * component. This function will be called at init and
815 * whenever the VMM need to relocate it self inside the GC.
816 *
817 * The VMM will need to apply relocations to the core code.
818 *
819 * @param pVM Pointer to the VM.
820 * @param offDelta The relocation delta.
821 */
822VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
823{
824 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
825
826 /*
827 * Recalc the RC address.
828 */
829#ifdef VBOX_WITH_RAW_MODE
830 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
831#endif
832
833 /*
834 * The stack.
835 */
836 for (VMCPUID i = 0; i < pVM->cCpus; i++)
837 {
838 PVMCPU pVCpu = &pVM->aCpus[i];
839
840 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
841
842 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
843 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
844 }
845
846 /*
847 * All the switchers.
848 */
849 vmmR3SwitcherRelocate(pVM, offDelta);
850
851 /*
852 * Get other RC entry points.
853 */
854 if (!HMIsEnabled(pVM))
855 {
856 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
857 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
858
859 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
860 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
861 }
862
863 /*
864 * Update the logger.
865 */
866 VMMR3UpdateLoggers(pVM);
867}
868
869
870/**
871 * Updates the settings for the RC and R0 loggers.
872 *
873 * @returns VBox status code.
874 * @param pVM Pointer to the VM.
875 */
876VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
877{
878 /*
879 * Simply clone the logger instance (for RC).
880 */
881 int rc = VINF_SUCCESS;
882 RTRCPTR RCPtrLoggerFlush = 0;
883
884 if ( pVM->vmm.s.pRCLoggerR3
885#ifdef VBOX_WITH_RC_RELEASE_LOGGING
886 || pVM->vmm.s.pRCRelLoggerR3
887#endif
888 )
889 {
890 Assert(!HMIsEnabled(pVM));
891 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
892 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
893 }
894
895 if (pVM->vmm.s.pRCLoggerR3)
896 {
897 Assert(!HMIsEnabled(pVM));
898 RTRCPTR RCPtrLoggerWrapper = 0;
899 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
900 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
901
902 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
903 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
904 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
905 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
906 }
907
908#ifdef VBOX_WITH_RC_RELEASE_LOGGING
909 if (pVM->vmm.s.pRCRelLoggerR3)
910 {
911 Assert(!HMIsEnabled(pVM));
912 RTRCPTR RCPtrLoggerWrapper = 0;
913 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
914 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
915
916 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
917 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
918 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
919 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
920 }
921#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
922
923#ifdef LOG_ENABLED
924 /*
925 * For the ring-0 EMT logger, we use a per-thread logger instance
926 * in ring-0. Only initialize it once.
927 */
928 PRTLOGGER const pDefault = RTLogDefaultInstance();
929 for (VMCPUID i = 0; i < pVM->cCpus; i++)
930 {
931 PVMCPU pVCpu = &pVM->aCpus[i];
932 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
933 if (pR0LoggerR3)
934 {
935 if (!pR0LoggerR3->fCreated)
936 {
937 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
938 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
939 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
940
941 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
942 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
943 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
944
945 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
946 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
947 pfnLoggerWrapper, pfnLoggerFlush,
948 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
949 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
950
951 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
952 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
953 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
954 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
955 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
956 pfnLoggerPrefix, NIL_RTR0PTR);
957 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
958
959 pR0LoggerR3->idCpu = i;
960 pR0LoggerR3->fCreated = true;
961 pR0LoggerR3->fFlushingDisabled = false;
962
963 }
964
965 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
966 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
967 AssertRC(rc);
968 }
969 }
970#endif
971 return rc;
972}
973
974
975/**
976 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
977 *
978 * @returns Pointer to the buffer.
979 * @param pVM Pointer to the VM.
980 */
981VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
982{
983 if (HMIsEnabled(pVM))
984 return pVM->vmm.s.szRing0AssertMsg1;
985
986 RTRCPTR RCPtr;
987 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
988 if (RT_SUCCESS(rc))
989 return (const char *)MMHyperRCToR3(pVM, RCPtr);
990
991 return NULL;
992}
993
994
995/**
996 * Returns the VMCPU of the specified virtual CPU.
997 *
998 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
999 *
1000 * @param pUVM The user mode VM handle.
1001 * @param idCpu The ID of the virtual CPU.
1002 */
1003VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1004{
1005 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1006 AssertReturn(idCpu < pUVM->cCpus, NULL);
1007 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1008 return &pUVM->pVM->aCpus[idCpu];
1009}
1010
1011
1012/**
1013 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1014 *
1015 * @returns Pointer to the buffer.
1016 * @param pVM Pointer to the VM.
1017 */
1018VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1019{
1020 if (HMIsEnabled(pVM))
1021 return pVM->vmm.s.szRing0AssertMsg2;
1022
1023 RTRCPTR RCPtr;
1024 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1025 if (RT_SUCCESS(rc))
1026 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1027
1028 return NULL;
1029}
1030
1031
1032/**
1033 * Execute state save operation.
1034 *
1035 * @returns VBox status code.
1036 * @param pVM Pointer to the VM.
1037 * @param pSSM SSM operation handle.
1038 */
1039static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1040{
1041 LogFlow(("vmmR3Save:\n"));
1042
1043 /*
1044 * Save the started/stopped state of all CPUs except 0 as it will always
1045 * be running. This avoids breaking the saved state version. :-)
1046 */
1047 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1048 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1049
1050 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1051}
1052
1053
1054/**
1055 * Execute state load operation.
1056 *
1057 * @returns VBox status code.
1058 * @param pVM Pointer to the VM.
1059 * @param pSSM SSM operation handle.
1060 * @param uVersion Data layout version.
1061 * @param uPass The data pass.
1062 */
1063static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1064{
1065 LogFlow(("vmmR3Load:\n"));
1066 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1067
1068 /*
1069 * Validate version.
1070 */
1071 if ( uVersion != VMM_SAVED_STATE_VERSION
1072 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1073 {
1074 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1075 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1076 }
1077
1078 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1079 {
1080 /* Ignore the stack bottom, stack pointer and stack bits. */
1081 RTRCPTR RCPtrIgnored;
1082 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1083 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1084#ifdef RT_OS_DARWIN
1085 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1086 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1087 && SSMR3HandleRevision(pSSM) >= 48858
1088 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1089 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1090 )
1091 SSMR3Skip(pSSM, 16384);
1092 else
1093 SSMR3Skip(pSSM, 8192);
1094#else
1095 SSMR3Skip(pSSM, 8192);
1096#endif
1097 }
1098
1099 /*
1100 * Restore the VMCPU states. VCPU 0 is always started.
1101 */
1102 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1103 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1104 {
1105 bool fStarted;
1106 int rc = SSMR3GetBool(pSSM, &fStarted);
1107 if (RT_FAILURE(rc))
1108 return rc;
1109 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1110 }
1111
1112 /* terminator */
1113 uint32_t u32;
1114 int rc = SSMR3GetU32(pSSM, &u32);
1115 if (RT_FAILURE(rc))
1116 return rc;
1117 if (u32 != UINT32_MAX)
1118 {
1119 AssertMsgFailed(("u32=%#x\n", u32));
1120 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1121 }
1122 return VINF_SUCCESS;
1123}
1124
1125
1126#ifdef VBOX_WITH_RAW_MODE
1127/**
1128 * Resolve a builtin RC symbol.
1129 *
1130 * Called by PDM when loading or relocating RC modules.
1131 *
1132 * @returns VBox status
1133 * @param pVM Pointer to the VM.
1134 * @param pszSymbol Symbol to resolv
1135 * @param pRCPtrValue Where to store the symbol value.
1136 *
1137 * @remark This has to work before VMMR3Relocate() is called.
1138 */
1139VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1140{
1141 if (!strcmp(pszSymbol, "g_Logger"))
1142 {
1143 if (pVM->vmm.s.pRCLoggerR3)
1144 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1145 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1146 }
1147 else if (!strcmp(pszSymbol, "g_RelLogger"))
1148 {
1149# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1150 if (pVM->vmm.s.pRCRelLoggerR3)
1151 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1152 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1153# else
1154 *pRCPtrValue = NIL_RTRCPTR;
1155# endif
1156 }
1157 else
1158 return VERR_SYMBOL_NOT_FOUND;
1159 return VINF_SUCCESS;
1160}
1161#endif /* VBOX_WITH_RAW_MODE */
1162
1163
1164/**
1165 * Suspends the CPU yielder.
1166 *
1167 * @param pVM Pointer to the VM.
1168 */
1169VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1170{
1171 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1172 if (!pVM->vmm.s.cYieldResumeMillies)
1173 {
1174 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1175 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1176 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1177 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1178 else
1179 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1180 TMTimerStop(pVM->vmm.s.pYieldTimer);
1181 }
1182 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1183}
1184
1185
1186/**
1187 * Stops the CPU yielder.
1188 *
1189 * @param pVM Pointer to the VM.
1190 */
1191VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1192{
1193 if (!pVM->vmm.s.cYieldResumeMillies)
1194 TMTimerStop(pVM->vmm.s.pYieldTimer);
1195 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1196 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1197}
1198
1199
1200/**
1201 * Resumes the CPU yielder when it has been a suspended or stopped.
1202 *
1203 * @param pVM Pointer to the VM.
1204 */
1205VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1206{
1207 if (pVM->vmm.s.cYieldResumeMillies)
1208 {
1209 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1210 pVM->vmm.s.cYieldResumeMillies = 0;
1211 }
1212}
1213
1214
1215/**
1216 * Internal timer callback function.
1217 *
1218 * @param pVM The VM.
1219 * @param pTimer The timer handle.
1220 * @param pvUser User argument specified upon timer creation.
1221 */
1222static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1223{
1224 NOREF(pvUser);
1225
1226 /*
1227 * This really needs some careful tuning. While we shouldn't be too greedy since
1228 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1229 * because that'll cause us to stop up.
1230 *
1231 * The current logic is to use the default interval when there is no lag worth
1232 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1233 *
1234 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1235 * so the lag is up to date.)
1236 */
1237 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1238 if ( u64Lag < 50000000 /* 50ms */
1239 || ( u64Lag < 1000000000 /* 1s */
1240 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1241 )
1242 {
1243 uint64_t u64Elapsed = RTTimeNanoTS();
1244 pVM->vmm.s.u64LastYield = u64Elapsed;
1245
1246 RTThreadYield();
1247
1248#ifdef LOG_ENABLED
1249 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1250 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1251#endif
1252 }
1253 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1254}
1255
1256
1257#ifdef VBOX_WITH_RAW_MODE
1258/**
1259 * Executes guest code in the raw-mode context.
1260 *
1261 * @param pVM Pointer to the VM.
1262 * @param pVCpu Pointer to the VMCPU.
1263 */
1264VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1265{
1266 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1267
1268 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1269
1270 /*
1271 * Set the hypervisor to resume executing a CPUM resume function
1272 * in CPUMRCA.asm.
1273 */
1274 CPUMSetHyperState(pVCpu,
1275 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1276 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1277 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1278 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1279 0, /* eax */
1280 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1281
1282 /*
1283 * We hide log flushes (outer) and hypervisor interrupts (inner).
1284 */
1285 for (;;)
1286 {
1287#ifdef VBOX_STRICT
1288 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1289 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1290 PGMMapCheck(pVM);
1291# ifdef VBOX_WITH_SAFE_STR
1292 SELMR3CheckShadowTR(pVM);
1293# endif
1294#endif
1295 int rc;
1296 do
1297 {
1298#ifdef NO_SUPCALLR0VMM
1299 rc = VERR_GENERAL_FAILURE;
1300#else
1301 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1302 if (RT_LIKELY(rc == VINF_SUCCESS))
1303 rc = pVCpu->vmm.s.iLastGZRc;
1304#endif
1305 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1306
1307 /*
1308 * Flush the logs.
1309 */
1310#ifdef LOG_ENABLED
1311 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1312 if ( pLogger
1313 && pLogger->offScratch > 0)
1314 RTLogFlushRC(NULL, pLogger);
1315#endif
1316#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1317 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1318 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1319 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1320#endif
1321 if (rc != VINF_VMM_CALL_HOST)
1322 {
1323 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1324 return rc;
1325 }
1326 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1327 if (RT_FAILURE(rc))
1328 return rc;
1329 /* Resume GC */
1330 }
1331}
1332#endif /* VBOX_WITH_RAW_MODE */
1333
1334
1335/**
1336 * Executes guest code (Intel VT-x and AMD-V).
1337 *
1338 * @param pVM Pointer to the VM.
1339 * @param pVCpu Pointer to the VMCPU.
1340 */
1341VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1342{
1343 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1344
1345 for (;;)
1346 {
1347 int rc;
1348 do
1349 {
1350#ifdef NO_SUPCALLR0VMM
1351 rc = VERR_GENERAL_FAILURE;
1352#else
1353 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1354 if (RT_LIKELY(rc == VINF_SUCCESS))
1355 rc = pVCpu->vmm.s.iLastGZRc;
1356#endif
1357 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1358
1359#if 0 /* todo triggers too often */
1360 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1361#endif
1362
1363#ifdef LOG_ENABLED
1364 /*
1365 * Flush the log
1366 */
1367 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1368 if ( pR0LoggerR3
1369 && pR0LoggerR3->Logger.offScratch > 0)
1370 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1371#endif /* !LOG_ENABLED */
1372 if (rc != VINF_VMM_CALL_HOST)
1373 {
1374 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1375 return rc;
1376 }
1377 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1378 if (RT_FAILURE(rc))
1379 return rc;
1380 /* Resume R0 */
1381 }
1382}
1383
1384/**
1385 * VCPU worker for VMMSendSipi.
1386 *
1387 * @param pVM Pointer to the VM.
1388 * @param idCpu Virtual CPU to perform SIPI on
1389 * @param uVector SIPI vector
1390 */
1391DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1392{
1393 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1394 VMCPU_ASSERT_EMT(pVCpu);
1395
1396 /** @todo what are we supposed to do if the processor is already running? */
1397 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1398 return VERR_ACCESS_DENIED;
1399
1400
1401 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1402
1403 pCtx->cs.Sel = uVector << 8;
1404 pCtx->cs.ValidSel = uVector << 8;
1405 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1406 pCtx->cs.u64Base = uVector << 12;
1407 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1408 pCtx->rip = 0;
1409
1410 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1411
1412# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1413 EMSetState(pVCpu, EMSTATE_HALTED);
1414 return VINF_EM_RESCHEDULE;
1415# else /* And if we go the VMCPU::enmState way it can stay here. */
1416 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1417 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1418 return VINF_SUCCESS;
1419# endif
1420}
1421
1422DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1423{
1424 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1425 VMCPU_ASSERT_EMT(pVCpu);
1426
1427 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1428
1429 PGMR3ResetCpu(pVM, pVCpu);
1430 CPUMR3ResetCpu(pVM, pVCpu);
1431
1432 return VINF_EM_WAIT_SIPI;
1433}
1434
1435/**
1436 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1437 * and unhalting processor
1438 *
1439 * @param pVM Pointer to the VM.
1440 * @param idCpu Virtual CPU to perform SIPI on
1441 * @param uVector SIPI vector
1442 */
1443VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1444{
1445 AssertReturnVoid(idCpu < pVM->cCpus);
1446
1447 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1448 AssertRC(rc);
1449}
1450
1451/**
1452 * Sends init IPI to the virtual CPU.
1453 *
1454 * @param pVM Pointer to the VM.
1455 * @param idCpu Virtual CPU to perform int IPI on
1456 */
1457VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1458{
1459 AssertReturnVoid(idCpu < pVM->cCpus);
1460
1461 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1462 AssertRC(rc);
1463}
1464
1465/**
1466 * Registers the guest memory range that can be used for patching
1467 *
1468 * @returns VBox status code.
1469 * @param pVM Pointer to the VM.
1470 * @param pPatchMem Patch memory range
1471 * @param cbPatchMem Size of the memory range
1472 */
1473VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1474{
1475 VM_ASSERT_EMT(pVM);
1476 if (HMIsEnabled(pVM))
1477 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1478
1479 return VERR_NOT_SUPPORTED;
1480}
1481
1482/**
1483 * Deregisters the guest memory range that can be used for patching
1484 *
1485 * @returns VBox status code.
1486 * @param pVM Pointer to the VM.
1487 * @param pPatchMem Patch memory range
1488 * @param cbPatchMem Size of the memory range
1489 */
1490VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1491{
1492 if (HMIsEnabled(pVM))
1493 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1494
1495 return VINF_SUCCESS;
1496}
1497
1498
1499/**
1500 * Count returns and have the last non-caller EMT wake up the caller.
1501 *
1502 * @returns VBox strict informational status code for EM scheduling. No failures
1503 * will be returned here, those are for the caller only.
1504 *
1505 * @param pVM Pointer to the VM.
1506 */
1507DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1508{
1509 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1510 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1511 if (cReturned == pVM->cCpus - 1U)
1512 {
1513 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1514 AssertLogRelRC(rc);
1515 }
1516
1517 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1518 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1519 ("%Rrc\n", rcRet),
1520 VERR_IPE_UNEXPECTED_INFO_STATUS);
1521 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1522}
1523
1524
1525/**
1526 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1527 *
1528 * @returns VBox strict informational status code for EM scheduling. No failures
1529 * will be returned here, those are for the caller only. When
1530 * fIsCaller is set, VINF_SUCCESS is always returned.
1531 *
1532 * @param pVM Pointer to the VM.
1533 * @param pVCpu The VMCPU structure for the calling EMT.
1534 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1535 * not.
1536 * @param fFlags The flags.
1537 * @param pfnRendezvous The callback.
1538 * @param pvUser The user argument for the callback.
1539 */
1540static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1541 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1542{
1543 int rc;
1544
1545 /*
1546 * Enter, the last EMT triggers the next callback phase.
1547 */
1548 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1549 if (cEntered != pVM->cCpus)
1550 {
1551 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1552 {
1553 /* Wait for our turn. */
1554 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1555 AssertLogRelRC(rc);
1556 }
1557 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1558 {
1559 /* Wait for the last EMT to arrive and wake everyone up. */
1560 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1561 AssertLogRelRC(rc);
1562 }
1563 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1564 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1565 {
1566 /* Wait for our turn. */
1567 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1568 AssertLogRelRC(rc);
1569 }
1570 else
1571 {
1572 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1573
1574 /*
1575 * The execute once is handled specially to optimize the code flow.
1576 *
1577 * The last EMT to arrive will perform the callback and the other
1578 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1579 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1580 * returns, that EMT will initiate the normal return sequence.
1581 */
1582 if (!fIsCaller)
1583 {
1584 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1585 AssertLogRelRC(rc);
1586
1587 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1588 }
1589 return VINF_SUCCESS;
1590 }
1591 }
1592 else
1593 {
1594 /*
1595 * All EMTs are waiting, clear the FF and take action according to the
1596 * execution method.
1597 */
1598 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1599
1600 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1601 {
1602 /* Wake up everyone. */
1603 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1604 AssertLogRelRC(rc);
1605 }
1606 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1607 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1608 {
1609 /* Figure out who to wake up and wake it up. If it's ourself, then
1610 it's easy otherwise wait for our turn. */
1611 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1612 ? 0
1613 : pVM->cCpus - 1U;
1614 if (pVCpu->idCpu != iFirst)
1615 {
1616 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1617 AssertLogRelRC(rc);
1618 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1619 AssertLogRelRC(rc);
1620 }
1621 }
1622 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1623 }
1624
1625
1626 /*
1627 * Do the callback and update the status if necessary.
1628 */
1629 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1630 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1631 {
1632 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1633 if (rcStrict != VINF_SUCCESS)
1634 {
1635 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1636 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1637 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1638 int32_t i32RendezvousStatus;
1639 do
1640 {
1641 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1642 if ( rcStrict == i32RendezvousStatus
1643 || RT_FAILURE(i32RendezvousStatus)
1644 || ( i32RendezvousStatus != VINF_SUCCESS
1645 && rcStrict > i32RendezvousStatus))
1646 break;
1647 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1648 }
1649 }
1650
1651 /*
1652 * Increment the done counter and take action depending on whether we're
1653 * the last to finish callback execution.
1654 */
1655 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1656 if ( cDone != pVM->cCpus
1657 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1658 {
1659 /* Signal the next EMT? */
1660 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1661 {
1662 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1663 AssertLogRelRC(rc);
1664 }
1665 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1666 {
1667 Assert(cDone == pVCpu->idCpu + 1U);
1668 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1669 AssertLogRelRC(rc);
1670 }
1671 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1672 {
1673 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1674 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1675 AssertLogRelRC(rc);
1676 }
1677
1678 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1679 if (!fIsCaller)
1680 {
1681 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1682 AssertLogRelRC(rc);
1683 }
1684 }
1685 else
1686 {
1687 /* Callback execution is all done, tell the rest to return. */
1688 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1689 AssertLogRelRC(rc);
1690 }
1691
1692 if (!fIsCaller)
1693 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1694 return VINF_SUCCESS;
1695}
1696
1697
1698/**
1699 * Called in response to VM_FF_EMT_RENDEZVOUS.
1700 *
1701 * @returns VBox strict status code - EM scheduling. No errors will be returned
1702 * here, nor will any non-EM scheduling status codes be returned.
1703 *
1704 * @param pVM Pointer to the VM.
1705 * @param pVCpu The handle of the calling EMT.
1706 *
1707 * @thread EMT
1708 */
1709VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1710{
1711 Assert(!pVCpu->vmm.s.fInRendezvous);
1712 pVCpu->vmm.s.fInRendezvous = true;
1713 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1714 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1715 pVCpu->vmm.s.fInRendezvous = false;
1716 return rc;
1717}
1718
1719
1720/**
1721 * EMT rendezvous.
1722 *
1723 * Gathers all the EMTs and execute some code on each of them, either in a one
1724 * by one fashion or all at once.
1725 *
1726 * @returns VBox strict status code. This will be the first error,
1727 * VINF_SUCCESS, or an EM scheduling status code.
1728 *
1729 * @param pVM Pointer to the VM.
1730 * @param fFlags Flags indicating execution methods. See
1731 * grp_VMMR3EmtRendezvous_fFlags.
1732 * @param pfnRendezvous The callback.
1733 * @param pvUser User argument for the callback.
1734 *
1735 * @thread Any.
1736 */
1737VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1738{
1739 /*
1740 * Validate input.
1741 */
1742 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1743 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1744 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1745 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1746 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1747 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1748 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1749 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1750
1751 VBOXSTRICTRC rcStrict;
1752 PVMCPU pVCpu = VMMGetCpu(pVM);
1753 if (!pVCpu)
1754 /*
1755 * Forward the request to an EMT thread.
1756 */
1757 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1758 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1759 else if (pVM->cCpus == 1)
1760 {
1761 /*
1762 * Shortcut for the single EMT case.
1763 */
1764 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1765 pVCpu->vmm.s.fInRendezvous = true;
1766 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1767 pVCpu->vmm.s.fInRendezvous = false;
1768 }
1769 else
1770 {
1771 /*
1772 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1773 * lookout of the RENDEZVOUS FF.
1774 */
1775 int rc;
1776 rcStrict = VINF_SUCCESS;
1777 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1778 {
1779 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1780
1781 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1782 {
1783 if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1784 {
1785 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1786 if ( rc != VINF_SUCCESS
1787 && ( rcStrict == VINF_SUCCESS
1788 || rcStrict > rc))
1789 rcStrict = rc;
1790 /** @todo Perhaps deal with termination here? */
1791 }
1792 ASMNopPause();
1793 }
1794 }
1795 Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1796 Assert(!pVCpu->vmm.s.fInRendezvous);
1797 pVCpu->vmm.s.fInRendezvous = true;
1798
1799 /*
1800 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1801 */
1802 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1803 {
1804 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1805 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1806 }
1807 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1808 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1809 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1810 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1811 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1812 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1813 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1814 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1815 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1816 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1817 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1818
1819 /*
1820 * Set the FF and poke the other EMTs.
1821 */
1822 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1823 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1824
1825 /*
1826 * Do the same ourselves.
1827 */
1828 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1829
1830 /*
1831 * The caller waits for the other EMTs to be done and return before doing
1832 * the cleanup. This makes away with wakeup / reset races we would otherwise
1833 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1834 */
1835 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1836 AssertLogRelRC(rc);
1837
1838 /*
1839 * Get the return code and clean up a little bit.
1840 */
1841 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1842 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1843
1844 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1845 pVCpu->vmm.s.fInRendezvous = false;
1846
1847 /*
1848 * Merge rcStrict and rcMy.
1849 */
1850 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1851 if ( rcMy != VINF_SUCCESS
1852 && ( rcStrict == VINF_SUCCESS
1853 || rcStrict > rcMy))
1854 rcStrict = rcMy;
1855 }
1856
1857 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1858 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1859 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1860 VERR_IPE_UNEXPECTED_INFO_STATUS);
1861 return VBOXSTRICTRC_VAL(rcStrict);
1862}
1863
1864
1865/**
1866 * Disables/enables EMT rendezvous.
1867 *
1868 * This is used to make sure EMT rendezvous does not take place while
1869 * processing a priority request.
1870 *
1871 * @returns Old rendezvous-disabled state.
1872 * @param pVCpu The handle of the calling EMT.
1873 * @param fDisabled True if disabled, false if enabled.
1874 */
1875VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1876{
1877 VMCPU_ASSERT_EMT(pVCpu);
1878 bool fOld = pVCpu->vmm.s.fInRendezvous;
1879 pVCpu->vmm.s.fInRendezvous = fDisabled;
1880 return fOld;
1881}
1882
1883
1884/**
1885 * Read from the ring 0 jump buffer stack
1886 *
1887 * @returns VBox status code.
1888 *
1889 * @param pVM Pointer to the VM.
1890 * @param idCpu The ID of the source CPU context (for the address).
1891 * @param R0Addr Where to start reading.
1892 * @param pvBuf Where to store the data we've read.
1893 * @param cbRead The number of bytes to read.
1894 */
1895VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1896{
1897 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1898 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1899
1900#ifdef VMM_R0_SWITCH_STACK
1901 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1902#else
1903 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1904#endif
1905 if ( off > VMM_STACK_SIZE
1906 || off + cbRead >= VMM_STACK_SIZE)
1907 return VERR_INVALID_POINTER;
1908
1909 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1910 return VINF_SUCCESS;
1911}
1912
1913#ifdef VBOX_WITH_RAW_MODE
1914
1915/**
1916 * Calls a RC function.
1917 *
1918 * @param pVM Pointer to the VM.
1919 * @param RCPtrEntry The address of the RC function.
1920 * @param cArgs The number of arguments in the ....
1921 * @param ... Arguments to the function.
1922 */
1923VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1924{
1925 va_list args;
1926 va_start(args, cArgs);
1927 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1928 va_end(args);
1929 return rc;
1930}
1931
1932
1933/**
1934 * Calls a RC function.
1935 *
1936 * @param pVM Pointer to the VM.
1937 * @param RCPtrEntry The address of the RC function.
1938 * @param cArgs The number of arguments in the ....
1939 * @param args Arguments to the function.
1940 */
1941VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1942{
1943 /* Raw mode implies 1 VCPU. */
1944 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1945 PVMCPU pVCpu = &pVM->aCpus[0];
1946
1947 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1948
1949 /*
1950 * Setup the call frame using the trampoline.
1951 */
1952 CPUMSetHyperState(pVCpu,
1953 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1954 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1955 RCPtrEntry, /* eax */
1956 cArgs /* edx */
1957 );
1958
1959#if 0
1960 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1961#endif
1962 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1963 int i = cArgs;
1964 while (i-- > 0)
1965 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1966
1967 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1968 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1969
1970 /*
1971 * We hide log flushes (outer) and hypervisor interrupts (inner).
1972 */
1973 for (;;)
1974 {
1975 int rc;
1976 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1977 do
1978 {
1979#ifdef NO_SUPCALLR0VMM
1980 rc = VERR_GENERAL_FAILURE;
1981#else
1982 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1983 if (RT_LIKELY(rc == VINF_SUCCESS))
1984 rc = pVCpu->vmm.s.iLastGZRc;
1985#endif
1986 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1987
1988 /*
1989 * Flush the loggers.
1990 */
1991#ifdef LOG_ENABLED
1992 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1993 if ( pLogger
1994 && pLogger->offScratch > 0)
1995 RTLogFlushRC(NULL, pLogger);
1996#endif
1997#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1998 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1999 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2000 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2001#endif
2002 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2003 VMMR3FatalDump(pVM, pVCpu, rc);
2004 if (rc != VINF_VMM_CALL_HOST)
2005 {
2006 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2007 return rc;
2008 }
2009 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2010 if (RT_FAILURE(rc))
2011 return rc;
2012 }
2013}
2014
2015#endif /* VBOX_WITH_RAW_MODE */
2016
2017/**
2018 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2019 *
2020 * @returns VBox status code.
2021 * @param pVM Pointer to the VM.
2022 * @param uOperation Operation to execute.
2023 * @param u64Arg Constant argument.
2024 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2025 * details.
2026 */
2027VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2028{
2029 PVMCPU pVCpu = VMMGetCpu(pVM);
2030 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2031
2032 /*
2033 * Call Ring-0 entry with init code.
2034 */
2035 int rc;
2036 for (;;)
2037 {
2038#ifdef NO_SUPCALLR0VMM
2039 rc = VERR_GENERAL_FAILURE;
2040#else
2041 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2042#endif
2043 /*
2044 * Flush the logs.
2045 */
2046#ifdef LOG_ENABLED
2047 if ( pVCpu->vmm.s.pR0LoggerR3
2048 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2049 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2050#endif
2051 if (rc != VINF_VMM_CALL_HOST)
2052 break;
2053 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2054 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2055 break;
2056 /* Resume R0 */
2057 }
2058
2059 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2060 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
2061 VERR_IPE_UNEXPECTED_INFO_STATUS);
2062 return rc;
2063}
2064
2065
2066#ifdef VBOX_WITH_RAW_MODE
2067/**
2068 * Resumes executing hypervisor code when interrupted by a queue flush or a
2069 * debug event.
2070 *
2071 * @returns VBox status code.
2072 * @param pVM Pointer to the VM.
2073 * @param pVCpu Pointer to the VMCPU.
2074 */
2075VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2076{
2077 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2078 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2079
2080 /*
2081 * We hide log flushes (outer) and hypervisor interrupts (inner).
2082 */
2083 for (;;)
2084 {
2085 int rc;
2086 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2087 do
2088 {
2089# ifdef NO_SUPCALLR0VMM
2090 rc = VERR_GENERAL_FAILURE;
2091# else
2092 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2093 if (RT_LIKELY(rc == VINF_SUCCESS))
2094 rc = pVCpu->vmm.s.iLastGZRc;
2095# endif
2096 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2097
2098 /*
2099 * Flush the loggers.
2100 */
2101# ifdef LOG_ENABLED
2102 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2103 if ( pLogger
2104 && pLogger->offScratch > 0)
2105 RTLogFlushRC(NULL, pLogger);
2106# endif
2107# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2108 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2109 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2110 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2111# endif
2112 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2113 VMMR3FatalDump(pVM, pVCpu, rc);
2114 if (rc != VINF_VMM_CALL_HOST)
2115 {
2116 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2117 return rc;
2118 }
2119 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2120 if (RT_FAILURE(rc))
2121 return rc;
2122 }
2123}
2124#endif /* VBOX_WITH_RAW_MODE */
2125
2126
2127/**
2128 * Service a call to the ring-3 host code.
2129 *
2130 * @returns VBox status code.
2131 * @param pVM Pointer to the VM.
2132 * @param pVCpu Pointer to the VMCPU.
2133 * @remark Careful with critsects.
2134 */
2135static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2136{
2137 /*
2138 * We must also check for pending critsect exits or else we can deadlock
2139 * when entering other critsects here.
2140 */
2141 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2142 PDMCritSectBothFF(pVCpu);
2143
2144 switch (pVCpu->vmm.s.enmCallRing3Operation)
2145 {
2146 /*
2147 * Acquire a critical section.
2148 */
2149 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2150 {
2151 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2152 true /*fCallRing3*/);
2153 break;
2154 }
2155
2156 /*
2157 * Enter a r/w critical section exclusively.
2158 */
2159 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2160 {
2161 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2162 true /*fCallRing3*/);
2163 break;
2164 }
2165
2166 /*
2167 * Enter a r/w critical section shared.
2168 */
2169 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2170 {
2171 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2172 true /*fCallRing3*/);
2173 break;
2174 }
2175
2176 /*
2177 * Acquire the PDM lock.
2178 */
2179 case VMMCALLRING3_PDM_LOCK:
2180 {
2181 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2182 break;
2183 }
2184
2185 /*
2186 * Grow the PGM pool.
2187 */
2188 case VMMCALLRING3_PGM_POOL_GROW:
2189 {
2190 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2191 break;
2192 }
2193
2194 /*
2195 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2196 */
2197 case VMMCALLRING3_PGM_MAP_CHUNK:
2198 {
2199 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2200 break;
2201 }
2202
2203 /*
2204 * Allocates more handy pages.
2205 */
2206 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2207 {
2208 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2209 break;
2210 }
2211
2212 /*
2213 * Allocates a large page.
2214 */
2215 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2216 {
2217 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2218 break;
2219 }
2220
2221 /*
2222 * Acquire the PGM lock.
2223 */
2224 case VMMCALLRING3_PGM_LOCK:
2225 {
2226 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2227 break;
2228 }
2229
2230 /*
2231 * Acquire the MM hypervisor heap lock.
2232 */
2233 case VMMCALLRING3_MMHYPER_LOCK:
2234 {
2235 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2236 break;
2237 }
2238
2239#ifdef VBOX_WITH_REM
2240 /*
2241 * Flush REM handler notifications.
2242 */
2243 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2244 {
2245 REMR3ReplayHandlerNotifications(pVM);
2246 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2247 break;
2248 }
2249#endif
2250
2251 /*
2252 * This is a noop. We just take this route to avoid unnecessary
2253 * tests in the loops.
2254 */
2255 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2256 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2257 LogAlways(("*FLUSH*\n"));
2258 break;
2259
2260 /*
2261 * Set the VM error message.
2262 */
2263 case VMMCALLRING3_VM_SET_ERROR:
2264 VMR3SetErrorWorker(pVM);
2265 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2266 break;
2267
2268 /*
2269 * Set the VM runtime error message.
2270 */
2271 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2272 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2273 break;
2274
2275 /*
2276 * Signal a ring 0 hypervisor assertion.
2277 * Cancel the longjmp operation that's in progress.
2278 */
2279 case VMMCALLRING3_VM_R0_ASSERTION:
2280 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2281 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2282#ifdef RT_ARCH_X86
2283 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2284#else
2285 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2286#endif
2287#ifdef VMM_R0_SWITCH_STACK
2288 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2289#endif
2290 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2291 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2292 return VERR_VMM_RING0_ASSERTION;
2293
2294 /*
2295 * A forced switch to ring 0 for preemption purposes.
2296 */
2297 case VMMCALLRING3_VM_R0_PREEMPT:
2298 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2299 break;
2300
2301 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2302 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2303 break;
2304
2305 default:
2306 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2307 return VERR_VMM_UNKNOWN_RING3_CALL;
2308 }
2309
2310 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2311 return VINF_SUCCESS;
2312}
2313
2314
2315/**
2316 * Displays the Force action Flags.
2317 *
2318 * @param pVM Pointer to the VM.
2319 * @param pHlp The output helpers.
2320 * @param pszArgs The additional arguments (ignored).
2321 */
2322static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2323{
2324 int c;
2325 uint32_t f;
2326 NOREF(pszArgs);
2327
2328#define PRINT_FLAG(prf,flag) do { \
2329 if (f & (prf##flag)) \
2330 { \
2331 static const char *s_psz = #flag; \
2332 if (!(c % 6)) \
2333 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2334 else \
2335 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2336 c++; \
2337 f &= ~(prf##flag); \
2338 } \
2339 } while (0)
2340
2341#define PRINT_GROUP(prf,grp,sfx) do { \
2342 if (f & (prf##grp##sfx)) \
2343 { \
2344 static const char *s_psz = #grp; \
2345 if (!(c % 5)) \
2346 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2347 else \
2348 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2349 c++; \
2350 } \
2351 } while (0)
2352
2353 /*
2354 * The global flags.
2355 */
2356 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2357 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2358
2359 /* show the flag mnemonics */
2360 c = 0;
2361 f = fGlobalForcedActions;
2362 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2363 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2364 PRINT_FLAG(VM_FF_,PDM_DMA);
2365 PRINT_FLAG(VM_FF_,DBGF);
2366 PRINT_FLAG(VM_FF_,REQUEST);
2367 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2368 PRINT_FLAG(VM_FF_,RESET);
2369 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2370 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2371 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2372 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2373 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2374 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2375 if (f)
2376 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2377 else
2378 pHlp->pfnPrintf(pHlp, "\n");
2379
2380 /* the groups */
2381 c = 0;
2382 f = fGlobalForcedActions;
2383 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2384 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2385 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2386 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2387 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2388 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2389 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2390 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2391 if (c)
2392 pHlp->pfnPrintf(pHlp, "\n");
2393
2394 /*
2395 * Per CPU flags.
2396 */
2397 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2398 {
2399 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2400 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2401
2402 /* show the flag mnemonics */
2403 c = 0;
2404 f = fLocalForcedActions;
2405 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2406 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2407 PRINT_FLAG(VMCPU_FF_,TIMER);
2408 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2409 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2410 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2411 PRINT_FLAG(VMCPU_FF_,REQUEST);
2412 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2413 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2414 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2415 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2416 PRINT_FLAG(VMCPU_FF_,TLB_SHOOTDOWN);
2417 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2418 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2419 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2420 PRINT_FLAG(VMCPU_FF_,TO_R3);
2421#ifdef VBOX_WITH_RAW_MODE
2422 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2423 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2424 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2425 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2426 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2427 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2428#endif
2429 if (f)
2430 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2431 else
2432 pHlp->pfnPrintf(pHlp, "\n");
2433
2434 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2435 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2436
2437 /* the groups */
2438 c = 0;
2439 f = fLocalForcedActions;
2440 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2441 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2442 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2443 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2444 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2445 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2446 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2447 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2448 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2449 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2450 if (c)
2451 pHlp->pfnPrintf(pHlp, "\n");
2452 }
2453
2454#undef PRINT_FLAG
2455#undef PRINT_GROUP
2456}
2457
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