VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 59132

Last change on this file since 59132 was 59132, checked in by vboxsync, 9 years ago

VMM: Recursive EMT rendezvous fixes, adding support for recursion from within VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE callbacks too.

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1/* $Id: VMM.cpp 59132 2015-12-15 12:42:54Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_csam
32 * - @subpage pg_dbgf
33 * - @subpage pg_em
34 * - @subpage pg_gim
35 * - @subpage pg_gmm
36 * - @subpage pg_gvmm
37 * - @subpage pg_hm
38 * - @subpage pg_iem
39 * - @subpage pg_iom
40 * - @subpage pg_mm
41 * - @subpage pg_patm
42 * - @subpage pg_pdm
43 * - @subpage pg_pgm
44 * - @subpage pg_rem
45 * - @subpage pg_selm
46 * - @subpage pg_ssm
47 * - @subpage pg_stam
48 * - @subpage pg_tm
49 * - @subpage pg_trpm
50 * - @subpage pg_vm
51 *
52 *
53 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54 *
55 *
56 * @section sec_vmmstate VMM State
57 *
58 * @image html VM_Statechart_Diagram.gif
59 *
60 * To be written.
61 *
62 *
63 * @subsection subsec_vmm_init VMM Initialization
64 *
65 * To be written.
66 *
67 *
68 * @subsection subsec_vmm_term VMM Termination
69 *
70 * To be written.
71 *
72 *
73 * @section sec_vmm_limits VMM Limits
74 *
75 * There are various resource limits imposed by the VMM and it's
76 * sub-components. We'll list some of them here.
77 *
78 * On 64-bit hosts:
79 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80 * can be increased up to 64K - 1.
81 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83 * - A VM can be assigned all the memory we can use (16TB), however, the
84 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86 *
87 * On 32-bit hosts:
88 * - Max 127 VMs. Imposed by GMM's per page structure.
89 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90 * ROM pages. The limit is imposed by the 28-bit page ID used
91 * internally in GMM. It is also limited by PAE.
92 * - A VM can be assigned all the memory GMM can allocate, however, the
93 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95 *
96 */
97
98
99/*********************************************************************************************************************************
100* Header Files *
101*********************************************************************************************************************************/
102#define LOG_GROUP LOG_GROUP_VMM
103#include <VBox/vmm/vmm.h>
104#include <VBox/vmm/vmapi.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/vmm/cfgm.h>
107#include <VBox/vmm/pdmqueue.h>
108#include <VBox/vmm/pdmcritsect.h>
109#include <VBox/vmm/pdmcritsectrw.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/cpum.h>
112#include <VBox/vmm/gim.h>
113#include <VBox/vmm/mm.h>
114#include <VBox/vmm/iom.h>
115#include <VBox/vmm/trpm.h>
116#include <VBox/vmm/selm.h>
117#include <VBox/vmm/em.h>
118#include <VBox/sup.h>
119#include <VBox/vmm/dbgf.h>
120#include <VBox/vmm/csam.h>
121#include <VBox/vmm/patm.h>
122#ifdef VBOX_WITH_REM
123# include <VBox/vmm/rem.h>
124#endif
125#include <VBox/vmm/ssm.h>
126#include <VBox/vmm/ftm.h>
127#include <VBox/vmm/tm.h>
128#include "VMMInternal.h"
129#include "VMMSwitcher.h"
130#include <VBox/vmm/vm.h>
131#include <VBox/vmm/uvm.h>
132
133#include <VBox/err.h>
134#include <VBox/param.h>
135#include <VBox/version.h>
136#include <VBox/vmm/hm.h>
137#include <iprt/assert.h>
138#include <iprt/alloc.h>
139#include <iprt/asm.h>
140#include <iprt/time.h>
141#include <iprt/semaphore.h>
142#include <iprt/stream.h>
143#include <iprt/string.h>
144#include <iprt/stdarg.h>
145#include <iprt/ctype.h>
146#include <iprt/x86.h>
147
148
149/*********************************************************************************************************************************
150* Defined Constants And Macros *
151*********************************************************************************************************************************/
152/** The saved state version. */
153#define VMM_SAVED_STATE_VERSION 4
154/** The saved state version used by v3.0 and earlier. (Teleportation) */
155#define VMM_SAVED_STATE_VERSION_3_0 3
156
157
158/*********************************************************************************************************************************
159* Internal Functions *
160*********************************************************************************************************************************/
161static int vmmR3InitStacks(PVM pVM);
162static int vmmR3InitLoggers(PVM pVM);
163static void vmmR3InitRegisterStats(PVM pVM);
164static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
165static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
166static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
167static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
168 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
169static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
170static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
171
172
173/**
174 * Initializes the VMM.
175 *
176 * @returns VBox status code.
177 * @param pVM The cross context VM structure.
178 */
179VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
180{
181 LogFlow(("VMMR3Init\n"));
182
183 /*
184 * Assert alignment, sizes and order.
185 */
186 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
187 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
188 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
189
190 /*
191 * Init basic VM VMM members.
192 */
193 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
194 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
195 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
196 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
197 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
198 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
199 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
200 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
201 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
202 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
203
204 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
205 * The EMT yield interval. The EMT yielding is a hack we employ to play a
206 * bit nicer with the rest of the system (like for instance the GUI).
207 */
208 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
209 23 /* Value arrived at after experimenting with the grub boot prompt. */);
210 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
211
212
213 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
214 * Controls whether we employ per-cpu preemption timers to limit the time
215 * spent executing guest code. This option is not available on all
216 * platforms and we will silently ignore this setting then. If we are
217 * running in VT-x mode, we will use the VMX-preemption timer instead of
218 * this one when possible.
219 */
220 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
221 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
222 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
223
224 /*
225 * Initialize the VMM rendezvous semaphores.
226 */
227 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
228 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
229 return VERR_NO_MEMORY;
230 for (VMCPUID i = 0; i < pVM->cCpus; i++)
231 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
232 for (VMCPUID i = 0; i < pVM->cCpus; i++)
233 {
234 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
235 AssertRCReturn(rc, rc);
236 }
237 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
238 AssertRCReturn(rc, rc);
239 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
240 AssertRCReturn(rc, rc);
241 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
242 AssertRCReturn(rc, rc);
243 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
244 AssertRCReturn(rc, rc);
245 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
246 AssertRCReturn(rc, rc);
247 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
248 AssertRCReturn(rc, rc);
249 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
250 AssertRCReturn(rc, rc);
251 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
252 AssertRCReturn(rc, rc);
253
254 /*
255 * Register the saved state data unit.
256 */
257 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
258 NULL, NULL, NULL,
259 NULL, vmmR3Save, NULL,
260 NULL, vmmR3Load, NULL);
261 if (RT_FAILURE(rc))
262 return rc;
263
264 /*
265 * Register the Ring-0 VM handle with the session for fast ioctl calls.
266 */
267 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
268 if (RT_FAILURE(rc))
269 return rc;
270
271 /*
272 * Init various sub-components.
273 */
274 rc = vmmR3SwitcherInit(pVM);
275 if (RT_SUCCESS(rc))
276 {
277 rc = vmmR3InitStacks(pVM);
278 if (RT_SUCCESS(rc))
279 {
280 rc = vmmR3InitLoggers(pVM);
281
282#ifdef VBOX_WITH_NMI
283 /*
284 * Allocate mapping for the host APIC.
285 */
286 if (RT_SUCCESS(rc))
287 {
288 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
289 AssertRC(rc);
290 }
291#endif
292 if (RT_SUCCESS(rc))
293 {
294 /*
295 * Debug info and statistics.
296 */
297 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
298 vmmR3InitRegisterStats(pVM);
299 vmmInitFormatTypes();
300
301 return VINF_SUCCESS;
302 }
303 }
304 /** @todo: Need failure cleanup. */
305
306 //more todo in here?
307 //if (RT_SUCCESS(rc))
308 //{
309 //}
310 //int rc2 = vmmR3TermCoreCode(pVM);
311 //AssertRC(rc2));
312 }
313
314 return rc;
315}
316
317
318/**
319 * Allocate & setup the VMM RC stack(s) (for EMTs).
320 *
321 * The stacks are also used for long jumps in Ring-0.
322 *
323 * @returns VBox status code.
324 * @param pVM The cross context VM structure.
325 *
326 * @remarks The optional guard page gets it protection setup up during R3 init
327 * completion because of init order issues.
328 */
329static int vmmR3InitStacks(PVM pVM)
330{
331 int rc = VINF_SUCCESS;
332#ifdef VMM_R0_SWITCH_STACK
333 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
334#else
335 uint32_t fFlags = 0;
336#endif
337
338 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
339 {
340 PVMCPU pVCpu = &pVM->aCpus[idCpu];
341
342#ifdef VBOX_STRICT_VMM_STACK
343 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
344#else
345 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
346#endif
347 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
348 if (RT_SUCCESS(rc))
349 {
350#ifdef VBOX_STRICT_VMM_STACK
351 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
352#endif
353#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
354 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
355 if (!HMIsEnabled(pVM))
356 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
357 else
358#endif
359 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
360 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
361 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
362 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
363
364 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
365 }
366 }
367
368 return rc;
369}
370
371
372/**
373 * Initialize the loggers.
374 *
375 * @returns VBox status code.
376 * @param pVM The cross context VM structure.
377 */
378static int vmmR3InitLoggers(PVM pVM)
379{
380 int rc;
381#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
382
383 /*
384 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
385 */
386#ifdef LOG_ENABLED
387 PRTLOGGER pLogger = RTLogDefaultInstance();
388 if (pLogger)
389 {
390 if (!HMIsEnabled(pVM))
391 {
392 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
393 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
394 if (RT_FAILURE(rc))
395 return rc;
396 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
397 }
398
399# ifdef VBOX_WITH_R0_LOGGING
400 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
401 for (VMCPUID i = 0; i < pVM->cCpus; i++)
402 {
403 PVMCPU pVCpu = &pVM->aCpus[i];
404 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
405 (void **)&pVCpu->vmm.s.pR0LoggerR3);
406 if (RT_FAILURE(rc))
407 return rc;
408 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
409 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
410 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
411 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
412 }
413# endif
414 }
415#endif /* LOG_ENABLED */
416
417#ifdef VBOX_WITH_RC_RELEASE_LOGGING
418 /*
419 * Allocate RC release logger instances (finalized in the relocator).
420 */
421 if (!HMIsEnabled(pVM))
422 {
423 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
424 if (pRelLogger)
425 {
426 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
427 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
428 if (RT_FAILURE(rc))
429 return rc;
430 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
431 }
432 }
433#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
434 return VINF_SUCCESS;
435}
436
437
438/**
439 * VMMR3Init worker that register the statistics with STAM.
440 *
441 * @param pVM The cross context VM structure.
442 */
443static void vmmR3InitRegisterStats(PVM pVM)
444{
445 /*
446 * Statistics.
447 */
448 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
508
509#ifdef VBOX_WITH_STATISTICS
510 for (VMCPUID i = 0; i < pVM->cCpus; i++)
511 {
512 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
513 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
514 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
515 }
516#endif
517}
518
519
520/**
521 * Initializes the R0 VMM.
522 *
523 * @returns VBox status code.
524 * @param pVM The cross context VM structure.
525 */
526VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
527{
528 int rc;
529 PVMCPU pVCpu = VMMGetCpu(pVM);
530 Assert(pVCpu && pVCpu->idCpu == 0);
531
532#ifdef LOG_ENABLED
533 /*
534 * Initialize the ring-0 logger if we haven't done so yet.
535 */
536 if ( pVCpu->vmm.s.pR0LoggerR3
537 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
538 {
539 rc = VMMR3UpdateLoggers(pVM);
540 if (RT_FAILURE(rc))
541 return rc;
542 }
543#endif
544
545 /*
546 * Call Ring-0 entry with init code.
547 */
548 for (;;)
549 {
550#ifdef NO_SUPCALLR0VMM
551 //rc = VERR_GENERAL_FAILURE;
552 rc = VINF_SUCCESS;
553#else
554 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT,
555 RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
556#endif
557 /*
558 * Flush the logs.
559 */
560#ifdef LOG_ENABLED
561 if ( pVCpu->vmm.s.pR0LoggerR3
562 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
563 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
564#endif
565 if (rc != VINF_VMM_CALL_HOST)
566 break;
567 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
568 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
569 break;
570 /* Resume R0 */
571 }
572
573 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
574 {
575 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
576 if (RT_SUCCESS(rc))
577 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
578 }
579
580 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
581 if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
582 LogRel(("VMM: Enabled thread-context hooks\n"));
583 else
584 LogRel(("VMM: Thread-context hooks unavailable\n"));
585
586 return rc;
587}
588
589
590#ifdef VBOX_WITH_RAW_MODE
591/**
592 * Initializes the RC VMM.
593 *
594 * @returns VBox status code.
595 * @param pVM The cross context VM structure.
596 */
597VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
598{
599 PVMCPU pVCpu = VMMGetCpu(pVM);
600 Assert(pVCpu && pVCpu->idCpu == 0);
601
602 /* In VMX mode, there's no need to init RC. */
603 if (HMIsEnabled(pVM))
604 return VINF_SUCCESS;
605
606 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
607
608 /*
609 * Call VMMRCInit():
610 * -# resolve the address.
611 * -# setup stackframe and EIP to use the trampoline.
612 * -# do a generic hypervisor call.
613 */
614 RTRCPTR RCPtrEP;
615 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
616 if (RT_SUCCESS(rc))
617 {
618 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
619 uint64_t u64TS = RTTimeProgramStartNanoTS();
620 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 4: The program startup TS - Hi. */
621 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 4: The program startup TS - Lo. */
622 CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
623 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
624 CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
625 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
626 CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
627 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
628 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
629 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
630
631 for (;;)
632 {
633#ifdef NO_SUPCALLR0VMM
634 //rc = VERR_GENERAL_FAILURE;
635 rc = VINF_SUCCESS;
636#else
637 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
638#endif
639#ifdef LOG_ENABLED
640 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
641 if ( pLogger
642 && pLogger->offScratch > 0)
643 RTLogFlushRC(NULL, pLogger);
644#endif
645#ifdef VBOX_WITH_RC_RELEASE_LOGGING
646 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
647 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
648 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
649#endif
650 if (rc != VINF_VMM_CALL_HOST)
651 break;
652 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
653 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
654 break;
655 }
656
657 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
658 {
659 VMMR3FatalDump(pVM, pVCpu, rc);
660 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
661 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
662 }
663 AssertRC(rc);
664 }
665 return rc;
666}
667#endif /* VBOX_WITH_RAW_MODE */
668
669
670/**
671 * Called when an init phase completes.
672 *
673 * @returns VBox status code.
674 * @param pVM The cross context VM structure.
675 * @param enmWhat Which init phase.
676 */
677VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
678{
679 int rc = VINF_SUCCESS;
680
681 switch (enmWhat)
682 {
683 case VMINITCOMPLETED_RING3:
684 {
685 /*
686 * CPUM's post-initialization (APIC base MSR caching).
687 */
688 rc = CPUMR3InitCompleted(pVM);
689 AssertRCReturn(rc, rc);
690
691 /*
692 * Set page attributes to r/w for stack pages.
693 */
694 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
695 {
696 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
697 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
698 AssertRCReturn(rc, rc);
699 }
700
701 /*
702 * Create the EMT yield timer.
703 */
704 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
705 AssertRCReturn(rc, rc);
706
707 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
708 AssertRCReturn(rc, rc);
709
710#ifdef VBOX_WITH_NMI
711 /*
712 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
713 */
714 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
715 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
716 AssertRCReturn(rc, rc);
717#endif
718
719#ifdef VBOX_STRICT_VMM_STACK
720 /*
721 * Setup the stack guard pages: Two inaccessible pages at each sides of the
722 * stack to catch over/under-flows.
723 */
724 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
725 {
726 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
727
728 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
729 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
730
731 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
732 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
733 }
734 pVM->vmm.s.fStackGuardsStationed = true;
735#endif
736 break;
737 }
738
739 case VMINITCOMPLETED_HM:
740 {
741 /*
742 * Disable the periodic preemption timers if we can use the
743 * VMX-preemption timer instead.
744 */
745 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
746 && HMR3IsVmxPreemptionTimerUsed(pVM))
747 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
748 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
749
750 /*
751 * Last chance for GIM to update its CPUID leaves if it requires
752 * knowledge/information from HM initialization.
753 */
754 rc = GIMR3InitCompleted(pVM);
755 AssertRCReturn(rc, rc);
756
757 /*
758 * CPUM's post-initialization (print CPUIDs).
759 */
760 CPUMR3LogCpuIds(pVM);
761 break;
762 }
763
764 default: /* shuts up gcc */
765 break;
766 }
767
768 return rc;
769}
770
771
772/**
773 * Terminate the VMM bits.
774 *
775 * @returns VBox status code.
776 * @param pVM The cross context VM structure.
777 */
778VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
779{
780 PVMCPU pVCpu = VMMGetCpu(pVM);
781 Assert(pVCpu && pVCpu->idCpu == 0);
782
783 /*
784 * Call Ring-0 entry with termination code.
785 */
786 int rc;
787 for (;;)
788 {
789#ifdef NO_SUPCALLR0VMM
790 //rc = VERR_GENERAL_FAILURE;
791 rc = VINF_SUCCESS;
792#else
793 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
794#endif
795 /*
796 * Flush the logs.
797 */
798#ifdef LOG_ENABLED
799 if ( pVCpu->vmm.s.pR0LoggerR3
800 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
801 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
802#endif
803 if (rc != VINF_VMM_CALL_HOST)
804 break;
805 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
806 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
807 break;
808 /* Resume R0 */
809 }
810 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
811 {
812 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
813 if (RT_SUCCESS(rc))
814 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
815 }
816
817 for (VMCPUID i = 0; i < pVM->cCpus; i++)
818 {
819 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
820 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
821 }
822 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
823 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
824 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
825 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
826 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
827 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
828 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
829 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
830 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
831 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
832 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
833 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
834 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
835 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
836 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
837 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
838
839#ifdef VBOX_STRICT_VMM_STACK
840 /*
841 * Make the two stack guard pages present again.
842 */
843 if (pVM->vmm.s.fStackGuardsStationed)
844 {
845 for (VMCPUID i = 0; i < pVM->cCpus; i++)
846 {
847 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
848 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
849 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
850 }
851 pVM->vmm.s.fStackGuardsStationed = false;
852 }
853#endif
854
855 vmmTermFormatTypes();
856 return rc;
857}
858
859
860/**
861 * Applies relocations to data and code managed by this
862 * component. This function will be called at init and
863 * whenever the VMM need to relocate it self inside the GC.
864 *
865 * The VMM will need to apply relocations to the core code.
866 *
867 * @param pVM The cross context VM structure.
868 * @param offDelta The relocation delta.
869 */
870VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
871{
872 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
873
874 /*
875 * Recalc the RC address.
876 */
877#ifdef VBOX_WITH_RAW_MODE
878 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
879#endif
880
881 /*
882 * The stack.
883 */
884 for (VMCPUID i = 0; i < pVM->cCpus; i++)
885 {
886 PVMCPU pVCpu = &pVM->aCpus[i];
887
888 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
889
890 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
891 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
892 }
893
894 /*
895 * All the switchers.
896 */
897 vmmR3SwitcherRelocate(pVM, offDelta);
898
899 /*
900 * Get other RC entry points.
901 */
902 if (!HMIsEnabled(pVM))
903 {
904 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
905 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
906
907 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
908 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
909 }
910
911 /*
912 * Update the logger.
913 */
914 VMMR3UpdateLoggers(pVM);
915}
916
917
918/**
919 * Updates the settings for the RC and R0 loggers.
920 *
921 * @returns VBox status code.
922 * @param pVM The cross context VM structure.
923 */
924VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
925{
926 /*
927 * Simply clone the logger instance (for RC).
928 */
929 int rc = VINF_SUCCESS;
930 RTRCPTR RCPtrLoggerFlush = 0;
931
932 if ( pVM->vmm.s.pRCLoggerR3
933#ifdef VBOX_WITH_RC_RELEASE_LOGGING
934 || pVM->vmm.s.pRCRelLoggerR3
935#endif
936 )
937 {
938 Assert(!HMIsEnabled(pVM));
939 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
940 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
941 }
942
943 if (pVM->vmm.s.pRCLoggerR3)
944 {
945 Assert(!HMIsEnabled(pVM));
946 RTRCPTR RCPtrLoggerWrapper = 0;
947 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
948 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
949
950 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
951 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
952 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
953 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
954 }
955
956#ifdef VBOX_WITH_RC_RELEASE_LOGGING
957 if (pVM->vmm.s.pRCRelLoggerR3)
958 {
959 Assert(!HMIsEnabled(pVM));
960 RTRCPTR RCPtrLoggerWrapper = 0;
961 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
962 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
963
964 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
965 rc = RTLogCloneRC(RTLogRelGetDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
966 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
967 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
968 }
969#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
970
971#ifdef LOG_ENABLED
972 /*
973 * For the ring-0 EMT logger, we use a per-thread logger instance
974 * in ring-0. Only initialize it once.
975 */
976 PRTLOGGER const pDefault = RTLogDefaultInstance();
977 for (VMCPUID i = 0; i < pVM->cCpus; i++)
978 {
979 PVMCPU pVCpu = &pVM->aCpus[i];
980 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
981 if (pR0LoggerR3)
982 {
983 if (!pR0LoggerR3->fCreated)
984 {
985 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
986 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
987 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
988
989 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
990 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
991 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
992
993 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
994 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
995 pfnLoggerWrapper, pfnLoggerFlush,
996 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
997 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
998
999 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
1000 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
1001 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
1002 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
1003 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1004 pfnLoggerPrefix, NIL_RTR0PTR);
1005 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
1006
1007 pR0LoggerR3->idCpu = i;
1008 pR0LoggerR3->fCreated = true;
1009 pR0LoggerR3->fFlushingDisabled = false;
1010
1011 }
1012
1013 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1014 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
1015 AssertRC(rc);
1016 }
1017 }
1018#endif
1019 return rc;
1020}
1021
1022
1023/**
1024 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
1025 *
1026 * @returns Pointer to the buffer.
1027 * @param pVM The cross context VM structure.
1028 */
1029VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1030{
1031 if (HMIsEnabled(pVM))
1032 return pVM->vmm.s.szRing0AssertMsg1;
1033
1034 RTRCPTR RCPtr;
1035 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
1036 if (RT_SUCCESS(rc))
1037 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1038
1039 return NULL;
1040}
1041
1042
1043/**
1044 * Returns the VMCPU of the specified virtual CPU.
1045 *
1046 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1047 *
1048 * @param pUVM The user mode VM handle.
1049 * @param idCpu The ID of the virtual CPU.
1050 */
1051VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1052{
1053 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1054 AssertReturn(idCpu < pUVM->cCpus, NULL);
1055 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1056 return &pUVM->pVM->aCpus[idCpu];
1057}
1058
1059
1060/**
1061 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1062 *
1063 * @returns Pointer to the buffer.
1064 * @param pVM The cross context VM structure.
1065 */
1066VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1067{
1068 if (HMIsEnabled(pVM))
1069 return pVM->vmm.s.szRing0AssertMsg2;
1070
1071 RTRCPTR RCPtr;
1072 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1073 if (RT_SUCCESS(rc))
1074 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1075
1076 return NULL;
1077}
1078
1079
1080/**
1081 * Execute state save operation.
1082 *
1083 * @returns VBox status code.
1084 * @param pVM The cross context VM structure.
1085 * @param pSSM SSM operation handle.
1086 */
1087static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1088{
1089 LogFlow(("vmmR3Save:\n"));
1090
1091 /*
1092 * Save the started/stopped state of all CPUs except 0 as it will always
1093 * be running. This avoids breaking the saved state version. :-)
1094 */
1095 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1096 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1097
1098 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1099}
1100
1101
1102/**
1103 * Execute state load operation.
1104 *
1105 * @returns VBox status code.
1106 * @param pVM The cross context VM structure.
1107 * @param pSSM SSM operation handle.
1108 * @param uVersion Data layout version.
1109 * @param uPass The data pass.
1110 */
1111static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1112{
1113 LogFlow(("vmmR3Load:\n"));
1114 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1115
1116 /*
1117 * Validate version.
1118 */
1119 if ( uVersion != VMM_SAVED_STATE_VERSION
1120 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1121 {
1122 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1123 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1124 }
1125
1126 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1127 {
1128 /* Ignore the stack bottom, stack pointer and stack bits. */
1129 RTRCPTR RCPtrIgnored;
1130 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1131 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1132#ifdef RT_OS_DARWIN
1133 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1134 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1135 && SSMR3HandleRevision(pSSM) >= 48858
1136 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1137 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1138 )
1139 SSMR3Skip(pSSM, 16384);
1140 else
1141 SSMR3Skip(pSSM, 8192);
1142#else
1143 SSMR3Skip(pSSM, 8192);
1144#endif
1145 }
1146
1147 /*
1148 * Restore the VMCPU states. VCPU 0 is always started.
1149 */
1150 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1151 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1152 {
1153 bool fStarted;
1154 int rc = SSMR3GetBool(pSSM, &fStarted);
1155 if (RT_FAILURE(rc))
1156 return rc;
1157 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1158 }
1159
1160 /* terminator */
1161 uint32_t u32;
1162 int rc = SSMR3GetU32(pSSM, &u32);
1163 if (RT_FAILURE(rc))
1164 return rc;
1165 if (u32 != UINT32_MAX)
1166 {
1167 AssertMsgFailed(("u32=%#x\n", u32));
1168 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1169 }
1170 return VINF_SUCCESS;
1171}
1172
1173
1174#ifdef VBOX_WITH_RAW_MODE
1175/**
1176 * Resolve a builtin RC symbol.
1177 *
1178 * Called by PDM when loading or relocating RC modules.
1179 *
1180 * @returns VBox status
1181 * @param pVM The cross context VM structure.
1182 * @param pszSymbol Symbol to resolve.
1183 * @param pRCPtrValue Where to store the symbol value.
1184 *
1185 * @remark This has to work before VMMR3Relocate() is called.
1186 */
1187VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1188{
1189 if (!strcmp(pszSymbol, "g_Logger"))
1190 {
1191 if (pVM->vmm.s.pRCLoggerR3)
1192 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1193 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1194 }
1195 else if (!strcmp(pszSymbol, "g_RelLogger"))
1196 {
1197# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1198 if (pVM->vmm.s.pRCRelLoggerR3)
1199 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1200 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1201# else
1202 *pRCPtrValue = NIL_RTRCPTR;
1203# endif
1204 }
1205 else
1206 return VERR_SYMBOL_NOT_FOUND;
1207 return VINF_SUCCESS;
1208}
1209#endif /* VBOX_WITH_RAW_MODE */
1210
1211
1212/**
1213 * Suspends the CPU yielder.
1214 *
1215 * @param pVM The cross context VM structure.
1216 */
1217VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1218{
1219 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1220 if (!pVM->vmm.s.cYieldResumeMillies)
1221 {
1222 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1223 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1224 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1225 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1226 else
1227 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1228 TMTimerStop(pVM->vmm.s.pYieldTimer);
1229 }
1230 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1231}
1232
1233
1234/**
1235 * Stops the CPU yielder.
1236 *
1237 * @param pVM The cross context VM structure.
1238 */
1239VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1240{
1241 if (!pVM->vmm.s.cYieldResumeMillies)
1242 TMTimerStop(pVM->vmm.s.pYieldTimer);
1243 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1244 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1245}
1246
1247
1248/**
1249 * Resumes the CPU yielder when it has been a suspended or stopped.
1250 *
1251 * @param pVM The cross context VM structure.
1252 */
1253VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1254{
1255 if (pVM->vmm.s.cYieldResumeMillies)
1256 {
1257 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1258 pVM->vmm.s.cYieldResumeMillies = 0;
1259 }
1260}
1261
1262
1263/**
1264 * Internal timer callback function.
1265 *
1266 * @param pVM The cross context VM structure.
1267 * @param pTimer The timer handle.
1268 * @param pvUser User argument specified upon timer creation.
1269 */
1270static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1271{
1272 NOREF(pvUser);
1273
1274 /*
1275 * This really needs some careful tuning. While we shouldn't be too greedy since
1276 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1277 * because that'll cause us to stop up.
1278 *
1279 * The current logic is to use the default interval when there is no lag worth
1280 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1281 *
1282 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1283 * so the lag is up to date.)
1284 */
1285 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1286 if ( u64Lag < 50000000 /* 50ms */
1287 || ( u64Lag < 1000000000 /* 1s */
1288 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1289 )
1290 {
1291 uint64_t u64Elapsed = RTTimeNanoTS();
1292 pVM->vmm.s.u64LastYield = u64Elapsed;
1293
1294 RTThreadYield();
1295
1296#ifdef LOG_ENABLED
1297 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1298 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1299#endif
1300 }
1301 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1302}
1303
1304
1305#ifdef VBOX_WITH_RAW_MODE
1306/**
1307 * Executes guest code in the raw-mode context.
1308 *
1309 * @param pVM The cross context VM structure.
1310 * @param pVCpu The cross context virtual CPU structure.
1311 */
1312VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1313{
1314 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1315
1316 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1317
1318 /*
1319 * Set the hypervisor to resume executing a CPUM resume function
1320 * in CPUMRCA.asm.
1321 */
1322 CPUMSetHyperState(pVCpu,
1323 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1324 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1325 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1326 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1327 0, /* eax */
1328 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1329
1330 /*
1331 * We hide log flushes (outer) and hypervisor interrupts (inner).
1332 */
1333 for (;;)
1334 {
1335#ifdef VBOX_STRICT
1336 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1337 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1338 PGMMapCheck(pVM);
1339# ifdef VBOX_WITH_SAFE_STR
1340 SELMR3CheckShadowTR(pVM);
1341# endif
1342#endif
1343 int rc;
1344 do
1345 {
1346#ifdef NO_SUPCALLR0VMM
1347 rc = VERR_GENERAL_FAILURE;
1348#else
1349 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1350 if (RT_LIKELY(rc == VINF_SUCCESS))
1351 rc = pVCpu->vmm.s.iLastGZRc;
1352#endif
1353 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1354
1355 /*
1356 * Flush the logs.
1357 */
1358#ifdef LOG_ENABLED
1359 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1360 if ( pLogger
1361 && pLogger->offScratch > 0)
1362 RTLogFlushRC(NULL, pLogger);
1363#endif
1364#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1365 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1366 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1367 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1368#endif
1369 if (rc != VINF_VMM_CALL_HOST)
1370 {
1371 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1372 return rc;
1373 }
1374 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1375 if (RT_FAILURE(rc))
1376 return rc;
1377 /* Resume GC */
1378 }
1379}
1380#endif /* VBOX_WITH_RAW_MODE */
1381
1382
1383/**
1384 * Executes guest code (Intel VT-x and AMD-V).
1385 *
1386 * @param pVM The cross context VM structure.
1387 * @param pVCpu The cross context virtual CPU structure.
1388 */
1389VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1390{
1391 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1392
1393 for (;;)
1394 {
1395 int rc;
1396 do
1397 {
1398#ifdef NO_SUPCALLR0VMM
1399 rc = VERR_GENERAL_FAILURE;
1400#else
1401 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1402 if (RT_LIKELY(rc == VINF_SUCCESS))
1403 rc = pVCpu->vmm.s.iLastGZRc;
1404#endif
1405 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1406
1407#if 0 /* todo triggers too often */
1408 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1409#endif
1410
1411#ifdef LOG_ENABLED
1412 /*
1413 * Flush the log
1414 */
1415 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1416 if ( pR0LoggerR3
1417 && pR0LoggerR3->Logger.offScratch > 0)
1418 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1419#endif /* !LOG_ENABLED */
1420 if (rc != VINF_VMM_CALL_HOST)
1421 {
1422 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1423 return rc;
1424 }
1425 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1426 if (RT_FAILURE(rc))
1427 return rc;
1428 /* Resume R0 */
1429 }
1430}
1431
1432
1433/**
1434 * VCPU worker for VMMSendSipi.
1435 *
1436 * @param pVM The cross context VM structure.
1437 * @param idCpu Virtual CPU to perform SIPI on.
1438 * @param uVector SIPI vector.
1439 */
1440static DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1441{
1442 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1443 VMCPU_ASSERT_EMT(pVCpu);
1444
1445 /** @todo what are we supposed to do if the processor is already running? */
1446 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1447 return VERR_ACCESS_DENIED;
1448
1449
1450 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1451
1452 pCtx->cs.Sel = uVector << 8;
1453 pCtx->cs.ValidSel = uVector << 8;
1454 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1455 pCtx->cs.u64Base = uVector << 12;
1456 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1457 pCtx->rip = 0;
1458
1459 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1460
1461# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1462 EMSetState(pVCpu, EMSTATE_HALTED);
1463 return VINF_EM_RESCHEDULE;
1464# else /* And if we go the VMCPU::enmState way it can stay here. */
1465 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1466 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1467 return VINF_SUCCESS;
1468# endif
1469}
1470
1471
1472static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1473{
1474 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1475 VMCPU_ASSERT_EMT(pVCpu);
1476
1477 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1478
1479 PGMR3ResetCpu(pVM, pVCpu);
1480 PDMR3ResetCpu(pVCpu); /* Clear any pending interrupts */
1481 TRPMR3ResetCpu(pVCpu);
1482 CPUMR3ResetCpu(pVM, pVCpu);
1483 EMR3ResetCpu(pVCpu);
1484 HMR3ResetCpu(pVCpu);
1485
1486 /* This will trickle up on the target EMT. */
1487 return VINF_EM_WAIT_SIPI;
1488}
1489
1490
1491/**
1492 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1493 * and unhalting processor.
1494 *
1495 * @param pVM The cross context VM structure.
1496 * @param idCpu Virtual CPU to perform SIPI on.
1497 * @param uVector SIPI vector.
1498 */
1499VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1500{
1501 AssertReturnVoid(idCpu < pVM->cCpus);
1502
1503 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1504 AssertRC(rc);
1505}
1506
1507
1508/**
1509 * Sends init IPI to the virtual CPU.
1510 *
1511 * @param pVM The cross context VM structure.
1512 * @param idCpu Virtual CPU to perform int IPI on.
1513 */
1514VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1515{
1516 AssertReturnVoid(idCpu < pVM->cCpus);
1517
1518 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1519 AssertRC(rc);
1520}
1521
1522
1523/**
1524 * Registers the guest memory range that can be used for patching.
1525 *
1526 * @returns VBox status code.
1527 * @param pVM The cross context VM structure.
1528 * @param pPatchMem Patch memory range.
1529 * @param cbPatchMem Size of the memory range.
1530 */
1531VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1532{
1533 VM_ASSERT_EMT(pVM);
1534 if (HMIsEnabled(pVM))
1535 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1536
1537 return VERR_NOT_SUPPORTED;
1538}
1539
1540
1541/**
1542 * Deregisters the guest memory range that can be used for patching.
1543 *
1544 * @returns VBox status code.
1545 * @param pVM The cross context VM structure.
1546 * @param pPatchMem Patch memory range.
1547 * @param cbPatchMem Size of the memory range.
1548 */
1549VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1550{
1551 if (HMIsEnabled(pVM))
1552 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1553
1554 return VINF_SUCCESS;
1555}
1556
1557
1558/**
1559 * Common recursion handler for the other EMTs.
1560 *
1561 * @returns Strict VBox status code.
1562 * @param pVM The cross context VM structure.
1563 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1564 * @param rcStrict Current status code to be combined with the one
1565 * from this recursion and returned.
1566 */
1567static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1568{
1569 int rc2;
1570
1571 /*
1572 * We wait here while the initiator of this recursion reconfigures
1573 * everything. The last EMT to get in signals the initiator.
1574 */
1575 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1576 {
1577 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1578 AssertLogRelRC(rc2);
1579 }
1580
1581 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1582 AssertLogRelRC(rc2);
1583
1584 /*
1585 * Do the normal rendezvous processing.
1586 */
1587 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1588 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1589
1590 /*
1591 * Wait for the initiator to restore everything.
1592 */
1593 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1594 AssertLogRelRC(rc2);
1595
1596 /*
1597 * Last thread out of here signals the initiator.
1598 */
1599 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1600 {
1601 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1602 AssertLogRelRC(rc2);
1603 }
1604
1605 /*
1606 * Merge status codes and return.
1607 */
1608 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1609 if ( rcStrict2 != VINF_SUCCESS
1610 && ( rcStrict == VINF_SUCCESS
1611 || rcStrict > rcStrict2))
1612 rcStrict = rcStrict2;
1613 return rcStrict;
1614}
1615
1616
1617/**
1618 * Count returns and have the last non-caller EMT wake up the caller.
1619 *
1620 * @returns VBox strict informational status code for EM scheduling. No failures
1621 * will be returned here, those are for the caller only.
1622 *
1623 * @param pVM The cross context VM structure.
1624 * @param rcStrict The current accumulated recursive status code,
1625 * to be merged with i32RendezvousStatus and
1626 * returned.
1627 */
1628DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1629{
1630 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1631
1632 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1633 if (cReturned == pVM->cCpus - 1U)
1634 {
1635 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1636 AssertLogRelRC(rc);
1637 }
1638
1639 /*
1640 * Merge the status codes, ignoring error statuses in this code path.
1641 */
1642 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1643 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1644 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1645 VERR_IPE_UNEXPECTED_INFO_STATUS);
1646
1647 if (RT_SUCCESS(rcStrict2))
1648 {
1649 if ( rcStrict2 != VINF_SUCCESS
1650 && ( rcStrict == VINF_SUCCESS
1651 || rcStrict > rcStrict2))
1652 rcStrict = rcStrict2;
1653 }
1654 return rcStrict;
1655}
1656
1657
1658/**
1659 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1660 *
1661 * @returns VBox strict informational status code for EM scheduling. No failures
1662 * will be returned here, those are for the caller only. When
1663 * fIsCaller is set, VINF_SUCCESS is always returned.
1664 *
1665 * @param pVM The cross context VM structure.
1666 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1667 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1668 * not.
1669 * @param fFlags The flags.
1670 * @param pfnRendezvous The callback.
1671 * @param pvUser The user argument for the callback.
1672 */
1673static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1674 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1675{
1676 int rc;
1677 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1678
1679 /*
1680 * Enter, the last EMT triggers the next callback phase.
1681 */
1682 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1683 if (cEntered != pVM->cCpus)
1684 {
1685 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1686 {
1687 /* Wait for our turn. */
1688 for (;;)
1689 {
1690 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1691 AssertLogRelRC(rc);
1692 if (!pVM->vmm.s.fRendezvousRecursion)
1693 break;
1694 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1695 }
1696 }
1697 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1698 {
1699 /* Wait for the last EMT to arrive and wake everyone up. */
1700 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1701 AssertLogRelRC(rc);
1702 Assert(!pVM->vmm.s.fRendezvousRecursion);
1703 }
1704 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1705 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1706 {
1707 /* Wait for our turn. */
1708 for (;;)
1709 {
1710 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1711 AssertLogRelRC(rc);
1712 if (!pVM->vmm.s.fRendezvousRecursion)
1713 break;
1714 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1715 }
1716 }
1717 else
1718 {
1719 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1720
1721 /*
1722 * The execute once is handled specially to optimize the code flow.
1723 *
1724 * The last EMT to arrive will perform the callback and the other
1725 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1726 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1727 * returns, that EMT will initiate the normal return sequence.
1728 */
1729 if (!fIsCaller)
1730 {
1731 for (;;)
1732 {
1733 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1734 AssertLogRelRC(rc);
1735 if (!pVM->vmm.s.fRendezvousRecursion)
1736 break;
1737 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1738 }
1739
1740 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1741 }
1742 return VINF_SUCCESS;
1743 }
1744 }
1745 else
1746 {
1747 /*
1748 * All EMTs are waiting, clear the FF and take action according to the
1749 * execution method.
1750 */
1751 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1752
1753 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1754 {
1755 /* Wake up everyone. */
1756 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1757 AssertLogRelRC(rc);
1758 }
1759 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1760 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1761 {
1762 /* Figure out who to wake up and wake it up. If it's ourself, then
1763 it's easy otherwise wait for our turn. */
1764 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1765 ? 0
1766 : pVM->cCpus - 1U;
1767 if (pVCpu->idCpu != iFirst)
1768 {
1769 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1770 AssertLogRelRC(rc);
1771 for (;;)
1772 {
1773 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1774 AssertLogRelRC(rc);
1775 if (!pVM->vmm.s.fRendezvousRecursion)
1776 break;
1777 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1778 }
1779 }
1780 }
1781 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1782 }
1783
1784
1785 /*
1786 * Do the callback and update the status if necessary.
1787 */
1788 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1789 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1790 {
1791 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1792 if (rcStrict2 != VINF_SUCCESS)
1793 {
1794 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1795 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1796 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1797 int32_t i32RendezvousStatus;
1798 do
1799 {
1800 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1801 if ( rcStrict2 == i32RendezvousStatus
1802 || RT_FAILURE(i32RendezvousStatus)
1803 || ( i32RendezvousStatus != VINF_SUCCESS
1804 && rcStrict2 > i32RendezvousStatus))
1805 break;
1806 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1807 }
1808 }
1809
1810 /*
1811 * Increment the done counter and take action depending on whether we're
1812 * the last to finish callback execution.
1813 */
1814 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1815 if ( cDone != pVM->cCpus
1816 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1817 {
1818 /* Signal the next EMT? */
1819 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1820 {
1821 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1822 AssertLogRelRC(rc);
1823 }
1824 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1825 {
1826 Assert(cDone == pVCpu->idCpu + 1U);
1827 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1828 AssertLogRelRC(rc);
1829 }
1830 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1831 {
1832 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1833 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1834 AssertLogRelRC(rc);
1835 }
1836
1837 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1838 if (!fIsCaller)
1839 {
1840 for (;;)
1841 {
1842 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1843 AssertLogRelRC(rc);
1844 if (!pVM->vmm.s.fRendezvousRecursion)
1845 break;
1846 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1847 }
1848 }
1849 }
1850 else
1851 {
1852 /* Callback execution is all done, tell the rest to return. */
1853 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1854 AssertLogRelRC(rc);
1855 }
1856
1857 if (!fIsCaller)
1858 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1859 return rcStrictRecursion;
1860}
1861
1862
1863/**
1864 * Called in response to VM_FF_EMT_RENDEZVOUS.
1865 *
1866 * @returns VBox strict status code - EM scheduling. No errors will be returned
1867 * here, nor will any non-EM scheduling status codes be returned.
1868 *
1869 * @param pVM The cross context VM structure.
1870 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1871 *
1872 * @thread EMT
1873 */
1874VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1875{
1876 Assert(!pVCpu->vmm.s.fInRendezvous);
1877 pVCpu->vmm.s.fInRendezvous = true;
1878 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1879 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1880 pVCpu->vmm.s.fInRendezvous = false;
1881 return VBOXSTRICTRC_TODO(rcStrict);
1882}
1883
1884
1885/**
1886 * Helper for resetting an single wakeup event sempahore.
1887 *
1888 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1889 * @param hEvt The event semaphore to reset.
1890 */
1891static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1892{
1893 for (uint32_t cLoops = 0; ; cLoops++)
1894 {
1895 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1896 if (rc != VINF_SUCCESS || cLoops > _4K)
1897 return rc;
1898 }
1899}
1900
1901
1902/**
1903 * Worker for VMMR3EmtRendezvous that handles recursion.
1904 *
1905 * @returns VBox strict status code. This will be the first error,
1906 * VINF_SUCCESS, or an EM scheduling status code.
1907 *
1908 * @param pVM The cross context VM structure.
1909 * @param pVCpu The cross context virtual CPU structure of the
1910 * calling EMT.
1911 * @param fFlags Flags indicating execution methods. See
1912 * grp_VMMR3EmtRendezvous_fFlags.
1913 * @param pfnRendezvous The callback.
1914 * @param pvUser User argument for the callback.
1915 *
1916 * @thread EMT(pVCpu)
1917 */
1918static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1919 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1920{
1921 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1922
1923 /*
1924 * Save the current state.
1925 */
1926 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1927 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1928 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1929 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1930 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1931
1932 /*
1933 * Check preconditions and save the current state.
1934 */
1935 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1936 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1937 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1938 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1939 VERR_INTERNAL_ERROR);
1940 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1941 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1942
1943 /*
1944 * Reset the recursion prep and pop semaphores.
1945 */
1946 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1947 AssertLogRelRCReturn(rc, rc);
1948 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1949 AssertLogRelRCReturn(rc, rc);
1950 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1951 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1952 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1953 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1954
1955 /*
1956 * Usher the other thread into the recursion routine.
1957 */
1958 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1959 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1960
1961 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1962 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1963 while (cLeft-- > 0)
1964 {
1965 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1966 AssertLogRelRC(rc);
1967 }
1968 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1969 {
1970 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1971 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1972 {
1973 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1974 AssertLogRelRC(rc);
1975 }
1976 }
1977 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1978 {
1979 Assert(cLeft == pVCpu->idCpu);
1980 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1981 {
1982 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1983 AssertLogRelRC(rc);
1984 }
1985 }
1986 else
1987 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1988 VERR_INTERNAL_ERROR_4);
1989
1990 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1991 AssertLogRelRC(rc);
1992 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1993 AssertLogRelRC(rc);
1994
1995
1996 /*
1997 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1998 */
1999 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2000 {
2001 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2002 AssertLogRelRC(rc);
2003 }
2004
2005 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2006
2007 /*
2008 * Clear the slate and setup the new rendezvous.
2009 */
2010 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2011 {
2012 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2013 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2014 }
2015 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2016 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2017 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2018 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2019
2020 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2021 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2022 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2023 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2024 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2025 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2026 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2027 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2028
2029 /*
2030 * We're ready to go now, do normal rendezvous processing.
2031 */
2032 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2033 AssertLogRelRC(rc);
2034
2035 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
2036
2037 /*
2038 * The caller waits for the other EMTs to be done, return and waiting on the
2039 * pop semaphore.
2040 */
2041 for (;;)
2042 {
2043 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2044 AssertLogRelRC(rc);
2045 if (!pVM->vmm.s.fRendezvousRecursion)
2046 break;
2047 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2048 }
2049
2050 /*
2051 * Get the return code and merge it with the above recursion status.
2052 */
2053 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2054 if ( rcStrict2 != VINF_SUCCESS
2055 && ( rcStrict == VINF_SUCCESS
2056 || rcStrict > rcStrict2))
2057 rcStrict = rcStrict2;
2058
2059 /*
2060 * Restore the parent rendezvous state.
2061 */
2062 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2063 {
2064 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2065 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2066 }
2067 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2068 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2069 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2070 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2071
2072 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2073 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2074 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2075 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2076 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2077 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2078 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
2079
2080 /*
2081 * Usher the other EMTs back to their parent recursion routine, waiting
2082 * for them to all get there before we return (makes sure they've been
2083 * scheduled and are past the pop event sem, see below).
2084 */
2085 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2086 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2087 AssertLogRelRC(rc);
2088
2089 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2090 {
2091 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2092 AssertLogRelRC(rc);
2093 }
2094
2095 /*
2096 * We must reset the pop semaphore on the way out (doing the pop caller too,
2097 * just in case). The parent may be another recursion.
2098 */
2099 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2100 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2101
2102 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2103
2104 return rcStrict;
2105}
2106
2107
2108/**
2109 * EMT rendezvous.
2110 *
2111 * Gathers all the EMTs and execute some code on each of them, either in a one
2112 * by one fashion or all at once.
2113 *
2114 * @returns VBox strict status code. This will be the first error,
2115 * VINF_SUCCESS, or an EM scheduling status code.
2116 *
2117 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2118 * doesn't support it or if the recursion is too deep.
2119 *
2120 * @param pVM The cross context VM structure.
2121 * @param fFlags Flags indicating execution methods. See
2122 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2123 * descending and ascending rendezvous types support
2124 * recursion from inside @a pfnRendezvous.
2125 * @param pfnRendezvous The callback.
2126 * @param pvUser User argument for the callback.
2127 *
2128 * @thread Any.
2129 */
2130VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2131{
2132 /*
2133 * Validate input.
2134 */
2135 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2136 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2137 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2138 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2139 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2140 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2141 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2142 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2143
2144 VBOXSTRICTRC rcStrict;
2145 PVMCPU pVCpu = VMMGetCpu(pVM);
2146 if (!pVCpu)
2147 /*
2148 * Forward the request to an EMT thread.
2149 */
2150 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
2151 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2152 else if (pVM->cCpus == 1)
2153 {
2154 /*
2155 * Shortcut for the single EMT case.
2156 */
2157 if (!pVCpu->vmm.s.fInRendezvous)
2158 {
2159 pVCpu->vmm.s.fInRendezvous = true;
2160 pVM->vmm.s.fRendezvousFlags = fFlags;
2161 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2162 pVCpu->vmm.s.fInRendezvous = false;
2163 }
2164 else
2165 {
2166 /* Recursion. Do the same checks as in the SMP case. */
2167 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2168 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2169 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2170 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2171 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2172 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2173 , VERR_DEADLOCK);
2174
2175 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2176 pVM->vmm.s.cRendezvousRecursions++;
2177 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2178 pVM->vmm.s.fRendezvousFlags = fFlags;
2179
2180 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2181
2182 pVM->vmm.s.fRendezvousFlags = fParentFlags;
2183 pVM->vmm.s.cRendezvousRecursions--;
2184 }
2185 }
2186 else
2187 {
2188 /*
2189 * Spin lock. If busy, check for recursion, if not recursing wait for
2190 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2191 */
2192 int rc;
2193 rcStrict = VINF_SUCCESS;
2194 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2195 {
2196 /* Allow recursion in some cases. */
2197 if ( pVCpu->vmm.s.fInRendezvous
2198 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2199 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2200 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2201 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2202 ))
2203 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2204
2205 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2206 VERR_DEADLOCK);
2207
2208 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2209 {
2210 if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
2211 {
2212 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2213 if ( rc != VINF_SUCCESS
2214 && ( rcStrict == VINF_SUCCESS
2215 || rcStrict > rc))
2216 rcStrict = rc;
2217 /** @todo Perhaps deal with termination here? */
2218 }
2219 ASMNopPause();
2220 }
2221 }
2222 Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
2223 Assert(!pVCpu->vmm.s.fInRendezvous);
2224 pVCpu->vmm.s.fInRendezvous = true;
2225
2226 /*
2227 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2228 */
2229 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2230 {
2231 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2232 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2233 }
2234 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2235 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2236 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2237 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2238 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2239 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2240 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2241 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2242 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2243 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2244 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2245
2246 /*
2247 * Set the FF and poke the other EMTs.
2248 */
2249 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2250 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2251
2252 /*
2253 * Do the same ourselves.
2254 */
2255 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2256
2257 /*
2258 * The caller waits for the other EMTs to be done and return before doing
2259 * the cleanup. This makes away with wakeup / reset races we would otherwise
2260 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2261 */
2262 for (;;)
2263 {
2264 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2265 AssertLogRelRC(rc);
2266 if (!pVM->vmm.s.fRendezvousRecursion)
2267 break;
2268 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2269 }
2270
2271 /*
2272 * Get the return code and clean up a little bit.
2273 */
2274 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2275 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2276
2277 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2278 pVCpu->vmm.s.fInRendezvous = false;
2279
2280 /*
2281 * Merge rcStrict, rcStrict2 and rcStrict3.
2282 */
2283 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2284 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2285 if ( rcStrict2 != VINF_SUCCESS
2286 && ( rcStrict == VINF_SUCCESS
2287 || rcStrict > rcStrict2))
2288 rcStrict = rcStrict2;
2289 if ( rcStrict3 != VINF_SUCCESS
2290 && ( rcStrict == VINF_SUCCESS
2291 || rcStrict > rcStrict3))
2292 rcStrict = rcStrict3;
2293 }
2294
2295 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2296 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2297 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2298 VERR_IPE_UNEXPECTED_INFO_STATUS);
2299 return VBOXSTRICTRC_VAL(rcStrict);
2300}
2301
2302
2303/**
2304 * Disables/enables EMT rendezvous.
2305 *
2306 * This is used to make sure EMT rendezvous does not take place while
2307 * processing a priority request.
2308 *
2309 * @returns Old rendezvous-disabled state.
2310 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
2311 * @param fDisabled True if disabled, false if enabled.
2312 */
2313VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
2314{
2315 VMCPU_ASSERT_EMT(pVCpu);
2316 bool fOld = pVCpu->vmm.s.fInRendezvous;
2317 pVCpu->vmm.s.fInRendezvous = fDisabled;
2318 return fOld;
2319}
2320
2321
2322/**
2323 * Read from the ring 0 jump buffer stack
2324 *
2325 * @returns VBox status code.
2326 *
2327 * @param pVM The cross context VM structure.
2328 * @param idCpu The ID of the source CPU context (for the address).
2329 * @param R0Addr Where to start reading.
2330 * @param pvBuf Where to store the data we've read.
2331 * @param cbRead The number of bytes to read.
2332 */
2333VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2334{
2335 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2336 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2337
2338#ifdef VMM_R0_SWITCH_STACK
2339 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2340#else
2341 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2342#endif
2343 if ( off > VMM_STACK_SIZE
2344 || off + cbRead >= VMM_STACK_SIZE)
2345 return VERR_INVALID_POINTER;
2346
2347 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2348 return VINF_SUCCESS;
2349}
2350
2351#ifdef VBOX_WITH_RAW_MODE
2352
2353/**
2354 * Calls a RC function.
2355 *
2356 * @param pVM The cross context VM structure.
2357 * @param RCPtrEntry The address of the RC function.
2358 * @param cArgs The number of arguments in the ....
2359 * @param ... Arguments to the function.
2360 */
2361VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2362{
2363 va_list args;
2364 va_start(args, cArgs);
2365 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2366 va_end(args);
2367 return rc;
2368}
2369
2370
2371/**
2372 * Calls a RC function.
2373 *
2374 * @param pVM The cross context VM structure.
2375 * @param RCPtrEntry The address of the RC function.
2376 * @param cArgs The number of arguments in the ....
2377 * @param args Arguments to the function.
2378 */
2379VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2380{
2381 /* Raw mode implies 1 VCPU. */
2382 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2383 PVMCPU pVCpu = &pVM->aCpus[0];
2384
2385 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2386
2387 /*
2388 * Setup the call frame using the trampoline.
2389 */
2390 CPUMSetHyperState(pVCpu,
2391 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2392 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2393 RCPtrEntry, /* eax */
2394 cArgs /* edx */
2395 );
2396
2397#if 0
2398 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2399#endif
2400 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2401 int i = cArgs;
2402 while (i-- > 0)
2403 *pFrame++ = va_arg(args, RTGCUINTPTR32);
2404
2405 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2406 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2407
2408 /*
2409 * We hide log flushes (outer) and hypervisor interrupts (inner).
2410 */
2411 for (;;)
2412 {
2413 int rc;
2414 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2415 do
2416 {
2417#ifdef NO_SUPCALLR0VMM
2418 rc = VERR_GENERAL_FAILURE;
2419#else
2420 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2421 if (RT_LIKELY(rc == VINF_SUCCESS))
2422 rc = pVCpu->vmm.s.iLastGZRc;
2423#endif
2424 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2425
2426 /*
2427 * Flush the loggers.
2428 */
2429#ifdef LOG_ENABLED
2430 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2431 if ( pLogger
2432 && pLogger->offScratch > 0)
2433 RTLogFlushRC(NULL, pLogger);
2434#endif
2435#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2436 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2437 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2438 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2439#endif
2440 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2441 VMMR3FatalDump(pVM, pVCpu, rc);
2442 if (rc != VINF_VMM_CALL_HOST)
2443 {
2444 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2445 return rc;
2446 }
2447 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2448 if (RT_FAILURE(rc))
2449 return rc;
2450 }
2451}
2452
2453#endif /* VBOX_WITH_RAW_MODE */
2454
2455/**
2456 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2457 *
2458 * @returns VBox status code.
2459 * @param pVM The cross context VM structure.
2460 * @param uOperation Operation to execute.
2461 * @param u64Arg Constant argument.
2462 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2463 * details.
2464 */
2465VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2466{
2467 PVMCPU pVCpu = VMMGetCpu(pVM);
2468 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2469
2470 /*
2471 * Call Ring-0 entry with init code.
2472 */
2473 int rc;
2474 for (;;)
2475 {
2476#ifdef NO_SUPCALLR0VMM
2477 rc = VERR_GENERAL_FAILURE;
2478#else
2479 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2480#endif
2481 /*
2482 * Flush the logs.
2483 */
2484#ifdef LOG_ENABLED
2485 if ( pVCpu->vmm.s.pR0LoggerR3
2486 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2487 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2488#endif
2489 if (rc != VINF_VMM_CALL_HOST)
2490 break;
2491 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2492 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2493 break;
2494 /* Resume R0 */
2495 }
2496
2497 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2498 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
2499 VERR_IPE_UNEXPECTED_INFO_STATUS);
2500 return rc;
2501}
2502
2503
2504#ifdef VBOX_WITH_RAW_MODE
2505/**
2506 * Resumes executing hypervisor code when interrupted by a queue flush or a
2507 * debug event.
2508 *
2509 * @returns VBox status code.
2510 * @param pVM The cross context VM structure.
2511 * @param pVCpu The cross context virtual CPU structure.
2512 */
2513VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2514{
2515 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2516 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2517
2518 /*
2519 * We hide log flushes (outer) and hypervisor interrupts (inner).
2520 */
2521 for (;;)
2522 {
2523 int rc;
2524 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2525 do
2526 {
2527# ifdef NO_SUPCALLR0VMM
2528 rc = VERR_GENERAL_FAILURE;
2529# else
2530 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2531 if (RT_LIKELY(rc == VINF_SUCCESS))
2532 rc = pVCpu->vmm.s.iLastGZRc;
2533# endif
2534 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2535
2536 /*
2537 * Flush the loggers.
2538 */
2539# ifdef LOG_ENABLED
2540 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2541 if ( pLogger
2542 && pLogger->offScratch > 0)
2543 RTLogFlushRC(NULL, pLogger);
2544# endif
2545# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2546 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2547 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2548 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2549# endif
2550 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2551 VMMR3FatalDump(pVM, pVCpu, rc);
2552 if (rc != VINF_VMM_CALL_HOST)
2553 {
2554 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2555 return rc;
2556 }
2557 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2558 if (RT_FAILURE(rc))
2559 return rc;
2560 }
2561}
2562#endif /* VBOX_WITH_RAW_MODE */
2563
2564
2565/**
2566 * Service a call to the ring-3 host code.
2567 *
2568 * @returns VBox status code.
2569 * @param pVM The cross context VM structure.
2570 * @param pVCpu The cross context virtual CPU structure.
2571 * @remarks Careful with critsects.
2572 */
2573static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2574{
2575 /*
2576 * We must also check for pending critsect exits or else we can deadlock
2577 * when entering other critsects here.
2578 */
2579 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2580 PDMCritSectBothFF(pVCpu);
2581
2582 switch (pVCpu->vmm.s.enmCallRing3Operation)
2583 {
2584 /*
2585 * Acquire a critical section.
2586 */
2587 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2588 {
2589 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2590 true /*fCallRing3*/);
2591 break;
2592 }
2593
2594 /*
2595 * Enter a r/w critical section exclusively.
2596 */
2597 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2598 {
2599 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2600 true /*fCallRing3*/);
2601 break;
2602 }
2603
2604 /*
2605 * Enter a r/w critical section shared.
2606 */
2607 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2608 {
2609 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2610 true /*fCallRing3*/);
2611 break;
2612 }
2613
2614 /*
2615 * Acquire the PDM lock.
2616 */
2617 case VMMCALLRING3_PDM_LOCK:
2618 {
2619 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2620 break;
2621 }
2622
2623 /*
2624 * Grow the PGM pool.
2625 */
2626 case VMMCALLRING3_PGM_POOL_GROW:
2627 {
2628 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2629 break;
2630 }
2631
2632 /*
2633 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2634 */
2635 case VMMCALLRING3_PGM_MAP_CHUNK:
2636 {
2637 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2638 break;
2639 }
2640
2641 /*
2642 * Allocates more handy pages.
2643 */
2644 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2645 {
2646 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2647 break;
2648 }
2649
2650 /*
2651 * Allocates a large page.
2652 */
2653 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2654 {
2655 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2656 break;
2657 }
2658
2659 /*
2660 * Acquire the PGM lock.
2661 */
2662 case VMMCALLRING3_PGM_LOCK:
2663 {
2664 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2665 break;
2666 }
2667
2668 /*
2669 * Acquire the MM hypervisor heap lock.
2670 */
2671 case VMMCALLRING3_MMHYPER_LOCK:
2672 {
2673 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2674 break;
2675 }
2676
2677#ifdef VBOX_WITH_REM
2678 /*
2679 * Flush REM handler notifications.
2680 */
2681 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2682 {
2683 REMR3ReplayHandlerNotifications(pVM);
2684 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2685 break;
2686 }
2687#endif
2688
2689 /*
2690 * This is a noop. We just take this route to avoid unnecessary
2691 * tests in the loops.
2692 */
2693 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2694 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2695 LogAlways(("*FLUSH*\n"));
2696 break;
2697
2698 /*
2699 * Set the VM error message.
2700 */
2701 case VMMCALLRING3_VM_SET_ERROR:
2702 VMR3SetErrorWorker(pVM);
2703 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2704 break;
2705
2706 /*
2707 * Set the VM runtime error message.
2708 */
2709 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2710 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2711 break;
2712
2713 /*
2714 * Signal a ring 0 hypervisor assertion.
2715 * Cancel the longjmp operation that's in progress.
2716 */
2717 case VMMCALLRING3_VM_R0_ASSERTION:
2718 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2719 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2720#ifdef RT_ARCH_X86
2721 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2722#else
2723 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2724#endif
2725#ifdef VMM_R0_SWITCH_STACK
2726 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2727#endif
2728 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2729 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2730 return VERR_VMM_RING0_ASSERTION;
2731
2732 /*
2733 * A forced switch to ring 0 for preemption purposes.
2734 */
2735 case VMMCALLRING3_VM_R0_PREEMPT:
2736 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2737 break;
2738
2739 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2740 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2741 break;
2742
2743 default:
2744 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2745 return VERR_VMM_UNKNOWN_RING3_CALL;
2746 }
2747
2748 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2749 return VINF_SUCCESS;
2750}
2751
2752
2753/**
2754 * Displays the Force action Flags.
2755 *
2756 * @param pVM The cross context VM structure.
2757 * @param pHlp The output helpers.
2758 * @param pszArgs The additional arguments (ignored).
2759 */
2760static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2761{
2762 int c;
2763 uint32_t f;
2764 NOREF(pszArgs);
2765
2766#define PRINT_FLAG(prf,flag) do { \
2767 if (f & (prf##flag)) \
2768 { \
2769 static const char *s_psz = #flag; \
2770 if (!(c % 6)) \
2771 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2772 else \
2773 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2774 c++; \
2775 f &= ~(prf##flag); \
2776 } \
2777 } while (0)
2778
2779#define PRINT_GROUP(prf,grp,sfx) do { \
2780 if (f & (prf##grp##sfx)) \
2781 { \
2782 static const char *s_psz = #grp; \
2783 if (!(c % 5)) \
2784 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2785 else \
2786 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2787 c++; \
2788 } \
2789 } while (0)
2790
2791 /*
2792 * The global flags.
2793 */
2794 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2795 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2796
2797 /* show the flag mnemonics */
2798 c = 0;
2799 f = fGlobalForcedActions;
2800 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2801 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2802 PRINT_FLAG(VM_FF_,PDM_DMA);
2803 PRINT_FLAG(VM_FF_,DBGF);
2804 PRINT_FLAG(VM_FF_,REQUEST);
2805 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2806 PRINT_FLAG(VM_FF_,RESET);
2807 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2808 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2809 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2810 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2811 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2812 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2813 if (f)
2814 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2815 else
2816 pHlp->pfnPrintf(pHlp, "\n");
2817
2818 /* the groups */
2819 c = 0;
2820 f = fGlobalForcedActions;
2821 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2822 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2823 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2824 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2825 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2826 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2827 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2828 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2829 if (c)
2830 pHlp->pfnPrintf(pHlp, "\n");
2831
2832 /*
2833 * Per CPU flags.
2834 */
2835 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2836 {
2837 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2838 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2839
2840 /* show the flag mnemonics */
2841 c = 0;
2842 f = fLocalForcedActions;
2843 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2844 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2845 PRINT_FLAG(VMCPU_FF_,TIMER);
2846 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2847 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2848 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2849 PRINT_FLAG(VMCPU_FF_,UNHALT);
2850 PRINT_FLAG(VMCPU_FF_,IEM);
2851 PRINT_FLAG(VMCPU_FF_,REQUEST);
2852 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2853 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2854 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2855 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2856 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2857 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2858 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2859 PRINT_FLAG(VMCPU_FF_,TO_R3);
2860#ifdef VBOX_WITH_RAW_MODE
2861 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2862 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2863 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2864 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2865 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2866 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2867#endif
2868 if (f)
2869 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2870 else
2871 pHlp->pfnPrintf(pHlp, "\n");
2872
2873 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2874 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2875
2876 /* the groups */
2877 c = 0;
2878 f = fLocalForcedActions;
2879 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2880 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2881 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2882 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2883 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2884 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2885 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2886 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2887 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2888 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2889 if (c)
2890 pHlp->pfnPrintf(pHlp, "\n");
2891 }
2892
2893#undef PRINT_FLAG
2894#undef PRINT_GROUP
2895}
2896
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