VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 61078

Last change on this file since 61078 was 60847, checked in by vboxsync, 9 years ago

IOM: New way of defer RC+R0 I/O port writes, prepping for MMIO writes.

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1/* $Id: VMM.cpp 60847 2016-05-05 15:24:46Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_csam
32 * - @subpage pg_dbgf
33 * - @subpage pg_em
34 * - @subpage pg_gim
35 * - @subpage pg_gmm
36 * - @subpage pg_gvmm
37 * - @subpage pg_hm
38 * - @subpage pg_iem
39 * - @subpage pg_iom
40 * - @subpage pg_mm
41 * - @subpage pg_patm
42 * - @subpage pg_pdm
43 * - @subpage pg_pgm
44 * - @subpage pg_rem
45 * - @subpage pg_selm
46 * - @subpage pg_ssm
47 * - @subpage pg_stam
48 * - @subpage pg_tm
49 * - @subpage pg_trpm
50 * - @subpage pg_vm
51 *
52 *
53 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54 *
55 *
56 * @section sec_vmmstate VMM State
57 *
58 * @image html VM_Statechart_Diagram.gif
59 *
60 * To be written.
61 *
62 *
63 * @subsection subsec_vmm_init VMM Initialization
64 *
65 * To be written.
66 *
67 *
68 * @subsection subsec_vmm_term VMM Termination
69 *
70 * To be written.
71 *
72 *
73 * @section sec_vmm_limits VMM Limits
74 *
75 * There are various resource limits imposed by the VMM and it's
76 * sub-components. We'll list some of them here.
77 *
78 * On 64-bit hosts:
79 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80 * can be increased up to 64K - 1.
81 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83 * - A VM can be assigned all the memory we can use (16TB), however, the
84 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86 *
87 * On 32-bit hosts:
88 * - Max 127 VMs. Imposed by GMM's per page structure.
89 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90 * ROM pages. The limit is imposed by the 28-bit page ID used
91 * internally in GMM. It is also limited by PAE.
92 * - A VM can be assigned all the memory GMM can allocate, however, the
93 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95 *
96 */
97
98
99/*********************************************************************************************************************************
100* Header Files *
101*********************************************************************************************************************************/
102#define LOG_GROUP LOG_GROUP_VMM
103#include <VBox/vmm/vmm.h>
104#include <VBox/vmm/vmapi.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/vmm/cfgm.h>
107#include <VBox/vmm/pdmqueue.h>
108#include <VBox/vmm/pdmcritsect.h>
109#include <VBox/vmm/pdmcritsectrw.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/cpum.h>
112#include <VBox/vmm/gim.h>
113#include <VBox/vmm/mm.h>
114#include <VBox/vmm/iom.h>
115#include <VBox/vmm/trpm.h>
116#include <VBox/vmm/selm.h>
117#include <VBox/vmm/em.h>
118#include <VBox/sup.h>
119#include <VBox/vmm/dbgf.h>
120#include <VBox/vmm/csam.h>
121#include <VBox/vmm/patm.h>
122#ifdef VBOX_WITH_NEW_APIC
123# include <VBox/vmm/apic.h>
124#endif
125#ifdef VBOX_WITH_REM
126# include <VBox/vmm/rem.h>
127#endif
128#include <VBox/vmm/ssm.h>
129#include <VBox/vmm/ftm.h>
130#include <VBox/vmm/tm.h>
131#include "VMMInternal.h"
132#include "VMMSwitcher.h"
133#include <VBox/vmm/vm.h>
134#include <VBox/vmm/uvm.h>
135
136#include <VBox/err.h>
137#include <VBox/param.h>
138#include <VBox/version.h>
139#include <VBox/vmm/hm.h>
140#include <iprt/assert.h>
141#include <iprt/alloc.h>
142#include <iprt/asm.h>
143#include <iprt/time.h>
144#include <iprt/semaphore.h>
145#include <iprt/stream.h>
146#include <iprt/string.h>
147#include <iprt/stdarg.h>
148#include <iprt/ctype.h>
149#include <iprt/x86.h>
150
151
152/*********************************************************************************************************************************
153* Defined Constants And Macros *
154*********************************************************************************************************************************/
155/** The saved state version. */
156#define VMM_SAVED_STATE_VERSION 4
157/** The saved state version used by v3.0 and earlier. (Teleportation) */
158#define VMM_SAVED_STATE_VERSION_3_0 3
159
160
161/*********************************************************************************************************************************
162* Internal Functions *
163*********************************************************************************************************************************/
164static int vmmR3InitStacks(PVM pVM);
165static int vmmR3InitLoggers(PVM pVM);
166static void vmmR3InitRegisterStats(PVM pVM);
167static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
168static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
169static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
170static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
171 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
172static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
173static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
174
175
176/**
177 * Initializes the VMM.
178 *
179 * @returns VBox status code.
180 * @param pVM The cross context VM structure.
181 */
182VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
183{
184 LogFlow(("VMMR3Init\n"));
185
186 /*
187 * Assert alignment, sizes and order.
188 */
189 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
190 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
191 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
192
193 /*
194 * Init basic VM VMM members.
195 */
196 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
197 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
198 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
199 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
200 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
201 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
202 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
203 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
204 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
205 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
206
207 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
208 * The EMT yield interval. The EMT yielding is a hack we employ to play a
209 * bit nicer with the rest of the system (like for instance the GUI).
210 */
211 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
212 23 /* Value arrived at after experimenting with the grub boot prompt. */);
213 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
214
215
216 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
217 * Controls whether we employ per-cpu preemption timers to limit the time
218 * spent executing guest code. This option is not available on all
219 * platforms and we will silently ignore this setting then. If we are
220 * running in VT-x mode, we will use the VMX-preemption timer instead of
221 * this one when possible.
222 */
223 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
224 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
225 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
226
227 /*
228 * Initialize the VMM rendezvous semaphores.
229 */
230 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
231 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
232 return VERR_NO_MEMORY;
233 for (VMCPUID i = 0; i < pVM->cCpus; i++)
234 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
235 for (VMCPUID i = 0; i < pVM->cCpus; i++)
236 {
237 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
238 AssertRCReturn(rc, rc);
239 }
240 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
241 AssertRCReturn(rc, rc);
242 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
243 AssertRCReturn(rc, rc);
244 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
245 AssertRCReturn(rc, rc);
246 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
247 AssertRCReturn(rc, rc);
248 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
249 AssertRCReturn(rc, rc);
250 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
251 AssertRCReturn(rc, rc);
252 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
253 AssertRCReturn(rc, rc);
254 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
255 AssertRCReturn(rc, rc);
256
257 /*
258 * Register the saved state data unit.
259 */
260 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
261 NULL, NULL, NULL,
262 NULL, vmmR3Save, NULL,
263 NULL, vmmR3Load, NULL);
264 if (RT_FAILURE(rc))
265 return rc;
266
267 /*
268 * Register the Ring-0 VM handle with the session for fast ioctl calls.
269 */
270 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
271 if (RT_FAILURE(rc))
272 return rc;
273
274 /*
275 * Init various sub-components.
276 */
277 rc = vmmR3SwitcherInit(pVM);
278 if (RT_SUCCESS(rc))
279 {
280 rc = vmmR3InitStacks(pVM);
281 if (RT_SUCCESS(rc))
282 {
283 rc = vmmR3InitLoggers(pVM);
284
285#ifdef VBOX_WITH_NMI
286 /*
287 * Allocate mapping for the host APIC.
288 */
289 if (RT_SUCCESS(rc))
290 {
291 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
292 AssertRC(rc);
293 }
294#endif
295 if (RT_SUCCESS(rc))
296 {
297 /*
298 * Debug info and statistics.
299 */
300 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
301 vmmR3InitRegisterStats(pVM);
302 vmmInitFormatTypes();
303
304 return VINF_SUCCESS;
305 }
306 }
307 /** @todo: Need failure cleanup. */
308
309 //more todo in here?
310 //if (RT_SUCCESS(rc))
311 //{
312 //}
313 //int rc2 = vmmR3TermCoreCode(pVM);
314 //AssertRC(rc2));
315 }
316
317 return rc;
318}
319
320
321/**
322 * Allocate & setup the VMM RC stack(s) (for EMTs).
323 *
324 * The stacks are also used for long jumps in Ring-0.
325 *
326 * @returns VBox status code.
327 * @param pVM The cross context VM structure.
328 *
329 * @remarks The optional guard page gets it protection setup up during R3 init
330 * completion because of init order issues.
331 */
332static int vmmR3InitStacks(PVM pVM)
333{
334 int rc = VINF_SUCCESS;
335#ifdef VMM_R0_SWITCH_STACK
336 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
337#else
338 uint32_t fFlags = 0;
339#endif
340
341 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
342 {
343 PVMCPU pVCpu = &pVM->aCpus[idCpu];
344
345#ifdef VBOX_STRICT_VMM_STACK
346 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
347#else
348 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
349#endif
350 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
351 if (RT_SUCCESS(rc))
352 {
353#ifdef VBOX_STRICT_VMM_STACK
354 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
355#endif
356#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
357 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
358 if (!HMIsEnabled(pVM))
359 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
360 else
361#endif
362 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
363 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
364 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
365 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
366
367 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
368 }
369 }
370
371 return rc;
372}
373
374
375/**
376 * Initialize the loggers.
377 *
378 * @returns VBox status code.
379 * @param pVM The cross context VM structure.
380 */
381static int vmmR3InitLoggers(PVM pVM)
382{
383 int rc;
384#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
385
386 /*
387 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
388 */
389#ifdef LOG_ENABLED
390 PRTLOGGER pLogger = RTLogDefaultInstance();
391 if (pLogger)
392 {
393 if (!HMIsEnabled(pVM))
394 {
395 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
396 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
397 if (RT_FAILURE(rc))
398 return rc;
399 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
400 }
401
402# ifdef VBOX_WITH_R0_LOGGING
403 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
404 for (VMCPUID i = 0; i < pVM->cCpus; i++)
405 {
406 PVMCPU pVCpu = &pVM->aCpus[i];
407 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
408 (void **)&pVCpu->vmm.s.pR0LoggerR3);
409 if (RT_FAILURE(rc))
410 return rc;
411 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
412 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
413 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
414 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
415 }
416# endif
417 }
418#endif /* LOG_ENABLED */
419
420#ifdef VBOX_WITH_RC_RELEASE_LOGGING
421 /*
422 * Allocate RC release logger instances (finalized in the relocator).
423 */
424 if (!HMIsEnabled(pVM))
425 {
426 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
427 if (pRelLogger)
428 {
429 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
430 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
431 if (RT_FAILURE(rc))
432 return rc;
433 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
434 }
435 }
436#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
437 return VINF_SUCCESS;
438}
439
440
441/**
442 * VMMR3Init worker that register the statistics with STAM.
443 *
444 * @param pVM The cross context VM structure.
445 */
446static void vmmR3InitRegisterStats(PVM pVM)
447{
448 /*
449 * Statistics.
450 */
451 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
508 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
509 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
510 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
511 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
512 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
513 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
514 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
516
517#ifdef VBOX_WITH_STATISTICS
518 for (VMCPUID i = 0; i < pVM->cCpus; i++)
519 {
520 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
521 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
522 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
523 }
524#endif
525}
526
527
528/**
529 * Initializes the R0 VMM.
530 *
531 * @returns VBox status code.
532 * @param pVM The cross context VM structure.
533 */
534VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
535{
536 int rc;
537 PVMCPU pVCpu = VMMGetCpu(pVM);
538 Assert(pVCpu && pVCpu->idCpu == 0);
539
540#ifdef LOG_ENABLED
541 /*
542 * Initialize the ring-0 logger if we haven't done so yet.
543 */
544 if ( pVCpu->vmm.s.pR0LoggerR3
545 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
546 {
547 rc = VMMR3UpdateLoggers(pVM);
548 if (RT_FAILURE(rc))
549 return rc;
550 }
551#endif
552
553 /*
554 * Call Ring-0 entry with init code.
555 */
556 for (;;)
557 {
558#ifdef NO_SUPCALLR0VMM
559 //rc = VERR_GENERAL_FAILURE;
560 rc = VINF_SUCCESS;
561#else
562 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT,
563 RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
564#endif
565 /*
566 * Flush the logs.
567 */
568#ifdef LOG_ENABLED
569 if ( pVCpu->vmm.s.pR0LoggerR3
570 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
571 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
572#endif
573 if (rc != VINF_VMM_CALL_HOST)
574 break;
575 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
576 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
577 break;
578 /* Resume R0 */
579 }
580
581 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
582 {
583 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
584 if (RT_SUCCESS(rc))
585 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
586 }
587
588 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
589 if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
590 LogRel(("VMM: Enabled thread-context hooks\n"));
591 else
592 LogRel(("VMM: Thread-context hooks unavailable\n"));
593
594 return rc;
595}
596
597
598#ifdef VBOX_WITH_RAW_MODE
599/**
600 * Initializes the RC VMM.
601 *
602 * @returns VBox status code.
603 * @param pVM The cross context VM structure.
604 */
605VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
606{
607 PVMCPU pVCpu = VMMGetCpu(pVM);
608 Assert(pVCpu && pVCpu->idCpu == 0);
609
610 /* In VMX mode, there's no need to init RC. */
611 if (HMIsEnabled(pVM))
612 return VINF_SUCCESS;
613
614 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
615
616 /*
617 * Call VMMRCInit():
618 * -# resolve the address.
619 * -# setup stackframe and EIP to use the trampoline.
620 * -# do a generic hypervisor call.
621 */
622 RTRCPTR RCPtrEP;
623 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
624 if (RT_SUCCESS(rc))
625 {
626 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
627 uint64_t u64TS = RTTimeProgramStartNanoTS();
628 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 4: The program startup TS - Hi. */
629 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 4: The program startup TS - Lo. */
630 CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
631 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
632 CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
633 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
634 CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
635 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
636 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
637 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
638
639 for (;;)
640 {
641#ifdef NO_SUPCALLR0VMM
642 //rc = VERR_GENERAL_FAILURE;
643 rc = VINF_SUCCESS;
644#else
645 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
646#endif
647#ifdef LOG_ENABLED
648 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
649 if ( pLogger
650 && pLogger->offScratch > 0)
651 RTLogFlushRC(NULL, pLogger);
652#endif
653#ifdef VBOX_WITH_RC_RELEASE_LOGGING
654 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
655 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
656 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
657#endif
658 if (rc != VINF_VMM_CALL_HOST)
659 break;
660 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
661 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
662 break;
663 }
664
665 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
666 {
667 VMMR3FatalDump(pVM, pVCpu, rc);
668 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
669 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
670 }
671 AssertRC(rc);
672 }
673 return rc;
674}
675#endif /* VBOX_WITH_RAW_MODE */
676
677
678/**
679 * Called when an init phase completes.
680 *
681 * @returns VBox status code.
682 * @param pVM The cross context VM structure.
683 * @param enmWhat Which init phase.
684 */
685VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
686{
687 int rc = VINF_SUCCESS;
688
689 switch (enmWhat)
690 {
691 case VMINITCOMPLETED_RING3:
692 {
693 /*
694 * Set page attributes to r/w for stack pages.
695 */
696 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
697 {
698 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
699 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
700 AssertRCReturn(rc, rc);
701 }
702
703 /*
704 * Create the EMT yield timer.
705 */
706 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
707 AssertRCReturn(rc, rc);
708
709 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
710 AssertRCReturn(rc, rc);
711
712#ifdef VBOX_WITH_NMI
713 /*
714 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
715 */
716 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
717 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
718 AssertRCReturn(rc, rc);
719#endif
720
721#ifdef VBOX_STRICT_VMM_STACK
722 /*
723 * Setup the stack guard pages: Two inaccessible pages at each sides of the
724 * stack to catch over/under-flows.
725 */
726 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
727 {
728 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
729
730 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
731 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
732
733 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
734 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
735 }
736 pVM->vmm.s.fStackGuardsStationed = true;
737#endif
738 break;
739 }
740
741 case VMINITCOMPLETED_HM:
742 {
743 /*
744 * Disable the periodic preemption timers if we can use the
745 * VMX-preemption timer instead.
746 */
747 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
748 && HMR3IsVmxPreemptionTimerUsed(pVM))
749 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
750 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
751
752 /*
753 * Last chance for GIM to update its CPUID leaves if it requires
754 * knowledge/information from HM initialization.
755 */
756 rc = GIMR3InitCompleted(pVM);
757 AssertRCReturn(rc, rc);
758
759 /*
760 * CPUM's post-initialization (print CPUIDs).
761 */
762 CPUMR3LogCpuIds(pVM);
763 break;
764 }
765
766 default: /* shuts up gcc */
767 break;
768 }
769
770 return rc;
771}
772
773
774/**
775 * Terminate the VMM bits.
776 *
777 * @returns VBox status code.
778 * @param pVM The cross context VM structure.
779 */
780VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
781{
782 PVMCPU pVCpu = VMMGetCpu(pVM);
783 Assert(pVCpu && pVCpu->idCpu == 0);
784
785 /*
786 * Call Ring-0 entry with termination code.
787 */
788 int rc;
789 for (;;)
790 {
791#ifdef NO_SUPCALLR0VMM
792 //rc = VERR_GENERAL_FAILURE;
793 rc = VINF_SUCCESS;
794#else
795 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
796#endif
797 /*
798 * Flush the logs.
799 */
800#ifdef LOG_ENABLED
801 if ( pVCpu->vmm.s.pR0LoggerR3
802 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
803 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
804#endif
805 if (rc != VINF_VMM_CALL_HOST)
806 break;
807 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
808 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
809 break;
810 /* Resume R0 */
811 }
812 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
813 {
814 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
815 if (RT_SUCCESS(rc))
816 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
817 }
818
819 for (VMCPUID i = 0; i < pVM->cCpus; i++)
820 {
821 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
822 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
823 }
824 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
825 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
826 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
827 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
828 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
829 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
830 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
831 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
832 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
833 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
834 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
835 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
836 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
837 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
838 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
839 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
840
841#ifdef VBOX_STRICT_VMM_STACK
842 /*
843 * Make the two stack guard pages present again.
844 */
845 if (pVM->vmm.s.fStackGuardsStationed)
846 {
847 for (VMCPUID i = 0; i < pVM->cCpus; i++)
848 {
849 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
850 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
851 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
852 }
853 pVM->vmm.s.fStackGuardsStationed = false;
854 }
855#endif
856
857 vmmTermFormatTypes();
858 return rc;
859}
860
861
862/**
863 * Applies relocations to data and code managed by this
864 * component. This function will be called at init and
865 * whenever the VMM need to relocate it self inside the GC.
866 *
867 * The VMM will need to apply relocations to the core code.
868 *
869 * @param pVM The cross context VM structure.
870 * @param offDelta The relocation delta.
871 */
872VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
873{
874 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
875
876 /*
877 * Recalc the RC address.
878 */
879#ifdef VBOX_WITH_RAW_MODE
880 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
881#endif
882
883 /*
884 * The stack.
885 */
886 for (VMCPUID i = 0; i < pVM->cCpus; i++)
887 {
888 PVMCPU pVCpu = &pVM->aCpus[i];
889
890 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
891
892 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
893 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
894 }
895
896 /*
897 * All the switchers.
898 */
899 vmmR3SwitcherRelocate(pVM, offDelta);
900
901 /*
902 * Get other RC entry points.
903 */
904 if (!HMIsEnabled(pVM))
905 {
906 int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
907 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
908
909 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
910 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
911 }
912
913 /*
914 * Update the logger.
915 */
916 VMMR3UpdateLoggers(pVM);
917}
918
919
920/**
921 * Updates the settings for the RC and R0 loggers.
922 *
923 * @returns VBox status code.
924 * @param pVM The cross context VM structure.
925 */
926VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
927{
928 /*
929 * Simply clone the logger instance (for RC).
930 */
931 int rc = VINF_SUCCESS;
932 RTRCPTR RCPtrLoggerFlush = 0;
933
934 if ( pVM->vmm.s.pRCLoggerR3
935#ifdef VBOX_WITH_RC_RELEASE_LOGGING
936 || pVM->vmm.s.pRCRelLoggerR3
937#endif
938 )
939 {
940 Assert(!HMIsEnabled(pVM));
941 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
942 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
943 }
944
945 if (pVM->vmm.s.pRCLoggerR3)
946 {
947 Assert(!HMIsEnabled(pVM));
948 RTRCPTR RCPtrLoggerWrapper = 0;
949 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
950 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
951
952 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
953 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
954 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
955 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
956 }
957
958#ifdef VBOX_WITH_RC_RELEASE_LOGGING
959 if (pVM->vmm.s.pRCRelLoggerR3)
960 {
961 Assert(!HMIsEnabled(pVM));
962 RTRCPTR RCPtrLoggerWrapper = 0;
963 rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
964 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
965
966 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
967 rc = RTLogCloneRC(RTLogRelGetDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
968 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
969 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
970 }
971#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
972
973#ifdef LOG_ENABLED
974 /*
975 * For the ring-0 EMT logger, we use a per-thread logger instance
976 * in ring-0. Only initialize it once.
977 */
978 PRTLOGGER const pDefault = RTLogDefaultInstance();
979 for (VMCPUID i = 0; i < pVM->cCpus; i++)
980 {
981 PVMCPU pVCpu = &pVM->aCpus[i];
982 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
983 if (pR0LoggerR3)
984 {
985 if (!pR0LoggerR3->fCreated)
986 {
987 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
988 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
989 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
990
991 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
992 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
993 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
994
995 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
996 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
997 pfnLoggerWrapper, pfnLoggerFlush,
998 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
999 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
1000
1001 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
1002 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
1003 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
1004 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
1005 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1006 pfnLoggerPrefix, NIL_RTR0PTR);
1007 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
1008
1009 pR0LoggerR3->idCpu = i;
1010 pR0LoggerR3->fCreated = true;
1011 pR0LoggerR3->fFlushingDisabled = false;
1012
1013 }
1014
1015 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1016 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
1017 AssertRC(rc);
1018 }
1019 }
1020#endif
1021 return rc;
1022}
1023
1024
1025/**
1026 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
1027 *
1028 * @returns Pointer to the buffer.
1029 * @param pVM The cross context VM structure.
1030 */
1031VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1032{
1033 if (HMIsEnabled(pVM))
1034 return pVM->vmm.s.szRing0AssertMsg1;
1035
1036 RTRCPTR RCPtr;
1037 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
1038 if (RT_SUCCESS(rc))
1039 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1040
1041 return NULL;
1042}
1043
1044
1045/**
1046 * Returns the VMCPU of the specified virtual CPU.
1047 *
1048 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1049 *
1050 * @param pUVM The user mode VM handle.
1051 * @param idCpu The ID of the virtual CPU.
1052 */
1053VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1054{
1055 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1056 AssertReturn(idCpu < pUVM->cCpus, NULL);
1057 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1058 return &pUVM->pVM->aCpus[idCpu];
1059}
1060
1061
1062/**
1063 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1064 *
1065 * @returns Pointer to the buffer.
1066 * @param pVM The cross context VM structure.
1067 */
1068VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1069{
1070 if (HMIsEnabled(pVM))
1071 return pVM->vmm.s.szRing0AssertMsg2;
1072
1073 RTRCPTR RCPtr;
1074 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1075 if (RT_SUCCESS(rc))
1076 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1077
1078 return NULL;
1079}
1080
1081
1082/**
1083 * Execute state save operation.
1084 *
1085 * @returns VBox status code.
1086 * @param pVM The cross context VM structure.
1087 * @param pSSM SSM operation handle.
1088 */
1089static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1090{
1091 LogFlow(("vmmR3Save:\n"));
1092
1093 /*
1094 * Save the started/stopped state of all CPUs except 0 as it will always
1095 * be running. This avoids breaking the saved state version. :-)
1096 */
1097 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1098 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1099
1100 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1101}
1102
1103
1104/**
1105 * Execute state load operation.
1106 *
1107 * @returns VBox status code.
1108 * @param pVM The cross context VM structure.
1109 * @param pSSM SSM operation handle.
1110 * @param uVersion Data layout version.
1111 * @param uPass The data pass.
1112 */
1113static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1114{
1115 LogFlow(("vmmR3Load:\n"));
1116 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1117
1118 /*
1119 * Validate version.
1120 */
1121 if ( uVersion != VMM_SAVED_STATE_VERSION
1122 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1123 {
1124 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1125 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1126 }
1127
1128 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1129 {
1130 /* Ignore the stack bottom, stack pointer and stack bits. */
1131 RTRCPTR RCPtrIgnored;
1132 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1133 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1134#ifdef RT_OS_DARWIN
1135 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1136 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1137 && SSMR3HandleRevision(pSSM) >= 48858
1138 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1139 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1140 )
1141 SSMR3Skip(pSSM, 16384);
1142 else
1143 SSMR3Skip(pSSM, 8192);
1144#else
1145 SSMR3Skip(pSSM, 8192);
1146#endif
1147 }
1148
1149 /*
1150 * Restore the VMCPU states. VCPU 0 is always started.
1151 */
1152 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1153 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1154 {
1155 bool fStarted;
1156 int rc = SSMR3GetBool(pSSM, &fStarted);
1157 if (RT_FAILURE(rc))
1158 return rc;
1159 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1160 }
1161
1162 /* terminator */
1163 uint32_t u32;
1164 int rc = SSMR3GetU32(pSSM, &u32);
1165 if (RT_FAILURE(rc))
1166 return rc;
1167 if (u32 != UINT32_MAX)
1168 {
1169 AssertMsgFailed(("u32=%#x\n", u32));
1170 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1171 }
1172 return VINF_SUCCESS;
1173}
1174
1175
1176#ifdef VBOX_WITH_RAW_MODE
1177/**
1178 * Resolve a builtin RC symbol.
1179 *
1180 * Called by PDM when loading or relocating RC modules.
1181 *
1182 * @returns VBox status
1183 * @param pVM The cross context VM structure.
1184 * @param pszSymbol Symbol to resolve.
1185 * @param pRCPtrValue Where to store the symbol value.
1186 *
1187 * @remark This has to work before VMMR3Relocate() is called.
1188 */
1189VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1190{
1191 if (!strcmp(pszSymbol, "g_Logger"))
1192 {
1193 if (pVM->vmm.s.pRCLoggerR3)
1194 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1195 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1196 }
1197 else if (!strcmp(pszSymbol, "g_RelLogger"))
1198 {
1199# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1200 if (pVM->vmm.s.pRCRelLoggerR3)
1201 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1202 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1203# else
1204 *pRCPtrValue = NIL_RTRCPTR;
1205# endif
1206 }
1207 else
1208 return VERR_SYMBOL_NOT_FOUND;
1209 return VINF_SUCCESS;
1210}
1211#endif /* VBOX_WITH_RAW_MODE */
1212
1213
1214/**
1215 * Suspends the CPU yielder.
1216 *
1217 * @param pVM The cross context VM structure.
1218 */
1219VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1220{
1221 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1222 if (!pVM->vmm.s.cYieldResumeMillies)
1223 {
1224 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1225 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1226 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1227 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1228 else
1229 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1230 TMTimerStop(pVM->vmm.s.pYieldTimer);
1231 }
1232 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1233}
1234
1235
1236/**
1237 * Stops the CPU yielder.
1238 *
1239 * @param pVM The cross context VM structure.
1240 */
1241VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1242{
1243 if (!pVM->vmm.s.cYieldResumeMillies)
1244 TMTimerStop(pVM->vmm.s.pYieldTimer);
1245 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1246 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1247}
1248
1249
1250/**
1251 * Resumes the CPU yielder when it has been a suspended or stopped.
1252 *
1253 * @param pVM The cross context VM structure.
1254 */
1255VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1256{
1257 if (pVM->vmm.s.cYieldResumeMillies)
1258 {
1259 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1260 pVM->vmm.s.cYieldResumeMillies = 0;
1261 }
1262}
1263
1264
1265/**
1266 * Internal timer callback function.
1267 *
1268 * @param pVM The cross context VM structure.
1269 * @param pTimer The timer handle.
1270 * @param pvUser User argument specified upon timer creation.
1271 */
1272static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1273{
1274 NOREF(pvUser);
1275
1276 /*
1277 * This really needs some careful tuning. While we shouldn't be too greedy since
1278 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1279 * because that'll cause us to stop up.
1280 *
1281 * The current logic is to use the default interval when there is no lag worth
1282 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1283 *
1284 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1285 * so the lag is up to date.)
1286 */
1287 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1288 if ( u64Lag < 50000000 /* 50ms */
1289 || ( u64Lag < 1000000000 /* 1s */
1290 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1291 )
1292 {
1293 uint64_t u64Elapsed = RTTimeNanoTS();
1294 pVM->vmm.s.u64LastYield = u64Elapsed;
1295
1296 RTThreadYield();
1297
1298#ifdef LOG_ENABLED
1299 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1300 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1301#endif
1302 }
1303 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1304}
1305
1306
1307#ifdef VBOX_WITH_RAW_MODE
1308/**
1309 * Executes guest code in the raw-mode context.
1310 *
1311 * @param pVM The cross context VM structure.
1312 * @param pVCpu The cross context virtual CPU structure.
1313 */
1314VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1315{
1316 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1317
1318 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1319
1320 /*
1321 * Set the hypervisor to resume executing a CPUM resume function
1322 * in CPUMRCA.asm.
1323 */
1324 CPUMSetHyperState(pVCpu,
1325 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1326 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1327 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1328 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1329 0, /* eax */
1330 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1331
1332 /*
1333 * We hide log flushes (outer) and hypervisor interrupts (inner).
1334 */
1335 for (;;)
1336 {
1337#ifdef VBOX_STRICT
1338 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1339 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1340 PGMMapCheck(pVM);
1341# ifdef VBOX_WITH_SAFE_STR
1342 SELMR3CheckShadowTR(pVM);
1343# endif
1344#endif
1345 int rc;
1346 do
1347 {
1348#ifdef NO_SUPCALLR0VMM
1349 rc = VERR_GENERAL_FAILURE;
1350#else
1351 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1352 if (RT_LIKELY(rc == VINF_SUCCESS))
1353 rc = pVCpu->vmm.s.iLastGZRc;
1354#endif
1355 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1356
1357 /*
1358 * Flush the logs.
1359 */
1360#ifdef LOG_ENABLED
1361 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1362 if ( pLogger
1363 && pLogger->offScratch > 0)
1364 RTLogFlushRC(NULL, pLogger);
1365#endif
1366#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1367 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1368 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1369 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1370#endif
1371 if (rc != VINF_VMM_CALL_HOST)
1372 {
1373 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1374 return rc;
1375 }
1376 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1377 if (RT_FAILURE(rc))
1378 return rc;
1379 /* Resume GC */
1380 }
1381}
1382#endif /* VBOX_WITH_RAW_MODE */
1383
1384
1385/**
1386 * Executes guest code (Intel VT-x and AMD-V).
1387 *
1388 * @param pVM The cross context VM structure.
1389 * @param pVCpu The cross context virtual CPU structure.
1390 */
1391VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1392{
1393 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1394
1395 for (;;)
1396 {
1397 int rc;
1398 do
1399 {
1400#ifdef NO_SUPCALLR0VMM
1401 rc = VERR_GENERAL_FAILURE;
1402#else
1403 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1404 if (RT_LIKELY(rc == VINF_SUCCESS))
1405 rc = pVCpu->vmm.s.iLastGZRc;
1406#endif
1407 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1408
1409#if 0 /* todo triggers too often */
1410 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1411#endif
1412
1413#ifdef LOG_ENABLED
1414 /*
1415 * Flush the log
1416 */
1417 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1418 if ( pR0LoggerR3
1419 && pR0LoggerR3->Logger.offScratch > 0)
1420 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1421#endif /* !LOG_ENABLED */
1422 if (rc != VINF_VMM_CALL_HOST)
1423 {
1424 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1425 return rc;
1426 }
1427 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1428 if (RT_FAILURE(rc))
1429 return rc;
1430 /* Resume R0 */
1431 }
1432}
1433
1434
1435/**
1436 * VCPU worker for VMMSendStartupIpi.
1437 *
1438 * @param pVM The cross context VM structure.
1439 * @param idCpu Virtual CPU to perform SIPI on.
1440 * @param uVector The SIPI vector.
1441 */
1442static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1443{
1444 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1445 VMCPU_ASSERT_EMT(pVCpu);
1446
1447 /*
1448 * Active, halt and shutdown states of the processor all block SIPIs.
1449 * So we can safely discard the SIPI. See Intel spec. 26.6.2 "Activity State".
1450 */
1451 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1452 return VERR_ACCESS_DENIED;
1453
1454
1455 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1456
1457 pCtx->cs.Sel = uVector << 8;
1458 pCtx->cs.ValidSel = uVector << 8;
1459 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1460 pCtx->cs.u64Base = uVector << 12;
1461 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1462 pCtx->rip = 0;
1463
1464 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1465
1466# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1467 EMSetState(pVCpu, EMSTATE_HALTED);
1468 return VINF_EM_RESCHEDULE;
1469# else /* And if we go the VMCPU::enmState way it can stay here. */
1470 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1471 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1472 return VINF_SUCCESS;
1473# endif
1474}
1475
1476
1477static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1478{
1479 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1480 VMCPU_ASSERT_EMT(pVCpu);
1481
1482 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1483
1484 PGMR3ResetCpu(pVM, pVCpu);
1485 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1486#ifdef VBOX_WITH_NEW_APIC
1487 APICR3InitIpi(pVCpu);
1488#endif
1489 TRPMR3ResetCpu(pVCpu);
1490 CPUMR3ResetCpu(pVM, pVCpu);
1491 EMR3ResetCpu(pVCpu);
1492 HMR3ResetCpu(pVCpu);
1493
1494 /* This will trickle up on the target EMT. */
1495 return VINF_EM_WAIT_SIPI;
1496}
1497
1498
1499/**
1500 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1501 * vector-dependent state and unhalting processor.
1502 *
1503 * @param pVM The cross context VM structure.
1504 * @param idCpu Virtual CPU to perform SIPI on.
1505 * @param uVector SIPI vector.
1506 */
1507VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1508{
1509 AssertReturnVoid(idCpu < pVM->cCpus);
1510
1511 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1512 AssertRC(rc);
1513}
1514
1515
1516/**
1517 * Sends init IPI to the virtual CPU.
1518 *
1519 * @param pVM The cross context VM structure.
1520 * @param idCpu Virtual CPU to perform int IPI on.
1521 */
1522VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1523{
1524 AssertReturnVoid(idCpu < pVM->cCpus);
1525
1526 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1527 AssertRC(rc);
1528}
1529
1530
1531/**
1532 * Registers the guest memory range that can be used for patching.
1533 *
1534 * @returns VBox status code.
1535 * @param pVM The cross context VM structure.
1536 * @param pPatchMem Patch memory range.
1537 * @param cbPatchMem Size of the memory range.
1538 */
1539VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1540{
1541 VM_ASSERT_EMT(pVM);
1542 if (HMIsEnabled(pVM))
1543 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1544
1545 return VERR_NOT_SUPPORTED;
1546}
1547
1548
1549/**
1550 * Deregisters the guest memory range that can be used for patching.
1551 *
1552 * @returns VBox status code.
1553 * @param pVM The cross context VM structure.
1554 * @param pPatchMem Patch memory range.
1555 * @param cbPatchMem Size of the memory range.
1556 */
1557VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1558{
1559 if (HMIsEnabled(pVM))
1560 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1561
1562 return VINF_SUCCESS;
1563}
1564
1565
1566/**
1567 * Common recursion handler for the other EMTs.
1568 *
1569 * @returns Strict VBox status code.
1570 * @param pVM The cross context VM structure.
1571 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1572 * @param rcStrict Current status code to be combined with the one
1573 * from this recursion and returned.
1574 */
1575static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1576{
1577 int rc2;
1578
1579 /*
1580 * We wait here while the initiator of this recursion reconfigures
1581 * everything. The last EMT to get in signals the initiator.
1582 */
1583 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1584 {
1585 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1586 AssertLogRelRC(rc2);
1587 }
1588
1589 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1590 AssertLogRelRC(rc2);
1591
1592 /*
1593 * Do the normal rendezvous processing.
1594 */
1595 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1596 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1597
1598 /*
1599 * Wait for the initiator to restore everything.
1600 */
1601 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1602 AssertLogRelRC(rc2);
1603
1604 /*
1605 * Last thread out of here signals the initiator.
1606 */
1607 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1608 {
1609 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1610 AssertLogRelRC(rc2);
1611 }
1612
1613 /*
1614 * Merge status codes and return.
1615 */
1616 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1617 if ( rcStrict2 != VINF_SUCCESS
1618 && ( rcStrict == VINF_SUCCESS
1619 || rcStrict > rcStrict2))
1620 rcStrict = rcStrict2;
1621 return rcStrict;
1622}
1623
1624
1625/**
1626 * Count returns and have the last non-caller EMT wake up the caller.
1627 *
1628 * @returns VBox strict informational status code for EM scheduling. No failures
1629 * will be returned here, those are for the caller only.
1630 *
1631 * @param pVM The cross context VM structure.
1632 * @param rcStrict The current accumulated recursive status code,
1633 * to be merged with i32RendezvousStatus and
1634 * returned.
1635 */
1636DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1637{
1638 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1639
1640 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1641 if (cReturned == pVM->cCpus - 1U)
1642 {
1643 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1644 AssertLogRelRC(rc);
1645 }
1646
1647 /*
1648 * Merge the status codes, ignoring error statuses in this code path.
1649 */
1650 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1651 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1652 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1653 VERR_IPE_UNEXPECTED_INFO_STATUS);
1654
1655 if (RT_SUCCESS(rcStrict2))
1656 {
1657 if ( rcStrict2 != VINF_SUCCESS
1658 && ( rcStrict == VINF_SUCCESS
1659 || rcStrict > rcStrict2))
1660 rcStrict = rcStrict2;
1661 }
1662 return rcStrict;
1663}
1664
1665
1666/**
1667 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1668 *
1669 * @returns VBox strict informational status code for EM scheduling. No failures
1670 * will be returned here, those are for the caller only. When
1671 * fIsCaller is set, VINF_SUCCESS is always returned.
1672 *
1673 * @param pVM The cross context VM structure.
1674 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1675 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1676 * not.
1677 * @param fFlags The flags.
1678 * @param pfnRendezvous The callback.
1679 * @param pvUser The user argument for the callback.
1680 */
1681static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1682 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1683{
1684 int rc;
1685 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1686
1687 /*
1688 * Enter, the last EMT triggers the next callback phase.
1689 */
1690 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1691 if (cEntered != pVM->cCpus)
1692 {
1693 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1694 {
1695 /* Wait for our turn. */
1696 for (;;)
1697 {
1698 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1699 AssertLogRelRC(rc);
1700 if (!pVM->vmm.s.fRendezvousRecursion)
1701 break;
1702 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1703 }
1704 }
1705 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1706 {
1707 /* Wait for the last EMT to arrive and wake everyone up. */
1708 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1709 AssertLogRelRC(rc);
1710 Assert(!pVM->vmm.s.fRendezvousRecursion);
1711 }
1712 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1713 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1714 {
1715 /* Wait for our turn. */
1716 for (;;)
1717 {
1718 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1719 AssertLogRelRC(rc);
1720 if (!pVM->vmm.s.fRendezvousRecursion)
1721 break;
1722 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1723 }
1724 }
1725 else
1726 {
1727 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1728
1729 /*
1730 * The execute once is handled specially to optimize the code flow.
1731 *
1732 * The last EMT to arrive will perform the callback and the other
1733 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1734 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1735 * returns, that EMT will initiate the normal return sequence.
1736 */
1737 if (!fIsCaller)
1738 {
1739 for (;;)
1740 {
1741 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1742 AssertLogRelRC(rc);
1743 if (!pVM->vmm.s.fRendezvousRecursion)
1744 break;
1745 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1746 }
1747
1748 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1749 }
1750 return VINF_SUCCESS;
1751 }
1752 }
1753 else
1754 {
1755 /*
1756 * All EMTs are waiting, clear the FF and take action according to the
1757 * execution method.
1758 */
1759 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1760
1761 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1762 {
1763 /* Wake up everyone. */
1764 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1765 AssertLogRelRC(rc);
1766 }
1767 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1768 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1769 {
1770 /* Figure out who to wake up and wake it up. If it's ourself, then
1771 it's easy otherwise wait for our turn. */
1772 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1773 ? 0
1774 : pVM->cCpus - 1U;
1775 if (pVCpu->idCpu != iFirst)
1776 {
1777 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1778 AssertLogRelRC(rc);
1779 for (;;)
1780 {
1781 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1782 AssertLogRelRC(rc);
1783 if (!pVM->vmm.s.fRendezvousRecursion)
1784 break;
1785 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1786 }
1787 }
1788 }
1789 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1790 }
1791
1792
1793 /*
1794 * Do the callback and update the status if necessary.
1795 */
1796 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1797 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1798 {
1799 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1800 if (rcStrict2 != VINF_SUCCESS)
1801 {
1802 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1803 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1804 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1805 int32_t i32RendezvousStatus;
1806 do
1807 {
1808 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1809 if ( rcStrict2 == i32RendezvousStatus
1810 || RT_FAILURE(i32RendezvousStatus)
1811 || ( i32RendezvousStatus != VINF_SUCCESS
1812 && rcStrict2 > i32RendezvousStatus))
1813 break;
1814 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1815 }
1816 }
1817
1818 /*
1819 * Increment the done counter and take action depending on whether we're
1820 * the last to finish callback execution.
1821 */
1822 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1823 if ( cDone != pVM->cCpus
1824 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1825 {
1826 /* Signal the next EMT? */
1827 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1828 {
1829 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1830 AssertLogRelRC(rc);
1831 }
1832 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1833 {
1834 Assert(cDone == pVCpu->idCpu + 1U);
1835 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1836 AssertLogRelRC(rc);
1837 }
1838 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1839 {
1840 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1841 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1842 AssertLogRelRC(rc);
1843 }
1844
1845 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1846 if (!fIsCaller)
1847 {
1848 for (;;)
1849 {
1850 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1851 AssertLogRelRC(rc);
1852 if (!pVM->vmm.s.fRendezvousRecursion)
1853 break;
1854 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1855 }
1856 }
1857 }
1858 else
1859 {
1860 /* Callback execution is all done, tell the rest to return. */
1861 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1862 AssertLogRelRC(rc);
1863 }
1864
1865 if (!fIsCaller)
1866 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1867 return rcStrictRecursion;
1868}
1869
1870
1871/**
1872 * Called in response to VM_FF_EMT_RENDEZVOUS.
1873 *
1874 * @returns VBox strict status code - EM scheduling. No errors will be returned
1875 * here, nor will any non-EM scheduling status codes be returned.
1876 *
1877 * @param pVM The cross context VM structure.
1878 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1879 *
1880 * @thread EMT
1881 */
1882VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1883{
1884 Assert(!pVCpu->vmm.s.fInRendezvous);
1885 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1886 pVCpu->vmm.s.fInRendezvous = true;
1887 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1888 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1889 pVCpu->vmm.s.fInRendezvous = false;
1890 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1891 return VBOXSTRICTRC_TODO(rcStrict);
1892}
1893
1894
1895/**
1896 * Helper for resetting an single wakeup event sempahore.
1897 *
1898 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1899 * @param hEvt The event semaphore to reset.
1900 */
1901static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1902{
1903 for (uint32_t cLoops = 0; ; cLoops++)
1904 {
1905 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1906 if (rc != VINF_SUCCESS || cLoops > _4K)
1907 return rc;
1908 }
1909}
1910
1911
1912/**
1913 * Worker for VMMR3EmtRendezvous that handles recursion.
1914 *
1915 * @returns VBox strict status code. This will be the first error,
1916 * VINF_SUCCESS, or an EM scheduling status code.
1917 *
1918 * @param pVM The cross context VM structure.
1919 * @param pVCpu The cross context virtual CPU structure of the
1920 * calling EMT.
1921 * @param fFlags Flags indicating execution methods. See
1922 * grp_VMMR3EmtRendezvous_fFlags.
1923 * @param pfnRendezvous The callback.
1924 * @param pvUser User argument for the callback.
1925 *
1926 * @thread EMT(pVCpu)
1927 */
1928static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1929 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1930{
1931 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1932 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1933 Assert(pVCpu->vmm.s.fInRendezvous);
1934
1935 /*
1936 * Save the current state.
1937 */
1938 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1939 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1940 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1941 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1942 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1943
1944 /*
1945 * Check preconditions and save the current state.
1946 */
1947 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1948 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1949 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1950 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1951 VERR_INTERNAL_ERROR);
1952 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1953 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1954
1955 /*
1956 * Reset the recursion prep and pop semaphores.
1957 */
1958 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1959 AssertLogRelRCReturn(rc, rc);
1960 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1961 AssertLogRelRCReturn(rc, rc);
1962 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1963 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1964 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1965 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1966
1967 /*
1968 * Usher the other thread into the recursion routine.
1969 */
1970 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1971 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1972
1973 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1974 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1975 while (cLeft-- > 0)
1976 {
1977 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1978 AssertLogRelRC(rc);
1979 }
1980 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1981 {
1982 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1983 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1984 {
1985 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1986 AssertLogRelRC(rc);
1987 }
1988 }
1989 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1990 {
1991 Assert(cLeft == pVCpu->idCpu);
1992 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1993 {
1994 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1995 AssertLogRelRC(rc);
1996 }
1997 }
1998 else
1999 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2000 VERR_INTERNAL_ERROR_4);
2001
2002 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
2003 AssertLogRelRC(rc);
2004 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
2005 AssertLogRelRC(rc);
2006
2007
2008 /*
2009 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
2010 */
2011 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2012 {
2013 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2014 AssertLogRelRC(rc);
2015 }
2016
2017 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2018
2019 /*
2020 * Clear the slate and setup the new rendezvous.
2021 */
2022 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2023 {
2024 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2025 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2026 }
2027 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2028 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2029 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2030 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2031
2032 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2033 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2034 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2035 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2036 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2037 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2038 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2039 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2040
2041 /*
2042 * We're ready to go now, do normal rendezvous processing.
2043 */
2044 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2045 AssertLogRelRC(rc);
2046
2047 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
2048
2049 /*
2050 * The caller waits for the other EMTs to be done, return and waiting on the
2051 * pop semaphore.
2052 */
2053 for (;;)
2054 {
2055 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2056 AssertLogRelRC(rc);
2057 if (!pVM->vmm.s.fRendezvousRecursion)
2058 break;
2059 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2060 }
2061
2062 /*
2063 * Get the return code and merge it with the above recursion status.
2064 */
2065 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2066 if ( rcStrict2 != VINF_SUCCESS
2067 && ( rcStrict == VINF_SUCCESS
2068 || rcStrict > rcStrict2))
2069 rcStrict = rcStrict2;
2070
2071 /*
2072 * Restore the parent rendezvous state.
2073 */
2074 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2075 {
2076 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2077 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2078 }
2079 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2080 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2081 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2082 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2083
2084 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2085 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2086 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2087 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2088 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2089 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2090 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
2091
2092 /*
2093 * Usher the other EMTs back to their parent recursion routine, waiting
2094 * for them to all get there before we return (makes sure they've been
2095 * scheduled and are past the pop event sem, see below).
2096 */
2097 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2098 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2099 AssertLogRelRC(rc);
2100
2101 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2102 {
2103 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2104 AssertLogRelRC(rc);
2105 }
2106
2107 /*
2108 * We must reset the pop semaphore on the way out (doing the pop caller too,
2109 * just in case). The parent may be another recursion.
2110 */
2111 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2112 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2113
2114 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2115
2116 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2117 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2118 return rcStrict;
2119}
2120
2121
2122/**
2123 * EMT rendezvous.
2124 *
2125 * Gathers all the EMTs and execute some code on each of them, either in a one
2126 * by one fashion or all at once.
2127 *
2128 * @returns VBox strict status code. This will be the first error,
2129 * VINF_SUCCESS, or an EM scheduling status code.
2130 *
2131 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2132 * doesn't support it or if the recursion is too deep.
2133 *
2134 * @param pVM The cross context VM structure.
2135 * @param fFlags Flags indicating execution methods. See
2136 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2137 * descending and ascending rendezvous types support
2138 * recursion from inside @a pfnRendezvous.
2139 * @param pfnRendezvous The callback.
2140 * @param pvUser User argument for the callback.
2141 *
2142 * @thread Any.
2143 */
2144VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2145{
2146 /*
2147 * Validate input.
2148 */
2149 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2150 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2151 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2152 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2153 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2154 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2155 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2156 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2157
2158 VBOXSTRICTRC rcStrict;
2159 PVMCPU pVCpu = VMMGetCpu(pVM);
2160 if (!pVCpu)
2161 /*
2162 * Forward the request to an EMT thread.
2163 */
2164 {
2165 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2166 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2167 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2168 else
2169 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2170 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2171 }
2172 else if (pVM->cCpus == 1)
2173 {
2174 /*
2175 * Shortcut for the single EMT case.
2176 */
2177 if (!pVCpu->vmm.s.fInRendezvous)
2178 {
2179 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2180 pVCpu->vmm.s.fInRendezvous = true;
2181 pVM->vmm.s.fRendezvousFlags = fFlags;
2182 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2183 pVCpu->vmm.s.fInRendezvous = false;
2184 }
2185 else
2186 {
2187 /* Recursion. Do the same checks as in the SMP case. */
2188 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2189 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2190 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2191 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2192 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2193 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2194 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2195 , VERR_DEADLOCK);
2196
2197 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2198 pVM->vmm.s.cRendezvousRecursions++;
2199 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2200 pVM->vmm.s.fRendezvousFlags = fFlags;
2201
2202 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2203
2204 pVM->vmm.s.fRendezvousFlags = fParentFlags;
2205 pVM->vmm.s.cRendezvousRecursions--;
2206 }
2207 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2208 }
2209 else
2210 {
2211 /*
2212 * Spin lock. If busy, check for recursion, if not recursing wait for
2213 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2214 */
2215 int rc;
2216 rcStrict = VINF_SUCCESS;
2217 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2218 {
2219 /* Allow recursion in some cases. */
2220 if ( pVCpu->vmm.s.fInRendezvous
2221 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2222 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2223 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2224 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2225 ))
2226 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2227
2228 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2229 VERR_DEADLOCK);
2230
2231 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2232 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2233 {
2234 if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
2235 {
2236 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2237 if ( rc != VINF_SUCCESS
2238 && ( rcStrict == VINF_SUCCESS
2239 || rcStrict > rc))
2240 rcStrict = rc;
2241 /** @todo Perhaps deal with termination here? */
2242 }
2243 ASMNopPause();
2244 }
2245 }
2246
2247 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2248 Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
2249 Assert(!pVCpu->vmm.s.fInRendezvous);
2250 pVCpu->vmm.s.fInRendezvous = true;
2251
2252 /*
2253 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2254 */
2255 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2256 {
2257 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2258 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2259 }
2260 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2261 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2262 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2263 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2264 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2265 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2266 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2267 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2268 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2269 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2270 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2271
2272 /*
2273 * Set the FF and poke the other EMTs.
2274 */
2275 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2276 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2277
2278 /*
2279 * Do the same ourselves.
2280 */
2281 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2282
2283 /*
2284 * The caller waits for the other EMTs to be done and return before doing
2285 * the cleanup. This makes away with wakeup / reset races we would otherwise
2286 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2287 */
2288 for (;;)
2289 {
2290 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2291 AssertLogRelRC(rc);
2292 if (!pVM->vmm.s.fRendezvousRecursion)
2293 break;
2294 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2295 }
2296
2297 /*
2298 * Get the return code and clean up a little bit.
2299 */
2300 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2301 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2302
2303 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2304 pVCpu->vmm.s.fInRendezvous = false;
2305
2306 /*
2307 * Merge rcStrict, rcStrict2 and rcStrict3.
2308 */
2309 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2310 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2311 if ( rcStrict2 != VINF_SUCCESS
2312 && ( rcStrict == VINF_SUCCESS
2313 || rcStrict > rcStrict2))
2314 rcStrict = rcStrict2;
2315 if ( rcStrict3 != VINF_SUCCESS
2316 && ( rcStrict == VINF_SUCCESS
2317 || rcStrict > rcStrict3))
2318 rcStrict = rcStrict3;
2319 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2320 }
2321
2322 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2323 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2324 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2325 VERR_IPE_UNEXPECTED_INFO_STATUS);
2326 return VBOXSTRICTRC_VAL(rcStrict);
2327}
2328
2329
2330/**
2331 * Read from the ring 0 jump buffer stack
2332 *
2333 * @returns VBox status code.
2334 *
2335 * @param pVM The cross context VM structure.
2336 * @param idCpu The ID of the source CPU context (for the address).
2337 * @param R0Addr Where to start reading.
2338 * @param pvBuf Where to store the data we've read.
2339 * @param cbRead The number of bytes to read.
2340 */
2341VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2342{
2343 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2344 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2345
2346#ifdef VMM_R0_SWITCH_STACK
2347 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2348#else
2349 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2350#endif
2351 if ( off > VMM_STACK_SIZE
2352 || off + cbRead >= VMM_STACK_SIZE)
2353 return VERR_INVALID_POINTER;
2354
2355 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2356 return VINF_SUCCESS;
2357}
2358
2359#ifdef VBOX_WITH_RAW_MODE
2360
2361/**
2362 * Calls a RC function.
2363 *
2364 * @param pVM The cross context VM structure.
2365 * @param RCPtrEntry The address of the RC function.
2366 * @param cArgs The number of arguments in the ....
2367 * @param ... Arguments to the function.
2368 */
2369VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2370{
2371 va_list args;
2372 va_start(args, cArgs);
2373 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2374 va_end(args);
2375 return rc;
2376}
2377
2378
2379/**
2380 * Calls a RC function.
2381 *
2382 * @param pVM The cross context VM structure.
2383 * @param RCPtrEntry The address of the RC function.
2384 * @param cArgs The number of arguments in the ....
2385 * @param args Arguments to the function.
2386 */
2387VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2388{
2389 /* Raw mode implies 1 VCPU. */
2390 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2391 PVMCPU pVCpu = &pVM->aCpus[0];
2392
2393 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2394
2395 /*
2396 * Setup the call frame using the trampoline.
2397 */
2398 CPUMSetHyperState(pVCpu,
2399 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2400 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2401 RCPtrEntry, /* eax */
2402 cArgs /* edx */
2403 );
2404
2405#if 0
2406 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2407#endif
2408 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2409 int i = cArgs;
2410 while (i-- > 0)
2411 *pFrame++ = va_arg(args, RTGCUINTPTR32);
2412
2413 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2414 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2415
2416 /*
2417 * We hide log flushes (outer) and hypervisor interrupts (inner).
2418 */
2419 for (;;)
2420 {
2421 int rc;
2422 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2423 do
2424 {
2425#ifdef NO_SUPCALLR0VMM
2426 rc = VERR_GENERAL_FAILURE;
2427#else
2428 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2429 if (RT_LIKELY(rc == VINF_SUCCESS))
2430 rc = pVCpu->vmm.s.iLastGZRc;
2431#endif
2432 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2433
2434 /*
2435 * Flush the loggers.
2436 */
2437#ifdef LOG_ENABLED
2438 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2439 if ( pLogger
2440 && pLogger->offScratch > 0)
2441 RTLogFlushRC(NULL, pLogger);
2442#endif
2443#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2444 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2445 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2446 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2447#endif
2448 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2449 VMMR3FatalDump(pVM, pVCpu, rc);
2450 if (rc != VINF_VMM_CALL_HOST)
2451 {
2452 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2453 return rc;
2454 }
2455 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2456 if (RT_FAILURE(rc))
2457 return rc;
2458 }
2459}
2460
2461#endif /* VBOX_WITH_RAW_MODE */
2462
2463/**
2464 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2465 *
2466 * @returns VBox status code.
2467 * @param pVM The cross context VM structure.
2468 * @param uOperation Operation to execute.
2469 * @param u64Arg Constant argument.
2470 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2471 * details.
2472 */
2473VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2474{
2475 PVMCPU pVCpu = VMMGetCpu(pVM);
2476 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2477
2478 /*
2479 * Call Ring-0 entry with init code.
2480 */
2481 int rc;
2482 for (;;)
2483 {
2484#ifdef NO_SUPCALLR0VMM
2485 rc = VERR_GENERAL_FAILURE;
2486#else
2487 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2488#endif
2489 /*
2490 * Flush the logs.
2491 */
2492#ifdef LOG_ENABLED
2493 if ( pVCpu->vmm.s.pR0LoggerR3
2494 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2495 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2496#endif
2497 if (rc != VINF_VMM_CALL_HOST)
2498 break;
2499 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2500 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2501 break;
2502 /* Resume R0 */
2503 }
2504
2505 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2506 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
2507 VERR_IPE_UNEXPECTED_INFO_STATUS);
2508 return rc;
2509}
2510
2511
2512#ifdef VBOX_WITH_RAW_MODE
2513/**
2514 * Resumes executing hypervisor code when interrupted by a queue flush or a
2515 * debug event.
2516 *
2517 * @returns VBox status code.
2518 * @param pVM The cross context VM structure.
2519 * @param pVCpu The cross context virtual CPU structure.
2520 */
2521VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2522{
2523 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2524 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2525
2526 /*
2527 * We hide log flushes (outer) and hypervisor interrupts (inner).
2528 */
2529 for (;;)
2530 {
2531 int rc;
2532 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2533 do
2534 {
2535# ifdef NO_SUPCALLR0VMM
2536 rc = VERR_GENERAL_FAILURE;
2537# else
2538 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2539 if (RT_LIKELY(rc == VINF_SUCCESS))
2540 rc = pVCpu->vmm.s.iLastGZRc;
2541# endif
2542 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2543
2544 /*
2545 * Flush the loggers.
2546 */
2547# ifdef LOG_ENABLED
2548 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2549 if ( pLogger
2550 && pLogger->offScratch > 0)
2551 RTLogFlushRC(NULL, pLogger);
2552# endif
2553# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2554 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2555 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2556 RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2557# endif
2558 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2559 VMMR3FatalDump(pVM, pVCpu, rc);
2560 if (rc != VINF_VMM_CALL_HOST)
2561 {
2562 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2563 return rc;
2564 }
2565 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2566 if (RT_FAILURE(rc))
2567 return rc;
2568 }
2569}
2570#endif /* VBOX_WITH_RAW_MODE */
2571
2572
2573/**
2574 * Service a call to the ring-3 host code.
2575 *
2576 * @returns VBox status code.
2577 * @param pVM The cross context VM structure.
2578 * @param pVCpu The cross context virtual CPU structure.
2579 * @remarks Careful with critsects.
2580 */
2581static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2582{
2583 /*
2584 * We must also check for pending critsect exits or else we can deadlock
2585 * when entering other critsects here.
2586 */
2587 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2588 PDMCritSectBothFF(pVCpu);
2589
2590 switch (pVCpu->vmm.s.enmCallRing3Operation)
2591 {
2592 /*
2593 * Acquire a critical section.
2594 */
2595 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2596 {
2597 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2598 true /*fCallRing3*/);
2599 break;
2600 }
2601
2602 /*
2603 * Enter a r/w critical section exclusively.
2604 */
2605 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2606 {
2607 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2608 true /*fCallRing3*/);
2609 break;
2610 }
2611
2612 /*
2613 * Enter a r/w critical section shared.
2614 */
2615 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2616 {
2617 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2618 true /*fCallRing3*/);
2619 break;
2620 }
2621
2622 /*
2623 * Acquire the PDM lock.
2624 */
2625 case VMMCALLRING3_PDM_LOCK:
2626 {
2627 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2628 break;
2629 }
2630
2631 /*
2632 * Grow the PGM pool.
2633 */
2634 case VMMCALLRING3_PGM_POOL_GROW:
2635 {
2636 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2637 break;
2638 }
2639
2640 /*
2641 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2642 */
2643 case VMMCALLRING3_PGM_MAP_CHUNK:
2644 {
2645 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2646 break;
2647 }
2648
2649 /*
2650 * Allocates more handy pages.
2651 */
2652 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2653 {
2654 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2655 break;
2656 }
2657
2658 /*
2659 * Allocates a large page.
2660 */
2661 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2662 {
2663 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2664 break;
2665 }
2666
2667 /*
2668 * Acquire the PGM lock.
2669 */
2670 case VMMCALLRING3_PGM_LOCK:
2671 {
2672 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2673 break;
2674 }
2675
2676 /*
2677 * Acquire the MM hypervisor heap lock.
2678 */
2679 case VMMCALLRING3_MMHYPER_LOCK:
2680 {
2681 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2682 break;
2683 }
2684
2685#ifdef VBOX_WITH_REM
2686 /*
2687 * Flush REM handler notifications.
2688 */
2689 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2690 {
2691 REMR3ReplayHandlerNotifications(pVM);
2692 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2693 break;
2694 }
2695#endif
2696
2697 /*
2698 * This is a noop. We just take this route to avoid unnecessary
2699 * tests in the loops.
2700 */
2701 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2702 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2703 LogAlways(("*FLUSH*\n"));
2704 break;
2705
2706 /*
2707 * Set the VM error message.
2708 */
2709 case VMMCALLRING3_VM_SET_ERROR:
2710 VMR3SetErrorWorker(pVM);
2711 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2712 break;
2713
2714 /*
2715 * Set the VM runtime error message.
2716 */
2717 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2718 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2719 break;
2720
2721 /*
2722 * Signal a ring 0 hypervisor assertion.
2723 * Cancel the longjmp operation that's in progress.
2724 */
2725 case VMMCALLRING3_VM_R0_ASSERTION:
2726 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2727 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2728#ifdef RT_ARCH_X86
2729 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2730#else
2731 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2732#endif
2733#ifdef VMM_R0_SWITCH_STACK
2734 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2735#endif
2736 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2737 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2738 return VERR_VMM_RING0_ASSERTION;
2739
2740 /*
2741 * A forced switch to ring 0 for preemption purposes.
2742 */
2743 case VMMCALLRING3_VM_R0_PREEMPT:
2744 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2745 break;
2746
2747 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2748 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2749 break;
2750
2751 default:
2752 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2753 return VERR_VMM_UNKNOWN_RING3_CALL;
2754 }
2755
2756 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2757 return VINF_SUCCESS;
2758}
2759
2760
2761/**
2762 * Displays the Force action Flags.
2763 *
2764 * @param pVM The cross context VM structure.
2765 * @param pHlp The output helpers.
2766 * @param pszArgs The additional arguments (ignored).
2767 */
2768static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2769{
2770 int c;
2771 uint32_t f;
2772 NOREF(pszArgs);
2773
2774#define PRINT_FLAG(prf,flag) do { \
2775 if (f & (prf##flag)) \
2776 { \
2777 static const char *s_psz = #flag; \
2778 if (!(c % 6)) \
2779 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2780 else \
2781 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2782 c++; \
2783 f &= ~(prf##flag); \
2784 } \
2785 } while (0)
2786
2787#define PRINT_GROUP(prf,grp,sfx) do { \
2788 if (f & (prf##grp##sfx)) \
2789 { \
2790 static const char *s_psz = #grp; \
2791 if (!(c % 5)) \
2792 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2793 else \
2794 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2795 c++; \
2796 } \
2797 } while (0)
2798
2799 /*
2800 * The global flags.
2801 */
2802 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2803 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2804
2805 /* show the flag mnemonics */
2806 c = 0;
2807 f = fGlobalForcedActions;
2808 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2809 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2810 PRINT_FLAG(VM_FF_,PDM_DMA);
2811 PRINT_FLAG(VM_FF_,DBGF);
2812 PRINT_FLAG(VM_FF_,REQUEST);
2813 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2814 PRINT_FLAG(VM_FF_,RESET);
2815 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2816 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2817 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2818 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2819 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2820 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2821 if (f)
2822 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2823 else
2824 pHlp->pfnPrintf(pHlp, "\n");
2825
2826 /* the groups */
2827 c = 0;
2828 f = fGlobalForcedActions;
2829 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2830 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2831 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2832 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2833 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2834 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2835 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2836 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2837 if (c)
2838 pHlp->pfnPrintf(pHlp, "\n");
2839
2840 /*
2841 * Per CPU flags.
2842 */
2843 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2844 {
2845 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2846 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2847
2848 /* show the flag mnemonics */
2849 c = 0;
2850 f = fLocalForcedActions;
2851 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2852 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2853 PRINT_FLAG(VMCPU_FF_,TIMER);
2854 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2855 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2856 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2857 PRINT_FLAG(VMCPU_FF_,UNHALT);
2858 PRINT_FLAG(VMCPU_FF_,IEM);
2859 PRINT_FLAG(VMCPU_FF_,REQUEST);
2860 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2861 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2862 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2863 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2864 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2865 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2866 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2867 PRINT_FLAG(VMCPU_FF_,TO_R3);
2868 PRINT_FLAG(VMCPU_FF_,IOM);
2869#ifdef VBOX_WITH_RAW_MODE
2870 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2871 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2872 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2873 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2874 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2875 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2876#endif
2877 if (f)
2878 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2879 else
2880 pHlp->pfnPrintf(pHlp, "\n");
2881
2882 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2883 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2884
2885 /* the groups */
2886 c = 0;
2887 f = fLocalForcedActions;
2888 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2889 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2890 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2891 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2892 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2893 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2894 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2895 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2896 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2897 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2898 if (c)
2899 pHlp->pfnPrintf(pHlp, "\n");
2900 }
2901
2902#undef PRINT_FLAG
2903#undef PRINT_GROUP
2904}
2905
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