VMM.cpp@ 72453

Last change on this file since 72453 was 72426, checked in by vboxsync, 7 years ago
IPRT,VMM: Added custom thread name for ring-0 logging (VMM).
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1	/* $Id: VMM.cpp 72426 2018-06-04 11:38:23Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_csam
32	* - @subpage pg_dbgf
33	* - @subpage pg_em
34	* - @subpage pg_gim
35	* - @subpage pg_gmm
36	* - @subpage pg_gvmm
37	* - @subpage pg_hm
38	* - @subpage pg_iem
39	* - @subpage pg_iom
40	* - @subpage pg_mm
41	* - @subpage pg_patm
42	* - @subpage pg_pdm
43	* - @subpage pg_pgm
44	* - @subpage pg_rem
45	* - @subpage pg_selm
46	* - @subpage pg_ssm
47	* - @subpage pg_stam
48	* - @subpage pg_tm
49	* - @subpage pg_trpm
50	* - @subpage pg_vm
51	*
52	*
53	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54	*
55	*
56	* @section sec_vmmstate VMM State
57	*
58	* @image html VM_Statechart_Diagram.gif
59	*
60	* To be written.
61	*
62	*
63	* @subsection subsec_vmm_init VMM Initialization
64	*
65	* To be written.
66	*
67	*
68	* @subsection subsec_vmm_term VMM Termination
69	*
70	* To be written.
71	*
72	*
73	* @section sec_vmm_limits VMM Limits
74	*
75	* There are various resource limits imposed by the VMM and it's
76	* sub-components. We'll list some of them here.
77	*
78	* On 64-bit hosts:
79	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80	* can be increased up to 64K - 1.
81	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83	* - A VM can be assigned all the memory we can use (16TB), however, the
84	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86	*
87	* On 32-bit hosts:
88	* - Max 127 VMs. Imposed by GMM's per page structure.
89	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 28-bit page ID used
91	* internally in GMM. It is also limited by PAE.
92	* - A VM can be assigned all the memory GMM can allocate, however, the
93	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95	*
96	*/
97
98
99	/*********************************************************************************************************************************
100	* Header Files *
101	*********************************************************************************************************************************/
102	#define LOG_GROUP LOG_GROUP_VMM
103	#include <VBox/vmm/vmm.h>
104	#include <VBox/vmm/vmapi.h>
105	#include <VBox/vmm/pgm.h>
106	#include <VBox/vmm/cfgm.h>
107	#include <VBox/vmm/pdmqueue.h>
108	#include <VBox/vmm/pdmcritsect.h>
109	#include <VBox/vmm/pdmcritsectrw.h>
110	#include <VBox/vmm/pdmapi.h>
111	#include <VBox/vmm/cpum.h>
112	#include <VBox/vmm/gim.h>
113	#include <VBox/vmm/mm.h>
114	#include <VBox/vmm/nem.h>
115	#include <VBox/vmm/iom.h>
116	#include <VBox/vmm/trpm.h>
117	#include <VBox/vmm/selm.h>
118	#include <VBox/vmm/em.h>
119	#include <VBox/sup.h>
120	#include <VBox/vmm/dbgf.h>
121	#include <VBox/vmm/csam.h>
122	#include <VBox/vmm/patm.h>
123	#include <VBox/vmm/apic.h>
124	#ifdef VBOX_WITH_REM
125	# include <VBox/vmm/rem.h>
126	#endif
127	#include <VBox/vmm/ssm.h>
128	#include <VBox/vmm/ftm.h>
129	#include <VBox/vmm/tm.h>
130	#include "VMMInternal.h"
131	#include "VMMSwitcher.h"
132	#include <VBox/vmm/vm.h>
133	#include <VBox/vmm/uvm.h>
134
135	#include <VBox/err.h>
136	#include <VBox/param.h>
137	#include <VBox/version.h>
138	#include <VBox/vmm/hm.h>
139	#include <iprt/assert.h>
140	#include <iprt/alloc.h>
141	#include <iprt/asm.h>
142	#include <iprt/time.h>
143	#include <iprt/semaphore.h>
144	#include <iprt/stream.h>
145	#include <iprt/string.h>
146	#include <iprt/stdarg.h>
147	#include <iprt/ctype.h>
148	#include <iprt/x86.h>
149
150
151	/*********************************************************************************************************************************
152	* Defined Constants And Macros *
153	*********************************************************************************************************************************/
154	/** The saved state version. */
155	#define VMM_SAVED_STATE_VERSION 4
156	/** The saved state version used by v3.0 and earlier. (Teleportation) */
157	#define VMM_SAVED_STATE_VERSION_3_0 3
158
159
160	/*********************************************************************************************************************************
161	* Internal Functions *
162	*********************************************************************************************************************************/
163	static int vmmR3InitStacks(PVM pVM);
164	static int vmmR3InitLoggers(PVM pVM);
165	static void vmmR3InitRegisterStats(PVM pVM);
166	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
167	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
168	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
169	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
170	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
171	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
172	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
173
174
175	/**
176	* Initializes the VMM.
177	*
178	* @returns VBox status code.
179	* @param pVM The cross context VM structure.
180	*/
181	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
182	{
183	LogFlow(("VMMR3Init\n"));
184
185	/*
186	* Assert alignment, sizes and order.
187	*/
188	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
189	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
190	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
191
192	/*
193	* Init basic VM VMM members.
194	*/
195	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
196	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
197	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
198	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
199	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
200	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
201	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
202	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
203	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
204	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
205
206	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
207	* The EMT yield interval. The EMT yielding is a hack we employ to play a
208	* bit nicer with the rest of the system (like for instance the GUI).
209	*/
210	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
211	23 /* Value arrived at after experimenting with the grub boot prompt. */);
212	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
213
214
215	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
216	* Controls whether we employ per-cpu preemption timers to limit the time
217	* spent executing guest code. This option is not available on all
218	* platforms and we will silently ignore this setting then. If we are
219	* running in VT-x mode, we will use the VMX-preemption timer instead of
220	* this one when possible.
221	*/
222	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
223	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
224	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
225
226	/*
227	* Initialize the VMM rendezvous semaphores.
228	*/
229	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
230	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
231	return VERR_NO_MEMORY;
232	for (VMCPUID i = 0; i < pVM->cCpus; i++)
233	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
234	for (VMCPUID i = 0; i < pVM->cCpus; i++)
235	{
236	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
237	AssertRCReturn(rc, rc);
238	}
239	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
240	AssertRCReturn(rc, rc);
241	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
242	AssertRCReturn(rc, rc);
243	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
244	AssertRCReturn(rc, rc);
245	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
246	AssertRCReturn(rc, rc);
247	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
254	AssertRCReturn(rc, rc);
255
256	/*
257	* Register the saved state data unit.
258	*/
259	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
260	NULL, NULL, NULL,
261	NULL, vmmR3Save, NULL,
262	NULL, vmmR3Load, NULL);
263	if (RT_FAILURE(rc))
264	return rc;
265
266	/*
267	* Register the Ring-0 VM handle with the session for fast ioctl calls.
268	*/
269	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
270	if (RT_FAILURE(rc))
271	return rc;
272
273	/*
274	* Init various sub-components.
275	*/
276	rc = vmmR3SwitcherInit(pVM);
277	if (RT_SUCCESS(rc))
278	{
279	rc = vmmR3InitStacks(pVM);
280	if (RT_SUCCESS(rc))
281	{
282	rc = vmmR3InitLoggers(pVM);
283
284	#ifdef VBOX_WITH_NMI
285	/*
286	* Allocate mapping for the host APIC.
287	*/
288	if (RT_SUCCESS(rc))
289	{
290	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
291	AssertRC(rc);
292	}
293	#endif
294	if (RT_SUCCESS(rc))
295	{
296	/*
297	* Debug info and statistics.
298	*/
299	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
300	vmmR3InitRegisterStats(pVM);
301	vmmInitFormatTypes();
302
303	return VINF_SUCCESS;
304	}
305	}
306	/** @todo Need failure cleanup. */
307
308	//more todo in here?
309	//if (RT_SUCCESS(rc))
310	//{
311	//}
312	//int rc2 = vmmR3TermCoreCode(pVM);
313	//AssertRC(rc2));
314	}
315
316	return rc;
317	}
318
319
320	/**
321	* Allocate & setup the VMM RC stack(s) (for EMTs).
322	*
323	* The stacks are also used for long jumps in Ring-0.
324	*
325	* @returns VBox status code.
326	* @param pVM The cross context VM structure.
327	*
328	* @remarks The optional guard page gets it protection setup up during R3 init
329	* completion because of init order issues.
330	*/
331	static int vmmR3InitStacks(PVM pVM)
332	{
333	int rc = VINF_SUCCESS;
334	#ifdef VMM_R0_SWITCH_STACK
335	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
336	#else
337	uint32_t fFlags = 0;
338	#endif
339
340	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
341	{
342	PVMCPU pVCpu = &pVM->aCpus[idCpu];
343
344	#ifdef VBOX_STRICT_VMM_STACK
345	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
346	#else
347	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
348	#endif
349	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
350	if (RT_SUCCESS(rc))
351	{
352	#ifdef VBOX_STRICT_VMM_STACK
353	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
354	#endif
355	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
356	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
357	if (VM_IS_RAW_MODE_ENABLED(pVM))
358	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
359	else
360	#endif
361	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
362	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
363	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
364	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
365
366	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
367	}
368	}
369
370	return rc;
371	}
372
373
374	/**
375	* Initialize the loggers.
376	*
377	* @returns VBox status code.
378	* @param pVM The cross context VM structure.
379	*/
380	static int vmmR3InitLoggers(PVM pVM)
381	{
382	int rc;
383	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
384
385	/*
386	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
387	*/
388	#ifdef LOG_ENABLED
389	PRTLOGGER pLogger = RTLogDefaultInstance();
390	if (pLogger)
391	{
392	if (VM_IS_RAW_MODE_ENABLED(pVM))
393	{
394	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
395	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
396	if (RT_FAILURE(rc))
397	return rc;
398	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
399	}
400
401	# ifdef VBOX_WITH_R0_LOGGING
402	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
403	for (VMCPUID i = 0; i < pVM->cCpus; i++)
404	{
405	PVMCPU pVCpu = &pVM->aCpus[i];
406	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
407	(void **)&pVCpu->vmm.s.pR0LoggerR3);
408	if (RT_FAILURE(rc))
409	return rc;
410	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
411	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
412	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
413	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
414	}
415	# endif
416	}
417	#endif /* LOG_ENABLED */
418
419	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
420	/*
421	* Allocate RC release logger instances (finalized in the relocator).
422	*/
423	if (VM_IS_RAW_MODE_ENABLED(pVM))
424	{
425	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
426	if (pRelLogger)
427	{
428	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
429	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
430	if (RT_FAILURE(rc))
431	return rc;
432	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
433	}
434	}
435	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
436	return VINF_SUCCESS;
437	}
438
439
440	/**
441	* VMMR3Init worker that register the statistics with STAM.
442	*
443	* @param pVM The cross context VM structure.
444	*/
445	static void vmmR3InitRegisterStats(PVM pVM)
446	{
447	RT_NOREF_PV(pVM);
448
449	/*
450	* Statistics.
451	*/
452	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
453	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
454	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
455	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
456	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
457	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
458	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
459	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
464	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
465	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
466	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
467	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
468	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
469	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
470	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
471	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
517
518	#ifdef VBOX_WITH_STATISTICS
519	for (VMCPUID i = 0; i < pVM->cCpus; i++)
520	{
521	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
522	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
523	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
524	}
525	#endif
526	}
527
528
529	/**
530	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
531	*
532	* @returns VBox status code.
533	* @param pVM The cross context VM structure.
534	* @param pVCpu The cross context per CPU structure.
535	* @thread EMT(pVCpu)
536	*/
537	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
538	{
539	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
540	}
541
542
543	/**
544	* Initializes the R0 VMM.
545	*
546	* @returns VBox status code.
547	* @param pVM The cross context VM structure.
548	*/
549	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
550	{
551	int rc;
552	PVMCPU pVCpu = VMMGetCpu(pVM);
553	Assert(pVCpu && pVCpu->idCpu == 0);
554
555	#ifdef LOG_ENABLED
556	/*
557	* Initialize the ring-0 logger if we haven't done so yet.
558	*/
559	if ( pVCpu->vmm.s.pR0LoggerR3
560	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
561	{
562	rc = VMMR3UpdateLoggers(pVM);
563	if (RT_FAILURE(rc))
564	return rc;
565	}
566	#endif
567
568	/*
569	* Call Ring-0 entry with init code.
570	*/
571	for (;;)
572	{
573	#ifdef NO_SUPCALLR0VMM
574	//rc = VERR_GENERAL_FAILURE;
575	rc = VINF_SUCCESS;
576	#else
577	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
578	#endif
579	/*
580	* Flush the logs.
581	*/
582	#ifdef LOG_ENABLED
583	if ( pVCpu->vmm.s.pR0LoggerR3
584	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
585	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
586	#endif
587	if (rc != VINF_VMM_CALL_HOST)
588	break;
589	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
590	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
591	break;
592	/* Resume R0 */
593	}
594
595	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
596	{
597	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
598	if (RT_SUCCESS(rc))
599	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
600	}
601
602	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
603	if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
604	LogRel(("VMM: Enabled thread-context hooks\n"));
605	else
606	LogRel(("VMM: Thread-context hooks unavailable\n"));
607
608	/*
609	* Send all EMTs to ring-0 to get their logger initialized.
610	*/
611	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
612	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, &pVM->aCpus[idCpu]);
613
614	return rc;
615	}
616
617
618	#ifdef VBOX_WITH_RAW_MODE
619	/**
620	* Initializes the RC VMM.
621	*
622	* @returns VBox status code.
623	* @param pVM The cross context VM structure.
624	*/
625	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
626	{
627	PVMCPU pVCpu = VMMGetCpu(pVM);
628	Assert(pVCpu && pVCpu->idCpu == 0);
629
630	/* In VMX mode, there's no need to init RC. */
631	if (!VM_IS_RAW_MODE_ENABLED(pVM))
632	return VINF_SUCCESS;
633
634	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
635
636	/*
637	* Call VMMRCInit():
638	* -# resolve the address.
639	* -# setup stackframe and EIP to use the trampoline.
640	* -# do a generic hypervisor call.
641	*/
642	RTRCPTR RCPtrEP;
643	int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
644	if (RT_SUCCESS(rc))
645	{
646	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
647	uint64_t u64TS = RTTimeProgramStartNanoTS();
648	CPUMPushHyper(pVCpu, RT_HI_U32(u64TS)); /* Param 4: The program startup TS - Hi. */
649	CPUMPushHyper(pVCpu, RT_LO_U32(u64TS)); /* Param 4: The program startup TS - Lo. */
650	CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
651	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
652	CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
653	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
654	CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
655	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
656	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
657	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
658
659	for (;;)
660	{
661	#ifdef NO_SUPCALLR0VMM
662	//rc = VERR_GENERAL_FAILURE;
663	rc = VINF_SUCCESS;
664	#else
665	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
666	#endif
667	#ifdef LOG_ENABLED
668	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
669	if ( pLogger
670	&& pLogger->offScratch > 0)
671	RTLogFlushRC(NULL, pLogger);
672	#endif
673	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
674	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
675	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
676	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
677	#endif
678	if (rc != VINF_VMM_CALL_HOST)
679	break;
680	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
681	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
682	break;
683	}
684
685	/* Don't trigger assertions or guru if raw-mode is unavailable. */
686	if (rc != VERR_SUPDRV_NO_RAW_MODE_HYPER_V_ROOT)
687	{
688	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
689	{
690	VMMR3FatalDump(pVM, pVCpu, rc);
691	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
692	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
693	}
694	AssertRC(rc);
695	}
696	}
697	return rc;
698	}
699	#endif /* VBOX_WITH_RAW_MODE */
700
701
702	/**
703	* Called when an init phase completes.
704	*
705	* @returns VBox status code.
706	* @param pVM The cross context VM structure.
707	* @param enmWhat Which init phase.
708	*/
709	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
710	{
711	int rc = VINF_SUCCESS;
712
713	switch (enmWhat)
714	{
715	case VMINITCOMPLETED_RING3:
716	{
717	/*
718	* Set page attributes to r/w for stack pages.
719	*/
720	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
721	{
722	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
723	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
724	AssertRCReturn(rc, rc);
725	}
726
727	/*
728	* Create the EMT yield timer.
729	*/
730	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
731	AssertRCReturn(rc, rc);
732
733	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
734	AssertRCReturn(rc, rc);
735
736	#ifdef VBOX_WITH_NMI
737	/*
738	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
739	*/
740	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
741	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
742	AssertRCReturn(rc, rc);
743	#endif
744
745	#ifdef VBOX_STRICT_VMM_STACK
746	/*
747	* Setup the stack guard pages: Two inaccessible pages at each sides of the
748	* stack to catch over/under-flows.
749	*/
750	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
751	{
752	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
753
754	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
755	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
756
757	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
758	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
759	}
760	pVM->vmm.s.fStackGuardsStationed = true;
761	#endif
762	break;
763	}
764
765	case VMINITCOMPLETED_HM:
766	{
767	/*
768	* Disable the periodic preemption timers if we can use the
769	* VMX-preemption timer instead.
770	*/
771	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
772	&& HMR3IsVmxPreemptionTimerUsed(pVM))
773	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
774	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
775
776	/*
777	* Last chance for GIM to update its CPUID leaves if it requires
778	* knowledge/information from HM initialization.
779	*/
780	rc = GIMR3InitCompleted(pVM);
781	AssertRCReturn(rc, rc);
782
783	/*
784	* CPUM's post-initialization (print CPUIDs).
785	*/
786	CPUMR3LogCpuIds(pVM);
787	break;
788	}
789
790	default: /* shuts up gcc */
791	break;
792	}
793
794	return rc;
795	}
796
797
798	/**
799	* Terminate the VMM bits.
800	*
801	* @returns VBox status code.
802	* @param pVM The cross context VM structure.
803	*/
804	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
805	{
806	PVMCPU pVCpu = VMMGetCpu(pVM);
807	Assert(pVCpu && pVCpu->idCpu == 0);
808
809	/*
810	* Call Ring-0 entry with termination code.
811	*/
812	int rc;
813	for (;;)
814	{
815	#ifdef NO_SUPCALLR0VMM
816	//rc = VERR_GENERAL_FAILURE;
817	rc = VINF_SUCCESS;
818	#else
819	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
820	#endif
821	/*
822	* Flush the logs.
823	*/
824	#ifdef LOG_ENABLED
825	if ( pVCpu->vmm.s.pR0LoggerR3
826	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
827	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
828	#endif
829	if (rc != VINF_VMM_CALL_HOST)
830	break;
831	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
832	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
833	break;
834	/* Resume R0 */
835	}
836	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
837	{
838	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
839	if (RT_SUCCESS(rc))
840	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
841	}
842
843	for (VMCPUID i = 0; i < pVM->cCpus; i++)
844	{
845	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
846	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
847	}
848	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
849	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
850	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
851	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
852	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
853	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
854	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
855	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
856	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
857	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
858	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
859	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
860	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
861	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
862	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
863	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
864
865	#ifdef VBOX_STRICT_VMM_STACK
866	/*
867	* Make the two stack guard pages present again.
868	*/
869	if (pVM->vmm.s.fStackGuardsStationed)
870	{
871	for (VMCPUID i = 0; i < pVM->cCpus; i++)
872	{
873	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
874	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
875	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
876	}
877	pVM->vmm.s.fStackGuardsStationed = false;
878	}
879	#endif
880
881	vmmTermFormatTypes();
882	return rc;
883	}
884
885
886	/**
887	* Applies relocations to data and code managed by this
888	* component. This function will be called at init and
889	* whenever the VMM need to relocate it self inside the GC.
890	*
891	* The VMM will need to apply relocations to the core code.
892	*
893	* @param pVM The cross context VM structure.
894	* @param offDelta The relocation delta.
895	*/
896	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
897	{
898	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
899
900	/*
901	* Recalc the RC address.
902	*/
903	#ifdef VBOX_WITH_RAW_MODE
904	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
905	#endif
906
907	/*
908	* The stack.
909	*/
910	for (VMCPUID i = 0; i < pVM->cCpus; i++)
911	{
912	PVMCPU pVCpu = &pVM->aCpus[i];
913
914	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
915
916	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
917	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
918	}
919
920	/*
921	* All the switchers.
922	*/
923	vmmR3SwitcherRelocate(pVM, offDelta);
924
925	/*
926	* Get other RC entry points.
927	*/
928	if (VM_IS_RAW_MODE_ENABLED(pVM))
929	{
930	int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
931	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
932
933	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
934	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
935	}
936
937	/*
938	* Update the logger.
939	*/
940	VMMR3UpdateLoggers(pVM);
941	}
942
943
944	/**
945	* Updates the settings for the RC and R0 loggers.
946	*
947	* @returns VBox status code.
948	* @param pVM The cross context VM structure.
949	*/
950	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
951	{
952	/*
953	* Simply clone the logger instance (for RC).
954	*/
955	int rc = VINF_SUCCESS;
956	RTRCPTR RCPtrLoggerFlush = 0;
957
958	if ( pVM->vmm.s.pRCLoggerR3
959	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
960	\|\| pVM->vmm.s.pRCRelLoggerR3
961	#endif
962	)
963	{
964	Assert(VM_IS_RAW_MODE_ENABLED(pVM));
965	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
966	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
967	}
968
969	if (pVM->vmm.s.pRCLoggerR3)
970	{
971	Assert(VM_IS_RAW_MODE_ENABLED(pVM));
972	RTRCPTR RCPtrLoggerWrapper = 0;
973	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
974	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
975
976	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
977	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
978	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
979	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
980	}
981
982	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
983	if (pVM->vmm.s.pRCRelLoggerR3)
984	{
985	Assert(VM_IS_RAW_MODE_ENABLED(pVM));
986	RTRCPTR RCPtrLoggerWrapper = 0;
987	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
988	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
989
990	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
991	rc = RTLogCloneRC(RTLogRelGetDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
992	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
993	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
994	}
995	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
996
997	#ifdef LOG_ENABLED
998	/*
999	* For the ring-0 EMT logger, we use a per-thread logger instance
1000	* in ring-0. Only initialize it once.
1001	*/
1002	PRTLOGGER const pDefault = RTLogDefaultInstance();
1003	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1004	{
1005	PVMCPU pVCpu = &pVM->aCpus[i];
1006	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1007	if (pR0LoggerR3)
1008	{
1009	if (!pR0LoggerR3->fCreated)
1010	{
1011	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
1012	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
1013	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
1014
1015	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
1016	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
1017	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
1018
1019	char szR0ThreadName[16];
1020	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
1021	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
1022	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1023	pfnLoggerWrapper, pfnLoggerFlush,
1024	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
1025	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
1026
1027	RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
1028	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
1029	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
1030	rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
1031	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1032	pfnLoggerPrefix, NIL_RTR0PTR);
1033	AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
1034
1035	pR0LoggerR3->idCpu = i;
1036	pR0LoggerR3->fCreated = true;
1037	pR0LoggerR3->fFlushingDisabled = false;
1038
1039	}
1040
1041	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1042	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
1043	AssertRC(rc);
1044	}
1045	}
1046	#endif
1047	return rc;
1048	}
1049
1050
1051	/**
1052	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
1053	*
1054	* @returns Pointer to the buffer.
1055	* @param pVM The cross context VM structure.
1056	*/
1057	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1058	{
1059	if (!VM_IS_RAW_MODE_ENABLED(pVM))
1060	return pVM->vmm.s.szRing0AssertMsg1;
1061
1062	RTRCPTR RCPtr;
1063	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
1064	if (RT_SUCCESS(rc))
1065	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1066
1067	return NULL;
1068	}
1069
1070
1071	/**
1072	* Returns the VMCPU of the specified virtual CPU.
1073	*
1074	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1075	*
1076	* @param pUVM The user mode VM handle.
1077	* @param idCpu The ID of the virtual CPU.
1078	*/
1079	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1080	{
1081	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1082	AssertReturn(idCpu < pUVM->cCpus, NULL);
1083	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1084	return &pUVM->pVM->aCpus[idCpu];
1085	}
1086
1087
1088	/**
1089	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1090	*
1091	* @returns Pointer to the buffer.
1092	* @param pVM The cross context VM structure.
1093	*/
1094	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1095	{
1096	if (!VM_IS_RAW_MODE_ENABLED(pVM))
1097	return pVM->vmm.s.szRing0AssertMsg2;
1098
1099	RTRCPTR RCPtr;
1100	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1101	if (RT_SUCCESS(rc))
1102	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1103
1104	return NULL;
1105	}
1106
1107
1108	/**
1109	* Execute state save operation.
1110	*
1111	* @returns VBox status code.
1112	* @param pVM The cross context VM structure.
1113	* @param pSSM SSM operation handle.
1114	*/
1115	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1116	{
1117	LogFlow(("vmmR3Save:\n"));
1118
1119	/*
1120	* Save the started/stopped state of all CPUs except 0 as it will always
1121	* be running. This avoids breaking the saved state version. :-)
1122	*/
1123	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1124	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1125
1126	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1127	}
1128
1129
1130	/**
1131	* Execute state load operation.
1132	*
1133	* @returns VBox status code.
1134	* @param pVM The cross context VM structure.
1135	* @param pSSM SSM operation handle.
1136	* @param uVersion Data layout version.
1137	* @param uPass The data pass.
1138	*/
1139	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1140	{
1141	LogFlow(("vmmR3Load:\n"));
1142	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1143
1144	/*
1145	* Validate version.
1146	*/
1147	if ( uVersion != VMM_SAVED_STATE_VERSION
1148	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1149	{
1150	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1151	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1152	}
1153
1154	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1155	{
1156	/* Ignore the stack bottom, stack pointer and stack bits. */
1157	RTRCPTR RCPtrIgnored;
1158	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1159	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1160	#ifdef RT_OS_DARWIN
1161	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1162	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1163	&& SSMR3HandleRevision(pSSM) >= 48858
1164	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1165	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1166	)
1167	SSMR3Skip(pSSM, 16384);
1168	else
1169	SSMR3Skip(pSSM, 8192);
1170	#else
1171	SSMR3Skip(pSSM, 8192);
1172	#endif
1173	}
1174
1175	/*
1176	* Restore the VMCPU states. VCPU 0 is always started.
1177	*/
1178	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1179	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1180	{
1181	bool fStarted;
1182	int rc = SSMR3GetBool(pSSM, &fStarted);
1183	if (RT_FAILURE(rc))
1184	return rc;
1185	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1186	}
1187
1188	/* terminator */
1189	uint32_t u32;
1190	int rc = SSMR3GetU32(pSSM, &u32);
1191	if (RT_FAILURE(rc))
1192	return rc;
1193	if (u32 != UINT32_MAX)
1194	{
1195	AssertMsgFailed(("u32=%#x\n", u32));
1196	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1197	}
1198	return VINF_SUCCESS;
1199	}
1200
1201
1202	#ifdef VBOX_WITH_RAW_MODE
1203	/**
1204	* Resolve a builtin RC symbol.
1205	*
1206	* Called by PDM when loading or relocating RC modules.
1207	*
1208	* @returns VBox status
1209	* @param pVM The cross context VM structure.
1210	* @param pszSymbol Symbol to resolve.
1211	* @param pRCPtrValue Where to store the symbol value.
1212	*
1213	* @remark This has to work before VMMR3Relocate() is called.
1214	*/
1215	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1216	{
1217	if (!strcmp(pszSymbol, "g_Logger"))
1218	{
1219	if (pVM->vmm.s.pRCLoggerR3)
1220	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1221	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1222	}
1223	else if (!strcmp(pszSymbol, "g_RelLogger"))
1224	{
1225	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1226	if (pVM->vmm.s.pRCRelLoggerR3)
1227	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1228	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1229	# else
1230	*pRCPtrValue = NIL_RTRCPTR;
1231	# endif
1232	}
1233	else
1234	return VERR_SYMBOL_NOT_FOUND;
1235	return VINF_SUCCESS;
1236	}
1237	#endif /* VBOX_WITH_RAW_MODE */
1238
1239
1240	/**
1241	* Suspends the CPU yielder.
1242	*
1243	* @param pVM The cross context VM structure.
1244	*/
1245	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1246	{
1247	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1248	if (!pVM->vmm.s.cYieldResumeMillies)
1249	{
1250	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1251	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1252	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1253	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1254	else
1255	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1256	TMTimerStop(pVM->vmm.s.pYieldTimer);
1257	}
1258	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1259	}
1260
1261
1262	/**
1263	* Stops the CPU yielder.
1264	*
1265	* @param pVM The cross context VM structure.
1266	*/
1267	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1268	{
1269	if (!pVM->vmm.s.cYieldResumeMillies)
1270	TMTimerStop(pVM->vmm.s.pYieldTimer);
1271	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1272	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1273	}
1274
1275
1276	/**
1277	* Resumes the CPU yielder when it has been a suspended or stopped.
1278	*
1279	* @param pVM The cross context VM structure.
1280	*/
1281	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1282	{
1283	if (pVM->vmm.s.cYieldResumeMillies)
1284	{
1285	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1286	pVM->vmm.s.cYieldResumeMillies = 0;
1287	}
1288	}
1289
1290
1291	/**
1292	* Internal timer callback function.
1293	*
1294	* @param pVM The cross context VM structure.
1295	* @param pTimer The timer handle.
1296	* @param pvUser User argument specified upon timer creation.
1297	*/
1298	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1299	{
1300	NOREF(pvUser);
1301
1302	/*
1303	* This really needs some careful tuning. While we shouldn't be too greedy since
1304	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1305	* because that'll cause us to stop up.
1306	*
1307	* The current logic is to use the default interval when there is no lag worth
1308	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1309	*
1310	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1311	* so the lag is up to date.)
1312	*/
1313	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1314	if ( u64Lag < 50000000 /* 50ms */
1315	\|\| ( u64Lag < 1000000000 /* 1s */
1316	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1317	)
1318	{
1319	uint64_t u64Elapsed = RTTimeNanoTS();
1320	pVM->vmm.s.u64LastYield = u64Elapsed;
1321
1322	RTThreadYield();
1323
1324	#ifdef LOG_ENABLED
1325	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1326	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1327	#endif
1328	}
1329	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1330	}
1331
1332
1333	#ifdef VBOX_WITH_RAW_MODE
1334	/**
1335	* Executes guest code in the raw-mode context.
1336	*
1337	* @param pVM The cross context VM structure.
1338	* @param pVCpu The cross context virtual CPU structure.
1339	*/
1340	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1341	{
1342	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1343
1344	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1345
1346	/*
1347	* Set the hypervisor to resume executing a CPUM resume function
1348	* in CPUMRCA.asm.
1349	*/
1350	CPUMSetHyperState(pVCpu,
1351	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1352	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1353	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1354	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1355	0, /* eax */
1356	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1357
1358	/*
1359	* We hide log flushes (outer) and hypervisor interrupts (inner).
1360	*/
1361	for (;;)
1362	{
1363	#ifdef VBOX_STRICT
1364	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1365	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1366	PGMMapCheck(pVM);
1367	# ifdef VBOX_WITH_SAFE_STR
1368	SELMR3CheckShadowTR(pVM);
1369	# endif
1370	#endif
1371	int rc;
1372	do
1373	{
1374	#ifdef NO_SUPCALLR0VMM
1375	rc = VERR_GENERAL_FAILURE;
1376	#else
1377	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1378	if (RT_LIKELY(rc == VINF_SUCCESS))
1379	rc = pVCpu->vmm.s.iLastGZRc;
1380	#endif
1381	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1382
1383	/*
1384	* Flush the logs.
1385	*/
1386	#ifdef LOG_ENABLED
1387	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1388	if ( pLogger
1389	&& pLogger->offScratch > 0)
1390	RTLogFlushRC(NULL, pLogger);
1391	#endif
1392	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1393	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1394	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1395	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1396	#endif
1397	if (rc != VINF_VMM_CALL_HOST)
1398	{
1399	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1400	return rc;
1401	}
1402	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1403	if (RT_FAILURE(rc))
1404	return rc;
1405	/* Resume GC */
1406	}
1407	}
1408	#endif /* VBOX_WITH_RAW_MODE */
1409
1410
1411	/**
1412	* Executes guest code (Intel VT-x and AMD-V).
1413	*
1414	* @param pVM The cross context VM structure.
1415	* @param pVCpu The cross context virtual CPU structure.
1416	*/
1417	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1418	{
1419	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1420
1421	for (;;)
1422	{
1423	int rc;
1424	do
1425	{
1426	#ifdef NO_SUPCALLR0VMM
1427	rc = VERR_GENERAL_FAILURE;
1428	#else
1429	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1430	if (RT_LIKELY(rc == VINF_SUCCESS))
1431	rc = pVCpu->vmm.s.iLastGZRc;
1432	#endif
1433	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1434
1435	#if 0 /** @todo triggers too often */
1436	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1437	#endif
1438
1439	#ifdef LOG_ENABLED
1440	/*
1441	* Flush the log
1442	*/
1443	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1444	if ( pR0LoggerR3
1445	&& pR0LoggerR3->Logger.offScratch > 0)
1446	RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1447	#endif /* !LOG_ENABLED */
1448	if (rc != VINF_VMM_CALL_HOST)
1449	{
1450	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1451	return rc;
1452	}
1453	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1454	if (RT_FAILURE(rc))
1455	return rc;
1456	/* Resume R0 */
1457	}
1458	}
1459
1460
1461	/**
1462	* Perform one of the fast I/O control VMMR0 operation.
1463	*
1464	* @returns VBox strict status code.
1465	* @param pVM The cross context VM structure.
1466	* @param pVCpu The cross context virtual CPU structure.
1467	* @param enmOperation The operation to perform.
1468	*/
1469	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1470	{
1471	for (;;)
1472	{
1473	VBOXSTRICTRC rcStrict;
1474	do
1475	{
1476	#ifdef NO_SUPCALLR0VMM
1477	rcStrict = VERR_GENERAL_FAILURE;
1478	#else
1479	rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1480	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1481	rcStrict = pVCpu->vmm.s.iLastGZRc;
1482	#endif
1483	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1484
1485	#ifdef LOG_ENABLED
1486	/*
1487	* Flush the log
1488	*/
1489	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1490	if ( pR0LoggerR3
1491	&& pR0LoggerR3->Logger.offScratch > 0)
1492	RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1493	#endif /* !LOG_ENABLED */
1494	if (rcStrict != VINF_VMM_CALL_HOST)
1495	return rcStrict;
1496	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1497	if (RT_FAILURE(rc))
1498	return rc;
1499	/* Resume R0 */
1500	}
1501	}
1502
1503
1504	/**
1505	* VCPU worker for VMMSendStartupIpi.
1506	*
1507	* @param pVM The cross context VM structure.
1508	* @param idCpu Virtual CPU to perform SIPI on.
1509	* @param uVector The SIPI vector.
1510	*/
1511	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1512	{
1513	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1514	VMCPU_ASSERT_EMT(pVCpu);
1515
1516	/*
1517	* Active, halt and shutdown states of the processor all block SIPIs.
1518	* So we can safely discard the SIPI. See Intel spec. 26.6.2 "Activity State".
1519	*/
1520	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1521	return VERR_ACCESS_DENIED;
1522
1523
1524	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1525
1526	pCtx->cs.Sel = uVector << 8;
1527	pCtx->cs.ValidSel = uVector << 8;
1528	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1529	pCtx->cs.u64Base = uVector << 12;
1530	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1531	pCtx->rip = 0;
1532
1533	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1534
1535	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1536	EMSetState(pVCpu, EMSTATE_HALTED);
1537	return VINF_EM_RESCHEDULE;
1538	# else /* And if we go the VMCPU::enmState way it can stay here. */
1539	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1540	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1541	return VINF_SUCCESS;
1542	# endif
1543	}
1544
1545
1546	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1547	{
1548	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1549	VMCPU_ASSERT_EMT(pVCpu);
1550
1551	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1552
1553	/** @todo Figure out how to handle a nested-guest intercepts here for INIT
1554	* IPI (e.g. SVM_EXIT_INIT). */
1555
1556	PGMR3ResetCpu(pVM, pVCpu);
1557	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1558	APICR3InitIpi(pVCpu);
1559	TRPMR3ResetCpu(pVCpu);
1560	CPUMR3ResetCpu(pVM, pVCpu);
1561	EMR3ResetCpu(pVCpu);
1562	HMR3ResetCpu(pVCpu);
1563	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1564
1565	/* This will trickle up on the target EMT. */
1566	return VINF_EM_WAIT_SIPI;
1567	}
1568
1569
1570	/**
1571	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1572	* vector-dependent state and unhalting processor.
1573	*
1574	* @param pVM The cross context VM structure.
1575	* @param idCpu Virtual CPU to perform SIPI on.
1576	* @param uVector SIPI vector.
1577	*/
1578	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1579	{
1580	AssertReturnVoid(idCpu < pVM->cCpus);
1581
1582	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1583	AssertRC(rc);
1584	}
1585
1586
1587	/**
1588	* Sends init IPI to the virtual CPU.
1589	*
1590	* @param pVM The cross context VM structure.
1591	* @param idCpu Virtual CPU to perform int IPI on.
1592	*/
1593	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1594	{
1595	AssertReturnVoid(idCpu < pVM->cCpus);
1596
1597	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1598	AssertRC(rc);
1599	}
1600
1601
1602	/**
1603	* Registers the guest memory range that can be used for patching.
1604	*
1605	* @returns VBox status code.
1606	* @param pVM The cross context VM structure.
1607	* @param pPatchMem Patch memory range.
1608	* @param cbPatchMem Size of the memory range.
1609	*/
1610	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1611	{
1612	VM_ASSERT_EMT(pVM);
1613	if (HMIsEnabled(pVM))
1614	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1615
1616	return VERR_NOT_SUPPORTED;
1617	}
1618
1619
1620	/**
1621	* Deregisters the guest memory range that can be used for patching.
1622	*
1623	* @returns VBox status code.
1624	* @param pVM The cross context VM structure.
1625	* @param pPatchMem Patch memory range.
1626	* @param cbPatchMem Size of the memory range.
1627	*/
1628	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1629	{
1630	if (HMIsEnabled(pVM))
1631	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1632
1633	return VINF_SUCCESS;
1634	}
1635
1636
1637	/**
1638	* Common recursion handler for the other EMTs.
1639	*
1640	* @returns Strict VBox status code.
1641	* @param pVM The cross context VM structure.
1642	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1643	* @param rcStrict Current status code to be combined with the one
1644	* from this recursion and returned.
1645	*/
1646	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1647	{
1648	int rc2;
1649
1650	/*
1651	* We wait here while the initiator of this recursion reconfigures
1652	* everything. The last EMT to get in signals the initiator.
1653	*/
1654	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1655	{
1656	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1657	AssertLogRelRC(rc2);
1658	}
1659
1660	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1661	AssertLogRelRC(rc2);
1662
1663	/*
1664	* Do the normal rendezvous processing.
1665	*/
1666	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1667	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1668
1669	/*
1670	* Wait for the initiator to restore everything.
1671	*/
1672	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1673	AssertLogRelRC(rc2);
1674
1675	/*
1676	* Last thread out of here signals the initiator.
1677	*/
1678	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1679	{
1680	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1681	AssertLogRelRC(rc2);
1682	}
1683
1684	/*
1685	* Merge status codes and return.
1686	*/
1687	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1688	if ( rcStrict2 != VINF_SUCCESS
1689	&& ( rcStrict == VINF_SUCCESS
1690	\|\| rcStrict > rcStrict2))
1691	rcStrict = rcStrict2;
1692	return rcStrict;
1693	}
1694
1695
1696	/**
1697	* Count returns and have the last non-caller EMT wake up the caller.
1698	*
1699	* @returns VBox strict informational status code for EM scheduling. No failures
1700	* will be returned here, those are for the caller only.
1701	*
1702	* @param pVM The cross context VM structure.
1703	* @param rcStrict The current accumulated recursive status code,
1704	* to be merged with i32RendezvousStatus and
1705	* returned.
1706	*/
1707	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1708	{
1709	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1710
1711	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1712	if (cReturned == pVM->cCpus - 1U)
1713	{
1714	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1715	AssertLogRelRC(rc);
1716	}
1717
1718	/*
1719	* Merge the status codes, ignoring error statuses in this code path.
1720	*/
1721	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1722	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1723	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1724	VERR_IPE_UNEXPECTED_INFO_STATUS);
1725
1726	if (RT_SUCCESS(rcStrict2))
1727	{
1728	if ( rcStrict2 != VINF_SUCCESS
1729	&& ( rcStrict == VINF_SUCCESS
1730	\|\| rcStrict > rcStrict2))
1731	rcStrict = rcStrict2;
1732	}
1733	return rcStrict;
1734	}
1735
1736
1737	/**
1738	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1739	*
1740	* @returns VBox strict informational status code for EM scheduling. No failures
1741	* will be returned here, those are for the caller only. When
1742	* fIsCaller is set, VINF_SUCCESS is always returned.
1743	*
1744	* @param pVM The cross context VM structure.
1745	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1746	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1747	* not.
1748	* @param fFlags The flags.
1749	* @param pfnRendezvous The callback.
1750	* @param pvUser The user argument for the callback.
1751	*/
1752	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1753	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1754	{
1755	int rc;
1756	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1757
1758	/*
1759	* Enter, the last EMT triggers the next callback phase.
1760	*/
1761	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1762	if (cEntered != pVM->cCpus)
1763	{
1764	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1765	{
1766	/* Wait for our turn. */
1767	for (;;)
1768	{
1769	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1770	AssertLogRelRC(rc);
1771	if (!pVM->vmm.s.fRendezvousRecursion)
1772	break;
1773	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1774	}
1775	}
1776	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1777	{
1778	/* Wait for the last EMT to arrive and wake everyone up. */
1779	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1780	AssertLogRelRC(rc);
1781	Assert(!pVM->vmm.s.fRendezvousRecursion);
1782	}
1783	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1784	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1785	{
1786	/* Wait for our turn. */
1787	for (;;)
1788	{
1789	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1790	AssertLogRelRC(rc);
1791	if (!pVM->vmm.s.fRendezvousRecursion)
1792	break;
1793	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1794	}
1795	}
1796	else
1797	{
1798	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1799
1800	/*
1801	* The execute once is handled specially to optimize the code flow.
1802	*
1803	* The last EMT to arrive will perform the callback and the other
1804	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1805	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1806	* returns, that EMT will initiate the normal return sequence.
1807	*/
1808	if (!fIsCaller)
1809	{
1810	for (;;)
1811	{
1812	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1813	AssertLogRelRC(rc);
1814	if (!pVM->vmm.s.fRendezvousRecursion)
1815	break;
1816	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1817	}
1818
1819	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1820	}
1821	return VINF_SUCCESS;
1822	}
1823	}
1824	else
1825	{
1826	/*
1827	* All EMTs are waiting, clear the FF and take action according to the
1828	* execution method.
1829	*/
1830	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1831
1832	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1833	{
1834	/* Wake up everyone. */
1835	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1836	AssertLogRelRC(rc);
1837	}
1838	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1839	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1840	{
1841	/* Figure out who to wake up and wake it up. If it's ourself, then
1842	it's easy otherwise wait for our turn. */
1843	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1844	? 0
1845	: pVM->cCpus - 1U;
1846	if (pVCpu->idCpu != iFirst)
1847	{
1848	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1849	AssertLogRelRC(rc);
1850	for (;;)
1851	{
1852	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1853	AssertLogRelRC(rc);
1854	if (!pVM->vmm.s.fRendezvousRecursion)
1855	break;
1856	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1857	}
1858	}
1859	}
1860	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1861	}
1862
1863
1864	/*
1865	* Do the callback and update the status if necessary.
1866	*/
1867	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1868	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1869	{
1870	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1871	if (rcStrict2 != VINF_SUCCESS)
1872	{
1873	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1874	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1875	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1876	int32_t i32RendezvousStatus;
1877	do
1878	{
1879	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1880	if ( rcStrict2 == i32RendezvousStatus
1881	\|\| RT_FAILURE(i32RendezvousStatus)
1882	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1883	&& rcStrict2 > i32RendezvousStatus))
1884	break;
1885	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1886	}
1887	}
1888
1889	/*
1890	* Increment the done counter and take action depending on whether we're
1891	* the last to finish callback execution.
1892	*/
1893	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1894	if ( cDone != pVM->cCpus
1895	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1896	{
1897	/* Signal the next EMT? */
1898	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1899	{
1900	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1901	AssertLogRelRC(rc);
1902	}
1903	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1904	{
1905	Assert(cDone == pVCpu->idCpu + 1U);
1906	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1907	AssertLogRelRC(rc);
1908	}
1909	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1910	{
1911	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1912	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1913	AssertLogRelRC(rc);
1914	}
1915
1916	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1917	if (!fIsCaller)
1918	{
1919	for (;;)
1920	{
1921	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1922	AssertLogRelRC(rc);
1923	if (!pVM->vmm.s.fRendezvousRecursion)
1924	break;
1925	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1926	}
1927	}
1928	}
1929	else
1930	{
1931	/* Callback execution is all done, tell the rest to return. */
1932	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1933	AssertLogRelRC(rc);
1934	}
1935
1936	if (!fIsCaller)
1937	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1938	return rcStrictRecursion;
1939	}
1940
1941
1942	/**
1943	* Called in response to VM_FF_EMT_RENDEZVOUS.
1944	*
1945	* @returns VBox strict status code - EM scheduling. No errors will be returned
1946	* here, nor will any non-EM scheduling status codes be returned.
1947	*
1948	* @param pVM The cross context VM structure.
1949	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1950	*
1951	* @thread EMT
1952	*/
1953	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1954	{
1955	Assert(!pVCpu->vmm.s.fInRendezvous);
1956	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1957	pVCpu->vmm.s.fInRendezvous = true;
1958	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1959	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1960	pVCpu->vmm.s.fInRendezvous = false;
1961	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1962	return VBOXSTRICTRC_TODO(rcStrict);
1963	}
1964
1965
1966	/**
1967	* Helper for resetting an single wakeup event sempahore.
1968	*
1969	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1970	* @param hEvt The event semaphore to reset.
1971	*/
1972	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1973	{
1974	for (uint32_t cLoops = 0; ; cLoops++)
1975	{
1976	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1977	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1978	return rc;
1979	}
1980	}
1981
1982
1983	/**
1984	* Worker for VMMR3EmtRendezvous that handles recursion.
1985	*
1986	* @returns VBox strict status code. This will be the first error,
1987	* VINF_SUCCESS, or an EM scheduling status code.
1988	*
1989	* @param pVM The cross context VM structure.
1990	* @param pVCpu The cross context virtual CPU structure of the
1991	* calling EMT.
1992	* @param fFlags Flags indicating execution methods. See
1993	* grp_VMMR3EmtRendezvous_fFlags.
1994	* @param pfnRendezvous The callback.
1995	* @param pvUser User argument for the callback.
1996	*
1997	* @thread EMT(pVCpu)
1998	*/
1999	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
2000	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2001	{
2002	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
2003	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2004	Assert(pVCpu->vmm.s.fInRendezvous);
2005
2006	/*
2007	* Save the current state.
2008	*/
2009	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2010	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
2011	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
2012	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
2013	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
2014
2015	/*
2016	* Check preconditions and save the current state.
2017	*/
2018	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2019	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2020	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2021	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2022	VERR_INTERNAL_ERROR);
2023	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
2024	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
2025
2026	/*
2027	* Reset the recursion prep and pop semaphores.
2028	*/
2029	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2030	AssertLogRelRCReturn(rc, rc);
2031	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2032	AssertLogRelRCReturn(rc, rc);
2033	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
2034	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
2035	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
2036	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
2037
2038	/*
2039	* Usher the other thread into the recursion routine.
2040	*/
2041	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
2042	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
2043
2044	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
2045	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
2046	while (cLeft-- > 0)
2047	{
2048	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
2049	AssertLogRelRC(rc);
2050	}
2051	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
2052	{
2053	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
2054	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
2055	{
2056	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
2057	AssertLogRelRC(rc);
2058	}
2059	}
2060	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
2061	{
2062	Assert(cLeft == pVCpu->idCpu);
2063	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
2064	{
2065	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
2066	AssertLogRelRC(rc);
2067	}
2068	}
2069	else
2070	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2071	VERR_INTERNAL_ERROR_4);
2072
2073	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
2074	AssertLogRelRC(rc);
2075	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
2076	AssertLogRelRC(rc);
2077
2078
2079	/*
2080	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
2081	*/
2082	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2083	{
2084	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2085	AssertLogRelRC(rc);
2086	}
2087
2088	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2089
2090	/*
2091	* Clear the slate and setup the new rendezvous.
2092	*/
2093	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2094	{
2095	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2096	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2097	}
2098	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2099	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2100	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2101	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2102
2103	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2104	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2105	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2106	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2107	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2108	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2109	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2110	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2111
2112	/*
2113	* We're ready to go now, do normal rendezvous processing.
2114	*/
2115	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2116	AssertLogRelRC(rc);
2117
2118	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
2119
2120	/*
2121	* The caller waits for the other EMTs to be done, return and waiting on the
2122	* pop semaphore.
2123	*/
2124	for (;;)
2125	{
2126	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2127	AssertLogRelRC(rc);
2128	if (!pVM->vmm.s.fRendezvousRecursion)
2129	break;
2130	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2131	}
2132
2133	/*
2134	* Get the return code and merge it with the above recursion status.
2135	*/
2136	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2137	if ( rcStrict2 != VINF_SUCCESS
2138	&& ( rcStrict == VINF_SUCCESS
2139	\|\| rcStrict > rcStrict2))
2140	rcStrict = rcStrict2;
2141
2142	/*
2143	* Restore the parent rendezvous state.
2144	*/
2145	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2146	{
2147	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2148	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2149	}
2150	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2151	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2152	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2153	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2154
2155	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2156	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2157	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2158	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2159	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2160	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2161	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2162
2163	/*
2164	* Usher the other EMTs back to their parent recursion routine, waiting
2165	* for them to all get there before we return (makes sure they've been
2166	* scheduled and are past the pop event sem, see below).
2167	*/
2168	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2169	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2170	AssertLogRelRC(rc);
2171
2172	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2173	{
2174	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2175	AssertLogRelRC(rc);
2176	}
2177
2178	/*
2179	* We must reset the pop semaphore on the way out (doing the pop caller too,
2180	* just in case). The parent may be another recursion.
2181	*/
2182	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2183	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2184
2185	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2186
2187	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2188	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2189	return rcStrict;
2190	}
2191
2192
2193	/**
2194	* EMT rendezvous.
2195	*
2196	* Gathers all the EMTs and execute some code on each of them, either in a one
2197	* by one fashion or all at once.
2198	*
2199	* @returns VBox strict status code. This will be the first error,
2200	* VINF_SUCCESS, or an EM scheduling status code.
2201	*
2202	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2203	* doesn't support it or if the recursion is too deep.
2204	*
2205	* @param pVM The cross context VM structure.
2206	* @param fFlags Flags indicating execution methods. See
2207	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2208	* descending and ascending rendezvous types support
2209	* recursion from inside @a pfnRendezvous.
2210	* @param pfnRendezvous The callback.
2211	* @param pvUser User argument for the callback.
2212	*
2213	* @thread Any.
2214	*/
2215	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2216	{
2217	/*
2218	* Validate input.
2219	*/
2220	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2221	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2222	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2223	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2224	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2225	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2226	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2227	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2228
2229	VBOXSTRICTRC rcStrict;
2230	PVMCPU pVCpu = VMMGetCpu(pVM);
2231	if (!pVCpu)
2232	{
2233	/*
2234	* Forward the request to an EMT thread.
2235	*/
2236	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2237	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2238	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2239	else
2240	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2241	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2242	}
2243	else if ( pVM->cCpus == 1
2244	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2245	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2246	{
2247	/*
2248	* Shortcut for the single EMT case.
2249	*
2250	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2251	* during vmR3Destroy after other emulation threads have started terminating.
2252	*/
2253	if (!pVCpu->vmm.s.fInRendezvous)
2254	{
2255	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2256	pVCpu->vmm.s.fInRendezvous = true;
2257	pVM->vmm.s.fRendezvousFlags = fFlags;
2258	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2259	pVCpu->vmm.s.fInRendezvous = false;
2260	}
2261	else
2262	{
2263	/* Recursion. Do the same checks as in the SMP case. */
2264	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2265	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2266	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2267	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2268	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2269	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2270	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2271	, VERR_DEADLOCK);
2272
2273	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2274	pVM->vmm.s.cRendezvousRecursions++;
2275	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2276	pVM->vmm.s.fRendezvousFlags = fFlags;
2277
2278	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2279
2280	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2281	pVM->vmm.s.cRendezvousRecursions--;
2282	}
2283	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2284	}
2285	else
2286	{
2287	/*
2288	* Spin lock. If busy, check for recursion, if not recursing wait for
2289	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2290	*/
2291	int rc;
2292	rcStrict = VINF_SUCCESS;
2293	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2294	{
2295	/* Allow recursion in some cases. */
2296	if ( pVCpu->vmm.s.fInRendezvous
2297	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2298	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2299	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2300	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2301	))
2302	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2303
2304	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2305	VERR_DEADLOCK);
2306
2307	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2308	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2309	{
2310	if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
2311	{
2312	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2313	if ( rc != VINF_SUCCESS
2314	&& ( rcStrict == VINF_SUCCESS
2315	\|\| rcStrict > rc))
2316	rcStrict = rc;
2317	/** @todo Perhaps deal with termination here? */
2318	}
2319	ASMNopPause();
2320	}
2321	}
2322
2323	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2324	Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
2325	Assert(!pVCpu->vmm.s.fInRendezvous);
2326	pVCpu->vmm.s.fInRendezvous = true;
2327
2328	/*
2329	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2330	*/
2331	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2332	{
2333	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2334	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2335	}
2336	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2337	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2338	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2339	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2340	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2341	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2342	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2343	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2344	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2345	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2346	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2347
2348	/*
2349	* Set the FF and poke the other EMTs.
2350	*/
2351	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2352	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2353
2354	/*
2355	* Do the same ourselves.
2356	*/
2357	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2358
2359	/*
2360	* The caller waits for the other EMTs to be done and return before doing
2361	* the cleanup. This makes away with wakeup / reset races we would otherwise
2362	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2363	*/
2364	for (;;)
2365	{
2366	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2367	AssertLogRelRC(rc);
2368	if (!pVM->vmm.s.fRendezvousRecursion)
2369	break;
2370	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2371	}
2372
2373	/*
2374	* Get the return code and clean up a little bit.
2375	*/
2376	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2377	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2378
2379	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2380	pVCpu->vmm.s.fInRendezvous = false;
2381
2382	/*
2383	* Merge rcStrict, rcStrict2 and rcStrict3.
2384	*/
2385	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2386	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2387	if ( rcStrict2 != VINF_SUCCESS
2388	&& ( rcStrict == VINF_SUCCESS
2389	\|\| rcStrict > rcStrict2))
2390	rcStrict = rcStrict2;
2391	if ( rcStrict3 != VINF_SUCCESS
2392	&& ( rcStrict == VINF_SUCCESS
2393	\|\| rcStrict > rcStrict3))
2394	rcStrict = rcStrict3;
2395	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2396	}
2397
2398	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2399	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2400	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2401	VERR_IPE_UNEXPECTED_INFO_STATUS);
2402	return VBOXSTRICTRC_VAL(rcStrict);
2403	}
2404
2405
2406	/**
2407	* Read from the ring 0 jump buffer stack.
2408	*
2409	* @returns VBox status code.
2410	*
2411	* @param pVM The cross context VM structure.
2412	* @param idCpu The ID of the source CPU context (for the address).
2413	* @param R0Addr Where to start reading.
2414	* @param pvBuf Where to store the data we've read.
2415	* @param cbRead The number of bytes to read.
2416	*/
2417	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2418	{
2419	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2420	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2421
2422	#ifdef VMM_R0_SWITCH_STACK
2423	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2424	#else
2425	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2426	#endif
2427	if ( off > VMM_STACK_SIZE
2428	\|\| off + cbRead >= VMM_STACK_SIZE)
2429	return VERR_INVALID_POINTER;
2430
2431	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2432	return VINF_SUCCESS;
2433	}
2434
2435	#ifdef VBOX_WITH_RAW_MODE
2436
2437	/**
2438	* Calls a RC function.
2439	*
2440	* @param pVM The cross context VM structure.
2441	* @param RCPtrEntry The address of the RC function.
2442	* @param cArgs The number of arguments in the ....
2443	* @param ... Arguments to the function.
2444	*/
2445	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2446	{
2447	va_list args;
2448	va_start(args, cArgs);
2449	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2450	va_end(args);
2451	return rc;
2452	}
2453
2454
2455	/**
2456	* Calls a RC function.
2457	*
2458	* @param pVM The cross context VM structure.
2459	* @param RCPtrEntry The address of the RC function.
2460	* @param cArgs The number of arguments in the ....
2461	* @param args Arguments to the function.
2462	*/
2463	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2464	{
2465	/* Raw mode implies 1 VCPU. */
2466	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2467	PVMCPU pVCpu = &pVM->aCpus[0];
2468
2469	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2470
2471	/*
2472	* Setup the call frame using the trampoline.
2473	*/
2474	CPUMSetHyperState(pVCpu,
2475	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2476	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2477	RCPtrEntry, /* eax */
2478	cArgs /* edx */
2479	);
2480
2481	#if 0
2482	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2483	#endif
2484	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2485	int i = cArgs;
2486	while (i-- > 0)
2487	*pFrame++ = va_arg(args, RTGCUINTPTR32);
2488
2489	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2490	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2491
2492	/*
2493	* We hide log flushes (outer) and hypervisor interrupts (inner).
2494	*/
2495	for (;;)
2496	{
2497	int rc;
2498	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2499	do
2500	{
2501	#ifdef NO_SUPCALLR0VMM
2502	rc = VERR_GENERAL_FAILURE;
2503	#else
2504	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2505	if (RT_LIKELY(rc == VINF_SUCCESS))
2506	rc = pVCpu->vmm.s.iLastGZRc;
2507	#endif
2508	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2509
2510	/*
2511	* Flush the loggers.
2512	*/
2513	#ifdef LOG_ENABLED
2514	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2515	if ( pLogger
2516	&& pLogger->offScratch > 0)
2517	RTLogFlushRC(NULL, pLogger);
2518	#endif
2519	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2520	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2521	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2522	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2523	#endif
2524	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2525	VMMR3FatalDump(pVM, pVCpu, rc);
2526	if (rc != VINF_VMM_CALL_HOST)
2527	{
2528	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2529	return rc;
2530	}
2531	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2532	if (RT_FAILURE(rc))
2533	return rc;
2534	}
2535	}
2536
2537	#endif /* VBOX_WITH_RAW_MODE */
2538
2539	/**
2540	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2541	*
2542	* @returns VBox status code.
2543	* @param pVM The cross context VM structure.
2544	* @param uOperation Operation to execute.
2545	* @param u64Arg Constant argument.
2546	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2547	* details.
2548	*/
2549	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2550	{
2551	PVMCPU pVCpu = VMMGetCpu(pVM);
2552	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2553	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2554	}
2555
2556
2557	/**
2558	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2559	*
2560	* @returns VBox status code.
2561	* @param pVM The cross context VM structure.
2562	* @param pVCpu The cross context VM structure.
2563	* @param enmOperation Operation to execute.
2564	* @param u64Arg Constant argument.
2565	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2566	* details.
2567	*/
2568	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2569	{
2570	int rc;
2571	for (;;)
2572	{
2573	#ifdef NO_SUPCALLR0VMM
2574	rc = VERR_GENERAL_FAILURE;
2575	#else
2576	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2577	#endif
2578	/*
2579	* Flush the logs.
2580	*/
2581	#ifdef LOG_ENABLED
2582	if ( pVCpu->vmm.s.pR0LoggerR3
2583	&& pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2584	RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2585	#endif
2586	if (rc != VINF_VMM_CALL_HOST)
2587	break;
2588	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2589	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2590	break;
2591	/* Resume R0 */
2592	}
2593
2594	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2595	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2596	VERR_IPE_UNEXPECTED_INFO_STATUS);
2597	return rc;
2598	}
2599
2600
2601	#ifdef VBOX_WITH_RAW_MODE
2602	/**
2603	* Resumes executing hypervisor code when interrupted by a queue flush or a
2604	* debug event.
2605	*
2606	* @returns VBox status code.
2607	* @param pVM The cross context VM structure.
2608	* @param pVCpu The cross context virtual CPU structure.
2609	*/
2610	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2611	{
2612	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2613	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2614
2615	/*
2616	* We hide log flushes (outer) and hypervisor interrupts (inner).
2617	*/
2618	for (;;)
2619	{
2620	int rc;
2621	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2622	do
2623	{
2624	# ifdef NO_SUPCALLR0VMM
2625	rc = VERR_GENERAL_FAILURE;
2626	# else
2627	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2628	if (RT_LIKELY(rc == VINF_SUCCESS))
2629	rc = pVCpu->vmm.s.iLastGZRc;
2630	# endif
2631	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2632
2633	/*
2634	* Flush the loggers.
2635	*/
2636	# ifdef LOG_ENABLED
2637	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2638	if ( pLogger
2639	&& pLogger->offScratch > 0)
2640	RTLogFlushRC(NULL, pLogger);
2641	# endif
2642	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2643	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2644	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2645	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2646	# endif
2647	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2648	VMMR3FatalDump(pVM, pVCpu, rc);
2649	if (rc != VINF_VMM_CALL_HOST)
2650	{
2651	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2652	return rc;
2653	}
2654	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2655	if (RT_FAILURE(rc))
2656	return rc;
2657	}
2658	}
2659	#endif /* VBOX_WITH_RAW_MODE */
2660
2661
2662	/**
2663	* Service a call to the ring-3 host code.
2664	*
2665	* @returns VBox status code.
2666	* @param pVM The cross context VM structure.
2667	* @param pVCpu The cross context virtual CPU structure.
2668	* @remarks Careful with critsects.
2669	*/
2670	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2671	{
2672	/*
2673	* We must also check for pending critsect exits or else we can deadlock
2674	* when entering other critsects here.
2675	*/
2676	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2677	PDMCritSectBothFF(pVCpu);
2678
2679	switch (pVCpu->vmm.s.enmCallRing3Operation)
2680	{
2681	/*
2682	* Acquire a critical section.
2683	*/
2684	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2685	{
2686	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2687	true /fCallRing3/);
2688	break;
2689	}
2690
2691	/*
2692	* Enter a r/w critical section exclusively.
2693	*/
2694	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2695	{
2696	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2697	true /fCallRing3/);
2698	break;
2699	}
2700
2701	/*
2702	* Enter a r/w critical section shared.
2703	*/
2704	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2705	{
2706	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2707	true /fCallRing3/);
2708	break;
2709	}
2710
2711	/*
2712	* Acquire the PDM lock.
2713	*/
2714	case VMMCALLRING3_PDM_LOCK:
2715	{
2716	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2717	break;
2718	}
2719
2720	/*
2721	* Grow the PGM pool.
2722	*/
2723	case VMMCALLRING3_PGM_POOL_GROW:
2724	{
2725	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2726	break;
2727	}
2728
2729	/*
2730	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2731	*/
2732	case VMMCALLRING3_PGM_MAP_CHUNK:
2733	{
2734	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2735	break;
2736	}
2737
2738	/*
2739	* Allocates more handy pages.
2740	*/
2741	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2742	{
2743	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2744	break;
2745	}
2746
2747	/*
2748	* Allocates a large page.
2749	*/
2750	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2751	{
2752	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2753	break;
2754	}
2755
2756	/*
2757	* Acquire the PGM lock.
2758	*/
2759	case VMMCALLRING3_PGM_LOCK:
2760	{
2761	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2762	break;
2763	}
2764
2765	/*
2766	* Acquire the MM hypervisor heap lock.
2767	*/
2768	case VMMCALLRING3_MMHYPER_LOCK:
2769	{
2770	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2771	break;
2772	}
2773
2774	#ifdef VBOX_WITH_REM
2775	/*
2776	* Flush REM handler notifications.
2777	*/
2778	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2779	{
2780	REMR3ReplayHandlerNotifications(pVM);
2781	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2782	break;
2783	}
2784	#endif
2785
2786	/*
2787	* This is a noop. We just take this route to avoid unnecessary
2788	* tests in the loops.
2789	*/
2790	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2791	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2792	LogAlways(("FLUSH\n"));
2793	break;
2794
2795	/*
2796	* Set the VM error message.
2797	*/
2798	case VMMCALLRING3_VM_SET_ERROR:
2799	VMR3SetErrorWorker(pVM);
2800	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2801	break;
2802
2803	/*
2804	* Set the VM runtime error message.
2805	*/
2806	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2807	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2808	break;
2809
2810	/*
2811	* Signal a ring 0 hypervisor assertion.
2812	* Cancel the longjmp operation that's in progress.
2813	*/
2814	case VMMCALLRING3_VM_R0_ASSERTION:
2815	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2816	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2817	#ifdef RT_ARCH_X86
2818	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2819	#else
2820	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2821	#endif
2822	#ifdef VMM_R0_SWITCH_STACK
2823	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2824	#endif
2825	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2826	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2827	return VERR_VMM_RING0_ASSERTION;
2828
2829	/*
2830	* A forced switch to ring 0 for preemption purposes.
2831	*/
2832	case VMMCALLRING3_VM_R0_PREEMPT:
2833	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2834	break;
2835
2836	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2837	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2838	break;
2839
2840	default:
2841	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2842	return VERR_VMM_UNKNOWN_RING3_CALL;
2843	}
2844
2845	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2846	return VINF_SUCCESS;
2847	}
2848
2849
2850	/**
2851	* Displays the Force action Flags.
2852	*
2853	* @param pVM The cross context VM structure.
2854	* @param pHlp The output helpers.
2855	* @param pszArgs The additional arguments (ignored).
2856	*/
2857	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2858	{
2859	int c;
2860	uint32_t f;
2861	NOREF(pszArgs);
2862
2863	#define PRINT_FLAG(prf,flag) do { \
2864	if (f & (prf##flag)) \
2865	{ \
2866	static const char *s_psz = #flag; \
2867	if (!(c % 6)) \
2868	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2869	else \
2870	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2871	c++; \
2872	f &= ~(prf##flag); \
2873	} \
2874	} while (0)
2875
2876	#define PRINT_GROUP(prf,grp,sfx) do { \
2877	if (f & (prf##grp##sfx)) \
2878	{ \
2879	static const char *s_psz = #grp; \
2880	if (!(c % 5)) \
2881	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2882	else \
2883	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2884	c++; \
2885	} \
2886	} while (0)
2887
2888	/*
2889	* The global flags.
2890	*/
2891	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2892	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2893
2894	/* show the flag mnemonics */
2895	c = 0;
2896	f = fGlobalForcedActions;
2897	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2898	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2899	PRINT_FLAG(VM_FF_,PDM_DMA);
2900	PRINT_FLAG(VM_FF_,DBGF);
2901	PRINT_FLAG(VM_FF_,REQUEST);
2902	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2903	PRINT_FLAG(VM_FF_,RESET);
2904	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2905	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2906	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2907	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2908	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2909	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2910	if (f)
2911	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2912	else
2913	pHlp->pfnPrintf(pHlp, "\n");
2914
2915	/* the groups */
2916	c = 0;
2917	f = fGlobalForcedActions;
2918	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2919	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2920	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2921	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2922	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2923	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2924	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2925	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2926	if (c)
2927	pHlp->pfnPrintf(pHlp, "\n");
2928
2929	/*
2930	* Per CPU flags.
2931	*/
2932	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2933	{
2934	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2935	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2936
2937	/* show the flag mnemonics */
2938	c = 0;
2939	f = fLocalForcedActions;
2940	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2941	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2942	PRINT_FLAG(VMCPU_FF_,TIMER);
2943	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2944	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2945	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2946	PRINT_FLAG(VMCPU_FF_,UNHALT);
2947	PRINT_FLAG(VMCPU_FF_,IEM);
2948	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2949	PRINT_FLAG(VMCPU_FF_,DBGF);
2950	PRINT_FLAG(VMCPU_FF_,REQUEST);
2951	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2952	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2953	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2954	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2955	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2956	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2957	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2958	PRINT_FLAG(VMCPU_FF_,TO_R3);
2959	PRINT_FLAG(VMCPU_FF_,IOM);
2960	#ifdef VBOX_WITH_RAW_MODE
2961	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2962	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2963	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2964	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2965	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2966	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2967	PRINT_FLAG(VMCPU_FF_,CPUM);
2968	#endif
2969	if (f)
2970	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2971	else
2972	pHlp->pfnPrintf(pHlp, "\n");
2973
2974	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2975	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2976
2977	/* the groups */
2978	c = 0;
2979	f = fLocalForcedActions;
2980	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2981	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2982	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2983	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2984	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2985	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2986	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2987	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2988	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2989	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2990	if (c)
2991	pHlp->pfnPrintf(pHlp, "\n");
2992	}
2993
2994	#undef PRINT_FLAG
2995	#undef PRINT_GROUP
2996	}
2997

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 72453

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