VMM.cpp@ 73009

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1	/* $Id: VMM.cpp 72819 2018-07-03 10:01:20Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_csam
32	* - @subpage pg_dbgf
33	* - @subpage pg_em
34	* - @subpage pg_gim
35	* - @subpage pg_gmm
36	* - @subpage pg_gvmm
37	* - @subpage pg_hm
38	* - @subpage pg_iem
39	* - @subpage pg_iom
40	* - @subpage pg_mm
41	* - @subpage pg_patm
42	* - @subpage pg_pdm
43	* - @subpage pg_pgm
44	* - @subpage pg_rem
45	* - @subpage pg_selm
46	* - @subpage pg_ssm
47	* - @subpage pg_stam
48	* - @subpage pg_tm
49	* - @subpage pg_trpm
50	* - @subpage pg_vm
51	*
52	*
53	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
54	*
55	*
56	* @section sec_vmmstate VMM State
57	*
58	* @image html VM_Statechart_Diagram.gif
59	*
60	* To be written.
61	*
62	*
63	* @subsection subsec_vmm_init VMM Initialization
64	*
65	* To be written.
66	*
67	*
68	* @subsection subsec_vmm_term VMM Termination
69	*
70	* To be written.
71	*
72	*
73	* @section sec_vmm_limits VMM Limits
74	*
75	* There are various resource limits imposed by the VMM and it's
76	* sub-components. We'll list some of them here.
77	*
78	* On 64-bit hosts:
79	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
80	* can be increased up to 64K - 1.
81	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
82	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
83	* - A VM can be assigned all the memory we can use (16TB), however, the
84	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
85	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
86	*
87	* On 32-bit hosts:
88	* - Max 127 VMs. Imposed by GMM's per page structure.
89	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
90	* ROM pages. The limit is imposed by the 28-bit page ID used
91	* internally in GMM. It is also limited by PAE.
92	* - A VM can be assigned all the memory GMM can allocate, however, the
93	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
94	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
95	*
96	*/
97
98
99	/*********************************************************************************************************************************
100	* Header Files *
101	*********************************************************************************************************************************/
102	#define LOG_GROUP LOG_GROUP_VMM
103	#include <VBox/vmm/vmm.h>
104	#include <VBox/vmm/vmapi.h>
105	#include <VBox/vmm/pgm.h>
106	#include <VBox/vmm/cfgm.h>
107	#include <VBox/vmm/pdmqueue.h>
108	#include <VBox/vmm/pdmcritsect.h>
109	#include <VBox/vmm/pdmcritsectrw.h>
110	#include <VBox/vmm/pdmapi.h>
111	#include <VBox/vmm/cpum.h>
112	#include <VBox/vmm/gim.h>
113	#include <VBox/vmm/mm.h>
114	#include <VBox/vmm/nem.h>
115	#include <VBox/vmm/iom.h>
116	#include <VBox/vmm/trpm.h>
117	#include <VBox/vmm/selm.h>
118	#include <VBox/vmm/em.h>
119	#include <VBox/sup.h>
120	#include <VBox/vmm/dbgf.h>
121	#include <VBox/vmm/csam.h>
122	#include <VBox/vmm/patm.h>
123	#include <VBox/vmm/apic.h>
124	#ifdef VBOX_WITH_REM
125	# include <VBox/vmm/rem.h>
126	#endif
127	#include <VBox/vmm/ssm.h>
128	#include <VBox/vmm/ftm.h>
129	#include <VBox/vmm/tm.h>
130	#include "VMMInternal.h"
131	#include "VMMSwitcher.h"
132	#include <VBox/vmm/vm.h>
133	#include <VBox/vmm/uvm.h>
134
135	#include <VBox/err.h>
136	#include <VBox/param.h>
137	#include <VBox/version.h>
138	#include <VBox/vmm/hm.h>
139	#include <iprt/assert.h>
140	#include <iprt/alloc.h>
141	#include <iprt/asm.h>
142	#include <iprt/time.h>
143	#include <iprt/semaphore.h>
144	#include <iprt/stream.h>
145	#include <iprt/string.h>
146	#include <iprt/stdarg.h>
147	#include <iprt/ctype.h>
148	#include <iprt/x86.h>
149
150
151	/*********************************************************************************************************************************
152	* Defined Constants And Macros *
153	*********************************************************************************************************************************/
154	/** The saved state version. */
155	#define VMM_SAVED_STATE_VERSION 4
156	/** The saved state version used by v3.0 and earlier. (Teleportation) */
157	#define VMM_SAVED_STATE_VERSION_3_0 3
158
159	/** Macro for flushing the ring-0 logging. */
160	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
161	do { \
162	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
163	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
164	{ /* likely? */ } \
165	else \
166	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
167	} while (0)
168
169
170	/*********************************************************************************************************************************
171	* Internal Functions *
172	*********************************************************************************************************************************/
173	static int vmmR3InitStacks(PVM pVM);
174	static int vmmR3InitLoggers(PVM pVM);
175	static void vmmR3InitRegisterStats(PVM pVM);
176	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
177	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
178	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
179	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
180	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
181	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
182	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
183
184
185	/**
186	* Initializes the VMM.
187	*
188	* @returns VBox status code.
189	* @param pVM The cross context VM structure.
190	*/
191	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
192	{
193	LogFlow(("VMMR3Init\n"));
194
195	/*
196	* Assert alignment, sizes and order.
197	*/
198	AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
199	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
200	AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
201
202	/*
203	* Init basic VM VMM members.
204	*/
205	pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
206	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
207	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
208	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
209	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
210	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
211	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
212	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
213	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
214	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
215
216	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
217	* The EMT yield interval. The EMT yielding is a hack we employ to play a
218	* bit nicer with the rest of the system (like for instance the GUI).
219	*/
220	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
221	23 /* Value arrived at after experimenting with the grub boot prompt. */);
222	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
223
224
225	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
226	* Controls whether we employ per-cpu preemption timers to limit the time
227	* spent executing guest code. This option is not available on all
228	* platforms and we will silently ignore this setting then. If we are
229	* running in VT-x mode, we will use the VMX-preemption timer instead of
230	* this one when possible.
231	*/
232	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
233	rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
234	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
235
236	/*
237	* Initialize the VMM rendezvous semaphores.
238	*/
239	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
240	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
241	return VERR_NO_MEMORY;
242	for (VMCPUID i = 0; i < pVM->cCpus; i++)
243	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
244	for (VMCPUID i = 0; i < pVM->cCpus; i++)
245	{
246	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
247	AssertRCReturn(rc, rc);
248	}
249	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
258	AssertRCReturn(rc, rc);
259	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
260	AssertRCReturn(rc, rc);
261	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
262	AssertRCReturn(rc, rc);
263	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
264	AssertRCReturn(rc, rc);
265
266	/*
267	* Register the saved state data unit.
268	*/
269	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
270	NULL, NULL, NULL,
271	NULL, vmmR3Save, NULL,
272	NULL, vmmR3Load, NULL);
273	if (RT_FAILURE(rc))
274	return rc;
275
276	/*
277	* Register the Ring-0 VM handle with the session for fast ioctl calls.
278	*/
279	rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
280	if (RT_FAILURE(rc))
281	return rc;
282
283	/*
284	* Init various sub-components.
285	*/
286	rc = vmmR3SwitcherInit(pVM);
287	if (RT_SUCCESS(rc))
288	{
289	rc = vmmR3InitStacks(pVM);
290	if (RT_SUCCESS(rc))
291	{
292	rc = vmmR3InitLoggers(pVM);
293
294	#ifdef VBOX_WITH_NMI
295	/*
296	* Allocate mapping for the host APIC.
297	*/
298	if (RT_SUCCESS(rc))
299	{
300	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
301	AssertRC(rc);
302	}
303	#endif
304	if (RT_SUCCESS(rc))
305	{
306	/*
307	* Debug info and statistics.
308	*/
309	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
310	vmmR3InitRegisterStats(pVM);
311	vmmInitFormatTypes();
312
313	return VINF_SUCCESS;
314	}
315	}
316	/** @todo Need failure cleanup. */
317
318	//more todo in here?
319	//if (RT_SUCCESS(rc))
320	//{
321	//}
322	//int rc2 = vmmR3TermCoreCode(pVM);
323	//AssertRC(rc2));
324	}
325
326	return rc;
327	}
328
329
330	/**
331	* Allocate & setup the VMM RC stack(s) (for EMTs).
332	*
333	* The stacks are also used for long jumps in Ring-0.
334	*
335	* @returns VBox status code.
336	* @param pVM The cross context VM structure.
337	*
338	* @remarks The optional guard page gets it protection setup up during R3 init
339	* completion because of init order issues.
340	*/
341	static int vmmR3InitStacks(PVM pVM)
342	{
343	int rc = VINF_SUCCESS;
344	#ifdef VMM_R0_SWITCH_STACK
345	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
346	#else
347	uint32_t fFlags = 0;
348	#endif
349
350	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
351	{
352	PVMCPU pVCpu = &pVM->aCpus[idCpu];
353
354	#ifdef VBOX_STRICT_VMM_STACK
355	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
356	#else
357	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
358	#endif
359	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
360	if (RT_SUCCESS(rc))
361	{
362	#ifdef VBOX_STRICT_VMM_STACK
363	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
364	#endif
365	#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
366	/* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
367	if (VM_IS_RAW_MODE_ENABLED(pVM))
368	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
369	else
370	#endif
371	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
372	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
373	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
374	AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
375
376	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
377	}
378	}
379
380	return rc;
381	}
382
383
384	/**
385	* Initialize the loggers.
386	*
387	* @returns VBox status code.
388	* @param pVM The cross context VM structure.
389	*/
390	static int vmmR3InitLoggers(PVM pVM)
391	{
392	int rc;
393	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
394
395	/*
396	* Allocate RC & R0 Logger instances (they are finalized in the relocator).
397	*/
398	#ifdef LOG_ENABLED
399	PRTLOGGER pLogger = RTLogDefaultInstance();
400	if (pLogger)
401	{
402	if (VM_IS_RAW_MODE_ENABLED(pVM))
403	{
404	pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
405	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
406	if (RT_FAILURE(rc))
407	return rc;
408	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
409	}
410
411	# ifdef VBOX_WITH_R0_LOGGING
412	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
413	for (VMCPUID i = 0; i < pVM->cCpus; i++)
414	{
415	PVMCPU pVCpu = &pVM->aCpus[i];
416	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
417	(void **)&pVCpu->vmm.s.pR0LoggerR3);
418	if (RT_FAILURE(rc))
419	return rc;
420	pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
421	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
422	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
423	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
424	}
425	# endif
426	}
427	#endif /* LOG_ENABLED */
428
429	/*
430	* Release logging.
431	*/
432	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
433	if (pRelLogger)
434	{
435	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
436	/*
437	* Allocate RC release logger instances (finalized in the relocator).
438	*/
439	if (VM_IS_RAW_MODE_ENABLED(pVM))
440	{
441	pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
442	rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
443	if (RT_FAILURE(rc))
444	return rc;
445	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
446	}
447	#endif
448
449	/*
450	* Ring-0 release logger.
451	*/
452	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
453	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
454	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
455
456	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
457	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
458	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
459
460	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
461
462	for (VMCPUID i = 0; i < pVM->cCpus; i++)
463	{
464	PVMCPU pVCpu = &pVM->aCpus[i];
465	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
466	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
467	if (RT_FAILURE(rc))
468	return rc;
469	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
470	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
471	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
472	pVmmLogger->pVM = pVM->pVMR0;
473	pVmmLogger->cbLogger = (uint32_t)cbLogger;
474	pVmmLogger->fCreated = false;
475	pVmmLogger->fFlushingDisabled = false;
476	pVmmLogger->fRegistered = false;
477	pVmmLogger->idCpu = i;
478
479	char szR0ThreadName[16];
480	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
481	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_OFFSETOF(VMMR0LOGGER, Logger),
482	pfnLoggerWrapper, pfnLoggerFlush,
483	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
484	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
485
486	/* We only update the release log instance here. */
487	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_OFFSETOF(VMMR0LOGGER, Logger),
488	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
489	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
490
491	pVmmLogger->fCreated = true;
492	}
493	}
494
495	return VINF_SUCCESS;
496	}
497
498
499	/**
500	* VMMR3Init worker that register the statistics with STAM.
501	*
502	* @param pVM The cross context VM structure.
503	*/
504	static void vmmR3InitRegisterStats(PVM pVM)
505	{
506	RT_NOREF_PV(pVM);
507
508	/*
509	* Statistics.
510	*/
511	STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
520	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
521	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
522	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
523	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
524	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
525	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
526	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
527	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
528	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
529	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
530	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
531	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
532	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
533	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
534	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
535	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
536	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
537	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
538	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
539	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
540	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
541	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
542	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
543	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
544	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
545	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
546	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
547	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
548	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
549	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
550	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
551	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
552	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
553	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
554	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
555	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
556	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
557	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
558	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
559	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
560	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
561	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
562	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
563	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
564	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
565	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
566	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
567	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
568	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
569	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
570	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
571	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
572	STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
573	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
574	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
575	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
576
577	#ifdef VBOX_WITH_STATISTICS
578	for (VMCPUID i = 0; i < pVM->cCpus; i++)
579	{
580	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
581	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
582	STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
583	}
584	#endif
585	}
586
587
588	/**
589	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
590	*
591	* @returns VBox status code.
592	* @param pVM The cross context VM structure.
593	* @param pVCpu The cross context per CPU structure.
594	* @thread EMT(pVCpu)
595	*/
596	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
597	{
598	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
599	}
600
601
602	/**
603	* Initializes the R0 VMM.
604	*
605	* @returns VBox status code.
606	* @param pVM The cross context VM structure.
607	*/
608	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
609	{
610	int rc;
611	PVMCPU pVCpu = VMMGetCpu(pVM);
612	Assert(pVCpu && pVCpu->idCpu == 0);
613
614	#ifdef LOG_ENABLED
615	/*
616	* Initialize the ring-0 logger if we haven't done so yet.
617	*/
618	if ( pVCpu->vmm.s.pR0LoggerR3
619	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
620	{
621	rc = VMMR3UpdateLoggers(pVM);
622	if (RT_FAILURE(rc))
623	return rc;
624	}
625	#endif
626
627	/*
628	* Call Ring-0 entry with init code.
629	*/
630	for (;;)
631	{
632	#ifdef NO_SUPCALLR0VMM
633	//rc = VERR_GENERAL_FAILURE;
634	rc = VINF_SUCCESS;
635	#else
636	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
637	#endif
638	/*
639	* Flush the logs.
640	*/
641	#ifdef LOG_ENABLED
642	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
643	#endif
644	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
645	if (rc != VINF_VMM_CALL_HOST)
646	break;
647	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
648	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
649	break;
650	/* Resume R0 */
651	}
652
653	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
654	{
655	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
656	if (RT_SUCCESS(rc))
657	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
658	}
659
660	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
661	if (pVM->aCpus[0].vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
662	LogRel(("VMM: Enabled thread-context hooks\n"));
663	else
664	LogRel(("VMM: Thread-context hooks unavailable\n"));
665
666	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
667	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
668	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
669	else
670	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
671	if (pVM->vmm.s.fIsPreemptPossible)
672	LogRel(("VMM: Kernel preemption is possible\n"));
673	else
674	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
675
676	/*
677	* Send all EMTs to ring-0 to get their logger initialized.
678	*/
679	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
680	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, &pVM->aCpus[idCpu]);
681
682	return rc;
683	}
684
685
686	#ifdef VBOX_WITH_RAW_MODE
687	/**
688	* Initializes the RC VMM.
689	*
690	* @returns VBox status code.
691	* @param pVM The cross context VM structure.
692	*/
693	VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
694	{
695	PVMCPU pVCpu = VMMGetCpu(pVM);
696	Assert(pVCpu && pVCpu->idCpu == 0);
697
698	/* In VMX mode, there's no need to init RC. */
699	if (!VM_IS_RAW_MODE_ENABLED(pVM))
700	return VINF_SUCCESS;
701
702	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
703
704	/*
705	* Call VMMRCInit():
706	* -# resolve the address.
707	* -# setup stackframe and EIP to use the trampoline.
708	* -# do a generic hypervisor call.
709	*/
710	RTRCPTR RCPtrEP;
711	int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "VMMRCEntry", &RCPtrEP);
712	if (RT_SUCCESS(rc))
713	{
714	CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
715	uint64_t u64TS = RTTimeProgramStartNanoTS();
716	CPUMPushHyper(pVCpu, RT_HI_U32(u64TS)); /* Param 4: The program startup TS - Hi. */
717	CPUMPushHyper(pVCpu, RT_LO_U32(u64TS)); /* Param 4: The program startup TS - Lo. */
718	CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
719	CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
720	CPUMPushHyper(pVCpu, VMMRC_DO_VMMRC_INIT); /* Param 1: Operation. */
721	CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
722	CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
723	CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
724	CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
725	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
726
727	for (;;)
728	{
729	#ifdef NO_SUPCALLR0VMM
730	//rc = VERR_GENERAL_FAILURE;
731	rc = VINF_SUCCESS;
732	#else
733	rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
734	#endif
735	#ifdef LOG_ENABLED
736	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
737	if ( pLogger
738	&& pLogger->offScratch > 0)
739	RTLogFlushRC(NULL, pLogger);
740	#endif
741	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
742	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
743	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
744	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
745	#endif
746	if (rc != VINF_VMM_CALL_HOST)
747	break;
748	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
749	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
750	break;
751	}
752
753	/* Don't trigger assertions or guru if raw-mode is unavailable. */
754	if (rc != VERR_SUPDRV_NO_RAW_MODE_HYPER_V_ROOT)
755	{
756	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
757	{
758	VMMR3FatalDump(pVM, pVCpu, rc);
759	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
760	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
761	}
762	AssertRC(rc);
763	}
764	}
765	return rc;
766	}
767	#endif /* VBOX_WITH_RAW_MODE */
768
769
770	/**
771	* Called when an init phase completes.
772	*
773	* @returns VBox status code.
774	* @param pVM The cross context VM structure.
775	* @param enmWhat Which init phase.
776	*/
777	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
778	{
779	int rc = VINF_SUCCESS;
780
781	switch (enmWhat)
782	{
783	case VMINITCOMPLETED_RING3:
784	{
785	/*
786	* Set page attributes to r/w for stack pages.
787	*/
788	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
789	{
790	rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
791	X86_PTE_P \| X86_PTE_A \| X86_PTE_D \| X86_PTE_RW);
792	AssertRCReturn(rc, rc);
793	}
794
795	/*
796	* Create the EMT yield timer.
797	*/
798	rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
799	AssertRCReturn(rc, rc);
800
801	rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
802	AssertRCReturn(rc, rc);
803
804	#ifdef VBOX_WITH_NMI
805	/*
806	* Map the host APIC into GC - This is AMD/Intel + Host OS specific!
807	*/
808	rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
809	X86_PTE_P \| X86_PTE_RW \| X86_PTE_PWT \| X86_PTE_PCD \| X86_PTE_A \| X86_PTE_D);
810	AssertRCReturn(rc, rc);
811	#endif
812
813	#ifdef VBOX_STRICT_VMM_STACK
814	/*
815	* Setup the stack guard pages: Two inaccessible pages at each sides of the
816	* stack to catch over/under-flows.
817	*/
818	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
819	{
820	uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
821
822	memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
823	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /fSet/);
824
825	memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
826	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /fSet/);
827	}
828	pVM->vmm.s.fStackGuardsStationed = true;
829	#endif
830	break;
831	}
832
833	case VMINITCOMPLETED_HM:
834	{
835	/*
836	* Disable the periodic preemption timers if we can use the
837	* VMX-preemption timer instead.
838	*/
839	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
840	&& HMR3IsVmxPreemptionTimerUsed(pVM))
841	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
842	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
843
844	/*
845	* Last chance for GIM to update its CPUID leaves if it requires
846	* knowledge/information from HM initialization.
847	*/
848	rc = GIMR3InitCompleted(pVM);
849	AssertRCReturn(rc, rc);
850
851	/*
852	* CPUM's post-initialization (print CPUIDs).
853	*/
854	CPUMR3LogCpuIds(pVM);
855	break;
856	}
857
858	default: /* shuts up gcc */
859	break;
860	}
861
862	return rc;
863	}
864
865
866	/**
867	* Terminate the VMM bits.
868	*
869	* @returns VBox status code.
870	* @param pVM The cross context VM structure.
871	*/
872	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
873	{
874	PVMCPU pVCpu = VMMGetCpu(pVM);
875	Assert(pVCpu && pVCpu->idCpu == 0);
876
877	/*
878	* Call Ring-0 entry with termination code.
879	*/
880	int rc;
881	for (;;)
882	{
883	#ifdef NO_SUPCALLR0VMM
884	//rc = VERR_GENERAL_FAILURE;
885	rc = VINF_SUCCESS;
886	#else
887	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
888	#endif
889	/*
890	* Flush the logs.
891	*/
892	#ifdef LOG_ENABLED
893	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
894	#endif
895	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
896	if (rc != VINF_VMM_CALL_HOST)
897	break;
898	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
899	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
900	break;
901	/* Resume R0 */
902	}
903	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
904	{
905	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
906	if (RT_SUCCESS(rc))
907	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
908	}
909
910	for (VMCPUID i = 0; i < pVM->cCpus; i++)
911	{
912	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
913	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
914	}
915	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
916	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
917	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
918	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
919	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
920	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
921	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
922	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
923	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
924	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
925	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
926	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
927	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
928	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
929	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
930	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
931
932	#ifdef VBOX_STRICT_VMM_STACK
933	/*
934	* Make the two stack guard pages present again.
935	*/
936	if (pVM->vmm.s.fStackGuardsStationed)
937	{
938	for (VMCPUID i = 0; i < pVM->cCpus; i++)
939	{
940	uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
941	MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /fSet/);
942	MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /fSet/);
943	}
944	pVM->vmm.s.fStackGuardsStationed = false;
945	}
946	#endif
947
948	vmmTermFormatTypes();
949	return rc;
950	}
951
952
953	/**
954	* Applies relocations to data and code managed by this
955	* component. This function will be called at init and
956	* whenever the VMM need to relocate it self inside the GC.
957	*
958	* The VMM will need to apply relocations to the core code.
959	*
960	* @param pVM The cross context VM structure.
961	* @param offDelta The relocation delta.
962	*/
963	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
964	{
965	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
966
967	/*
968	* Recalc the RC address.
969	*/
970	#ifdef VBOX_WITH_RAW_MODE
971	pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
972	#endif
973
974	/*
975	* The stack.
976	*/
977	for (VMCPUID i = 0; i < pVM->cCpus; i++)
978	{
979	PVMCPU pVCpu = &pVM->aCpus[i];
980
981	CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
982
983	pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
984	pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
985	}
986
987	/*
988	* All the switchers.
989	*/
990	vmmR3SwitcherRelocate(pVM, offDelta);
991
992	/*
993	* Get other RC entry points.
994	*/
995	if (VM_IS_RAW_MODE_ENABLED(pVM))
996	{
997	int rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
998	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
999
1000	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
1001	AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
1002	}
1003
1004	/*
1005	* Update the logger.
1006	*/
1007	VMMR3UpdateLoggers(pVM);
1008	}
1009
1010
1011	/**
1012	* Updates the settings for the RC and R0 loggers.
1013	*
1014	* @returns VBox status code.
1015	* @param pVM The cross context VM structure.
1016	*/
1017	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
1018	{
1019	/*
1020	* Simply clone the logger instance (for RC).
1021	*/
1022	int rc = VINF_SUCCESS;
1023	RTRCPTR RCPtrLoggerFlush = 0;
1024
1025	if ( pVM->vmm.s.pRCLoggerR3
1026	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1027	\|\| pVM->vmm.s.pRCRelLoggerR3
1028	#endif
1029	)
1030	{
1031	Assert(VM_IS_RAW_MODE_ENABLED(pVM));
1032	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
1033	AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
1034	}
1035
1036	if (pVM->vmm.s.pRCLoggerR3)
1037	{
1038	Assert(VM_IS_RAW_MODE_ENABLED(pVM));
1039	RTRCPTR RCPtrLoggerWrapper = 0;
1040	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
1041	AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
1042
1043	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1044	rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
1045	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
1046	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
1047	}
1048
1049	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1050	if (pVM->vmm.s.pRCRelLoggerR3)
1051	{
1052	Assert(VM_IS_RAW_MODE_ENABLED(pVM));
1053	RTRCPTR RCPtrLoggerWrapper = 0;
1054	rc = PDMR3LdrGetSymbolRC(pVM, VMMRC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
1055	AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
1056
1057	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1058	rc = RTLogCloneRC(RTLogRelGetDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
1059	RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
1060	AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
1061	}
1062	#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
1063
1064	#ifdef LOG_ENABLED
1065	/*
1066	* For the ring-0 EMT logger, we use a per-thread logger instance
1067	* in ring-0. Only initialize it once.
1068	*/
1069	PRTLOGGER const pDefault = RTLogDefaultInstance();
1070	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1071	{
1072	PVMCPU pVCpu = &pVM->aCpus[i];
1073	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1074	if (pR0LoggerR3)
1075	{
1076	if (!pR0LoggerR3->fCreated)
1077	{
1078	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
1079	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
1080	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
1081
1082	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
1083	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
1084	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
1085
1086	char szR0ThreadName[16];
1087	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
1088	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
1089	pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1090	pfnLoggerWrapper, pfnLoggerFlush,
1091	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
1092	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
1093
1094	pR0LoggerR3->idCpu = i;
1095	pR0LoggerR3->fCreated = true;
1096	pR0LoggerR3->fFlushingDisabled = false;
1097	}
1098
1099	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
1100	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
1101	AssertRC(rc);
1102	}
1103	}
1104	#endif
1105	return rc;
1106	}
1107
1108
1109	/**
1110	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
1111	*
1112	* @returns Pointer to the buffer.
1113	* @param pVM The cross context VM structure.
1114	*/
1115	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
1116	{
1117	if (!VM_IS_RAW_MODE_ENABLED(pVM))
1118	return pVM->vmm.s.szRing0AssertMsg1;
1119
1120	RTRCPTR RCPtr;
1121	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
1122	if (RT_SUCCESS(rc))
1123	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1124
1125	return NULL;
1126	}
1127
1128
1129	/**
1130	* Returns the VMCPU of the specified virtual CPU.
1131	*
1132	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
1133	*
1134	* @param pUVM The user mode VM handle.
1135	* @param idCpu The ID of the virtual CPU.
1136	*/
1137	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
1138	{
1139	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
1140	AssertReturn(idCpu < pUVM->cCpus, NULL);
1141	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1142	return &pUVM->pVM->aCpus[idCpu];
1143	}
1144
1145
1146	/**
1147	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1148	*
1149	* @returns Pointer to the buffer.
1150	* @param pVM The cross context VM structure.
1151	*/
1152	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1153	{
1154	if (!VM_IS_RAW_MODE_ENABLED(pVM))
1155	return pVM->vmm.s.szRing0AssertMsg2;
1156
1157	RTRCPTR RCPtr;
1158	int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1159	if (RT_SUCCESS(rc))
1160	return (const char *)MMHyperRCToR3(pVM, RCPtr);
1161
1162	return NULL;
1163	}
1164
1165
1166	/**
1167	* Execute state save operation.
1168	*
1169	* @returns VBox status code.
1170	* @param pVM The cross context VM structure.
1171	* @param pSSM SSM operation handle.
1172	*/
1173	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1174	{
1175	LogFlow(("vmmR3Save:\n"));
1176
1177	/*
1178	* Save the started/stopped state of all CPUs except 0 as it will always
1179	* be running. This avoids breaking the saved state version. :-)
1180	*/
1181	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1182	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1183
1184	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1185	}
1186
1187
1188	/**
1189	* Execute state load operation.
1190	*
1191	* @returns VBox status code.
1192	* @param pVM The cross context VM structure.
1193	* @param pSSM SSM operation handle.
1194	* @param uVersion Data layout version.
1195	* @param uPass The data pass.
1196	*/
1197	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1198	{
1199	LogFlow(("vmmR3Load:\n"));
1200	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1201
1202	/*
1203	* Validate version.
1204	*/
1205	if ( uVersion != VMM_SAVED_STATE_VERSION
1206	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
1207	{
1208	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1209	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1210	}
1211
1212	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1213	{
1214	/* Ignore the stack bottom, stack pointer and stack bits. */
1215	RTRCPTR RCPtrIgnored;
1216	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1217	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1218	#ifdef RT_OS_DARWIN
1219	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1220	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1221	&& SSMR3HandleRevision(pSSM) >= 48858
1222	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1223	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1224	)
1225	SSMR3Skip(pSSM, 16384);
1226	else
1227	SSMR3Skip(pSSM, 8192);
1228	#else
1229	SSMR3Skip(pSSM, 8192);
1230	#endif
1231	}
1232
1233	/*
1234	* Restore the VMCPU states. VCPU 0 is always started.
1235	*/
1236	VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1237	for (VMCPUID i = 1; i < pVM->cCpus; i++)
1238	{
1239	bool fStarted;
1240	int rc = SSMR3GetBool(pSSM, &fStarted);
1241	if (RT_FAILURE(rc))
1242	return rc;
1243	VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1244	}
1245
1246	/* terminator */
1247	uint32_t u32;
1248	int rc = SSMR3GetU32(pSSM, &u32);
1249	if (RT_FAILURE(rc))
1250	return rc;
1251	if (u32 != UINT32_MAX)
1252	{
1253	AssertMsgFailed(("u32=%#x\n", u32));
1254	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1255	}
1256	return VINF_SUCCESS;
1257	}
1258
1259
1260	#ifdef VBOX_WITH_RAW_MODE
1261	/**
1262	* Resolve a builtin RC symbol.
1263	*
1264	* Called by PDM when loading or relocating RC modules.
1265	*
1266	* @returns VBox status
1267	* @param pVM The cross context VM structure.
1268	* @param pszSymbol Symbol to resolve.
1269	* @param pRCPtrValue Where to store the symbol value.
1270	*
1271	* @remark This has to work before VMMR3Relocate() is called.
1272	*/
1273	VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1274	{
1275	if (!strcmp(pszSymbol, "g_Logger"))
1276	{
1277	if (pVM->vmm.s.pRCLoggerR3)
1278	pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1279	*pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1280	}
1281	else if (!strcmp(pszSymbol, "g_RelLogger"))
1282	{
1283	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1284	if (pVM->vmm.s.pRCRelLoggerR3)
1285	pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1286	*pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1287	# else
1288	*pRCPtrValue = NIL_RTRCPTR;
1289	# endif
1290	}
1291	else
1292	return VERR_SYMBOL_NOT_FOUND;
1293	return VINF_SUCCESS;
1294	}
1295	#endif /* VBOX_WITH_RAW_MODE */
1296
1297
1298	/**
1299	* Suspends the CPU yielder.
1300	*
1301	* @param pVM The cross context VM structure.
1302	*/
1303	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1304	{
1305	VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1306	if (!pVM->vmm.s.cYieldResumeMillies)
1307	{
1308	uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1309	uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1310	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1311	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1312	else
1313	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1314	TMTimerStop(pVM->vmm.s.pYieldTimer);
1315	}
1316	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1317	}
1318
1319
1320	/**
1321	* Stops the CPU yielder.
1322	*
1323	* @param pVM The cross context VM structure.
1324	*/
1325	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1326	{
1327	if (!pVM->vmm.s.cYieldResumeMillies)
1328	TMTimerStop(pVM->vmm.s.pYieldTimer);
1329	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1330	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1331	}
1332
1333
1334	/**
1335	* Resumes the CPU yielder when it has been a suspended or stopped.
1336	*
1337	* @param pVM The cross context VM structure.
1338	*/
1339	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1340	{
1341	if (pVM->vmm.s.cYieldResumeMillies)
1342	{
1343	TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1344	pVM->vmm.s.cYieldResumeMillies = 0;
1345	}
1346	}
1347
1348
1349	/**
1350	* Internal timer callback function.
1351	*
1352	* @param pVM The cross context VM structure.
1353	* @param pTimer The timer handle.
1354	* @param pvUser User argument specified upon timer creation.
1355	*/
1356	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1357	{
1358	NOREF(pvUser);
1359
1360	/*
1361	* This really needs some careful tuning. While we shouldn't be too greedy since
1362	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1363	* because that'll cause us to stop up.
1364	*
1365	* The current logic is to use the default interval when there is no lag worth
1366	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1367	*
1368	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1369	* so the lag is up to date.)
1370	*/
1371	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1372	if ( u64Lag < 50000000 /* 50ms */
1373	\|\| ( u64Lag < 1000000000 /* 1s */
1374	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1375	)
1376	{
1377	uint64_t u64Elapsed = RTTimeNanoTS();
1378	pVM->vmm.s.u64LastYield = u64Elapsed;
1379
1380	RTThreadYield();
1381
1382	#ifdef LOG_ENABLED
1383	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1384	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1385	#endif
1386	}
1387	TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1388	}
1389
1390
1391	#ifdef VBOX_WITH_RAW_MODE
1392	/**
1393	* Executes guest code in the raw-mode context.
1394	*
1395	* @param pVM The cross context VM structure.
1396	* @param pVCpu The cross context virtual CPU structure.
1397	*/
1398	VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1399	{
1400	Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1401
1402	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1403
1404	/*
1405	* Set the hypervisor to resume executing a CPUM resume function
1406	* in CPUMRCA.asm.
1407	*/
1408	CPUMSetHyperState(pVCpu,
1409	CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1410	? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1411	: pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1412	pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1413	0, /* eax */
1414	VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1415
1416	/*
1417	* We hide log flushes (outer) and hypervisor interrupts (inner).
1418	*/
1419	for (;;)
1420	{
1421	#ifdef VBOX_STRICT
1422	if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) \|\| CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1423	EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1424	PGMMapCheck(pVM);
1425	# ifdef VBOX_WITH_SAFE_STR
1426	SELMR3CheckShadowTR(pVM);
1427	# endif
1428	#endif
1429	int rc;
1430	do
1431	{
1432	#ifdef NO_SUPCALLR0VMM
1433	rc = VERR_GENERAL_FAILURE;
1434	#else
1435	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1436	if (RT_LIKELY(rc == VINF_SUCCESS))
1437	rc = pVCpu->vmm.s.iLastGZRc;
1438	#endif
1439	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1440
1441	/*
1442	* Flush the logs.
1443	*/
1444	#ifdef LOG_ENABLED
1445	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1446	if ( pLogger
1447	&& pLogger->offScratch > 0)
1448	RTLogFlushRC(NULL, pLogger);
1449	#endif
1450	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1451	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1452	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1453	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
1454	#endif
1455	if (rc != VINF_VMM_CALL_HOST)
1456	{
1457	Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1458	return rc;
1459	}
1460	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1461	if (RT_FAILURE(rc))
1462	return rc;
1463	/* Resume GC */
1464	}
1465	}
1466	#endif /* VBOX_WITH_RAW_MODE */
1467
1468
1469	/**
1470	* Executes guest code (Intel VT-x and AMD-V).
1471	*
1472	* @param pVM The cross context VM structure.
1473	* @param pVCpu The cross context virtual CPU structure.
1474	*/
1475	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1476	{
1477	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1478
1479	for (;;)
1480	{
1481	int rc;
1482	do
1483	{
1484	#ifdef NO_SUPCALLR0VMM
1485	rc = VERR_GENERAL_FAILURE;
1486	#else
1487	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1488	if (RT_LIKELY(rc == VINF_SUCCESS))
1489	rc = pVCpu->vmm.s.iLastGZRc;
1490	#endif
1491	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1492
1493	#if 0 /** @todo triggers too often */
1494	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1495	#endif
1496
1497	/*
1498	* Flush the logs
1499	*/
1500	#ifdef LOG_ENABLED
1501	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1502	#endif
1503	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1504	if (rc != VINF_VMM_CALL_HOST)
1505	{
1506	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1507	return rc;
1508	}
1509	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1510	if (RT_FAILURE(rc))
1511	return rc;
1512	/* Resume R0 */
1513	}
1514	}
1515
1516
1517	/**
1518	* Perform one of the fast I/O control VMMR0 operation.
1519	*
1520	* @returns VBox strict status code.
1521	* @param pVM The cross context VM structure.
1522	* @param pVCpu The cross context virtual CPU structure.
1523	* @param enmOperation The operation to perform.
1524	*/
1525	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1526	{
1527	for (;;)
1528	{
1529	VBOXSTRICTRC rcStrict;
1530	do
1531	{
1532	#ifdef NO_SUPCALLR0VMM
1533	rcStrict = VERR_GENERAL_FAILURE;
1534	#else
1535	rcStrict = SUPR3CallVMMR0Fast(pVM->pVMR0, enmOperation, pVCpu->idCpu);
1536	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1537	rcStrict = pVCpu->vmm.s.iLastGZRc;
1538	#endif
1539	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1540
1541	/*
1542	* Flush the logs
1543	*/
1544	#ifdef LOG_ENABLED
1545	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1546	#endif
1547	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1548	if (rcStrict != VINF_VMM_CALL_HOST)
1549	return rcStrict;
1550	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1551	if (RT_FAILURE(rc))
1552	return rc;
1553	/* Resume R0 */
1554	}
1555	}
1556
1557
1558	/**
1559	* VCPU worker for VMMSendStartupIpi.
1560	*
1561	* @param pVM The cross context VM structure.
1562	* @param idCpu Virtual CPU to perform SIPI on.
1563	* @param uVector The SIPI vector.
1564	*/
1565	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1566	{
1567	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1568	VMCPU_ASSERT_EMT(pVCpu);
1569
1570	/*
1571	* Active, halt and shutdown states of the processor all block SIPIs.
1572	* So we can safely discard the SIPI. See Intel spec. 26.6.2 "Activity State".
1573	*/
1574	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1575	return VERR_ACCESS_DENIED;
1576
1577
1578	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1579
1580	pCtx->cs.Sel = uVector << 8;
1581	pCtx->cs.ValidSel = uVector << 8;
1582	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1583	pCtx->cs.u64Base = uVector << 12;
1584	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1585	pCtx->rip = 0;
1586
1587	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1588
1589	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1590	EMSetState(pVCpu, EMSTATE_HALTED);
1591	return VINF_EM_RESCHEDULE;
1592	# else /* And if we go the VMCPU::enmState way it can stay here. */
1593	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1594	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1595	return VINF_SUCCESS;
1596	# endif
1597	}
1598
1599
1600	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1601	{
1602	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1603	VMCPU_ASSERT_EMT(pVCpu);
1604
1605	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1606
1607	/** @todo Figure out how to handle a nested-guest intercepts here for INIT
1608	* IPI (e.g. SVM_EXIT_INIT). */
1609
1610	PGMR3ResetCpu(pVM, pVCpu);
1611	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1612	APICR3InitIpi(pVCpu);
1613	TRPMR3ResetCpu(pVCpu);
1614	CPUMR3ResetCpu(pVM, pVCpu);
1615	EMR3ResetCpu(pVCpu);
1616	HMR3ResetCpu(pVCpu);
1617	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1618
1619	/* This will trickle up on the target EMT. */
1620	return VINF_EM_WAIT_SIPI;
1621	}
1622
1623
1624	/**
1625	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1626	* vector-dependent state and unhalting processor.
1627	*
1628	* @param pVM The cross context VM structure.
1629	* @param idCpu Virtual CPU to perform SIPI on.
1630	* @param uVector SIPI vector.
1631	*/
1632	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1633	{
1634	AssertReturnVoid(idCpu < pVM->cCpus);
1635
1636	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1637	AssertRC(rc);
1638	}
1639
1640
1641	/**
1642	* Sends init IPI to the virtual CPU.
1643	*
1644	* @param pVM The cross context VM structure.
1645	* @param idCpu Virtual CPU to perform int IPI on.
1646	*/
1647	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1648	{
1649	AssertReturnVoid(idCpu < pVM->cCpus);
1650
1651	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1652	AssertRC(rc);
1653	}
1654
1655
1656	/**
1657	* Registers the guest memory range that can be used for patching.
1658	*
1659	* @returns VBox status code.
1660	* @param pVM The cross context VM structure.
1661	* @param pPatchMem Patch memory range.
1662	* @param cbPatchMem Size of the memory range.
1663	*/
1664	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1665	{
1666	VM_ASSERT_EMT(pVM);
1667	if (HMIsEnabled(pVM))
1668	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1669
1670	return VERR_NOT_SUPPORTED;
1671	}
1672
1673
1674	/**
1675	* Deregisters the guest memory range that can be used for patching.
1676	*
1677	* @returns VBox status code.
1678	* @param pVM The cross context VM structure.
1679	* @param pPatchMem Patch memory range.
1680	* @param cbPatchMem Size of the memory range.
1681	*/
1682	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1683	{
1684	if (HMIsEnabled(pVM))
1685	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1686
1687	return VINF_SUCCESS;
1688	}
1689
1690
1691	/**
1692	* Common recursion handler for the other EMTs.
1693	*
1694	* @returns Strict VBox status code.
1695	* @param pVM The cross context VM structure.
1696	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1697	* @param rcStrict Current status code to be combined with the one
1698	* from this recursion and returned.
1699	*/
1700	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1701	{
1702	int rc2;
1703
1704	/*
1705	* We wait here while the initiator of this recursion reconfigures
1706	* everything. The last EMT to get in signals the initiator.
1707	*/
1708	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1709	{
1710	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1711	AssertLogRelRC(rc2);
1712	}
1713
1714	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1715	AssertLogRelRC(rc2);
1716
1717	/*
1718	* Do the normal rendezvous processing.
1719	*/
1720	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1721	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1722
1723	/*
1724	* Wait for the initiator to restore everything.
1725	*/
1726	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1727	AssertLogRelRC(rc2);
1728
1729	/*
1730	* Last thread out of here signals the initiator.
1731	*/
1732	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1733	{
1734	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1735	AssertLogRelRC(rc2);
1736	}
1737
1738	/*
1739	* Merge status codes and return.
1740	*/
1741	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1742	if ( rcStrict2 != VINF_SUCCESS
1743	&& ( rcStrict == VINF_SUCCESS
1744	\|\| rcStrict > rcStrict2))
1745	rcStrict = rcStrict2;
1746	return rcStrict;
1747	}
1748
1749
1750	/**
1751	* Count returns and have the last non-caller EMT wake up the caller.
1752	*
1753	* @returns VBox strict informational status code for EM scheduling. No failures
1754	* will be returned here, those are for the caller only.
1755	*
1756	* @param pVM The cross context VM structure.
1757	* @param rcStrict The current accumulated recursive status code,
1758	* to be merged with i32RendezvousStatus and
1759	* returned.
1760	*/
1761	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1762	{
1763	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1764
1765	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1766	if (cReturned == pVM->cCpus - 1U)
1767	{
1768	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1769	AssertLogRelRC(rc);
1770	}
1771
1772	/*
1773	* Merge the status codes, ignoring error statuses in this code path.
1774	*/
1775	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1776	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1777	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1778	VERR_IPE_UNEXPECTED_INFO_STATUS);
1779
1780	if (RT_SUCCESS(rcStrict2))
1781	{
1782	if ( rcStrict2 != VINF_SUCCESS
1783	&& ( rcStrict == VINF_SUCCESS
1784	\|\| rcStrict > rcStrict2))
1785	rcStrict = rcStrict2;
1786	}
1787	return rcStrict;
1788	}
1789
1790
1791	/**
1792	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1793	*
1794	* @returns VBox strict informational status code for EM scheduling. No failures
1795	* will be returned here, those are for the caller only. When
1796	* fIsCaller is set, VINF_SUCCESS is always returned.
1797	*
1798	* @param pVM The cross context VM structure.
1799	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1800	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1801	* not.
1802	* @param fFlags The flags.
1803	* @param pfnRendezvous The callback.
1804	* @param pvUser The user argument for the callback.
1805	*/
1806	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1807	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1808	{
1809	int rc;
1810	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1811
1812	/*
1813	* Enter, the last EMT triggers the next callback phase.
1814	*/
1815	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1816	if (cEntered != pVM->cCpus)
1817	{
1818	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1819	{
1820	/* Wait for our turn. */
1821	for (;;)
1822	{
1823	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1824	AssertLogRelRC(rc);
1825	if (!pVM->vmm.s.fRendezvousRecursion)
1826	break;
1827	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1828	}
1829	}
1830	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1831	{
1832	/* Wait for the last EMT to arrive and wake everyone up. */
1833	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1834	AssertLogRelRC(rc);
1835	Assert(!pVM->vmm.s.fRendezvousRecursion);
1836	}
1837	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1838	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1839	{
1840	/* Wait for our turn. */
1841	for (;;)
1842	{
1843	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1844	AssertLogRelRC(rc);
1845	if (!pVM->vmm.s.fRendezvousRecursion)
1846	break;
1847	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1848	}
1849	}
1850	else
1851	{
1852	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1853
1854	/*
1855	* The execute once is handled specially to optimize the code flow.
1856	*
1857	* The last EMT to arrive will perform the callback and the other
1858	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1859	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1860	* returns, that EMT will initiate the normal return sequence.
1861	*/
1862	if (!fIsCaller)
1863	{
1864	for (;;)
1865	{
1866	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1867	AssertLogRelRC(rc);
1868	if (!pVM->vmm.s.fRendezvousRecursion)
1869	break;
1870	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1871	}
1872
1873	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1874	}
1875	return VINF_SUCCESS;
1876	}
1877	}
1878	else
1879	{
1880	/*
1881	* All EMTs are waiting, clear the FF and take action according to the
1882	* execution method.
1883	*/
1884	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1885
1886	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1887	{
1888	/* Wake up everyone. */
1889	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1890	AssertLogRelRC(rc);
1891	}
1892	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1893	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1894	{
1895	/* Figure out who to wake up and wake it up. If it's ourself, then
1896	it's easy otherwise wait for our turn. */
1897	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1898	? 0
1899	: pVM->cCpus - 1U;
1900	if (pVCpu->idCpu != iFirst)
1901	{
1902	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1903	AssertLogRelRC(rc);
1904	for (;;)
1905	{
1906	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1907	AssertLogRelRC(rc);
1908	if (!pVM->vmm.s.fRendezvousRecursion)
1909	break;
1910	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1911	}
1912	}
1913	}
1914	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1915	}
1916
1917
1918	/*
1919	* Do the callback and update the status if necessary.
1920	*/
1921	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1922	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1923	{
1924	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1925	if (rcStrict2 != VINF_SUCCESS)
1926	{
1927	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1928	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1929	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1930	int32_t i32RendezvousStatus;
1931	do
1932	{
1933	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1934	if ( rcStrict2 == i32RendezvousStatus
1935	\|\| RT_FAILURE(i32RendezvousStatus)
1936	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1937	&& rcStrict2 > i32RendezvousStatus))
1938	break;
1939	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1940	}
1941	}
1942
1943	/*
1944	* Increment the done counter and take action depending on whether we're
1945	* the last to finish callback execution.
1946	*/
1947	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1948	if ( cDone != pVM->cCpus
1949	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1950	{
1951	/* Signal the next EMT? */
1952	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1953	{
1954	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1955	AssertLogRelRC(rc);
1956	}
1957	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1958	{
1959	Assert(cDone == pVCpu->idCpu + 1U);
1960	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1961	AssertLogRelRC(rc);
1962	}
1963	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1964	{
1965	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1966	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1967	AssertLogRelRC(rc);
1968	}
1969
1970	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1971	if (!fIsCaller)
1972	{
1973	for (;;)
1974	{
1975	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1976	AssertLogRelRC(rc);
1977	if (!pVM->vmm.s.fRendezvousRecursion)
1978	break;
1979	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1980	}
1981	}
1982	}
1983	else
1984	{
1985	/* Callback execution is all done, tell the rest to return. */
1986	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1987	AssertLogRelRC(rc);
1988	}
1989
1990	if (!fIsCaller)
1991	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1992	return rcStrictRecursion;
1993	}
1994
1995
1996	/**
1997	* Called in response to VM_FF_EMT_RENDEZVOUS.
1998	*
1999	* @returns VBox strict status code - EM scheduling. No errors will be returned
2000	* here, nor will any non-EM scheduling status codes be returned.
2001	*
2002	* @param pVM The cross context VM structure.
2003	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
2004	*
2005	* @thread EMT
2006	*/
2007	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
2008	{
2009	Assert(!pVCpu->vmm.s.fInRendezvous);
2010	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
2011	pVCpu->vmm.s.fInRendezvous = true;
2012	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
2013	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
2014	pVCpu->vmm.s.fInRendezvous = false;
2015	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2016	return VBOXSTRICTRC_TODO(rcStrict);
2017	}
2018
2019
2020	/**
2021	* Helper for resetting an single wakeup event sempahore.
2022	*
2023	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
2024	* @param hEvt The event semaphore to reset.
2025	*/
2026	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
2027	{
2028	for (uint32_t cLoops = 0; ; cLoops++)
2029	{
2030	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
2031	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
2032	return rc;
2033	}
2034	}
2035
2036
2037	/**
2038	* Worker for VMMR3EmtRendezvous that handles recursion.
2039	*
2040	* @returns VBox strict status code. This will be the first error,
2041	* VINF_SUCCESS, or an EM scheduling status code.
2042	*
2043	* @param pVM The cross context VM structure.
2044	* @param pVCpu The cross context virtual CPU structure of the
2045	* calling EMT.
2046	* @param fFlags Flags indicating execution methods. See
2047	* grp_VMMR3EmtRendezvous_fFlags.
2048	* @param pfnRendezvous The callback.
2049	* @param pvUser User argument for the callback.
2050	*
2051	* @thread EMT(pVCpu)
2052	*/
2053	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
2054	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2055	{
2056	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
2057	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2058	Assert(pVCpu->vmm.s.fInRendezvous);
2059
2060	/*
2061	* Save the current state.
2062	*/
2063	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2064	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
2065	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
2066	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
2067	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
2068
2069	/*
2070	* Check preconditions and save the current state.
2071	*/
2072	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2073	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2074	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2075	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2076	VERR_INTERNAL_ERROR);
2077	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
2078	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
2079
2080	/*
2081	* Reset the recursion prep and pop semaphores.
2082	*/
2083	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2084	AssertLogRelRCReturn(rc, rc);
2085	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2086	AssertLogRelRCReturn(rc, rc);
2087	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
2088	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
2089	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
2090	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
2091
2092	/*
2093	* Usher the other thread into the recursion routine.
2094	*/
2095	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
2096	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
2097
2098	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
2099	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
2100	while (cLeft-- > 0)
2101	{
2102	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
2103	AssertLogRelRC(rc);
2104	}
2105	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
2106	{
2107	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
2108	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
2109	{
2110	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
2111	AssertLogRelRC(rc);
2112	}
2113	}
2114	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
2115	{
2116	Assert(cLeft == pVCpu->idCpu);
2117	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
2118	{
2119	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
2120	AssertLogRelRC(rc);
2121	}
2122	}
2123	else
2124	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
2125	VERR_INTERNAL_ERROR_4);
2126
2127	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
2128	AssertLogRelRC(rc);
2129	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
2130	AssertLogRelRC(rc);
2131
2132
2133	/*
2134	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
2135	*/
2136	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
2137	{
2138	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
2139	AssertLogRelRC(rc);
2140	}
2141
2142	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
2143
2144	/*
2145	* Clear the slate and setup the new rendezvous.
2146	*/
2147	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2148	{
2149	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2150	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2151	}
2152	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2153	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2154	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2155	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2156
2157	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2158	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2159	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2160	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2161	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2162	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2163	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2164	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
2165
2166	/*
2167	* We're ready to go now, do normal rendezvous processing.
2168	*/
2169	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
2170	AssertLogRelRC(rc);
2171
2172	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
2173
2174	/*
2175	* The caller waits for the other EMTs to be done, return and waiting on the
2176	* pop semaphore.
2177	*/
2178	for (;;)
2179	{
2180	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2181	AssertLogRelRC(rc);
2182	if (!pVM->vmm.s.fRendezvousRecursion)
2183	break;
2184	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
2185	}
2186
2187	/*
2188	* Get the return code and merge it with the above recursion status.
2189	*/
2190	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
2191	if ( rcStrict2 != VINF_SUCCESS
2192	&& ( rcStrict == VINF_SUCCESS
2193	\|\| rcStrict > rcStrict2))
2194	rcStrict = rcStrict2;
2195
2196	/*
2197	* Restore the parent rendezvous state.
2198	*/
2199	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2200	{
2201	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
2202	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2203	}
2204	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2205	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2206	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2207	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2208
2209	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
2210	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2211	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
2212	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
2213	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
2214	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
2215	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
2216
2217	/*
2218	* Usher the other EMTs back to their parent recursion routine, waiting
2219	* for them to all get there before we return (makes sure they've been
2220	* scheduled and are past the pop event sem, see below).
2221	*/
2222	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
2223	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
2224	AssertLogRelRC(rc);
2225
2226	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
2227	{
2228	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
2229	AssertLogRelRC(rc);
2230	}
2231
2232	/*
2233	* We must reset the pop semaphore on the way out (doing the pop caller too,
2234	* just in case). The parent may be another recursion.
2235	*/
2236	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
2237	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
2238
2239	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
2240
2241	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
2242	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
2243	return rcStrict;
2244	}
2245
2246
2247	/**
2248	* EMT rendezvous.
2249	*
2250	* Gathers all the EMTs and execute some code on each of them, either in a one
2251	* by one fashion or all at once.
2252	*
2253	* @returns VBox strict status code. This will be the first error,
2254	* VINF_SUCCESS, or an EM scheduling status code.
2255	*
2256	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
2257	* doesn't support it or if the recursion is too deep.
2258	*
2259	* @param pVM The cross context VM structure.
2260	* @param fFlags Flags indicating execution methods. See
2261	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
2262	* descending and ascending rendezvous types support
2263	* recursion from inside @a pfnRendezvous.
2264	* @param pfnRendezvous The callback.
2265	* @param pvUser User argument for the callback.
2266	*
2267	* @thread Any.
2268	*/
2269	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
2270	{
2271	/*
2272	* Validate input.
2273	*/
2274	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
2275	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
2276	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2277	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
2278	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
2279	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
2280	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
2281	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
2282
2283	VBOXSTRICTRC rcStrict;
2284	PVMCPU pVCpu = VMMGetCpu(pVM);
2285	if (!pVCpu)
2286	{
2287	/*
2288	* Forward the request to an EMT thread.
2289	*/
2290	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
2291	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
2292	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2293	else
2294	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
2295	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2296	}
2297	else if ( pVM->cCpus == 1
2298	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
2299	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
2300	{
2301	/*
2302	* Shortcut for the single EMT case.
2303	*
2304	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
2305	* during vmR3Destroy after other emulation threads have started terminating.
2306	*/
2307	if (!pVCpu->vmm.s.fInRendezvous)
2308	{
2309	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
2310	pVCpu->vmm.s.fInRendezvous = true;
2311	pVM->vmm.s.fRendezvousFlags = fFlags;
2312	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2313	pVCpu->vmm.s.fInRendezvous = false;
2314	}
2315	else
2316	{
2317	/* Recursion. Do the same checks as in the SMP case. */
2318	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
2319	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
2320	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
2321	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2322	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2323	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2324	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2325	, VERR_DEADLOCK);
2326
2327	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
2328	pVM->vmm.s.cRendezvousRecursions++;
2329	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
2330	pVM->vmm.s.fRendezvousFlags = fFlags;
2331
2332	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
2333
2334	pVM->vmm.s.fRendezvousFlags = fParentFlags;
2335	pVM->vmm.s.cRendezvousRecursions--;
2336	}
2337	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2338	}
2339	else
2340	{
2341	/*
2342	* Spin lock. If busy, check for recursion, if not recursing wait for
2343	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2344	*/
2345	int rc;
2346	rcStrict = VINF_SUCCESS;
2347	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2348	{
2349	/* Allow recursion in some cases. */
2350	if ( pVCpu->vmm.s.fInRendezvous
2351	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2352	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2353	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2354	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2355	))
2356	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2357
2358	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2359	VERR_DEADLOCK);
2360
2361	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2362	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2363	{
2364	if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
2365	{
2366	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2367	if ( rc != VINF_SUCCESS
2368	&& ( rcStrict == VINF_SUCCESS
2369	\|\| rcStrict > rc))
2370	rcStrict = rc;
2371	/** @todo Perhaps deal with termination here? */
2372	}
2373	ASMNopPause();
2374	}
2375	}
2376
2377	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2378	Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
2379	Assert(!pVCpu->vmm.s.fInRendezvous);
2380	pVCpu->vmm.s.fInRendezvous = true;
2381
2382	/*
2383	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2384	*/
2385	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2386	{
2387	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2388	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2389	}
2390	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2391	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2392	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2393	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2394	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2395	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2396	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2397	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2398	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2399	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2400	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2401
2402	/*
2403	* Set the FF and poke the other EMTs.
2404	*/
2405	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2406	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2407
2408	/*
2409	* Do the same ourselves.
2410	*/
2411	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2412
2413	/*
2414	* The caller waits for the other EMTs to be done and return before doing
2415	* the cleanup. This makes away with wakeup / reset races we would otherwise
2416	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2417	*/
2418	for (;;)
2419	{
2420	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2421	AssertLogRelRC(rc);
2422	if (!pVM->vmm.s.fRendezvousRecursion)
2423	break;
2424	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2425	}
2426
2427	/*
2428	* Get the return code and clean up a little bit.
2429	*/
2430	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2431	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2432
2433	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2434	pVCpu->vmm.s.fInRendezvous = false;
2435
2436	/*
2437	* Merge rcStrict, rcStrict2 and rcStrict3.
2438	*/
2439	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2440	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2441	if ( rcStrict2 != VINF_SUCCESS
2442	&& ( rcStrict == VINF_SUCCESS
2443	\|\| rcStrict > rcStrict2))
2444	rcStrict = rcStrict2;
2445	if ( rcStrict3 != VINF_SUCCESS
2446	&& ( rcStrict == VINF_SUCCESS
2447	\|\| rcStrict > rcStrict3))
2448	rcStrict = rcStrict3;
2449	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2450	}
2451
2452	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2453	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2454	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2455	VERR_IPE_UNEXPECTED_INFO_STATUS);
2456	return VBOXSTRICTRC_VAL(rcStrict);
2457	}
2458
2459
2460	/**
2461	* Read from the ring 0 jump buffer stack.
2462	*
2463	* @returns VBox status code.
2464	*
2465	* @param pVM The cross context VM structure.
2466	* @param idCpu The ID of the source CPU context (for the address).
2467	* @param R0Addr Where to start reading.
2468	* @param pvBuf Where to store the data we've read.
2469	* @param cbRead The number of bytes to read.
2470	*/
2471	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2472	{
2473	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2474	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2475
2476	#ifdef VMM_R0_SWITCH_STACK
2477	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2478	#else
2479	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2480	#endif
2481	if ( off > VMM_STACK_SIZE
2482	\|\| off + cbRead >= VMM_STACK_SIZE)
2483	return VERR_INVALID_POINTER;
2484
2485	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2486	return VINF_SUCCESS;
2487	}
2488
2489	#ifdef VBOX_WITH_RAW_MODE
2490
2491	/**
2492	* Calls a RC function.
2493	*
2494	* @param pVM The cross context VM structure.
2495	* @param RCPtrEntry The address of the RC function.
2496	* @param cArgs The number of arguments in the ....
2497	* @param ... Arguments to the function.
2498	*/
2499	VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
2500	{
2501	va_list args;
2502	va_start(args, cArgs);
2503	int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
2504	va_end(args);
2505	return rc;
2506	}
2507
2508
2509	/**
2510	* Calls a RC function.
2511	*
2512	* @param pVM The cross context VM structure.
2513	* @param RCPtrEntry The address of the RC function.
2514	* @param cArgs The number of arguments in the ....
2515	* @param args Arguments to the function.
2516	*/
2517	VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
2518	{
2519	/* Raw mode implies 1 VCPU. */
2520	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2521	PVMCPU pVCpu = &pVM->aCpus[0];
2522
2523	Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
2524
2525	/*
2526	* Setup the call frame using the trampoline.
2527	*/
2528	CPUMSetHyperState(pVCpu,
2529	pVM->vmm.s.pfnCallTrampolineRC, /* eip */
2530	pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
2531	RCPtrEntry, /* eax */
2532	cArgs /* edx */
2533	);
2534
2535	#if 0
2536	memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
2537	#endif
2538	PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
2539	int i = cArgs;
2540	while (i-- > 0)
2541	*pFrame++ = va_arg(args, RTGCUINTPTR32);
2542
2543	CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
2544	CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
2545
2546	/*
2547	* We hide log flushes (outer) and hypervisor interrupts (inner).
2548	*/
2549	for (;;)
2550	{
2551	int rc;
2552	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2553	do
2554	{
2555	#ifdef NO_SUPCALLR0VMM
2556	rc = VERR_GENERAL_FAILURE;
2557	#else
2558	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2559	if (RT_LIKELY(rc == VINF_SUCCESS))
2560	rc = pVCpu->vmm.s.iLastGZRc;
2561	#endif
2562	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2563
2564	/*
2565	* Flush the loggers.
2566	*/
2567	#ifdef LOG_ENABLED
2568	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2569	if ( pLogger
2570	&& pLogger->offScratch > 0)
2571	RTLogFlushRC(NULL, pLogger);
2572	#endif
2573	#ifdef VBOX_WITH_RC_RELEASE_LOGGING
2574	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2575	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2576	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2577	#endif
2578	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2579	VMMR3FatalDump(pVM, pVCpu, rc);
2580	if (rc != VINF_VMM_CALL_HOST)
2581	{
2582	Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
2583	return rc;
2584	}
2585	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2586	if (RT_FAILURE(rc))
2587	return rc;
2588	}
2589	}
2590
2591	#endif /* VBOX_WITH_RAW_MODE */
2592
2593	/**
2594	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2595	*
2596	* @returns VBox status code.
2597	* @param pVM The cross context VM structure.
2598	* @param uOperation Operation to execute.
2599	* @param u64Arg Constant argument.
2600	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2601	* details.
2602	*/
2603	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2604	{
2605	PVMCPU pVCpu = VMMGetCpu(pVM);
2606	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2607	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2608	}
2609
2610
2611	/**
2612	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2613	*
2614	* @returns VBox status code.
2615	* @param pVM The cross context VM structure.
2616	* @param pVCpu The cross context VM structure.
2617	* @param enmOperation Operation to execute.
2618	* @param u64Arg Constant argument.
2619	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2620	* details.
2621	*/
2622	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2623	{
2624	int rc;
2625	for (;;)
2626	{
2627	#ifdef NO_SUPCALLR0VMM
2628	rc = VERR_GENERAL_FAILURE;
2629	#else
2630	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2631	#endif
2632	/*
2633	* Flush the logs.
2634	*/
2635	#ifdef LOG_ENABLED
2636	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2637	#endif
2638	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2639	if (rc != VINF_VMM_CALL_HOST)
2640	break;
2641	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2642	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2643	break;
2644	/* Resume R0 */
2645	}
2646
2647	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2648	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2649	VERR_IPE_UNEXPECTED_INFO_STATUS);
2650	return rc;
2651	}
2652
2653
2654	#ifdef VBOX_WITH_RAW_MODE
2655	/**
2656	* Resumes executing hypervisor code when interrupted by a queue flush or a
2657	* debug event.
2658	*
2659	* @returns VBox status code.
2660	* @param pVM The cross context VM structure.
2661	* @param pVCpu The cross context virtual CPU structure.
2662	*/
2663	VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2664	{
2665	Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2666	AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2667
2668	/*
2669	* We hide log flushes (outer) and hypervisor interrupts (inner).
2670	*/
2671	for (;;)
2672	{
2673	int rc;
2674	Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2675	do
2676	{
2677	# ifdef NO_SUPCALLR0VMM
2678	rc = VERR_GENERAL_FAILURE;
2679	# else
2680	rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2681	if (RT_LIKELY(rc == VINF_SUCCESS))
2682	rc = pVCpu->vmm.s.iLastGZRc;
2683	# endif
2684	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2685
2686	/*
2687	* Flush the loggers.
2688	*/
2689	# ifdef LOG_ENABLED
2690	PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2691	if ( pLogger
2692	&& pLogger->offScratch > 0)
2693	RTLogFlushRC(NULL, pLogger);
2694	# endif
2695	# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2696	PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2697	if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2698	RTLogFlushRC(RTLogRelGetDefaultInstance(), pRelLogger);
2699	# endif
2700	if (rc == VERR_TRPM_PANIC \|\| rc == VERR_TRPM_DONT_PANIC)
2701	VMMR3FatalDump(pVM, pVCpu, rc);
2702	if (rc != VINF_VMM_CALL_HOST)
2703	{
2704	Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2705	return rc;
2706	}
2707	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2708	if (RT_FAILURE(rc))
2709	return rc;
2710	}
2711	}
2712	#endif /* VBOX_WITH_RAW_MODE */
2713
2714
2715	/**
2716	* Service a call to the ring-3 host code.
2717	*
2718	* @returns VBox status code.
2719	* @param pVM The cross context VM structure.
2720	* @param pVCpu The cross context virtual CPU structure.
2721	* @remarks Careful with critsects.
2722	*/
2723	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2724	{
2725	/*
2726	* We must also check for pending critsect exits or else we can deadlock
2727	* when entering other critsects here.
2728	*/
2729	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2730	PDMCritSectBothFF(pVCpu);
2731
2732	switch (pVCpu->vmm.s.enmCallRing3Operation)
2733	{
2734	/*
2735	* Acquire a critical section.
2736	*/
2737	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2738	{
2739	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2740	true /fCallRing3/);
2741	break;
2742	}
2743
2744	/*
2745	* Enter a r/w critical section exclusively.
2746	*/
2747	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2748	{
2749	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2750	true /fCallRing3/);
2751	break;
2752	}
2753
2754	/*
2755	* Enter a r/w critical section shared.
2756	*/
2757	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2758	{
2759	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2760	true /fCallRing3/);
2761	break;
2762	}
2763
2764	/*
2765	* Acquire the PDM lock.
2766	*/
2767	case VMMCALLRING3_PDM_LOCK:
2768	{
2769	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2770	break;
2771	}
2772
2773	/*
2774	* Grow the PGM pool.
2775	*/
2776	case VMMCALLRING3_PGM_POOL_GROW:
2777	{
2778	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2779	break;
2780	}
2781
2782	/*
2783	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2784	*/
2785	case VMMCALLRING3_PGM_MAP_CHUNK:
2786	{
2787	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2788	break;
2789	}
2790
2791	/*
2792	* Allocates more handy pages.
2793	*/
2794	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2795	{
2796	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2797	break;
2798	}
2799
2800	/*
2801	* Allocates a large page.
2802	*/
2803	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2804	{
2805	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2806	break;
2807	}
2808
2809	/*
2810	* Acquire the PGM lock.
2811	*/
2812	case VMMCALLRING3_PGM_LOCK:
2813	{
2814	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2815	break;
2816	}
2817
2818	/*
2819	* Acquire the MM hypervisor heap lock.
2820	*/
2821	case VMMCALLRING3_MMHYPER_LOCK:
2822	{
2823	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2824	break;
2825	}
2826
2827	#ifdef VBOX_WITH_REM
2828	/*
2829	* Flush REM handler notifications.
2830	*/
2831	case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2832	{
2833	REMR3ReplayHandlerNotifications(pVM);
2834	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2835	break;
2836	}
2837	#endif
2838
2839	/*
2840	* This is a noop. We just take this route to avoid unnecessary
2841	* tests in the loops.
2842	*/
2843	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2844	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2845	LogAlways(("FLUSH\n"));
2846	break;
2847
2848	/*
2849	* Set the VM error message.
2850	*/
2851	case VMMCALLRING3_VM_SET_ERROR:
2852	VMR3SetErrorWorker(pVM);
2853	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2854	break;
2855
2856	/*
2857	* Set the VM runtime error message.
2858	*/
2859	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2860	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2861	break;
2862
2863	/*
2864	* Signal a ring 0 hypervisor assertion.
2865	* Cancel the longjmp operation that's in progress.
2866	*/
2867	case VMMCALLRING3_VM_R0_ASSERTION:
2868	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2869	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2870	#ifdef RT_ARCH_X86
2871	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2872	#else
2873	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2874	#endif
2875	#ifdef VMM_R0_SWITCH_STACK
2876	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2877	#endif
2878	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2879	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2880	return VERR_VMM_RING0_ASSERTION;
2881
2882	/*
2883	* A forced switch to ring 0 for preemption purposes.
2884	*/
2885	case VMMCALLRING3_VM_R0_PREEMPT:
2886	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2887	break;
2888
2889	case VMMCALLRING3_FTM_SET_CHECKPOINT:
2890	pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2891	break;
2892
2893	default:
2894	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2895	return VERR_VMM_UNKNOWN_RING3_CALL;
2896	}
2897
2898	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2899	return VINF_SUCCESS;
2900	}
2901
2902
2903	/**
2904	* Displays the Force action Flags.
2905	*
2906	* @param pVM The cross context VM structure.
2907	* @param pHlp The output helpers.
2908	* @param pszArgs The additional arguments (ignored).
2909	*/
2910	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2911	{
2912	int c;
2913	uint32_t f;
2914	NOREF(pszArgs);
2915
2916	#define PRINT_FLAG(prf,flag) do { \
2917	if (f & (prf##flag)) \
2918	{ \
2919	static const char *s_psz = #flag; \
2920	if (!(c % 6)) \
2921	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2922	else \
2923	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2924	c++; \
2925	f &= ~(prf##flag); \
2926	} \
2927	} while (0)
2928
2929	#define PRINT_GROUP(prf,grp,sfx) do { \
2930	if (f & (prf##grp##sfx)) \
2931	{ \
2932	static const char *s_psz = #grp; \
2933	if (!(c % 5)) \
2934	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2935	else \
2936	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2937	c++; \
2938	} \
2939	} while (0)
2940
2941	/*
2942	* The global flags.
2943	*/
2944	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2945	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2946
2947	/* show the flag mnemonics */
2948	c = 0;
2949	f = fGlobalForcedActions;
2950	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2951	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2952	PRINT_FLAG(VM_FF_,PDM_DMA);
2953	PRINT_FLAG(VM_FF_,DBGF);
2954	PRINT_FLAG(VM_FF_,REQUEST);
2955	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2956	PRINT_FLAG(VM_FF_,RESET);
2957	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2958	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2959	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2960	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2961	PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2962	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2963	if (f)
2964	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2965	else
2966	pHlp->pfnPrintf(pHlp, "\n");
2967
2968	/* the groups */
2969	c = 0;
2970	f = fGlobalForcedActions;
2971	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2972	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2973	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2974	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2975	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2976	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2977	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2978	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2979	if (c)
2980	pHlp->pfnPrintf(pHlp, "\n");
2981
2982	/*
2983	* Per CPU flags.
2984	*/
2985	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2986	{
2987	const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2988	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2989
2990	/* show the flag mnemonics */
2991	c = 0;
2992	f = fLocalForcedActions;
2993	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2994	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2995	PRINT_FLAG(VMCPU_FF_,TIMER);
2996	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2997	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2998	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2999	PRINT_FLAG(VMCPU_FF_,UNHALT);
3000	PRINT_FLAG(VMCPU_FF_,IEM);
3001	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
3002	PRINT_FLAG(VMCPU_FF_,DBGF);
3003	PRINT_FLAG(VMCPU_FF_,REQUEST);
3004	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
3005	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
3006	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
3007	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
3008	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
3009	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
3010	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
3011	PRINT_FLAG(VMCPU_FF_,TO_R3);
3012	PRINT_FLAG(VMCPU_FF_,IOM);
3013	#ifdef VBOX_WITH_RAW_MODE
3014	PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
3015	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
3016	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
3017	PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
3018	PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
3019	PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
3020	PRINT_FLAG(VMCPU_FF_,CPUM);
3021	#endif
3022	if (f)
3023	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
3024	else
3025	pHlp->pfnPrintf(pHlp, "\n");
3026
3027	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
3028	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
3029
3030	/* the groups */
3031	c = 0;
3032	f = fLocalForcedActions;
3033	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
3034	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
3035	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
3036	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
3037	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
3038	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
3039	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
3040	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
3041	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
3042	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
3043	if (c)
3044	pHlp->pfnPrintf(pHlp, "\n");
3045	}
3046
3047	#undef PRINT_FLAG
3048	#undef PRINT_GROUP
3049	}
3050

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 73009

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